A four-tube buck-boost converter control method and control circuit based on negative current correction
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- JIANGNAN UNIV
- Filing Date
- 2026-05-28
- Publication Date
- 2026-08-07
AI Technical Summary
1.现有控制方法通常采用近似平面代替理论移相占空比曲面,为保证变换器在全工况下稳定实现ZVS,拟合得到的移相占空比通常始终大于理论值,从而引入较大的软开关裕量;
1.降低移相角实时计算复杂度
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Figure CN122533407A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of buck-boost converter control, and in particular to a four-transistor Buck-Boost converter control method and control circuit based on negative current correction. Background Technology
[0002] With the development of new energy power generation, energy storage systems, and distributed DC power supply technology, power electronic converters are increasingly widely used in scenarios requiring wide input voltage, high power density, and high efficiency. In these applications, the input voltage typically has a wide range of variation, while the load side requires a stable output voltage. Therefore, buck-boost DC-DC converters need to possess strong wide-range regulation capabilities. Four-Switch Buck-Boost Converters (FSBBs) offer advantages over traditional non-isolated buck-boost topologies in terms of device quantity, power density, and system efficiency due to their identical input and output voltage polarity, lower device voltage stress, and applicability to a wide input voltage range. Furthermore, because they employ a fully active switching structure, the inductor current can flow bidirectionally, thus enabling ZVS (Zero Voltage Switching).
[0003] Currently, there is considerable research on control methods for FSBB converters. Among them, the PWM-based phase-shift control method can optimize the inductor current waveform by adjusting the duty cycle of the front and rear bridge arms and the phase shift angle, enabling the converter to achieve zero-voltage switching (ZVS) over a wider operating range and reducing the effective value of the inductor current. Therefore, this method has become one of the important control methods for FSBB converters.
[0004] While existing control methods for four-transistor Buck-Boost converters based on PWM plus phase-shift control can achieve stable buck-boost conversion over a wide input range and ensure ZVS for the switching transistors to a certain extent, they still have the following shortcomings: 1. Existing control methods typically use an approximate plane to replace the theoretical phase-shift duty cycle surface. To ensure that the converter can stably achieve ZVS under all operating conditions, the fitted phase-shift duty cycle is usually always greater than the theoretical value, thus introducing a large soft-switching margin. 2. Because the fitted value is too large, the inductor current will drop to the negative threshold prematurely. I ZVS This effect persists at that position for a period of time, causing the inductor current to plateau in the negative range, thereby increasing the inductor current ripple and effective value. The increase in the effective value of the inductor current will further lead to an increase in conduction losses, reduce the converter's operating efficiency, and is not conducive to the design of high-efficiency power supply systems. 3. During the switching process between PBCM and PDCM modes, an excessively large negative current margin will affect the continuity of the current waveform, which is not conducive to smooth mode switching and dynamic performance optimization. Summary of the Invention
[0005] To address the aforementioned technical problems, this invention proposes a control method and control circuit for a four-transistor Buck-Boost converter based on negative current correction. The technical solution of this invention is as follows: A control method for a four-transistor Buck-Boost converter based on negative current correction includes: When the converter operates in PBCM mode, the fitted phase shift duty cycle is obtained based on the converter's operating parameters. D θ_appr ; The inductor current in the converter is acquired, a detection signal characterizing the duration of the negative inductor current state is generated based on the inductor current, and a fitting error correction amount is generated based on the detection signal. D θ_amend ; Using the fitting error correction amount D θ_amend The fitted phase shift duty cycle D θ_appr Make corrections to obtain the corrected phase shift duty cycle. D θ_PBCM ; The corrected phase shift duty cycle D θ_PBCM When the converter is operating in PBCM mode, it controls the phase shift angle between the control signals of the first and second bridge arms of the converter.
[0006] A further technical solution is that the step of generating a detection signal characterizing the duration of the negative inductor current state based on the inductor current includes: The inductor current of the converter is compared with a zero-current reference to generate a comparison signal; The comparison signal is low-pass filtered to obtain the detection signal.
[0007] A further technical solution involves generating a fitting error correction amount based on the detection signal. D θ_amend ,include: The detection signal is compared with the reference value V. ref_neg The comparison is performed to obtain the error feedback signal; The error feedback signal is input to the regulator, and the regulator outputs the fitting error correction amount after adjustment. D θ_amend The regulator includes a PI regulator.
[0008] A further technical solution is that the reference value V ref_neg It can be represented as:
[0009] in, L c The inductance value of the inductor in the converter. I ZVS To achieve the required inductor current amplitude for zero-voltage switching of the switching transistors in the converter, V M To compare the effective level amplitude of the signals, V o The output voltage of the converter. V in The input voltage of the converter. T s This represents the switching cycle of the switching transistor in the converter.
[0010] A further technical solution is a modified phase shift duty cycle. D θ_PBCM It can be represented as: .
[0011] A further technical solution is that the fitted phase shift duty cycle is obtained based on the converter's operating parameters. Dθ_ appr This includes based on the input voltage of the converter. Vin and output current Io The fitted phase shift duty cycle was obtained through fitting. Dθ_appr The fitted phase shift duty cycle Dθ_appr It can be represented as:
[0012] in, a The first fitting coefficient, b The second fitting coefficient, c The third fitting coefficient.
[0013] A control circuit for a four-transistor Buck-Boost converter based on negative current correction is provided to implement the aforementioned control method for a four-transistor Buck-Boost converter based on negative current correction. The control circuit includes a PBCM phase-shift signal fitting module and a fitting error correction module. The PBCM phase-shift signal fitting module obtains the fitted phase-shift duty cycle corresponding to the PBCM operating mode based on the converter operating parameters. Dθ_appr ; The fitting error correction module acquires the inductor current in the converter, generates a detection signal characterizing the duration of the negative inductor current state based on the inductor current, and generates a fitting error correction amount based on the detection signal. D θ_amend ; Using the fitting error correction amount D θ_amend The fitted phase shift duty cycle D θ_appr Make corrections to obtain the corrected phase shift duty cycle. D θ_PBCM ; The corrected phase shift duty cycle D θ_PBCM Used to control the phase shift angle between the first bridge arm control signal and the second bridge arm control signal when the converter is operating in PBCM mode.
[0014] A further technical solution is that the fitting error correction module includes a fourth comparator, a low-pass filter, an error comparator, and a regulator, wherein... The first input terminal of the fourth comparator is connected to a zero-current reference, and the second input terminal of the fourth comparator is connected to an inductor current. i Lc The output of the fourth comparator is connected to the first input of the error comparator via a low-pass filter, and the second input of the error comparator is connected to the reference value V. ref_neg The output of the error comparator is connected to the input of the regulator, the output of the regulator is connected to the first input of the adder, and the output of the PBCM phase-shifting signal fitting module is connected to the second input of the adder. The fourth comparator compares the inductor current of the converter with a zero-current reference to generate a comparison signal; the low-pass filter performs low-pass filtering on the comparison signal to obtain the detection signal; the error comparator compares the detection signal with a reference value V. ref_neg The comparison is performed to obtain an error feedback signal, which is then input to the regulator. After adjustment, the regulator outputs the fitting error correction amount. D θ_amend The PBCM phase-shift signal fitting module outputs the fitted phase-shift duty cycle to the adder. D θ_appr The addition is fed to the adder, which will adjust the fitting error. D θ_amend With the fitted phase shift duty cycle D θ_appr The corrected phase shift duty cycle is obtained by adding them together. D θ_PBCM .
[0015] A further technical solution is that the control circuit further includes a PDCM phase-shifting signal generation module and a phase-shifting control module, wherein, The output of the PDCM phase-shifting signal generation module is connected to the first input of the maximum value selector, the output of the adder is connected to the second input of the maximum value selector, and the output of the maximum value selector is connected to the phase-shifting control module. The PDCM phase-shifting signal generation module is used to generate phase-shifting control quantities corresponding to the PDCM operating mode. D θ_PDCM ; When the converter is operating in PBCM mode, the phase shift control module adjusts the phase shift duty cycle according to the corrected phase shift duty cycle. D θ_PBCM The phase shift angle between the control signal of the first bridge arm and the control signal of the second bridge arm of the control converter; When the converter is operating in PDCM mode, the phase shift control module determines the phase shift control amount based on the phase shift control quantity. D θ_PDCM The phase shift angle between the control signal of the first bridge arm and the control signal of the second bridge arm of the control converter.
[0016] A further technical solution is that the control circuit further includes an output voltage regulation module and a valley current control module, wherein, The output voltage regulation module is used to realize closed-loop control of the converter output voltage and generate the switching transistors in the first bridge arm. Q 1 and switching transistor Q 2. Drive signal; The valley current control module is used to generate the switching transistor in the second bridge arm. Q 3 and switching transistors Q The drive signal of 4 is used to make the valley value of the inductor current in the converter reach the negative threshold value of the inductor current required for the zero-voltage switching of the switching transistor in the converter.
[0017] The beneficial technical effects of this invention are: 1. Reduce the complexity of real-time phase shift angle calculation This invention uses input voltage V in With output current I o The corresponding fitting expression replaces the complex theoretical phase shift angle formula, avoiding a large number of multiplication, division and square root operations in the traditional theoretical formula under PBCM mode, reducing the difficulty of control implementation, and facilitating implementation by control platforms such as analog circuits, DSPs, MCUs and FPGAs.
[0018] 2. Ensure that the switching transistor achieves ZVS under all operating conditions. This invention retains a certain soft-switching margin based on the fitted phase-shift control, allowing the inductor current to steadily decrease to... I ZVS This ensures the switching transistor Q 1. Q 2. Q 3 and Q 4. Zero-voltage turn-on can be achieved over a wide input voltage and load range, improving system operating efficiency.
[0019] 3. Eliminate the negative current plateau caused by fitting error In existing fitting control methods, to ensure ZVS, the fitted value is usually larger than the theoretical value, which can easily cause the inductor current to drop prematurely. I ZVS This results in a relatively long negative plateau. The present invention dynamically corrects the fitted phase-shift control quantity by detecting the duration of the negative inductor current, thereby eliminating the effects of fitting errors. I ZVS The current plateau ensures that the inductor current waveform perfectly matches the theoretical waveform of the PBCM mode.
[0020] 4. Reduce inductor current ripple and RMS value, and improve converter operating efficiency. Because the negative current plateau is weakened, the inductor current waveform is closer to the theoretical optimal state, thus reducing the inductor current ripple and effective value, thereby reducing the stress of the filter inductor current and the conduction loss of the device, and improving the overall operating efficiency of the converter. It is especially suitable for wide input voltage and high efficiency power supply systems.
[0021] 5. Facilitates engineering implementation The fitting error correction method proposed in this invention only adds simple control links such as comparators, low-pass filters and PI regulators to the original fitting control structure. It does not require changing the FSBB main circuit structure or rebuilding a complex control model. It can be easily implemented directly in existing PWM plus phase shift control systems and has good engineering application value. Attached Figure Description
[0022] Figure 1 This is a flowchart illustrating an embodiment of the four-transistor Buck-Boost converter control method based on negative current correction provided by the present invention.
[0023] Figure 2 This is the circuit schematic diagram of the FSBB converter provided by the present invention.
[0024] Figure 3 This is a schematic diagram of the converter's operating waveform when the fitted phase shift duty cycle is greater than the theoretical value of the phase shift duty cycle, provided by the present invention.
[0025] Figure 4 This is a schematic diagram of the converter's operating waveform when the fitted phase shift duty cycle is less than the theoretical value of the phase shift duty cycle, as provided by this invention.
[0026] Figure 5 This is the working waveform of the converter operating in PBCM mode under the control of the theoretical value of phase shift duty cycle provided by the present invention.
[0027] Figure 6 This is a block diagram of one embodiment of the four-transistor Buck-Boost converter control circuit based on negative current correction provided by the present invention.
[0028] Figure 7 This is a simulation result diagram of the first simulation experiment provided by the present invention.
[0029] Figure 8 This is a simulation result diagram of the second simulation experiment provided by the present invention.
[0030] Figure 9 This is a simulation result diagram of the third simulation experiment provided by the present invention. Detailed Implementation
[0031] The specific embodiments of the present invention will be further described below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of this disclosure.
[0032] This invention provides a control method for a four-transistor Buck-Boost converter based on negative current correction, such as... Figure 1 As shown, it includes: When the converter operates in PBCM mode, the fitted phase shift duty cycle D is obtained based on the converter's operating parameters. θ_appr ; The inductor current in the converter is acquired, a detection signal characterizing the duration of the negative inductor current state is generated based on the inductor current, and a fitting error correction amount D is generated based on the detection signal. θ_amend ; Using the fitting error correction factor D θ_amend The fitted phase shift duty cycle D θ_appr Make corrections to obtain the corrected phase shift duty cycle D. θ_PBCM ; The corrected phase shift duty cycle D θ_PBCM Used to control the phase shift angle between the first bridge arm control signal and the second bridge arm control signal when the converter is operating in PBCM mode.
[0033] Specifically, Figure 2 The circuit topology of a four-transistor Buck-Boost converter is shown, such as... Figure 2 As shown, the four-transistor Buck-Boost converter mainly consists of four switching transistors. Q 1. Q 2. Q 3. Q 4 and filter inductor L c Composition, including switching transistors Q 1. Switching transistor Q 2 connected in series to form the first bridge arm, switching transistor Q 3. Switching transistor Q The second bridge arm is formed by four series connections, with each switch connected in anti-parallel to a diode, and a filter inductor. L c It connects between the midpoints of the two bridge arms. The input voltage is connected to both ends of the first bridge arm. V in The output voltage at both ends of the second bridge arm V o Among them, the switching transistor Q 1 and switching transistor Q 2. Complementary conduction, switching transistor Q 3 and switching transistor Q 4. Complementary conduction.
[0034] In this type of converter, under PWM phase-shift control, the switching timing of the transistors in the first and second bridge arms is controlled by the first bridge arm control signal CLK1 and the second bridge arm control signal CLK2, which have a phase difference. The first bridge arm control signal CLK1 controls the switching transistors. Q At the turn-on time of bridge arm 1, the second bridge arm control signal CLK2 controls the switching transistor. Q At the turn-on time of 3, the phase difference between CLK1 and CLK2, after normalization, becomes the switching transistor. Q 1 and Q 3. Phase shift duty cycle between turn-on times.
[0035] The four-transistor Buck-Boost converter operates in two modes depending on the load conditions: PBCM (Pseudo-continuous conduction mode) and PDCM (Pseudo-discontinuous conduction mode). Q 1 and Q The phase shift duty cycle between 3 on-times is one of the core control variables in PWM phase-shift control. Its value directly determines the duration of the negative inductor current range, thus affecting the converter's operating mode. In PBCM mode, the inductor current (current filtering inductor) L c The current (the current) is intermittent but maintains a specific negative range during each switching cycle, and the peak value of the inductor current is controlled to achieve [the desired effect]. I ZVS(The negative threshold of inductor current required to achieve zero-voltage switching of the switching transistor) enables the switching transistor to achieve zero-voltage switching, which is suitable for medium and heavy load conditions; in PDCM mode, the average energy transferred by the inductor current in one cycle is small, so the phase shift duty cycle needs to be increased to expand the negative range of the inductor current, so as to ensure that the switching transistor can still achieve zero-voltage switching under light load conditions.
[0036] Theoretically, when the switching cycle of the switching transistor in the converter... T s Converter output voltage V o ,inductance L c Inductance value and current amplitude required to achieve ZVS I ZVS When determined, Q 1 and Q 3. Phase shift duty cycle between turn-on times D θ Variable input voltage V in and output current I o What it means is:
[0037] Because the theoretical expression is quite complex, directly calculating it in real time within the control circuit would increase the difficulty of control implementation. Therefore, the above theoretical expression is further... V in_0 , I o_0 Performing a Taylor expansion at () and ignoring higher-order terms, we get:
[0038] If the Taylor expansion point is determined, in the first term... V in The coefficient, in the second term I o The coefficients and the value of the third term should both be constants. To simplify the calculation, the above formula can be further simplified into a fitting expression:
[0039] in, a The first fitting coefficient, b The second fitting coefficient, c The third fitting coefficient is the fitted phase shift duty cycle obtained based on the converter's operating parameters. D θ_appr Specifically, based on the input voltage of the converter V in and output current Io The fitted phase shift duty cycle was obtained through fitting. D θ_appr The aforementioned a , b , c All are constants. In specific implementation, three suitable boundary working points (i.e., three sets of known points) can be selected. V in , I o , D θ (Data) Solve the system of equations to obtain the values of each fitting coefficient, and then determine the fitting plane.
[0040] As can be seen from the above, the fitted phase shift duty cycle obtained is... D θ_appr There is a fitting error between the theoretical value and the actual value. Figure 3-4 This illustrates the effect of fitting error on the inductor current waveform in the converter. Figure 3-4 In the current waveform shown, the red line represents the theoretical value of the phase shift duty cycle. D θ The inductor current waveform under control, with the blue dashed line representing the fitted phase shift duty cycle. D θ_appr The waveform of the inductor current under control. For example... Figure 3 As shown, if the fitted phase shift duty cycle D θ_appr Since the output voltage and current are lower than the theoretical value, according to the input-output relationship, the value needs to be increased to ensure that the output voltage and current remain constant. D y1 (Switching transistor) Q 1. The duty cycle of the drive signal causes the switching transistor to... Q 1. Turn-off time delay, then the switching transistor Q 2. Q 3. The conduction time will be shortened, causing the inductor current to fail to drop to - I zvs This leads to Q 1. Q Enabling version 4 does not enable ZVS.
[0041] like Figure 4 As shown, if the fitted phase shift duty cycle D θ_appr If it is greater than the theoretical value, it needs to be reduced. D y1 This will cause the inductor current to drop to - I ZVS The inductor current will be - I ZVSMaintaining this position for a period of time leads to increased inductor current ripple. Compared to the two cases mentioned above, only the case where the fitted phase shift duty cycle is too large can ensure that the switching transistor achieves zero-voltage switching (ZVS). Therefore, when selecting the fitting plane, it is essential to ensure that the fitted output value is not less than the theoretical value.
[0042] However, the fitting phase shift duty cycle D θ_appr A phase shift duty cycle greater than the theoretical value will cause the inductor current to be in the range of - I ZVS The formation of a relatively long sustaining plateau increases the effective value of the inductor current and conduction losses, reducing the converter's operating efficiency. Therefore, this invention introduces a negative current detection feedback correction stage based on the fitting phase-shift control. This stage does not change the basic structure of the original fitting control, but rather corrects the current detection feedback after fitting the phase-shift control. D θ_appr Subsequently, a correction value is generated based on the duration of the negative inductor current, and the fitted phase shift duty cycle is dynamically corrected to eliminate or reduce the negative current plateau caused by the fitting error.
[0043] In one embodiment of the present invention, the specific method for dynamically correcting the fitted phase shift duty cycle is as follows: the inductor current of the converter is... i Lc A comparison signal is generated by comparing the current to a zero-current reference. When the inductor current... i Lc When the current is less than zero, a comparison signal with an effective level (high level) is generated, indicating that the inductor current is low. i Lc Entering the negative range; when the inductor current i Lc When the current is greater than or equal to zero, an invalid level (low level) comparison signal is generated, indicating that the inductor current is zero. i Lc The signal is not in the negative range; the comparison signal is low-pass filtered to obtain the detection signal. In this embodiment, the effective level amplitude is... V M The invalid level amplitude is 0, that is, the comparison signal has an amplitude of V M The square wave, after being low-pass filtered, outputs the detection signal. V neg The average voltage signal is related to the duration of the negative current, and its amplitude is equal to the duty cycle of the negative current duration. D neg Compare the effective level amplitude of the signal V M The product of, that is V neg = D neg × VM If the inductor current remains in the negative range for a long time, the output value of the detection signal after low-pass filtering will be large; if the negative duration is short, the output value of the detection signal will be small. Therefore, the detection signal can be used to characterize the duration of the negative state of the inductor current, directly reflecting the length of the negative current plateau caused by the fitting error. The detection signal is compared with the reference value V. ref_neg The comparison yields an error feedback signal; this error feedback signal is then input to the regulator, which, after adjustment, outputs the fitting error correction amount D. θ_amend This allows for dynamic correction of the fitted phase shift duty cycle.
[0044] Figure 5 The theoretical value of the phase shift duty cycle is shown. D θ The main operating waveforms of the FSBB converter operating in PBCM mode under control are as follows: Figure 5 It can be seen that when the FSBB converter operates in PBCM mode, the theoretical duration of the negative inductor current can be calculated. T neg for:
[0045] Then the theoretically detected signal output value can be obtained. V neg_PCBM That is, the reference value V ref_neg It can be represented as:
[0046] in, L c This refers to the inductance value in the converter. I ZVS To achieve the required inductor current amplitude for zero-voltage switching of the switching transistors in the converter, V M To compare the effective level amplitude of the signals, V o The output voltage of the converter. V in The input voltage of the converter. T s This represents the switching cycle of the switching transistor in the converter.
[0047] The regulator includes a PI regulator and a corrected phase shift duty cycle D. θ_PBCM It can be represented as: .
[0048] When the phase shift duty cycle is fitted D θ_apprWhen the negative current plateau is too long due to the value exceeding the theoretical value, the error feedback signal prompts the PI regulator to output a reverse correction, reducing the actual phase shift control quantity (D). θ_PBCM ), thereby shortening the inductor current at - I ZVS The holding time at the point; conversely, when the duration of the negative current is insufficient, the correction amount is appropriately increased by the phase shift control amount to ensure that the inductor current can reach - I ZVS This invention satisfies the ZVS condition. It rapidly provides the fitted phase shift duty cycle through fitting and compensates for the fitting error based on the duration of the actual negative inductor current through a negative current detection feedback loop. This approach retains the advantages of simple and fast-responding fitting control while reducing the negative plateau problem caused by excessive fitting margin.
[0049] Furthermore, the present invention also provides a control circuit for a four-transistor Buck-Boost converter based on negative current correction, used to implement the above-mentioned control method for a four-transistor Buck-Boost converter based on negative current correction, such as... Figure 6 As shown, the control circuit includes a PBCM phase-shift signal fitting module and a fitting error correction module. The PBCM phase-shift signal fitting module obtains the fitted phase-shift duty cycle corresponding to the PBCM operating mode based on the converter's operating parameters. D θ_appr ; The fitting error correction module acquires the inductor current in the converter, generates a detection signal characterizing the duration of the negative inductor current state based on the inductor current, and generates a fitting error correction amount based on the detection signal. D θ_amend ; Using the fitting error correction amount D θ_amend The fitted phase shift duty cycle D θ_appr Make corrections to obtain the corrected phase shift duty cycle. D θ_PBCM ; The corrected phase shift duty cycle D θ_PBCM Used to control the phase shift angle between the first bridge arm control signal and the second bridge arm control signal when the converter is operating in PBCM mode.
[0050] Specifically, the fitting error correction module includes a fourth comparator (i.e., comparator 4), a low-pass filter, an error comparator, and a regulator, wherein... The first input terminal (non-inverting input terminal) of the fourth comparator is connected to a zero-current reference, and the second input terminal (inverting input terminal) is connected to the inductor current. iLc The power supply terminal of the fourth comparator is connected to the supply voltage, and the supply voltage value of the fourth comparator is the effective level amplitude of the comparison signal. V M The output of the fourth comparator is connected to the first input of the error comparator via a low-pass filter, and the second input of the error comparator is connected to the reference value V. ref_neg The output of the error comparator is connected to the input of the regulator, the output of the regulator is connected to the first input of the adder, and the output of the PBCM phase-shifting signal fitting module is connected to the second input of the adder. The fourth comparator compares the inductor current of the converter with a zero-current reference to generate a comparison signal. The low-pass filter performs low-pass filtering on the comparison signal to obtain the detection signal. The formation principle of the detection signal is consistent with that described above; please refer to the above explanation for details. The error comparator compares the detection signal with a reference value V. ref_neg Compare and calculate the detected signal with the reference value V. ref_neg The difference is used to obtain an error feedback signal, which is then input to the regulator. After adjustment, the regulator outputs the fitting error correction amount D. θ_amend The PBCM phase-shift signal fitting module outputs the fitted phase-shift duty cycle to the adder. D θ_appr The addition is fed to the adder, which will adjust the fitting error. D θ_amend With the fitted phase shift duty cycle D θ_appr The corrected phase shift duty cycle is obtained by adding them together. D θ_PBCM The regulator can be a PI regulator, and its specific form and working principle can be consistent with existing technology. The reference value V... ref_neg The value is consistent with the above, and will not be repeated here.
[0051] The PBCM phase-shifting signal fitting module uses a linear fitting expression based on the input voltage. V in and output current I o The phase-shift control quantity in PBCM mode is generated, and its input terminals receive respectively V in and I o After proportional and additive operations, the fitted phase shift duty cycle is output. D θ_appr This module uses simple linear operations instead of complex theoretical phase shift angle calculations, thereby reducing the difficulty of implementing the control circuit. The specific form of the linear fitting expression is consistent with that described above and will not be repeated here.
[0052] Furthermore, the control circuit also includes a PDCM phase-shift signal generation module, a phase-shift control module, an output voltage regulation module, and a valley current control module, wherein the phase-shift control module is connected to the output voltage regulation module and the valley current control module, and the output voltage regulation module is connected to the PDCM phase-shift signal generation module.
[0053] The output of the PDCM phase-shifting signal generation module is connected to the first input of the maximum value selector (MAX), the output of the adder is connected to the second input of the maximum value selector, and the output of the maximum value selector is connected to the input of the phase-shifting control module. The PDCM phase-shifting signal generation module is used to generate phase-shifting control quantities corresponding to the PDCM operating mode. D θ_PDCM This module uses input voltage. V in Output voltage V o and output voltage regulation signal V error Using this as input, a phase-shift control signal that meets the requirements for light-load soft switching is calculated. This generates the phase-shift control quantity. D θ_PDCM The specific method can be consistent with the existing technology, and will not be elaborated in this application.
[0054] Phase shift control quantity D θ_PDCM Compared with the corrected phase shift duty cycle D θ_PBCM After being selected by the maximum value selector, the input is sent to the phase shift control module. The maximum value selector takes the larger of the two values as the final phase shift control quantity. D θo The phase shift control quantity corresponding to PBCM mode or PDCM mode is automatically selected via the maximum value selector. D θo This allows the phase-shift control module to adjust the phase-shift duty cycle D according to the corrected phase-shift duty cycle when the converter is operating in PBCM mode. θ_PBCM The phase shift control module controls the phase shift angle between the control signals of the first and second bridge arms of the converter; when the converter is operating in PDCM mode, the phase shift control module determines the phase shift control value D based on the phase shift control value D. θ_PDCM The phase shift angle between the control signal of the first bridge arm and the control signal of the second bridge arm of the control converter.
[0055] The phase-shift control module specifically includes a third comparator (comparator 3) and a phase-shift pulse generation circuit, D θ_PDCM / D θ_PBCM The input is given to the first input (non-inverting input) of the third comparator, producing a sawtooth wave.V saw The input is given to the second input (inverting input) of the comparator, and the third comparator generates a phase-shifted logic signal. This phase-shifted logic signal is then fed into the phase-shifted pulse generation circuit, which outputs two narrow pulse signals with a phase difference: the first bridge arm control signal CLK1 and the second bridge arm control signal CLK2. CLK1 is used to determine... Q The activation time of 1 is determined by CLK2. Q The turn-on time of CLK3. By changing the phase difference between CLK1 and CLK2, the waveform of the inductor current of the FSBB converter can be adjusted. The specific form of the phase-shifting pulse generation circuit can be a commonly used form in this technical field.
[0056] Furthermore, the output voltage regulation module is used to realize closed-loop control of the converter output voltage and generate the switching transistors in the first bridge arm. Q 1 and switching transistor Q 2. The drive signal; the output voltage regulation module includes an output voltage regulation module error comparator, PI The regulator, the first comparator, and the first RS flip-flop (RS flip-flop 1) are connected to the output voltage of the converter. The two input terminals of the error comparator of the output voltage regulation module are respectively connected to the output voltage of the converter. V o and output voltage reference value V o_ref The error comparator obtains the difference between the two values to get the voltage error signal. The voltage error signal is then processed... PI The regulator outputs a voltage regulation signal. V error The first input (non-inverting input) of the first comparator is connected to a sawtooth wave. V saw The second input terminal (inverting input terminal) receives the output voltage adjustment signal. V error .
[0057] The output signal of the first comparator is connected to the reset terminal (R) of the first RS flip-flop, and CLK1 is connected to the set terminal (S) of the first RS flip-flop. When CLK1 arrives, the first RS flip-flop is set, and the switching transistor... Q 1. Turn on; when the first comparator outputs a high level, the first RS flip-flop is reset, and the switching transistor... Q 1. Turn off. The inverted output of the first RS flip-flop is used as the switching transistor. Q 2. Drive signals, thereby realizing the switching of transistors. Q 1 and switching transistor Q The complementary conduction of 2. This module is essentially used to regulate the switching transistor. Q A duty cycle of 1 ensures stable output voltage.
[0058] Furthermore, the valley current control module is used to generate the switching transistors in the second bridge arm. Q 3 and switching transistors Q The drive signal 4 is applied, and the valley value of the inductor current in the converter reaches the negative threshold value of the inductor current required for zero-voltage switching of the switching transistor in the converter. I ZVS The valley current control module includes a second comparator (comparator 2), an OR gate, and a second RS flip-flop. The first input terminal (positive input terminal) and the second input terminal (negative input terminal) of the second comparator are respectively connected to... I ZVS With inductor current i Lc The output of the second comparator is connected to the first input of the OR gate, the second input of the OR gate is connected to the first bridge arm control signal CLK1, the output of the OR gate is connected to the reset terminal (R) of the second RS flip-flop, and the set terminal (S) of the second RS flip-flop is connected to the second bridge arm control signal CLK2.
[0059] This module will control the inductor current. i Lc and I ZVS The data is fed into the second comparator for comparison. i Lc Descending to I ZVS When the second comparator outputs a high-level signal, this signal is sent to the reset terminal (R) of the second RS flip-flop via an OR gate, causing... Q 3. Turn off, at the same time Q 4. Conduction. To prevent Q 3. Closure later than Q 2. When turned off, the control circuit will also perform an OR operation between CLK1 and the output signal of the second comparator. When Q 2. When turned off, even i Lc It has not yet dropped to I ZVS Alternatively, the second RS flip-flop can be reset via CLK1, thereby ensuring... Q 3 No later than Q 2. Turn off. Q The activation time of 3 is determined by CLK2, which is generated by the phase shift control module.
[0060] To verify the effectiveness of the proposed control method, this invention built a closed-loop simulation model of a four-transistor Buck-Boost converter based on the PLECS simulation platform. The simulation model includes the FSBB main circuit, output voltage regulation module, valley current control module, PDCM phase shift signal generation module, PBCM phase shift signal fitting module, fitting error correction module, and phase shift control module.
[0061] The simulation verification was conducted under the condition of 70V input voltage and full-load operation, with three simulation experiments performed. The first simulation was a fitting control simulation without the addition of a fitting error correction stage. Under this condition, D θ_appr It is directly used as the phase-shifting control variable in PBCM operating mode. For example... Figure 7 As shown, due to D θ_appr If the current exceeds the theoretical value, the inductor current will drop to the limit earlier. I ZVS and in I ZVS The current remains at a certain level for a period of time. A clear negative current plateau can be observed in the simulated waveform, while the peak-to-peak value and RMS value of the inductor current are relatively large.
[0062] The second simulation involves fitting control with a fitting error correction stage. In this case, the duration of the negative inductor current is detected in real time and generated by a PI controller. D θ_amend ,right D θ_appr Provide compensation. For example... Figure 8 As shown in the simulation waveform, the inductor current is... I ZVS The holding time is significantly shortened, the negative current plateau is basically eliminated, and the inductor current waveform is closer to the theoretical optimal state.
[0063] The third simulation also involves fitting control after adding a fitting error correction stage, but it focuses on showing the start-up adjustment process after adding the correction stage, so as to dynamically demonstrate the corrective effect of the negative current detection feedback correction stage.
[0064] Depend on Figure 9 It can be seen that the FSBB converter operates in PBCM mode under full load of 70V, and is rapidly controlled by the fitted phase shift duty cycle. However, due to the existence of fitting error, the waveform of the inductor current cannot perfectly match the theoretical state of PBCM mode. Based on this, the fitted phase shift duty cycle is quickly corrected, which ultimately improves the inductor current waveform and eliminates the influence of fitting error.
[0065] In summary, this invention proposes a control method and circuit for a four-transistor Buck-Boost converter based on negative current correction. Addressing the problem in existing fitting phase-shift control where ensuring ZVS leads to overly large fitted values and consequently negative current plateaus, this invention introduces a negative current detection feedback correction stage on the original fitting control. By real-time detection of the duration of negative inductor current, a fitting error correction amount is generated, dynamically compensating the fitting phase-shift duty cycle. This ensures that the actual phase-shift control quantity guarantees ZVS for the switching transistors under all operating conditions while effectively eliminating negative current plateaus, thereby reducing inductor current ripple and RMS value, decreasing conduction losses, and improving the overall operating efficiency of the converter. Furthermore, this invention uses a linear fitting expression of input voltage and output current instead of the complex theoretical phase-shift angle formula, reducing the difficulty of control implementation and facilitating implementation on platforms such as analog circuits, DSPs, MCUs, and FPGAs. Moreover, this invention only adds simple components such as comparators, filters, and PI regulators to the original fitting control structure, without changing the main circuit topology, making it easy to apply directly to existing systems. Therefore, while maintaining the advantages of simple and efficient fitting control, this invention effectively solves the problem of negative plateau caused by excessive fitting margin, and has important engineering application value in the field of wide input voltage and high-efficiency power supply systems.
[0066] In the description of this specification, the terms "first," "second," "third," "fourth," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0067] The use of terms such as "one embodiment / mode," "some embodiments / modes," "example," "specific example," or "some examples," etc., refers to a specific feature, structure, material, or characteristic described in connection with that embodiment / mode or example, which is included in at least one embodiment / mode or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment / mode or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments / modes or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments / modes or examples described in this specification, as well as the features of different embodiments / modes or examples.
[0068] Those skilled in the art should understand that the above embodiments are merely for illustrating the present disclosure and are not intended to limit the scope of the disclosure. Those skilled in the art can make other changes or modifications based on the above disclosure, and these changes or modifications still fall within the scope of the present disclosure.
[0069] The above descriptions are merely preferred embodiments of the present invention, and the present invention is not limited to the above embodiments. It is understood that other improvements and variations that can be directly derived or conceived by those skilled in the art without departing from the spirit and concept of the present invention should be considered to be included within the protection scope of the present invention.
Claims
1. A control method for a four-transistor Buck-Boost converter based on negative current correction, characterized in that, include: When the converter operates in PBCM mode, the fitted phase shift duty cycle is obtained based on the converter's operating parameters. D θ_appr ; The inductor current in the converter is acquired, a detection signal characterizing the duration of the negative inductor current state is generated based on the inductor current, and a fitting error correction amount is generated based on the detection signal. D θ_amend ; Using the fitting error correction amount D θ_amend The fitted phase shift duty cycle D θ_appr Make corrections to obtain the corrected phase shift duty cycle. D θ_PBCM ; The corrected phase shift duty cycle D θ_PBCM When the converter is operating in PBCM mode, it controls the phase shift angle between the control signals of the first and second bridge arms of the converter.
2. The control method for a four-transistor Buck-Boost converter based on negative current correction according to claim 1, characterized in that, The step of generating a detection signal characterizing the duration of the negative inductor current state based on the inductor current includes: The inductor current of the converter is compared with a zero-current reference to generate a comparison signal; The comparison signal is low-pass filtered to obtain the detection signal.
3. The control method for a four-transistor Buck-Boost converter based on negative current correction according to claim 2, characterized in that, Generate fitting error correction value based on the detected signal. D θ_amend ,include: The detection signal is compared with the reference value V. ref_neg The comparison is performed to obtain the error feedback signal; The error feedback signal is input to the regulator, and the regulator outputs the fitting error correction amount after adjustment. D θ_amend The regulator includes a PI regulator.
4. The control method for a four-transistor Buck-Boost converter based on negative current correction according to claim 3, characterized in that, The reference value V ref_neg It can be represented as: in, L c The inductance value of the inductor in the converter. I ZVS To achieve the required inductor current amplitude for zero-voltage switching of the switching transistors in the converter, V M To compare the effective level amplitude of the signals, V o The output voltage of the converter. V in The input voltage of the converter. T s This represents the switching cycle of the switching transistor in the converter.
5. The control method for a four-transistor Buck-Boost converter based on negative current correction according to claim 1, characterized in that, Corrected phase shift duty cycle D θ_PBCM It can be represented as: 。 6. The control method for a four-transistor Buck-Boost converter based on negative current correction according to claim 1, characterized in that, The fitted phase shift duty cycle is obtained based on the converter operating parameters. Dθ_appr This includes based on the input voltage of the converter. Vin and output current Io The fitted phase shift duty cycle was obtained through fitting. Dθ_appr The fitted phase shift duty cycle Dθ_appr It can be represented as: in, a The first fitting coefficient, b The second fitting coefficient, c The third fitting coefficient.
7. A control circuit for a four-transistor Buck-Boost converter based on negative current correction, characterized in that, To implement the four-transistor Buck-Boost converter control method based on negative current correction as described in claims 1 to 6, the control circuit includes a PBCM phase-shift signal fitting module and a fitting error correction module, wherein... The PBCM phase-shift signal fitting module obtains the fitted phase-shift duty cycle corresponding to the PBCM operating mode based on the converter operating parameters. Dθ_appr ; The fitting error correction module acquires the inductor current in the converter, generates a detection signal characterizing the duration of the negative inductor current state based on the inductor current, and generates a fitting error correction amount based on the detection signal. D θ_amend ; Using the fitting error correction amount D θ_amend The fitted phase shift duty cycle D θ_appr Make corrections to obtain the corrected phase shift duty cycle. D θ_PBCM ; The corrected phase shift duty cycle D θ_PBCM Used to control the phase shift angle between the first bridge arm control signal and the second bridge arm control signal when the converter is operating in PBCM mode.
8. The four-transistor Buck-Boost converter control circuit based on negative current correction according to claim 7, characterized in that, The fitting error correction module includes a fourth comparator, a low-pass filter, an error comparator, and a regulator, wherein... The first input terminal of the fourth comparator is connected to a zero-current reference, and the second input terminal of the fourth comparator is connected to an inductor current. i Lc The output of the fourth comparator is connected to the first input of the error comparator via a low-pass filter, and the second input of the error comparator is connected to the reference value V. ref_neg The output of the error comparator is connected to the input of the regulator, the output of the regulator is connected to the first input of the adder, and the output of the PBCM phase-shifting signal fitting module is connected to the second input of the adder. The fourth comparator compares the inductor current of the converter with a zero-current reference to generate a comparison signal; the low-pass filter performs low-pass filtering on the comparison signal to obtain the detection signal; the error comparator compares the detection signal with a reference value V. ref_neg The comparison is performed to obtain an error feedback signal, which is then input to the regulator. After adjustment, the regulator outputs the fitting error correction amount. D θ_amend The PBCM phase-shift signal fitting module outputs the fitted phase-shift duty cycle to the adder. D θ_appr The addition is fed to the adder, which will adjust the fitting error. D θ_amend With the fitted phase shift duty cycle D θ_appr The corrected phase shift duty cycle is obtained by adding them together. D θ_PBCM .
9. The four-transistor Buck-Boost converter control circuit based on negative current correction according to claim 8, characterized in that, The control circuit further includes a PDCM phase-shift signal generation module and a phase-shift control module, wherein, The output of the PDCM phase-shifting signal generation module is connected to the first input of the maximum value selector, the output of the adder is connected to the second input of the maximum value selector, and the output of the maximum value selector is connected to the phase-shifting control module. The PDCM phase-shifting signal generation module is used to generate phase-shifting control quantities corresponding to the PDCM operating mode. D θ_PDCM ; When the converter is operating in PBCM mode, the phase shift control module adjusts the phase shift duty cycle according to the corrected phase shift duty cycle. D θ_PBCM The phase shift angle between the control signal of the first bridge arm and the control signal of the second bridge arm of the control converter; When the converter is operating in PDCM mode, the phase shift control module determines the phase shift control amount based on the phase shift control quantity. D θ_PDCM The phase shift angle between the control signal of the first bridge arm and the control signal of the second bridge arm of the control converter.
10. The four-transistor Buck-Boost converter control circuit based on negative current correction according to claim 9, characterized in that, The control circuit also includes an output voltage regulation module and a valley current control module, wherein... The output voltage regulation module is used to realize closed-loop control of the converter output voltage and generate the switching transistors in the first bridge arm. Q 1 and switching transistor Q 2. Drive signal; The valley current control module is used to generate the switching transistor in the second bridge arm. Q 3 and switching transistors Q The drive signal of 4 is used to make the valley value of the inductor current in the converter reach the negative threshold value of the inductor current required for the zero-voltage switching of the switching transistor in the converter.