An efficiency prediction method for cascode class-e inverter circuit based on phase space topological mapping and physical prior mask coupling

Abstract

The application discloses an efficiency prediction method for Cascode E-type inverter circuit based on phase space topological mapping and physical prior mask coupling, and belongs to the technical field of power electronics and artificial intelligence. A phase space trajectory embedding module is constructed, a two-dimensional state plane composed of voltage and its first derivative is taken as the input of the Transformer, the model is caused to capture the change of parasitic oscillation of the Cascode E-type inverter circuit on the phase plane, a ZVS physical prior mask mechanism is designed to force the model to extract the switch loss feature, and a Wide&Deep physical fusion architecture is established to realize physical conservation constraint through a wide channel directly connected with a circuit component parameter and an explicit physical loss formula. The application can construct a high-precision model under a limited data scale, provide a low-cost and high-efficiency evaluation means, and significantly improve the prediction precision and robustness of the model on the conversion efficiency of the Cascode E-type inverter circuit.

Description

Technical Field

[0001] This invention belongs to the interdisciplinary field of power electronics and artificial intelligence, and particularly relates to an efficiency prediction method for phase space topology mapping and physical prior mask coupling for CascodeE type inverter circuits. Background Technology

[0002] With the rapid development of third-generation semiconductor technology, high-frequency and high-efficiency power conversion technology has become a core requirement in fields such as wireless power transmission, RF power supplies, industrial plasma generators, and electric vehicle on-board chargers. Class E inverter circuits have become the preferred topology for MHz-level high-frequency power conversion due to their ability to achieve zero-voltage switching (ZVS) and significantly reduce switching losses. Meanwhile, the cascode structure, which connects a low-voltage gallium nitride high electron mobility transistor (GaN HEMT) with a high-voltage silicon carbide junction field-effect transistor (SiC JFET), breaks through the voltage withstand bottleneck of traditional silicon-based devices, simplifies the design of high-frequency drive circuits, and combines the high-frequency switching characteristics of GaN devices with the high voltage withstand advantage of SiC devices, making it a key device architecture for next-generation high-power-density power supplies.

[0003] However, Cascode Class E inverter circuits exhibit complex high-order parasitic effects at MHz-level high-frequency operation. The parasitic inductance at the intermediate nodes of GaN and SiC components, along with the nonlinear output capacitance, triggers severe charge redistribution, leading to high-frequency ringing and nonlinear distortion in the voltage waveform. This poses a significant challenge to circuit efficiency prediction and optimization design. Traditional circuit analysis methods, based on ideal switches or simplified models, cannot accurately describe the complex transient processes of parasitic parameter coupling. While SPICE-based numerical simulation with full parameter scanning offers acceptable accuracy, its computational time is enormous, making it unsuitable for large-scale design requirements. In recent years, artificial intelligence technology has been introduced into the field of power electronics to build efficiency prediction models. However, in the face of the strong physical constraints and complex high-frequency harmonics of Cascode E-type inverter circuits, existing methods generally have three major problems: (1) lack of feature representation from the perspective of circuit physics, only regards voltage waveform as a one-dimensional time series, ignores the dynamic information contained in the voltage change rate, and cannot effectively identify the micro-waveform distortion caused by parasitic parameters; (2) mismatch between attention mechanism and physical focus, the global attention of the Transformer model will waste a lot of computing power on steady-state redundancy information, and it is difficult to focus on the key interval of nanosecond-level switching losses; (3) prediction saturation and deviation in the high efficiency range, the model is prone to conservative prediction in the extremely high efficiency range above 95%, cannot distinguish the efficiency difference caused by small parameter changes, and overfits the input parameters, resulting in poor robustness. Summary of the Invention

[0004] Technical problem solved: To address the above-mentioned technical problems, this invention proposes an efficiency prediction method for Cascode E-class inverter circuits that couples phase space topology mapping with physical prior mask. By integrating circuit physical prior knowledge with a deep learning model, it solves the problems of insufficient feature representation, attention divergence, and high-efficiency prediction bias, and achieves high-precision, high-robustness, and millisecond-level prediction of the conversion efficiency of Cascode E-class inverter circuits.

[0005] Technical Solution: The present invention provides an efficiency prediction method for Cascode Class E inverter circuits that couples phase space topology mapping with physical prior masks. This method constructs an input tensor through phase space topology mapping, focuses on key features using ZVS physical prior masks, and achieves high-precision prediction of circuit conversion efficiency based on a Wide&Deep architecture Transformer model. Specifically, it includes the following steps: Step 1: Build a simulation model of a Cascode Class E inverter circuit containing a low-voltage GaN HEMT and a high-voltage SiC JFET series structure. Set the tolerance range of the parameters of the key components and perform Monte Carlo simulation to collect the drain-source voltage V under steady state. DS Gate-source voltage V GS Time-domain sequence data, while simultaneously recording the actual value of the corresponding circuit conversion efficiency; Step 2: For V DS V GS The first derivative of the time-domain sequence data was calculated using the central difference method to obtain the voltage change rate dV. DS / dt and dV GS / dt stacks the original voltage data and voltage change rate data in the channel dimension to construct a phase space input tensor that reflects the trajectory of the circuit's operating state; Step 3: Calculate V DS The time gradient vector field of the waveform is used to locate the ZVS transient center corresponding to the global minimum of the gradient. Based on this transient center, a physical prior attention mask that conforms to a Gaussian distribution is generated to identify the time domain interval where switching loss occurs. Step 4: Extract the explicit physical feature set of the Cascode Class E inverter circuit, including the root mean square value of the voltage waveform, the estimated value of the switching energy loss, and the amplitude components of the first 5 harmonics of the voltage waveform. Step 5: Construct a hybrid neural network model combining a Wide&Deep architecture Transformer model and an MLP; wherein the Deep channel replaces the traditional linear embedding layer with a multi-scale convolutional embedding layer, inputs the phase space input tensor and the physical prior attention mask, and extracts the nonlinear implicit features of the phase space trajectory; the Wide channel is a linear direct-connected layer, inputs the explicit physical feature group and maps it to a linear reference component; the nonlinear implicit features of the Deep channel and the linear reference component of the Wide channel are fused and then input into the MLP; Step 6: Use an asymmetric weighted loss function to train the hybrid neural network model end-to-end. Introduce residual extraction and scaling gain strategies during model training to improve the model's gradient sensitivity. Step 7: Input the voltage waveform data and component parameters of the Cascode E-type inverter circuit under test into the trained model, and output the predicted value of the circuit conversion efficiency.

[0006] Preferably, the key circuit components in step 1 include a parallel capacitor C1, a resonant capacitor C2, a resonant inductor L2, a choke inductor L1, and a load resistor R, calculated using the following formula: ; ; ; ; ; In the formula, V in DC input power supply; P out The output power is f, the frequency is ω, and the angular frequency is Q. L The quality factor is defined as follows: the Monte Carlo parameter tolerance range is ±5% to ±10% of the nominal value and follows a Gaussian distribution; the simulation step size is set to 0.1 ns, and 2000 points of voltage waveform data are sampled.

[0007] Preferably, the calculation formula for the central difference method in step 2 is as follows: ; In the formula, V t Let V be the voltage sample value at time t; Δt is the sampling time interval; the shape of the phase space input tensor is (2000, 4), derived from V DS V GS dV DS / dt、dV GS / dt is constructed by splicing.

[0008] Preferably, the mathematical expression for the physical prior attention mask M in step 3 is a Gaussian distributed window function, and its expression is: ; In the formula, σ is the global minimum index; σ is a hyperparameter that controls the width of the attention window; the weights outside the window decay to 0, which is used to suppress feature weights in non-ZVS transient regions during attention computation.

[0009] Preferably, the formula for calculating the estimated switching energy loss in step 4 is as follows: ; In the formula, V min V within one switching cycle DS The minimum value of the waveform; C1 is the calculated energy loss of the parallel capacitor; V DS The formula for calculating the root mean square value of the waveform is: ; In the formula, N is the number of data points collected on the voltage waveform data, which is obtained by calculating the root mean square of the voltage values ​​at the sampling points; The amplitude components of the first 5 harmonics are obtained by adjusting V. DS V GS The waveforms were extracted by performing Fourier transforms.

[0010] Preferably, the multi-scale convolutional embedding layer in step 5 includes parallel one-dimensional convolutional layers with kernel sizes of k=3, 7, and 15, which are used to extract nanosecond-level ZVS spikes, microsecond-level oscillations, and periodic trend features, respectively. The Transformer encoder uses a Pre-Norm structure with GELU as the activation function. An attention pooling module is introduced at the end of the encoder. The temporal features are weighted and summed using a physical prior attention mask to output nonlinear implicit features.

[0011] Preferably, in step 5, the MLP contains a 3-layer network. Both the input layer and the hidden layer use the GELU activation function. The input layer introduces a Dropout mechanism to prevent overfitting, and the output layer is a linear layer without an activation function, compressing high-dimensional features into an efficient prediction scalar.

[0012] Preferably, in step 6, residual extraction involves calculating the global mean of the training set data, converting absolute efficiency prediction into relative bias prediction; the scale gain introduces a scaling factor into the relative bias, amplifying small error changes to enhance the backpropagation gradient strength.

[0013] Preferably, the asymmetric weighted loss function in step 6 is defined as follows: ; In the formula, M is the training batch size. Let be the true value of the conversion efficiency for the i-th sample; Let be the predicted conversion efficiency value for the i-th sample; The asymmetric penalty weights are dynamically allocated; when the true value is greater than 95% and the predicted value is less than the true value... Set to 20, other cases Set it to 1.

[0014] Preferably, in step 1, the Cascode E-class inverter circuit simulation model is built based on Cadence or PSpice simulation software, and the model imports a manufacturer's device model library containing parasitic parameters. In step 6, the AdamW optimizer is used to train the model, with an initial learning rate set to 3×10. -4 The weight decay coefficient is set to 1×10. -3 The learning rate is dynamically adjusted using a cosine annealing hot restart strategy.

[0015] Compared with the prior art, the present invention has at least the following outstanding advantages: 1. Achieve explicit characterization of parasitic effects and improve feature recognition capabilities: Break through the limitations of traditional time-domain modeling, and transform one-dimensional voltage time-series data into two-dimensional voltage-current state plane tensors through phase space topological mapping. The high-frequency ringing and distortion caused by parasitic parameters are manifested as significant trajectory knots and twists on the phase plane. The model can fundamentally identify parasitic oscillation modes that lead to efficiency reduction. Compared with the standard Transformer model, the prediction accuracy under irrational operating conditions is greatly improved. 2. Focus on key features of switching loss to improve feature extraction efficiency: By using ZVS physical prior mask, the engineering experience of "focusing on switching transient waveforms" is hard-coded into the model, forcing the model to focus computational resources on the key interval of switching loss at the nanosecond level, suppressing the interference of steady-state redundant information, solving the problem of attention divergence in the Transformer model, which not only accelerates the model convergence speed, but also improves the signal-to-noise ratio of feature extraction, and effectively avoids overfitting caused by background noise. 3. Addressing the prediction saturation problem in the high-efficiency range and improving prediction accuracy: A dual-path inference architecture is implemented through Wide & Deep physical fusion. The Wide channel serves as a physical benchmark to ensure that the prediction results follow the laws of circuit physics, while the Deep channel extracts nonlinear implicit features that cannot be described by physical formulas. Combined with an asymmetric weighted loss function, this eliminates the "regression to the mean" tendency of the model in the extremely high-efficiency range above 95%, and can distinguish the efficiency differences caused by small parameter changes. Testing shows that the model's mean percentage error (MAPE) is as low as 0.06%, only 1 / 4 of that of the traditional Transformer model. 4. Enhance model robustness and adapt to actual engineering needs: Due to the introduction of physical feature direct connection and phase plane geometric constraints, the model learns the essential physical mapping law between voltage waveform and circuit parameters, rather than simple data memorization; robustness test shows that even if 5% Gaussian random noise is introduced into the input parameters (simulating real component tolerances, aging or temperature drift), the prediction error of the model can still be controlled within 0.1%, which has extremely high practical engineering application value; 5. Significantly reduce design costs and improve evaluation efficiency: This invention achieves millisecond-level evaluation of the conversion efficiency of Cascode Class E inverter circuits. While maintaining physical-level accuracy comparable to Cadence / PSpice simulations, it significantly reduces model training time and efficiency evaluation time, thereby significantly lowering the design threshold and time cost of Class E inverter circuits and providing an efficient evaluation method for large-scale circuit optimization design. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the efficiency prediction method of the present invention; Figure 2 This is a schematic diagram of the Cascode E-class inverter circuit of the present invention; Figure 3 This is a schematic diagram comparing traditional time-domain waveforms with phase-space trajectories. Figure 4 This is a schematic diagram illustrating the generation principle of the ZVS physical prior mask of the present invention. Figure 5 This is a schematic diagram of the Transformer network structure of the Wide&Deep architecture of the present invention; Figure 6 This is a scatter plot showing the fitted prediction results of the model in this invention. Figure 7 The figure shows the robustness test results of the model of this invention under different component tolerances; Figure 8 This is a comparison chart of the training convergence performance of the model of this invention and the traditional Transformer model. Detailed Implementation

[0017] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the following will be described in conjunction with the accompanying drawings. Figures 1-8 The technical solutions of the embodiments of the present invention are clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present invention, not all of them. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention are within the scope of protection of the present invention.

[0018] like Figure 1As shown, this invention discloses an efficiency prediction method for Cascode E-class inverter circuits that couples phase space topology mapping with physical prior masks. The Monte Carlo amplified parameters of the Cascode E-class inverter circuit are applied to the Transformer model of the Wide&Deep architecture by combining phase space topology mapping with physical prior masks, and finally transmitted to the MLP to obtain the predicted conversion efficiency value of the E-class inverter circuit.

[0019] Monte Carlo parameter amplification treats the parameters of key circuit components (parallel capacitor C1, series resonant capacitor C2, choke inductor L1, and resonant inductor L2) as random variables, with a variation range set to ±5% to ±10% of the nominal value, and follows a Gaussian distribution. A simulation step size of 0.1 ns is set to capture high-frequency transient details and collect time-domain sequence data of drain-source voltage and gate-source voltage under steady state.

[0020] The phase space topology trajectory is calculated by taking the first derivatives of the drain-source voltage and gate-source voltage, transforming the original time-domain curve into a phase-plane curve characterizing the circuit's operating state. For Class E inverters, the most crucial factor in achieving ZVS (Zero-Voltage Switching) is the falling edge of the peak; smooth curves under most steady-state conditions are not very useful. Without processing, the global attention mechanism of the Transformer model would waste a significant amount of computation, and the prediction results would be slightly worse. The physical prior mask forces the model to focus on the switching transient data, which corresponds to the dead time.

[0021] The Transformer model employs a Wide&Deep architecture, where the Deep channel is used to extract nanosecond-level ZVS spikes, microsecond-level oscillations, and periodic trend features. The Transformer encoder uses a Pre-Norm structure with GELU activation function and introduces an attention pooling module after the self-attention layer. This module uses a physical mask to perform a weighted summation of temporal features, outputting an implicit feature vector. The Wide channel uses a fully connected layer to directly map explicit physical features to linear baseline components. The final output is the weighted sum of the Deep and Wide channel outputs.

[0022] The working principle of the method of this invention is as follows: (1) Working principle of phase space topology mapping: This method systematically breaks through the limitation of traditional time-domain modeling, which only focuses on voltage amplitude changes. According to circuit network theory, the current in a capacitor is proportional to the rate of voltage change. This method introduces the first derivative of voltage as an input channel, which essentially maps one-dimensional voltage time-series data to a two-dimensional voltage-current state plane. In this space, the steady-state operation of the circuit is a closed limit cycle. For the Cascode structure, the high-frequency ringing and nonlinear distortion caused by its internal parasitic inductance and capacitance may only manifest as small waveform jitter in the time domain, but in phase space, they will manifest as significant trajectory knots and distortions. By learning this phase space topology feature, the deep learning model can keenly capture the root cause of increased switching losses.

[0023] (2) Working principle of ZVS physical prior mask: The energy dissipation mechanism of soft switching (ZVS) is used as an inductive bias to constrain the attention of the model. The switching losses of Class E inverters have strong temporal locality, mainly concentrated in the nanosecond-level switching transition instant (dead time). This method calculates the waveform gradient field to accurately locate the moment when the voltage drops the fastest and generates a physical attention mask that conforms to a Gaussian distribution. This forces the Transformer model to suppress redundant information weights in the on and off steady-state intervals that account for most of the cycle, and highly focuses computational resources on the ZVS decision window containing rich transient features.

[0024] (3) Working principle of Wide&Deep architecture: The parallel dual-channel hybrid inference strategy is adopted to solve the prediction saturation problem in the high-efficiency range; the Wide channel serves as the physical baseline path and directly uses explicit physical formulas to establish a linear or low-order nonlinear mapping between input parameters and efficiency, ensuring that the prediction results strictly follow the basic circuit physics rules; the Deep channel uses multi-scale convolution and Transformer to extract implicit nonlinear residuals in phase space, and in conjunction with the asymmetric weighted loss function, applies a high-rate gradient penalty to the underestimation error of high-efficiency samples during the backpropagation process of training, so as to achieve a high-sensitivity response to small physical parameter changes.

[0025] The technical solution of the present invention will be further described below with reference to specific embodiments.

[0026] Example 1: with Figure 2 Taking a Cascode Class E inverter circuit with a 1MHz switching frequency, 20V DC input, and 80W output power as an example, the effectiveness of the method of the present invention is verified. The specific implementation steps are as follows: (a) Building the simulation model and setting parameters: A Class E inverter circuit model with a Cascode structure consisting of a low-voltage GaN HEMT and a high-voltage SiC JFET in series was built using Cadence PSpice simulation software, with a circuit quality factor of Q=7. The Cascode switch is composed of an enhancement-mode GaN transistor (EPC2215, 200V, 6mΩ on-resistance) and a depletion-mode SiC JFET (UJ3N120070K3S, 1200V, 70mΩ on-resistance) in series, and is controlled by an LM5114 driver. The parasitic parameters of the devices were imported, with GaN having an output capacitance of 390pF and an input capacitance of 1356pF, and SiC having an output capacitance of 100pF and an input capacitance of 985pF.

[0027] The nominal parameters of the key circuit components are as follows: The key circuit components include parallel capacitor C1, resonant capacitor C2, resonant inductor L2, choke inductor L1, and load resistor R. The calculation formula is as follows: ; ; ; ; ; In the formula, V in The input power is DC; Pout is the output power; f is the frequency, ω is the angular frequency, and Q is the input power. L The quality factor is given. In this embodiment, the choke inductor L1 = 5μH, the resonant inductor L2 = 3.21μH, the parallel capacitor C1 = 10.15nF, the resonant capacitor C2 = 9.44nF, the load resistor R = 2.884Ω, and the actual measured conversion efficiency of the circuit is 94.88%.

[0028] Component tolerances were set as follows: choke inductor L1 was ±10%, and other components were ±5%, all following a Gaussian distribution; the simulation step size was set to 0.1 ns, and Monte Carlo simulation was performed to generate 10,000 samples. V values ​​were collected for each sample. DS V GS The time-domain sequence data (2000 sampling points) and the corresponding true conversion efficiency values ​​were used to randomly divide the dataset into training and test sets in an 8:2 ratio.

[0029] (II) Constructing the phase space input tensor: Using Python to work with V DS V GS The first derivative of the time-domain sequence data was calculated using the central difference method to obtain the voltage change rate dV. DS / dt and dV GS / dt, the formula for calculating the central difference method is: ; In the formula, V t Δt represents the voltage sample value at time t; Δt is the sampling time interval.

[0030] V DS V GS dV DS / dt、dV GS The / dt array is stacked along the channel dimension to construct a phase space input tensor of (2000, 4). This step maps the original one-dimensional time-domain waveform to a two-dimensional state plane, as shown below. Figure 3 As shown, the high-frequency ringing caused by the parasitic inductance inside the Cascode is extremely significant on the phase plane, thereby enhancing the model's ability to perceive parasitic effects and improving prediction accuracy.

[0031] (III) Generating ZVS physical prior masks: Write a Python algorithm to calculate V DS The time gradient vector field of the waveform is used to locate the ZVS transient center corresponding to the global minimum of the gradient. A physical prior attention mask conforming to a Gaussian distribution is then generated based on this transient center (e.g., ...). Figure 4 As shown), the mask window covers the circuit dead time. The mathematical expression for the physical prior attention mask M is a Gaussian distributed window function, and its expression is: ; In the formula, σ is the global minimum index; σ is a hyperparameter that controls the width of the attention window; the weights outside the window decay to 0, which is used to suppress feature weights in non-ZVS transient regions during attention computation.

[0032] (iv) Extracting explicit physical feature sets: Explicit physical feature sets of the Cascode Class E inverter circuit are extracted. For each set of samples, a 23-dimensional explicit physical feature vector is extracted, including the root mean square value of the voltage waveform, the estimated value of switching energy loss, and the amplitude components of the first 5 harmonics of the voltage waveform. The formula for calculating the estimated value of switching energy loss is as follows: ; In the formula, V min V within one switching cycle DS The minimum value of the waveform; C1 is the calculated energy loss of the parallel capacitor.

[0033] V DS The formula for calculating the root mean square (RMS) value of a waveform is as follows: ; In the formula, N is the number of data points collected on the voltage waveform data, which is obtained by calculating the root mean square of the voltage values ​​at the sampling points.

[0034] The amplitude components of the first 5th harmonic are obtained by adjusting V. DS V GS The waveforms were extracted by performing Fourier transforms.

[0035] (v) Constructing a hybrid neural network model with a Wide & Deep architecture: A Transformer model based on the Wide & Deep architecture built using the PyTorch deep learning framework (e.g.) Figure 5 (As shown) A hybrid neural network model combining MLP; The Deep channel replaces the traditional linear embedding layer with a multi-scale convolutional embedding layer. It takes the input phase space input tensor and the physical prior attention mask as input to extract the nonlinear implicit features of the phase space trajectory. The multi-scale convolutional embedding layer contains parallel one-dimensional convolutional layers with kernel sizes of k=3, 7, and 15, which are used to extract nanosecond-level ZVS spikes, microsecond-level oscillations, and periodic trend features, respectively. The Transformer encoder adopts a Pre-Norm structure with the GELU activation function. An attention pooling module is introduced at the end of the encoder. The nonlinear implicit features are output after weighted summation of the temporal features using the physical prior attention mask.

[0036] The Wide channel is a linear direct-connected layer, employing a single-layer linear fully connected layer. It inputs the extracted explicit physical feature set and maps the 23-dimensional physical features as linear reference components, providing a physical reference for model prediction and ensuring that the prediction results follow the basic circuit physics laws.

[0037] The nonlinear implicit features of the Deep channel are fused with the linear baseline components of the Wide channel and then input into the MLP. The MLP consists of a three-layer network: an input layer (GELU+Dropout), a hidden layer (GELU), and an output layer (linear). Both the input and hidden layers use the GELU activation function. The input layer introduces the Dropout mechanism to prevent overfitting, and the output layer is a linear layer without an activation function, thus compressing the high-dimensional features into an efficient prediction scalar.

[0038] (vi) Training the hybrid neural network model: An asymmetric weighted loss function is used to train the hybrid neural network model end-to-end. During the model training process, residual extraction and scaling gain strategies are introduced to improve the model's gradient sensitivity, thereby enhancing the model's gradient sensitivity and high-efficiency interval prediction accuracy.

[0039] (1) Residual extraction is to calculate the global mean of the training set data, convert the absolute efficiency prediction into the relative bias prediction, and reduce the impact of data distribution on the model.

[0040] (2) Scale gain is a scaling factor introduced into the relative bias to amplify small error changes, so that even small efficiency prediction biases can generate backpropagation gradients with sufficient strength, thereby improving the model’s sensitivity to small parameter changes.

[0041] (3) The definition of the asymmetric weighted loss function is: ; In the formula, M is the training batch size. Let be the true value of the conversion efficiency for the i-th sample; Let be the predicted conversion efficiency value for the i-th sample; The asymmetric penalty weights are dynamically allocated; when the actual efficiency value is greater than 95% and the predicted value is less than the actual value, ... Set to 20, other cases Set to 1. By imposing a high penalty on the underestimation error in the high-efficiency range, the problem of prediction saturation and underestimation bias in the extremely high-efficiency range is solved.

[0042] (4) The AdamW optimizer was used to train the model, with an initial learning rate of 3×10⁻⁶. -4 The weight decay coefficient is set to 1×10. -3 To prevent overfitting, a cosine annealing hot restart strategy was used to dynamically adjust the learning rate, training for 500 epochs until the model converged. Validated on the test set, this method achieved a mean percentage error (MAPE) of approximately 0.06%, with extremely fast convergence.

[0043] (vii) Model testing and validation: The V of the Cascode E-class inverter circuit under test DS V GS Voltage waveform data and component parameters are processed into phase space input tensors, physical prior attention masks, and explicit physical feature sets according to the above steps. These are then input into the trained hybrid neural network model. After feature extraction and fusion, the model outputs a predicted value for circuit conversion efficiency, achieving millisecond-level circuit performance evaluation.

[0044] Test results show that: (1) As Figure 6 As shown, the model's mean percentage error (MAPE) is 0.06%, which is more than 4 times more accurate than the traditional Transformer model (MAPE=0.26%). (2) Figure 7 As shown, the model can accurately distinguish minute parameter changes in the extremely high efficiency range of over 95%, with no underestimation bias, and the prediction results have extremely high goodness of fit. (3) Figure 8As shown, after introducing 5% Gaussian random noise into the input parameters, the model prediction error is still <0.1%, demonstrating excellent robustness. (4) The single-sample efficiency prediction time is only in milliseconds, which is much shorter than the hourly time of Cadence simulation.

[0045] This embodiment verifies the effectiveness of the method of the present invention through an actual Cascode E-class inverter circuit. The model not only achieves high-precision prediction of conversion efficiency, but also has excellent robustness and extremely fast evaluation speed, solving many defects of the prior art and providing an efficient and reliable technical means for the optimized design of Cascode E-class inverter circuits.

[0046] The above are preferred embodiments of the present invention. It should be noted that, for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. An efficiency prediction method for phase space topology mapping coupled with physical prior masking for Cascode Class E inverter circuits, characterized in that, The input tensor is constructed through phase space topological mapping, key features are focused by combining ZVS physical prior masks, and high-precision prediction of circuit conversion efficiency is achieved based on the Wide & Deep architecture Transformer model. The specific steps include: Step 1: Build a simulation model of a Cascode Class E inverter circuit containing a low-voltage GaN HEMT and a high-voltage SiC JFET series structure. Set the tolerance range of the parameters of the key components and perform Monte Carlo simulation to collect the drain-source voltage V under steady state. DS Gate-source voltage V GS Time-domain sequence data, while simultaneously recording the actual value of the corresponding circuit conversion efficiency; Step 2: For V DS V GS The first derivative of the time-domain sequence data was calculated using the central difference method to obtain the voltage change rate dV. DS / dt and dV GS / dt stacks the original voltage data and voltage change rate data in the channel dimension to construct a phase space input tensor that reflects the trajectory of the circuit's operating state; Step 3: Calculate V DS The time gradient vector field of the waveform is used to locate the ZVS transient center corresponding to the global minimum of the gradient. Based on this transient center, a physical prior attention mask that conforms to a Gaussian distribution is generated to identify the time domain interval where switching loss occurs. Step 4: Extract the explicit physical feature set of the Cascode Class E inverter circuit, including the root mean square value of the voltage waveform, the estimated value of the switching energy loss, and the amplitude components of the first 5 harmonics of the voltage waveform. Step 5: Construct a hybrid neural network model combining a Wide&Deep architecture Transformer model and an MLP; wherein the Deep channel replaces the traditional linear embedding layer with a multi-scale convolutional embedding layer, inputs the phase space input tensor and the physical prior attention mask, and extracts the nonlinear implicit features of the phase space trajectory; the Wide channel is a linear direct-connected layer, inputs the explicit physical feature group and maps it to a linear reference component; the nonlinear implicit features of the Deep channel and the linear reference component of the Wide channel are fused and then input into the MLP; Step 6: Use an asymmetric weighted loss function to train the hybrid neural network model end-to-end. Introduce residual extraction and scaling gain strategies during model training to improve the model's gradient sensitivity. Step 7: Input the voltage waveform data and component parameters of the Cascode E-type inverter circuit under test into the trained model, and output the predicted value of the circuit conversion efficiency.

2. The efficiency prediction method for phase space topology mapping and physical prior mask coupling for Cascode E-class inverter circuits according to claim 1, characterized in that, The key components in the circuit in step 1 include parallel capacitor C1, resonant capacitor C2, resonant inductor L2, choke inductor L1, and load resistor R. The calculation formula is as follows: ； ； ； ； ； In the formula, V in DC input power supply; P out The output power is f, the frequency is ω, and the angular frequency is Q. L The quality factor is defined as follows: the Monte Carlo parameter tolerance range is ±5% to ±10% of the nominal value and follows a Gaussian distribution; the simulation step size is set to 0.1 ns, and 2000 points of voltage waveform data are sampled.

3. The efficiency prediction method for phase space topology mapping and physical prior mask coupling for Cascode E-class inverter circuits according to claim 1, characterized in that, The formula for calculating the central difference method in step 2 is: ； In the formula, V t Let V be the voltage sample value at time t; Δt is the sampling time interval; the shape of the phase space input tensor is (2000, 4), derived from V DS V GS dV DS / dt、dV GS / dt is constructed by splicing.

4. The efficiency prediction method for phase space topology mapping and physical prior mask coupling for Cascode E-class inverter circuits according to claim 1, characterized in that, In step 3, the mathematical expression for the physical prior attention mask M is a Gaussian distributed window function, and its expression is: ； In the formula, σ is the global minimum index; σ is a hyperparameter controlling the width of the attention window; the weights outside the window decay to 0 to suppress non-Z values ​​during attention computation. VS Feature weights for transient regions.

5. The efficiency prediction method for phase space topology mapping and physical prior mask coupling for Cascode E-class inverter circuits according to claim 1, characterized in that, The formula for calculating the estimated switching energy loss in step 4 is as follows: ； In the formula, V min V within one switching cycle DS The minimum value of the waveform; C1 is the calculated energy loss of the parallel capacitor; V DS The formula for calculating the root mean square value of the waveform is: ； In the formula, N is the number of data points collected on the voltage waveform data, which is obtained by calculating the root mean square of the voltage values ​​at the sampling points; The amplitude components of the first 5 harmonics are obtained by adjusting V. DS V GS The waveforms were extracted by performing Fourier transforms.

6. The efficiency prediction method for phase space topology mapping and physical prior mask coupling for Cascode E-class inverter circuits according to claim 1, characterized in that, In step 5, the multi-scale convolutional embedding layer contains parallel one-dimensional convolutional layers with kernel sizes of k=3, 7, and 15, which are used to extract nanosecond-level ZVS spikes, microsecond-level oscillations, and periodic trend features, respectively. The Transformer encoder uses a Pre-Norm structure with GELU as the activation function. An attention pooling module is introduced at the end of the encoder. The temporal features are weighted and summed using a physical prior attention mask to output nonlinear implicit features.

7. The efficiency prediction method for phase space topology mapping and physical prior mask coupling for Cascode E-class inverter circuits according to claim 1, characterized in that, In step 5, the MLP consists of 3 layers. Both the input layer and the hidden layer use the GELU activation function. The input layer introduces the Dropout mechanism to prevent overfitting, and the output layer is a linear layer without an activation function, compressing high-dimensional features into an efficient prediction scalar.

8. The efficiency prediction method for phase space topology mapping and physical prior mask coupling for Cascode E-class inverter circuits according to claim 1, characterized in that, In step 6, residual extraction involves calculating the global mean of the training set data, converting absolute efficiency prediction into relative bias prediction; the scale gain introduces a scaling factor into the relative bias, amplifying small error changes to enhance the backpropagation gradient strength.

9. The efficiency prediction method for phase space topology mapping and physical prior mask coupling for Cascode E-class inverter circuits according to claim 1, characterized in that, The asymmetric weighted loss function in step 6 is defined as follows: ； In the formula, M is the training batch size. Let be the true value of the conversion efficiency for the i-th sample; Let be the predicted conversion efficiency value for the i-th sample; The asymmetric penalty weights are dynamically allocated; when the true value is greater than 95% and the predicted value is less than the true value... Set to 20, other cases Set it to 1.

10. The efficiency prediction method for phase space topology mapping and physical prior mask coupling for Cascode E-class inverter circuits according to any one of claims 1-9, characterized in that, In step 1, the Cascode Class E inverter circuit simulation model is built based on Cadence or PSpice simulation software, and the model imports a manufacturer's device model library containing parasitic parameters. In step 6, the AdamW optimizer is used to train the model, with an initial learning rate set to 3×10. -4 The weight decay coefficient is set to 1×10. -3 The learning rate is dynamically adjusted using a cosine annealing hot restart strategy.

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