Control circuit, electrical device and apparatus

Abstract

The present disclosure relates to control circuit, electrical device, and apparatus. A control circuit for controlling a load circuit includes a semiconductor element having a first switching element and a second switching element integrated therein, a first capacitor, a second capacitor, and a circuit substrate. The first switching element connects a first output line and a first power supply line, and opens / closes a current to the load circuit, the first output line being connected to a first terminal of the load circuit. The second switching element connects between a second output line and a second power supply line, and opens / closes a current to the load circuit, the second output line being connected to a second terminal of the load circuit. The first capacitor connects the first power supply line and the first output line. The second capacitor connects the second power supply line and the second output line. The semiconductor element, the first capacitor, and the second capacitor are mounted on the circuit substrate.

Description

Technical Field

[0001] This disclosure relates to control circuits, electrical devices, and equipment. Background Technology

[0002] Traditionally, load drive devices are provided with phase switching circuits that switch the phases of two windings of the stator in a two-phase stepper motor, which serves as an example of a load element, and switching elements adjust the pulse width so that the current flowing in the windings becomes constant.

[0003] Japanese Patent Application Publication No. 2003-189592 discusses a motor drive circuit that is provided with a switching element capable of controlling the power supplied to an electric motor.

[0004] Recently, for the purpose of high-precision control and miniaturization of load elements, the switching frequency of switching elements has been increased at high frequencies. However, increasing the switching frequency can worsen the effects of radiated noise, including high-frequency components. Summary of the Invention

[0005] This disclosure relates to a technique that helps reduce radiated noise in control circuits.

[0006] One aspect of this disclosure provides a control circuit for controlling a load circuit, the control circuit including a semiconductor element, a first capacitor, a second capacitor, and a circuit board. The semiconductor element has a first switching element and a second switching element integrated therein. The first switching element is connected between a first output line and a first power supply line and is configured to turn on and off the flow of current to the load circuit, the first output line being connected to a first terminal of the load circuit. The second switching element is connected between a second output line and a second power supply line and is configured to turn on and off the flow of current to the load circuit, the second output line being connected to a second terminal of the load circuit. The first capacitor is connected between the first power supply line and the first output line. The second capacitor is connected between the second power supply line and the second output line. The semiconductor element, the first capacitor, and the second capacitor are mounted on the circuit board.

[0007] The features of this disclosure will become clear from the following description of embodiments with reference to the accompanying drawings. The following description of the embodiments is by way of example. Attached Figure Description

[0008] Figure 1A This is a circuit diagram illustrating the control circuit according to the first embodiment.

[0009] Figure 1B This is a circuit diagram illustrating the control circuit according to the first embodiment.

[0010] Figure 2A This is a cross-sectional view illustrating the wiring layout of the circuit board in the control circuit according to the first embodiment.

[0011] Figure 2B This is a top view illustrating the wiring layout of the circuit board in the control circuit according to the first embodiment.

[0012] Figure 3A This is a circuit diagram illustrating the control circuit according to the second embodiment.

[0013] Figure 3B This is a top view illustrating the wiring layout of the circuit board in the control circuit according to the second embodiment.

[0014] Figure 4 This is a cross-sectional view illustrating the wiring layout of the circuit board in the control circuit according to the third embodiment.

[0015] Figure 5A This is a cross-sectional view illustrating the wiring layout of the circuit board in the control circuit according to the fourth embodiment.

[0016] Figure 5B This is a top view illustrating the wiring layout of the circuit board in the control circuit according to the fourth embodiment.

[0017] Figure 6 This is a graph showing the radiated noise generated from the control circuit.

[0018] Figure 7 This is a schematic diagram illustrating an imaging device as an example of an electronic device according to the fifth embodiment.

[0019] Figure 8A This is a circuit diagram illustrating the control circuit based on the reference example.

[0020] Figure 8B This is a circuit diagram illustrating the control circuit based on the reference example. Detailed Implementation

[0021] Reference Example

[0022] Some radiated noise occurs due to the operation of switching elements. (Refer to...) Figure 8A and Figure 8B The control circuit is described as a reference example in which such radiated noise may occur. Figure 8A and Figure 8B This is a circuit diagram of control circuit 400 based on the reference example. Figure 8A and Figure 8B The diagram illustrates the scenario where drive current is output from output lines 3 and 4, which are different from each other.

[0023] like Figure 8A and Figure 8B As shown, the control circuit 400 according to the reference example is a control circuit for controlling a load circuit 200 including a load element 2 such as a coil or a motor, and may be referred to as a drive circuit for driving the load element 2. The control circuit 400 includes a semiconductor element 1 having an H-bridge drive circuit 9 integrated therein. The semiconductor element 1 is a driver integrated circuit (IC). The control circuit 400 also includes output lines 3 and 4 connecting the semiconductor element 1 and the load element 2 to output drive current to the load element 2, and power supply lines 5 and 6 connecting the semiconductor element 1 and a direct current (DC) power supply B to supply power to the semiconductor element 1.

[0024] exist Figure 8A and Figure 8B In the diagram, the semiconductor element 1 surrounded by the broken wire includes transistors 10, 11, 12, and 13 as switching elements, and output lines 3 and 4. Transistors 10, 11, 12, and 13 are switching elements that turn the current to the load element 2 on and off. Transistors 10, 11, 12, and 13 are all N-channel metal-oxide-semiconductor field-effect transistors (MOSFETs).

[0025] In semiconductor element 1, the source of transistor 10 and the drain of transistor 11 are connected via wiring W1. Furthermore, the source of transistor 12 and the drain of transistor 13 are connected via wiring W2. Furthermore, the drain of transistor 10 and the drain of transistor 12 are connected via wiring W3. Furthermore, the source of transistor 11 and the source of transistor 13 are connected via wiring W4. One end of output line 3 is connected to wiring W1 between the source of transistor 10 and the drain of transistor 11. The other end of output line 3 is connected to one terminal of load element 2. One end of output line 4 is connected to wiring W2 between the source of transistor 12 and the drain of transistor 13. The other end of output line 4 is connected to another terminal of load element 2. A power supply line 5, connected to the positive electrode of a DC power supply B such as a secondary battery, is connected to wiring W3 between the drain of transistor 10 and the drain of transistor 12. A power supply line 6, connected to the negative electrode of the DC power supply B, is connected to wiring W4 between the source of transistor 11 and the source of transistor 13. Power supply line 5 is a power supply line supplied with power potential by DC power source B. Power supply line 6 is a grounding line supplied with ground potential.

[0026] In this manner, the H-bridge drive circuit 9 is configured in semiconductor element 1 by transistors 10, 11, 12, and 13, which serve as four switching elements. In the H-bridge drive circuit 9, transistor 10 is connected between output line 3 and power supply line 5. Transistor 11 is connected between output line 3 and power supply line 6, and is connected in series with transistor 10. Transistor 12 is connected between output line 4 and power supply line 5, and is connected in series with transistor 13. Transistor 13 is connected between output line 4 and power supply line 6.

[0027] A control unit for controlling the ON / OFF state of transistors 10, 11, 12, and 13 is connected to the gates of transistors 10, 11, 12, and 13. The control unit includes a microprocessor that generates voltage signals as control signals for switching the gates ON / OFF, a gate driver IC that converts the voltage of the control signals from the microprocessor and applies them to the gates, etc. The control signals for switching the gates ON / OFF are pulse width modulation (PWM) signals, etc.

[0028] Figure 8A The diagram illustrates the flow of drive current for driving load element 2 through output line 3 of semiconductor element 1. In this configuration, transistors 10 and 13 are turned on, while transistors 11 and 12 are turned off. In this state, drive current flows from power supply line 5 to load element 2 via transistor 10 through output line 3. As indicated by the dotted lines, high-frequency current generated in transistor 10, which switches at a high speed, also flows to load element 2 through output line 3.

[0029] Figure 8B The diagram illustrates the flow of drive current for driving load element 2 through output line 4 of semiconductor element 1. In this configuration, transistors 11 and 12 are turned on, while transistors 10 and 13 are turned off. In this state, drive current flows from power supply line 5 to load element 2 via transistor 12 through output line 4. As indicated by the dotted lines, high-frequency current generated in transistor 12, which switches at a high speed, also flows to load element 2 through output line 4.

[0030] Therefore, regardless of whether the drive current flows through output line 3 or output line 4 of semiconductor element 1, the high-frequency current flows to load element 2 either through output line 3 or output line 4. As a result, in the control circuit 400 according to the reference example, radiated noise occurs from output line 3 or output line 4, which is a wiring arrangement between semiconductor element 1 and load element 2.

[0031] The control circuit according to embodiments of the present disclosure suppresses the flow of high-frequency current through the output line to the load even when a high-frequency current is generated by switching a switching element such as a transistor between ON and OFF as described above, thereby reducing radiated noise from the output line. Embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings.

[0032] First Embodiment

[0033] Reference Figures 1A to 2B The control circuit according to the first embodiment is described. The control circuit according to this embodiment is applied to a motor unit, for example, installed in a lens product or camera product, for image stabilization or shake correction.

[0034] First, refer to Figure 1A and Figure 1B The circuit configuration of the control circuit according to this embodiment is described. Figure 1A and Figure 1B This is a circuit diagram illustrating the control circuit 100 according to this embodiment. Figure 1A and Figure 1B The illustration shows the case where drive current is output from output lines 3 and 4, which are different from each other. Components similar to those in the control circuit 400 according to the reference example are indicated by the same reference numerals and, for brevity, their descriptions will be incorporated by reference.

[0035] like Figure 1A and Figure 1B As shown, the control circuit 100 according to this embodiment is a control circuit for controlling a load circuit 200 including a load element 2 such as a coil or a motor, and may be referred to as a drive circuit for driving the load element 2. The control circuit 100 includes a semiconductor element 1 having an H-bridge drive circuit 9 integrated therein. The control circuit 100 also includes output lines 3 and 4 connecting the semiconductor element 1 and the load element 2 to output drive current to the load element 2, and power supply lines 5 and 6 connecting the semiconductor element 1 and a DC power supply B to supply power to the semiconductor element 1.

[0036] exist Figure 1A and Figure 1BIn the diagram, the semiconductor element 1 surrounded by a break includes transistors 10, 11, 12, and 13 as switching elements, and output lines 3 and 4. Transistors 10, 11, 12, and 13 are switching elements that turn the current to the load element 2 on and off. Transistors 10, 11, 12, and 13 are all N-channel MOSFETs. Transistors 10, 11, 12, and 13 may also be all P-channel MOSFETs. In transistors 10, 11, 12, and 13, N-channel MOSFETs and P-channel MOSFETs may be mixed, such as a P-channel MOSFET on the high side and an N-channel MOSFET on the low side. This disclosure is not so limited, and, for example, the switching element may be provided as an insulated-gate bipolar transistor (IGBT).

[0037] In semiconductor element 1, the source of transistor 10 and the drain of transistor 11 are connected via wiring W1. Furthermore, the source of transistor 12 and the drain of transistor 13 are connected via wiring W2. Furthermore, the drain of transistor 10 and the drain of transistor 12 are connected via wiring W3. Furthermore, the source of transistor 11 and the source of transistor 13 are connected via wiring W4. One end of output line 3 is connected to wiring W1 between the source of transistor 10 and the drain of transistor 11. The other end of output line 3 is connected to one terminal of load element 2. One end of output line 4 is connected to wiring W2 between the source of transistor 12 and the drain of transistor 13. The other end of output line 4 is connected to another terminal of load element 2. A power supply line 5, connected to the positive electrode of a DC power supply B such as a secondary battery, is connected to wiring W3 between the drain of transistor 10 and the drain of transistor 12. A power supply line 6, connected to the negative electrode of the DC power supply B, is connected to wiring W4 between the source of transistor 11 and the source of transistor 13. Power supply line 5 is a power supply line supplied with power potential by DC power supply B. Power supply line 6 is a grounding line supplied with ground potential. One terminal and the other terminal of load element 2 are the first terminal and the second terminal of load circuit 200, respectively.

[0038] In this manner, the H-bridge drive circuit 9 is configured in semiconductor element 1 by transistors 10, 11, 12, and 13, which serve as four switching elements. In the H-bridge drive circuit 9, transistor 10 is connected between output line 3 and power supply line 5. Transistor 11 is connected between output line 3 and power supply line 6, and is connected in series with transistor 10. Transistor 12 is connected between output line 4 and power supply line 5, and is connected in series with transistor 13. Transistor 13 is connected between output line 4 and power supply line 6.

[0039] A control unit for controlling the ON / OFF state of transistors 10, 11, 12, and 13 is connected to the gates of transistors 10, 11, 12, and 13. The control unit includes a microprocessor that generates voltage signals as control signals, such as PWM signals, for switching the ON / OFF state of the gates, and a gate driver IC that converts the voltage of the control signals from the microprocessor and applies them to the gates. A load element 2, such as an electronic component like a coil or motor, is driven by a predetermined current by switching the ON / OFF state of transistors 10, 11, 12, and 13 using control signals such as PWM signals.

[0040] In the control circuit 100 according to this embodiment, capacitor 7 is connected between output line 3 and power supply line 5. Capacitor 7 is provided on wiring W5 connecting output line 3 and power supply line 5. Furthermore, capacitor 8 is connected between output line 4 and power supply line 6. Capacitor 8 is provided on wiring W6 connecting output line 4 and power supply line 6. One or both of capacitors 7 and 8 may have a capacitance greater than 100 pF, resulting in lower impedance at the frequency components of the radiated noise to be reduced.

[0041] Figure 1A The diagram illustrates the flow of drive current for driving load element 2 through output line 3 of semiconductor element 1. In this configuration, transistors 10 and 13 are turned on, while transistors 11 and 12 are turned off. In this state, drive current flows from power supply line 5 to load element 2 via transistor 10 through output line 3. As illustrated by the dotted line, the high-frequency current generated in transistor 10, which switches at a high speed, does not flow to load element 2 through output line 3 but instead returns to transistor 10 through capacitor 7 with low impedance. Therefore, no high-frequency radiated noise occurs from output line 3 and load element 2.

[0042] Figure 1B The diagram illustrates the flow of drive current for driving load element 2 through output line 4 of semiconductor element 1. In this configuration, transistors 11 and 12 are turned on, while transistors 10 and 13 are turned off. In this state, drive current flows from power supply line 5 to load element 2 via transistor 12 through output line 4. As illustrated by the dotted line, the high-frequency current generated in transistor 12, which switches at a high speed, does not flow from output line 4 to load element 2, but instead flows through capacitor 8 with low impedance to power supply line 6. Therefore, no high-frequency radiated noise occurs from output line 4 and load element 2.

[0043] Therefore, the control circuit 100 according to this embodiment can reduce radiated noise generated from output lines 3 and 4 and load element 2. One or both of the wiring W5 of the supplied capacitor 7 and the wiring W6 of the supplied capacitor 8 can be as short as possible. The shorter the wiring W5 and wiring W6, the shorter the path through which the high-frequency current flows, which can further improve the effect of reducing radiated noise.

[0044] The control circuit 100 according to this embodiment may include a circuit board 20, on which the semiconductor element 1 is mounted. Here, reference will be made to... Figure 2A and Figure 2B The wiring layout of the circuit board 20 in the control circuit 100 according to this embodiment is described. Figure 2A This is a cross-sectional view of the wiring layout of the circuit board 20 in which the semiconductor element 1 is mounted in the control circuit 100 according to this embodiment. Figure 2B This is a top view illustrating the wiring layout of the circuit board 20 in which the semiconductor element 1 is mounted in the control circuit 100 according to this embodiment. Figure 2B This is a top view of the circuit board 20 from the side where the semiconductor element 1 is mounted.

[0045] Circuit board 20 is a printed wiring board, printed circuit board, etc. For example... Figure 2A and Figure 2B As shown, a plurality of electrodes 25 for mounting semiconductor element 1 by solder are provided on one of the opposing surfaces 20a and 20b of the circuit substrate 20. The electrodes 25 are, for example, solder pads. The plurality of electrodes 25 include output electrodes 21 and 22 and power supply electrodes 23 and 24. The plurality of electrodes 25 are arranged, for example, in a grid pattern or mesh pattern. The circuit substrate 20 is provided with output lines 3 and 4 and power supply lines 5 and 6. Output electrode 21 is included in output line 3. Output electrode 22 is included in output line 4. Power supply electrode 23 is included in power supply line 5. Power supply electrode 24 is included in power supply line 6.

[0046] Semiconductor element 1 is bonded to a plurality of electrodes 25, including output electrodes 21 and 22 and power supply electrodes 23 and 24, via solder balls 26, and is mounted on a surface 20a of circuit board 20. Semiconductor element 1 includes: a first output terminal included in output line 3, a second output terminal included in output line 4, a first power terminal included in power supply line 5, and a second power terminal included in power supply line 6. The first output terminal is connected to output electrode 21 via solder balls 26. The second output terminal is connected to output electrode 22 via solder balls 26. The first power terminal is connected to power supply electrode 23 via solder balls 26. The second power terminal is connected to power supply electrode 24 via solder balls 26. The distance between the first power terminal and the second power terminal is greater than the distance between the first output terminal and the second output terminal.

[0047] Output electrodes 21 and 22 are arranged adjacent to each other to reduce wiring loops in output lines 3 and 4, including those that generate radiated noise as electromagnetic noise. No other electrodes 25 are provided between output electrodes 21 and 22.

[0048] The output electrode 21, included in the output line 3, and the power supply electrode 23, included in the power supply line 5, are arranged adjacent to each other. No other electrode 25 is provided between the output electrode 21 and the power supply electrode 23. The output electrode 21 is connected to one terminal 71 of the capacitor 7 via wiring W5-1. The power supply electrode 23 is connected to the other terminal 72 of the capacitor 7 via wiring W5-2. Wiring W5-1 and W5-2 constitute the aforementioned wiring W5 and are provided on the circuit board 20. The capacitor 7 is arranged and mounted on the surface 20a of the circuit board 20 on which the semiconductor element 1 is mounted.

[0049] The output electrode 22, included in the output line 4, is arranged adjacent to the power supply electrode 24, included in the power supply line 6. No other electrode 25 is provided between the output electrode 22 and the power supply electrode 24. The output electrode 22 is connected to one terminal 81 of the capacitor 8 via wiring W6-1. The power supply electrode 24 is connected to the other terminal 82 of the capacitor 8 via wiring W6-2. Wiring W6-1 and W6-2 constitute the aforementioned wiring W6 and are provided on the circuit board 20. The capacitor 8 is arranged and mounted on the surface 20a of the circuit board 20 on which the semiconductor element 1 is mounted.

[0050] Capacitors 7 and 8 are arranged and mounted on the side of the semiconductor element 1 on the surface 20a of the circuit board 20 where the semiconductor element 1 is mounted, so as to be adjacent to the semiconductor element 1.

[0051] Because of the structure in which the output electrodes 21 and 22 and the power supply electrodes 23 and 24 are arranged as described above, the wiring W5 for connecting capacitor 7 and the wiring W6 for connecting capacitor 8 can be shorter. Since the wiring W5 and W6, through which high-frequency current can flow, are shorter, the effect of reducing radiated noise can be further enhanced.

[0052] As described above, according to this embodiment, high-frequency current is suppressed and radiated noise is reduced at the output of semiconductor element 1.

[0053] Second Embodiment

[0054] Reference Figure 3A and Figure 3B A control circuit according to a second embodiment of the present disclosure is described. Figure 3A This is a circuit diagram illustrating the control circuit according to this embodiment. Figure 3B This is a top view illustrating the wiring layout of the circuit board in the control circuit according to this embodiment. Components similar to those in the first embodiment will be denoted by the same reference numerals, and their descriptions will be incorporated herein by reference for brevity.

[0055] like Figure 3A As shown, the control circuit 100 according to this embodiment includes a semiconductor element 1a having two H-bridge drive circuits 9a and 9b integrated therein. The semiconductor element 1a is a driver IC. The H-bridge drive circuit 9a drives the load element 2a via output lines 3a and 4a. The H-bridge drive circuit 9b drives the load element 2b via output lines 3b and 4b. Similar to the load element 2 in the first embodiment, the load elements 2a and 2b are coils, motors, etc., and are included in the load circuit 200. More specifically, the load elements 2a and 2b are, for example, a motor for X-direction driving and a motor for Y-direction driving in an image stabilization motor unit or a jitter correction motor unit.

[0056] H-bridge drive circuits 9a and 9b each have the same configuration as the H-bridge drive circuit 9 of the first embodiment. H-bridge drive circuits 9a and 9b are connected in parallel to each other. In H-bridge drive circuit 9a, one end of output line 3a is connected to wiring W1 between the source of transistor 10 and the drain of transistor 11. The other end of output line 3a is connected to one terminal of load element 2a. Furthermore, in H-bridge drive circuit 9a, one end of output line 4a is connected to wiring W2 between the source of transistor 12 and the drain of transistor 13. The other end of output line 4a is connected to another terminal of load element 2a. In H-bridge drive circuit 9b, one end of output line 3b is connected to wiring W1 between the source of transistor 10 and the drain of transistor 11. The other end of output line 3b is connected to one terminal of load element 2b. Furthermore, in H-bridge drive circuit 9b, one end of output line 4b is connected to wiring W2 between the source of transistor 12 and the drain of transistor 13. The other end of output line 4b is connected to another terminal of load element 2b. In each of the H-bridge drive circuits 9a and 9b, a power supply line 5a connected to the positive electrode of a DC power supply B, such as a secondary battery, is connected to a wiring W3 between the drains of transistor 10 and transistor 12. A power supply line 6a connected to the negative electrode of the DC power supply B is connected to a wiring W4 between the sources of transistor 11 and transistor 13. Power supply line 5a is a power supply line supplied with power potential by the DC power supply B. Power supply line 6a is a grounding line supplied with ground potential. One terminal and the other terminal of load element 2a are respectively the first and second terminals of load circuit 200. One terminal and the other terminal of load element 2b are respectively the third and fourth terminals of load circuit 200.

[0057] The control circuit 100 according to this embodiment may have a circuit board 20 on which the semiconductor element 1a is mounted. Here, reference will be made to... Figure 3B The wiring layout of the circuit board 20 in the control circuit 100 according to this embodiment is described.

[0058] like Figure 3BAs shown, a plurality of electrodes 38 for mounting semiconductor element 1a by solder are provided on one of the opposing surfaces 20a and 20b of the circuit board 20. The electrodes 38 are, for example, solder pads. The plurality of electrodes 38 includes output electrodes 31, 32, 35, and 36 and power supply electrodes 33, 34, and 37. The plurality of electrodes 38 are arranged, for example, in a grid pattern or mesh pattern. The circuit board 20 is provided with output lines 3a, 3b, 4a, and 4b and power supply lines 5a and 6a. Output electrode 31 is included in output line 3a. Output electrode 32 is included in output line 4a. Power supply electrode 33 is included in power supply line 5a. Power supply electrode 34 is included in power supply line 6a. Output electrode 35 is included in output line 3b. Output electrode 36 is included in output line 4b. Power supply electrode 37 is included in power supply line 5a. The semiconductor element 1a is bonded to a plurality of electrodes 38, including output electrodes 31, 32, 35 and 36 and power supply electrodes 33, 34 and 37, by solder balls as bonding bodies, and is mounted on a surface 20a of the circuit board 20.

[0059] Output electrodes 31 and 32 are arranged adjacent to each other to reduce wiring loops, including those on output lines 3a and 4a, which generate radiated noise as electromagnetic noise. No other electrodes 38 are provided between output electrodes 31 and 32.

[0060] Output electrodes 35 and 36 are arranged adjacent to each other to reduce wiring loops, including those on output lines 3b and 4b that generate radiated noise as electromagnetic noise. No other electrode 38 is provided between output electrodes 35 and 36.

[0061] The output electrode 31, included in the output line 3a, and the power supply electrode 33, included in the power supply line 5a, are arranged adjacent to each other. No other electrode 38 is provided between the output electrode 31 and the power supply electrode 33. The output electrode 31 is connected to one terminal 401 of the capacitor 40 via a wiring W5-1 constituting wiring W5, as in the first embodiment. The power supply electrode 33 is connected to another terminal 402 of the capacitor 40 via a wiring W5-2 constituting wiring W5, as in the first embodiment. The capacitor 40 is a capacitor similar to the capacitor 7 of the first embodiment and is arranged and mounted on the surface 20a of the circuit board 20 on which the semiconductor element 1a is mounted.

[0062] The output electrode 32, included in the output line 4a, is arranged adjacent to the power supply electrode 34, included in the power supply line 6a. No other electrode 38 is provided between the output electrode 32 and the power supply electrode 34. The output electrode 32 is connected to one terminal 411 of the capacitor 41 via wiring W6-1, which constitutes wiring W6, as in the first embodiment. The power supply electrode 34 is connected to the other terminal 412 of the capacitor 41 via wiring W6-2, which constitutes wiring W6, as in the first embodiment. The capacitor 41 is a capacitor similar to the capacitor 8 of the first embodiment and is arranged and mounted on the surface 20a of the circuit board 20 on which the semiconductor element 1a is mounted.

[0063] The output electrode 35, included in the output line 3b, is arranged adjacent to the power supply electrode 37, included in the power supply line 5a. No other electrode 38 is provided between the output electrode 35 and the power supply electrode 37. The output electrode 35 is connected to one terminal 431 of the capacitor 43 via wiring W5-1, which constitutes wiring W5, as in the first embodiment. The power supply electrode 37 is connected to the other terminal 432 of the capacitor 43 via wiring W5-2, which constitutes wiring W5, as in the first embodiment. The capacitor 43 is a capacitor similar to the capacitor 7 of the first embodiment and is arranged and mounted on the surface 20a of the circuit board 20 on which the semiconductor element 1a is mounted.

[0064] The output electrode 36, included in the output line 4b, is arranged adjacent to the power supply electrode 34, included in the power supply line 6a. No other electrode 38 is provided between the output electrode 36 and the power supply electrode 34. The output electrode 36 is connected to one terminal 421 of the capacitor 42 via wiring W6-1, which constitutes wiring W6, as in the first embodiment. The power supply electrode 34 is connected to the other terminal 422 of the capacitor 42 via wiring W6-2, which constitutes wiring W6, as in the first embodiment. The capacitor 42 is a capacitor similar to the capacitor 8 of the first embodiment and is arranged and mounted on the surface 20a of the circuit board 20 on which the semiconductor element 1a is mounted.

[0065] Capacitors 40, 41, 42, and 43 are arranged and mounted on the side of the semiconductor element 1a on the surface 20a of the circuit board 20 where the semiconductor element 1 is mounted, so as to be adjacent to the semiconductor element 1a. Some or all of capacitors 40, 41, 42, and 43 may have a capacitance greater than 100 pF, so that the impedance is lower at the frequency components of the radiated noise to be reduced.

[0066] Regarding the H-bridge drive circuit 9a, as in the first embodiment, capacitors 40 and 41 prevent high-frequency radiated noise from the output lines 3a and 4a and the load element 2a. Similarly, regarding the H-bridge drive circuit 9b, as in the first embodiment, capacitors 43 and 42 prevent high-frequency radiated noise from the output lines 3b and 4b and the load element 2b. Therefore, in the control circuit 100 according to this embodiment, radiated noise from the output lines 3a and 4a, output lines 3b and 4b, load element 2a, and load element 2b can be reduced.

[0067] Furthermore, by arranging the output electrodes 31, 32, 35, and 36 and the power supply electrodes 33, 34, and 37 as described above, the wiring W5 used to connect capacitor 40 can be shorter. Furthermore, the wiring W6 used to connect capacitor 41 can be shorter. Furthermore, the wiring W6 used to connect capacitor 42 can be shorter. Furthermore, the wiring W5 used to connect capacitor 43 can be shorter. Radiated noise is further reduced.

[0068] As described above, according to this embodiment, high-frequency current can be suppressed at the output of semiconductor element 1a, which has two H-bridge drive circuits 9a and 9b integrated therein, and a higher effect of reducing radiated noise can be achieved.

[0069] Although the above description has shown the case where semiconductor element 1a has two H-bridge drive circuits 9a and 9b integrated therein, semiconductor element 1a may have three or more H-bridge drive circuits integrated therein. Even in this case, a capacitor may be connected to each H-bridge drive circuit in a similar manner.

[0070] Third Embodiment

[0071] Reference Figure 4 A control circuit according to a third embodiment of the present disclosure is described. Figure 4 This is a cross-sectional view illustrating the wiring layout of the circuit board in the control circuit according to the third embodiment. Components similar to those in the first and second embodiments described above will be denoted by the same reference numerals, and their descriptions will be incorporated herein by reference for brevity.

[0072] The basic configuration of the control circuit 100 according to this embodiment is the same as that of the control circuit 100 according to the first embodiment. In the control circuit 100 according to this embodiment, capacitors 7a and 8a, similar to those in the first embodiment, are mounted on the circuit board 20 on the surface 20b opposite to the surface 20a on which the semiconductor element 1 is mounted. In this respect, the control circuit 100 according to this embodiment differs from the control circuit 100 according to the first embodiment. Capacitors 7a and 8a are similar to those in the first embodiment.

[0073] like Figure 4 As shown, in the control circuit 100 according to this embodiment, a semiconductor element 1 is mounted on one surface 20a of a circuit board 20, and capacitors 7a and 8a are mounted on another surface 20b of the circuit board 20. The surface 20b of the circuit board 20 on which capacitors 7a and 8a are mounted is the surface opposite to the surface 20a of the circuit board 20 on which the semiconductor element 1 is mounted.

[0074] Multiple electrodes 25, serving as multiple electrodes for mounting semiconductor element 1 via solder, are provided on one of the opposing surfaces 20a and 20b of the circuit substrate 20. The multiple electrodes 25 include output electrodes 21 and 22 and power supply electrodes 23 and 24. The multiple electrodes 25 are arranged, for example, in a grid pattern or mesh pattern. The circuit substrate 20 is provided with output lines 3 and 4 and power supply lines 5 and 6. Output electrode 21 is included in output line 3. Output electrode 22 is included in output line 4. Power supply electrode 23 is included in power supply line 5. Power supply electrode 24 is included in power supply line 6. The semiconductor element 1 is bonded to the multiple electrodes 25, including output electrodes 21 and 22 and power supply electrodes 23 and 24, via solder balls 26 serving as bonding bodies, and is mounted on one surface 20a of the circuit substrate 20.

[0075] Through-holes V1, V2, V3, and V4, respectively connected to output electrodes 21 and 22 and power supply electrodes 23 and 24, are provided inside the circuit board 20. One end of each through-hole V1, V2, V3, and V4 is connected to the output electrodes 21 and 22 and the power supply electrodes 23 and 24, respectively. The other ends of each through-hole V1, V2, V3, and V4 reach another surface 20b of the circuit board 20.

[0076] Output electrodes 21 and 22 are arranged adjacent to each other to reduce wiring loops in output lines 3 and 4, including those that generate radiated noise as electromagnetic noise. No other electrodes 25 are provided between output electrodes 21 and 22.

[0077] The output electrode 21, included in the output line 3, is arranged adjacent to the power supply electrode 23, included in the power supply line 5. No other electrode 25 is provided between the output electrode 21 and the power supply electrode 23. The output electrode 21 is connected to one terminal 73 of the capacitor 7a via a through-hole V1. The power supply electrode 23 is connected to another terminal 74 of the capacitor 7a via a through-hole V3. Through-holes V1 and V3 constitute the wiring W5 described in the first embodiment. The capacitor 7a is arranged and mounted on the surface 20b of the circuit board 20 opposite to the surface 20a on which the semiconductor element 1 is mounted.

[0078] The output electrode 22, included in the output line 4, is arranged adjacent to the power supply electrode 24, included in the power supply line 6. No other electrode 25 is provided between the output electrode 22 and the power supply electrode 24. The output electrode 22 is connected to one terminal 83 of the capacitor 8a via a through-hole V2. The power supply electrode 24 is connected to the other terminal 84 of the capacitor 8a via a through-hole V4. Through-holes V2 and V4 constitute the wiring W6 described in the first embodiment. The capacitor 8a is arranged and mounted on the surface 20b of the circuit board 20 opposite to the surface 20a on which the semiconductor element 1 is mounted.

[0079] In this manner, on the surface 20b of the circuit board 20 opposite to the surface 20a on which the semiconductor element 1 is mounted, capacitor 7a is arranged and mounted directly below the output electrode 21 and the power supply electrode 23. On the opposite surface 20b, capacitor 8a is arranged and mounted directly below the output electrode 22 and the power supply electrode 24. Capacitors 7a and 8a are arranged and mounted on the opposite surfaces 20b of the circuit board 20 so as to overlap with the semiconductor element 1 in a plan view viewed in the normal direction of the surface 20a on which the semiconductor element 1 is mounted.

[0080] By utilizing the connection structure with through holes V1, V2, V3, and V4 as described above, the wiring W5 for connecting capacitor 7a and the wiring W6 for connecting capacitor 8a can be shortened. Since the wiring W5 and W6, through which high-frequency current can flow, are shorter, radiated noise can be further reduced.

[0081] Capacitors 7a and 8a can also be mounted on the surface 20b of the circuit board 20 opposite to the surface 20a on which the semiconductor element 1 is mounted.

[0082] In the control circuit 100 according to the second embodiment, which has a semiconductor element 1a in which two H-bridge drive circuits 9a and 9b are integrated, capacitors 40, 41, 42 and 43 may also be installed as in this embodiment.

[0083] Fourth embodiment

[0084] Reference Figure 5A and Figure 5B A control circuit according to a fourth embodiment of the present disclosure is described. Figure 5A This is a cross-sectional view illustrating the wiring layout of the circuit board in the control circuit according to this embodiment. Figure 5B This is a top view illustrating the wiring layout of the circuit board in the control circuit according to this embodiment. Components similar to those in the first to third embodiments described above will be denoted by the same reference numerals, and their descriptions will be incorporated herein by reference for brevity.

[0085] The basic configuration of the control circuit 100 according to this embodiment is the same as that of the control circuit 100 according to the first embodiment. The difference between the control circuit 100 according to this embodiment and the control circuit 100 according to the first embodiment is that capacitors 7b and 8b are mounted on the surface 20a of the circuit board 20 where the semiconductor element 1 is mounted, so that capacitors 7b and 8b are located between the semiconductor element 1 and the circuit board 20. Capacitors 7b and 8b are the same as capacitors 7 and 8 according to the first embodiment.

[0086] like Figure 5A and Figure 5B As shown, a plurality of electrodes 25 for mounting a semiconductor element 1 by solder are provided on one of the opposing surfaces 20a and 20b of a circuit board 20. The plurality of electrodes 25 includes output electrodes 21 and 22 and power supply electrodes 23 and 24. The plurality of electrodes 25 are arranged, for example, in a grid pattern or mesh pattern. The circuit board 20 is provided with output lines 3 and 4 and power supply lines 5 and 6. Output electrode 21 is included in output line 3. Output electrode 21 is connected to semiconductor element 1 via solder ball 14, which serves as a bonding agent. Output electrode 22 is included in output line 4. Output electrode 22 is connected to semiconductor element 1 via solder ball 16, which serves as a bonding agent. Power supply electrode 23 is included in power supply line 5. Power supply electrode 23 is connected to semiconductor element 1 via solder ball 15, which serves as a bonding agent. Power supply electrode 24 is included in power supply line 6. Power supply electrode 24 is connected to semiconductor element 1 via solder ball 17, which serves as a bonding agent.

[0087] Output electrodes 21 and 22 are arranged adjacent to each other to reduce wiring loops in output lines 3 and 4, including those that generate radiated noise as electromagnetic noise. No other electrodes 25 are provided between output electrodes 21 and 22.

[0088] The output electrode 21, included in the output line 3, is arranged adjacent to the power supply electrode 23, included in the power supply line 5. No other electrode 25 is provided between the output electrode 21 and the power supply electrode 23. The output electrode 21 is connected to one terminal 75 of the capacitor 7b via solder ball 14. The power supply electrode 23 is connected to the other terminal 76 of the capacitor 7b via solder ball 15. Solder balls 14 and 15 constitute the wiring W5 described in the first embodiment. The capacitor 7b is arranged and mounted on the surface 20a of the circuit board 20 on which the semiconductor element 1 is mounted, so as to be located between the semiconductor element 1 and the circuit board 20.

[0089] The output electrode 22, included in the output line 4, is arranged adjacent to the power supply electrode 24, included in the power supply line 6. No other electrode 25 is provided between the output electrode 22 and the power supply electrode 24. The output electrode 22 is connected to one terminal 85 of the capacitor 8b via solder balls 16. The power supply electrode 24 is connected to the other terminal 86 of the capacitor 8b via solder balls 17. The capacitor 8b is mounted on the surface 20a of the circuit board 20 where the semiconductor element 1 is mounted, so as to be located between the semiconductor element 1 and the circuit board 20.

[0090] In this embodiment, as described above, capacitors 7b and 8b are located between semiconductor element 1 and circuit substrate 20. Therefore, capacitors that can be used as capacitors 7b and 8b are limited to those whose length in the long side direction along the direction between terminals is shorter than the distance between electrodes 25, and whose length in the height direction between semiconductor element 1 and circuit substrate 20 is shorter than the height of solder balls.

[0091] Because of the connection structure using solder balls 14, 15, 16, and 17 as the joint as described above, the wiring W5 for connecting capacitor 7b and the wiring W6 for connecting capacitor 8b can be shorter. Since the wiring W5 and W6, through which high-frequency current can flow, are shorter, radiated noise can be further reduced.

[0092] Capacitors 7b and 8b can be mounted on the surface 20a of the circuit board 20 where the semiconductor element 1 is mounted, so as to be located between the semiconductor element 1 and the circuit board 20. Some radiated noise arises from the wiring arranged between the semiconductor element 1 and the load element 2 driving the load element 2. In this embodiment, since capacitors 7b and 8b are located between the semiconductor element 1 and the circuit board 20, the radiated noise arising from such wiring can be reduced more effectively.

[0093] In the control circuit 100 according to the second embodiment, which includes a semiconductor element 1a having two H-bridge drive circuits 9a and 9b integrated therein, capacitors 40, 41, 42 and 43 can be mounted similarly to those in this embodiment.

[0094] Example

[0095] A control circuit corresponding to the control circuit 100 according to the second embodiment, which includes a semiconductor element 1a with two H-bridge drive circuits 9a and 9b integrated therein, is used in the image stabilizing motor unit of the lens product, and radiated noise from the control circuit is measured. The radiated noise measurement is performed in three cases: "no countermeasures," "capacitor insertion (between output and power supply)," and "capacitor insertion (between output and GND)." In the "no countermeasures" case, none of the capacitors 40, 41, 42, and 43 are provided in the control circuit 100, so no countermeasures against radiated noise are implemented. In the "capacitor insertion (between output and power supply)" case, capacitor 40 is connected between output line 3a and power supply line 5a, capacitor 43 is connected between output line 3b and power supply line 5a, and capacitors 41 and 42 are not provided. In the case of "capacitor insertion (between output and GND)", capacitor 41 is connected between output line 4a and power supply line 6a, capacitor 42 is connected between output line 4b and power supply line 6a, and capacitors 40 and 43 are not provided.

[0096] Figure 6 This is a graph showing the radiated noise measured in the three cases mentioned above. The horizontal axis of the graph indicates the frequency from 100 [MHz] to 200 [MHz], and the vertical axis indicates the radiated noise level [dBμV / m].

[0097] Figure 6 The results shown reveal that radiated noise is reduced in both cases of "capacitor insertion (between output and power supply)" and "capacitor insertion (between output and GND)" compared to the "no countermeasure" case.

[0098] Here, in the measurement of radiated noise, capacitors 40, 41, 42, and 43 are 1000pF capacitors with a self-resonant frequency near the frequency component that should reduce radiated noise. The inductive component of these capacitors increases proportionally to the length of the wiring used to connect the capacitors. As the impedance of the capacitors increases, high-frequency currents hardly flow into the capacitors, and radiated noise is reduced. In this example, the wiring used to connect capacitors 40 and 43 in the case of "capacitor insertion (between output and power supply)" is shorter than the wiring used to connect capacitors 41 and 42 in the case of "capacitor insertion (between output and GND)". Therefore, the reduction effect of radiated noise is greater in the case of "capacitor insertion (between output and power supply)" than in the case of "capacitor insertion (between output and GND)".

[0099] The results above show that radiated noise is reduced when a capacitor is connected between the output line and the power supply, and also when a capacitor is connected between the output line and ground. Connecting capacitors between multiple output electrodes and the same power supply electrode makes it difficult to place all capacitors adjacent to semiconductor components, and the wiring used to connect the capacitors becomes longer. By connecting capacitors between the output electrode and its adjacent power supply electrode, layout freedom is increased, and radiated noise is reduced.

[0100] Fifth Embodiment

[0101] Reference Figure 7 A device according to a fifth embodiment of the present disclosure is described. Figure 7 The diagram illustrates a camera system 300, including a camera body 310 and interchangeable lenses 320, as an example of a device according to this embodiment.

[0102] The camera system 300 according to this embodiment is a digital camera, such as a digital still camera or a digital video camera, and... Figure 7 The example shown is a digital single-lens reflex camera. The camera system 300 includes a camera body 310 as an electronic device, and an interchangeable lens 320 as an optical device that can be attached to and detached from the camera body 310. The interchangeable lens 320 is attached to the camera body 310 via a base 330.

[0103] The camera body 310 includes a housing 311, an imaging element 312 for capturing images of objects, and a display element 313 for displaying images captured by the imaging element 312. The camera body 310 also includes an image stabilization module 314. The imaging element 312, the display element 313, and the image stabilization module 314 are housed within the housing 311.

[0104] Image stabilization module 314 is an electrical device for reducing image blur or camera shake in an image. Image stabilization module 314 includes a load circuit 315 comprising a voice coil motor and a control circuit 316 for controlling the load circuit 315. The voice coil motor included in the load circuit 315 moves the imaging element 312, which is a movable element, for example, in a direction orthogonal to or intersecting with the optical axis of the camera system 300. The voice coil motor can be a drive coil, as discussed in Japanese Patent Application Publication No. 2020-140103. The control circuit 316 controls the load circuit 315 including the voice coil motor via, for example, PWM control. The voice coil motor included in the load circuit 315 corresponds to load element 2 or load elements 2a and 2b. Load circuit 315 corresponds to load circuit 200. The control circuit 316 is constructed from a control circuit 100 according to any one of the first to fourth embodiments. Image stabilization module 314 reduces image blur or camera shake by moving the imaging element 312.

[0105] The interchangeable lens 320 includes a lens barrel 321 that is attachable to and detachable from a housing 311, and optical elements 322 and 323 that serve as lenses. The interchangeable lens 320 includes an autofocus (AF) module 324 and an image stabilization module 327. Optical elements 322 and 323, the AF module 324, and the image stabilization module 327 are housed within the lens barrel 321.

[0106] The AF module 324 is an electrical device that automatically adjusts the focus of the camera system 300. The AF module 324 includes a load circuit 325 comprising a stepper motor and a control circuit 326 controlling the load circuit 325. The stepper motor included in the load circuit 325 moves the optical element 322, which is a movable element for AF, for example, in a direction parallel to the optical axis of the camera system 300. The stepper motor can be the type discussed in Japanese Patent Application Publication No. 2010-154687. The control circuit 326 controls the load circuit 325 including the stepper motor via, for example, PWM control. The stepper motor included in the load circuit 325 corresponds to load element 2 or load elements 2a and 2b. The load circuit 325 corresponds to the load circuit 200. The control circuit 326 is constructed from a control circuit 100 according to any one of the first to fourth embodiments. The AF module 324 adjusts the focus by moving the optical element 322.

[0107] Image stabilization module 327 is an electrical device for reducing image blur or camera shake in an image. Image stabilization module 327 includes a load circuit 328 comprising a voice coil motor and a control circuit 329 for controlling the load circuit 328. The voice coil motor included in the load circuit 328 causes the optical element 323, which is a movable element for image stabilization, to move, for example, in a direction orthogonal to or intersecting with the optical axis of the camera system 300. As the voice coil motor, a voice coil type motor, as discussed in Japanese Patent Application Publication No. 2015-11277, can be used. The control circuit 329 controls the load circuit 328 including the voice coil motor via, for example, PWM control. The voice coil motor included in the load circuit 328 corresponds to load element 2 or load elements 2a and 2b. The load circuit 328 corresponds to load circuit 200. The control circuit 329 is constructed from a control circuit 100 according to any one of the first to fourth embodiments. Image stabilization module 327 reduces image blur or camera shake by moving the optical element 323.

[0108] As for the PWM control in control circuits 316, 326 and 329, the PWM control discussed in Japanese Patent Application Publication No. 2020-140103, Japanese Patent Application Publication No. 2024-056449 and the like can be used.

[0109] As described in this embodiment, the control circuit 100 according to any one of the first to fourth embodiments controls the load circuit in a device such as the camera body 310, the interchangeable lens 320, etc., including load elements such as voice coil motors or stepper motors to drive the load elements.

[0110] The electrical device provided with control circuitry 100 and load circuitry 200 can be installed not only in the camera system but also in devices constituting various systems. For example, the device can be an information device such as a smartphone or personal computer, or a communication device such as a modem or router. Alternatively, the device can be office equipment or printing equipment such as a printer, copier, or scanner; medical equipment such as an X-ray imaging device or endoscope; industrial equipment such as a robot or semiconductor manufacturing apparatus; or transportation equipment such as a vehicle, aircraft, or ship. When the control circuitry is provided within the limited space of the housing, improved noise characteristics and therefore increased reliability of the electronic device can be achieved. In addition to the electrical device providing control circuitry, the electronic device can also be provided with another electrical device. This other electrical device can be diverse and can be an electro-optical device such as an image sensor or display; a storage device such as a memory; a computing device such as a processor; a communication device performing wireless or wired communication; an electromechanical device such as a motor; a power supply device, etc.

[0111] One aspect of this disclosure provides a technique that helps reduce radiated noise in control circuits.

[0112] While this disclosure has been described with reference to embodiments, it is to be understood that this disclosure is not limited to the disclosed embodiments. The scope of the appended claims is to be interpreted in the broadest possible sense to cover all such modifications and equivalent structures and functions.

Claims

1. A control circuit for controlling a load circuit, the control circuit comprising: A semiconductor element having a first switching element and a second switching element integrated therein, wherein the first switching element is connected between a first output line and a first power supply line and is configured to turn on and off the flow of current to the load circuit, the first output line being connected to a first terminal of the load circuit, and wherein the second switching element is connected between a second output line and a second power supply line and is configured to turn on and off the flow of current to the load circuit, the second output line being connected to a second terminal of the load circuit; A first capacitor is connected between the first power supply line and the first output line; The second capacitor is connected between the second power supply line and the second output line; as well as A circuit board on which the semiconductor element, the first capacitor, and the second capacitor are mounted.

2. The control circuit according to claim 1, further comprising: A third switching element is connected between the first output line and the second power supply line, and is connected in series with the first switching element, wherein the third switching element is configured to turn on and off the flow of current to the load circuit; as well as A fourth switching element is connected between the second output line and the first power supply line, and is connected in series with the second switching element, wherein the fourth switching element is configured to turn on and off the flow of current to the load circuit.

3. The control circuit of claim 1, wherein the circuit board has a first surface, a plurality of electrodes are provided on the first surface, and the semiconductor element is mounted on the first surface via the plurality of electrodes.

4. The control circuit according to claim 3, wherein the plurality of electrodes comprises: The first electrode of the first output line; as well as The second electrode of the second output line, and The first electrode and the second electrode are adjacent to each other.

5. The control circuit according to claim 4, wherein the plurality of electrodes comprises: The third electrode of the first power supply line; as well as The fourth electrode of the second power supply line, and The first electrode and the third electrode are adjacent to each other.

6. The control circuit according to claim 5, wherein the second electrode and the fourth electrode are adjacent to each other.

7. The control circuit of claim 5, wherein the first wiring, the second wiring, the third wiring, and the fourth wiring are provided on the first surface. The first capacitor is mounted on the first surface. The first electrode is connected to the terminal of the first capacitor via the first wiring. The third electrode is connected to another terminal of the first capacitor via the third wiring. The second capacitor is mounted on the first surface. The second electrode is connected to the terminals of the second capacitor via the second wiring, and The fourth electrode is connected to another terminal of the second capacitor via the fourth wiring.

8. The control circuit of claim 7, wherein the first capacitor is adjacent to the semiconductor element, and The second capacitor is adjacent to the semiconductor element.

9. The control circuit according to claim 5, wherein the circuit board includes a first through hole, a second through hole, a third through hole, and a fourth through hole. The first capacitor is mounted on a second surface of the circuit board opposite to the first surface. The first through hole is configured to connect the first electrode to the terminal of the first capacitor. The third through-hole is configured to connect the third electrode to another terminal of the first capacitor. The second capacitor is mounted on the second surface. The second electrode is connected to one terminal of the second capacitor via the second through-hole, and The fourth electrode is connected to another terminal of the second capacitor via the fourth through-hole.

10. The control circuit of claim 9, wherein the first capacitor is arranged on the second surface to overlap with the semiconductor element in a plan view of the first surface, and The second capacitor is arranged on the second surface so as to overlap with the semiconductor element in the plan view.

11. The control circuit according to claim 5, wherein the first capacitor is mounted on the first surface. The first electrode is connected to the terminal of the first capacitor via a first solder ball. The third electrode is connected to another terminal of the first capacitor via a third solder ball. The second capacitor is mounted on the first surface. The second electrode is connected to the terminal of the second capacitor via a second solder ball, and The fourth electrode is connected to another terminal of the second capacitor via a fourth solder ball.

12. The control circuit of claim 11, wherein the first capacitor is located between the semiconductor element and the circuit substrate, and The second capacitor is located between the semiconductor element and the circuit board.

13. The control circuit according to claim 1, further comprising: A third switching element is connected between a third output line and a first power supply line, the first power supply line being connected to a third terminal of the load circuit, wherein the third switching element is configured to turn on and off the flow of current to the load circuit. A fourth switching element is connected between a fourth output line and a second power supply line, the second power supply line being connected to a fourth terminal of the load circuit, wherein the fourth switching element is configured to turn on and off the flow of current to the load circuit. A third capacitor is connected between the first power supply line and the third output line; as well as A fourth capacitor is connected between the second power supply line and the fourth output line.

14. The control circuit according to claim 13, further comprising: A fifth switching element is connected between the first output line and the second power supply line, and is connected in series with the first switching element, wherein the fifth switching element is configured to turn on and off the flow of current to the load circuit; A sixth switching element is connected between the second output line and the first power supply line, and is connected in series with the second switching element, wherein the sixth switching element is configured to turn on and off the flow of current to the load circuit; A seventh switching element is connected between the third output line and the second power supply line, and is connected in series with the third switching element, wherein the seventh switching element is configured to turn on and off the flow of current to the load circuit; as well as An eighth switching element is connected between the fourth output line and the first power supply line, and is connected in series with the fourth switching element, wherein the eighth switching element is configured to turn on and off the flow of current to the load circuit.

15. The control circuit according to claim 1, wherein the control circuit controls the load circuit by pulse width modulation control.

16. The control circuit according to claim 1, wherein the semiconductor element comprises: The first output terminal of the first output line connected to the first terminal of the load circuit; The first power terminal in the first power supply line; The second output terminal is connected to the second output line of the second terminal of the load circuit; as well as The second power terminal in the second power supply line, and The distance between the first power terminal and the second power terminal is greater than the distance between the first output terminal and the second output terminal.

17. The control circuit of claim 13, wherein the third switching element and the fourth switching element are integrated in the semiconductor element. The circuit board has a surface on which multiple electrodes are provided. The semiconductor element is mounted on the surface via the plurality of electrodes. The plurality of electrodes includes: The first electrode of the first output line; The second electrode of the second output line; The third electrode of the third output line; as well as The fourth electrode of the fourth output line, Wherein the first electrode and the second electrode are adjacent to each other, and The third electrode and the fourth electrode are adjacent to each other.

18. The control circuit of claim 17, wherein the plurality of electrodes further comprises: The fifth electrode of the first power supply line; The sixth electrode of the first power supply line; as well as The seventh electrode of the second power supply line, Wherein the first electrode and the fifth electrode are adjacent to each other, and The third electrode and the sixth electrode are adjacent to each other.

19. The control circuit of claim 18, wherein the second electrode and the seventh electrode are adjacent to each other, and The fourth electrode and the seventh electrode are adjacent to each other.

20. The control circuit according to claim 1, further comprising: A power source, configured to supply power to the first power supply line, The second power supply line provides grounding.

21. An electrical device comprising a control circuit and a load circuit according to any one of claims 1 to 20.

22. The electrical device of claim 21, wherein the load circuit includes a load element having a first terminal and a second terminal, and The load element is configured as a motor.

23. The electrical device of claim 22, wherein the motor is configured as a stepper motor.

24. An electrical device comprising a control circuit and a load circuit as described in claim 13. The load circuit mentioned above includes: A first load element, the first load element having a first terminal and a second terminal; as well as The second load element has a third terminal and a fourth terminal.

25. The electrical device of claim 24, wherein the first load element and the second load element are each a motor.

26. The electrical device of claim 24, wherein the first load element and the second load element are each a voice coil motor.

27. An apparatus comprising: The electrical apparatus according to claim 21; as well as Movable components The load circuit includes a motor configured to move the movable element.

28. The apparatus of claim 27, further comprising: case, The movable element is configured as an imaging element housed within the housing.

29. The apparatus of claim 27, further comprising: Lens tube, The movable element is configured as an optical element housed within the lens barrel.

Images