A low-noise tuning method applied to a ring oscillator
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- NORTHWESTERN POLYTECHNICAL UNIV
- Filing Date
- 2026-07-07
- Publication Date
- 2026-08-07
AI Technical Summary
例如，通过增加滤波电容或采用多级级联结构来抑制噪声，但这些方法往往需要额外的芯片面积或引入较大的功耗开销
针对现有的环形振荡器调谐方法难以在保持宽调谐范围的同时有效抑制调谐管闪烁噪声的问题，本发明实施例提供了一种应用于环形振荡器的低噪声调谐方法，该方法利用同一控制电压同步控制两个结构相同且对称设置在环形振荡器电路两侧的第一调谐网络和第二调谐网络，使两者的等效电阻同步变化，共同调整环形振荡器电路两个输出端的负载，从而在实现宽频率调谐范围的同时，通过第一调谐网络中的电阻R1和第二调谐网络中的电阻R2分别增大对应PMOS调谐管产生的闪烁噪声注入阻抗，有效抑制噪声向环形振荡器核心节点的传输；并且，电阻R1与PMOS调谐管M1漏极处的寄生电容构成第一低通滤波网络，电阻R2与PMOS调谐管M2漏极处的寄生电容构成第二低通滤波网络，共同滤除环形振荡器电路输出信号中的高频噪声分量。由此，本发明可在保持环形振荡器宽调谐范围的前提下，从阻抗隔离和频域滤波两个维度同时抑制调谐管自身的闪烁噪声和高频噪声，显著改善相位噪声性能，且无需额外增加芯片面积或功耗，有效解决现有技术中低噪声与宽调谐范围难以兼得的问题。
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Abstract
Description
Technical Field
[0001] This invention belongs to the field of integrated circuit design technology, specifically relating to a low-noise tuning method for ring oscillators. Background Technology
[0002] Ring oscillators are widely used as core clock sources in phase-locked loops, frequency synthesizers, and wireless communication transceivers due to their advantages such as simple structure, wide tuning range, ease of integration, and ability to provide multi-phase output. In ring oscillators, the oscillation frequency is typically tuned by changing the load capacitance or load resistance. Among these methods, using a PMOS transistor as a voltage-controlled variable resistor has become one of the mainstream technologies due to its good tuning linearity and simple control.
[0003] However, the phase noise performance of ring oscillators has always been a key factor limiting their application in high-performance RF communication systems. Compared with traditional LC oscillators, ring oscillators generally have worse phase noise, especially at low-frequency offsets, where the up-conversion of flicker noise (1 / f noise) exacerbates the phase noise degradation. In traditional PMOS tuner direct tuning schemes, the gate of the tuner is connected to the control voltage, the source to the power supply, and the drain is directly connected to the output node of the ring oscillator. Changes in the control voltage alter the on-resistance of the PMOS transistor, thereby adjusting the oscillation frequency. However, the channel thermal noise and flicker noise generated by the PMOS tuner itself are injected directly into the core node of the ring oscillator without attenuation. These noises are superimposed on the oscillation signal, and especially at mid-to-low frequency offsets, the up-conversion effect of flicker noise severely degrades the phase noise performance, resulting in the overall phase noise performance of the ring oscillator being far inferior to that of the LC oscillator.
[0004] To address these issues, several improvements have been proposed. For example, noise can be suppressed by adding filter capacitors or employing multi-stage cascaded structures; however, these methods often require additional chip area or introduce significant power consumption. More importantly, existing noise suppression techniques typically come at the cost of sacrificing tuning range; that is, to reduce phase noise, the frequency tuning interval must be narrowed, which is difficult to meet the requirements of high-frequency, multi-band applications.
[0005] In short, existing ring oscillator tuning methods struggle to effectively suppress tuner flicker noise while maintaining a wide tuning range. Summary of the Invention
[0006] To address the aforementioned problems in the prior art, this invention provides a low-noise tuning method for ring oscillators. This invention provides a low-noise tuning method for a ring oscillator, the low-noise tuning method comprising: The same control voltage Vc is used to synchronously control two identical and symmetrically arranged first and second tuning networks on both sides of the ring oscillator circuit, so that the equivalent resistance of the first and second tuning networks changes synchronously, and together adjusts the load of the two output terminals of the ring oscillator circuit, thereby achieving tuning of the oscillation frequency. The first tuning network includes a resistor R1 and a PMOS tuning transistor M1, and the second tuning network includes a resistor R2 and a PMOS tuning transistor M2. When the control voltage Vc synchronously controls the equivalent resistance of the first tuning network and the second tuning network to change synchronously, the resistors R1 and R2 respectively increase the flicker noise injection impedance generated by the corresponding PMOS tuning transistors M1 and M2 to suppress noise transmission. Furthermore, the resistor R1 and the parasitic capacitance at the drain of the PMOS tuning transistor M1 form a first low-pass filter network, and the resistor R2 and the parasitic capacitance at the drain of the PMOS tuning transistor M2 form a second low-pass filter network to jointly filter out the high-frequency noise components in the output signal of the ring oscillator circuit.
[0007] Compared with the prior art, the beneficial effects of the present invention are as follows: To address the problem that existing ring oscillator tuning methods struggle to effectively suppress flicker noise from the tuning transistor while maintaining a wide tuning range, this invention provides a low-noise tuning method for ring oscillators. This method utilizes the same control voltage to synchronously control two identical and symmetrically arranged tuning networks, a first and a second, on opposite sides of the ring oscillator circuit. This causes the equivalent resistances of both networks to change synchronously, jointly adjusting the load at the two output terminals of the ring oscillator circuit. This achieves a wide frequency tuning range while simultaneously increasing the flicker noise injection impedance generated by the corresponding PMOS tuning transistors through resistors R1 in the first tuning network and R2 in the second tuning network, effectively suppressing noise transmission to the core node of the ring oscillator. Furthermore, resistor R1 and the parasitic capacitance at the drain of PMOS tuning transistor M1 form a first low-pass filter network, and resistor R2 and the parasitic capacitance at the drain of PMOS tuning transistor M2 form a second low-pass filter network, jointly filtering out high-frequency noise components in the output signal of the ring oscillator circuit. Therefore, this invention can suppress the flicker noise and high-frequency noise of the tuning tube itself from two dimensions, impedance isolation and frequency domain filtering, while maintaining the wide tuning range of the ring oscillator. This significantly improves the phase noise performance without increasing the chip area or power consumption, effectively solving the problem of the difficulty in achieving both low noise and wide tuning range in the prior art. Attached Figure Description
[0008] Figure 1 This is a schematic diagram of the ring oscillator tuning circuit connection using the method proposed in this invention, provided in an embodiment of the invention. Figure 2 These are simulation comparison diagrams of phase noise of the ring oscillator provided in the embodiments of the present invention after using the method proposed in the present invention and the traditional PMOS tuning method respectively; Figure 3 This is a simulation diagram showing the tuning range of the output signal of the ring oscillator provided in this embodiment of the invention after using the tuning method proposed in this invention and the traditional PMOS tuning method, respectively. Detailed Implementation
[0009] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.
[0010] In the description of this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.
[0011] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.
[0012] The following is a detailed description of a low-noise tuning method for a ring oscillator proposed in this invention, with reference to the accompanying drawings.
[0013] In one possible implementation, the low-noise tuning method proposed in this invention includes: synchronously controlling two identical and symmetrically arranged first and second tuning networks (e.g., using the same control voltage Vc) on both sides of a ring oscillator circuit. Figure 1As shown in the diagram, the equivalent resistances of the first and second tuning networks change synchronously to adjust the loads at the two output terminals of the ring oscillator circuit, thereby achieving tuning of the oscillation frequency. The first tuning network includes a resistor R1 and a PMOS tuning transistor M1, and the second tuning network includes a resistor R2 and a PMOS tuning transistor M2. When the control voltage Vc synchronously controls the equivalent resistances of the first and second tuning networks to change synchronously, resistors R1 and R2 respectively increase the flicker noise injection impedance generated by the corresponding PMOS tuning transistors M1 and M2 to suppress noise transmission. Furthermore, resistor R1 and the parasitic capacitance in PMOS tuning transistor M1 form a first low-pass filter network, and resistor R2 and the parasitic capacitance in PMOS tuning transistor M2 form a second low-pass filter network to jointly filter out high-frequency noise components in the output signal of the ring oscillator circuit.
[0014] Now combined Figure 1 The circuit structure is described in detail, including the method and principle.
[0015] like Figure 1 As shown, the first tuning network also includes: resistors R3 and R4; the gate of the PMOS tuning transistor M1 is connected to the control voltage Vc, and the source of the PMOS tuning transistor M1, one end of resistor R3, one end of resistor R4, and the first terminal of the ring oscillator circuit are all connected to the power supply VDD; the drain of the PMOS tuning transistor M1 is connected to one end of resistor R1 and the other end of resistor R4; the other ends of resistor R1 and resistor R3 are connected to the second terminal of the ring oscillator circuit; wherein, the equivalent resistance of the first tuning network is formed by connecting resistor R1 in series with the on-resistance of the PMOS tuning transistor M1, and then connecting it in parallel with resistors R3 and R4.
[0016] Furthermore, the second tuning network also includes: resistors R5 and R6; the gate of the PMOS tuning transistor M2 is connected to the control voltage Vc; the source of the PMOS tuning transistor M2, one end of resistor R5, one end of resistor R6, and the third terminal of the ring oscillator circuit are all connected to the power supply VDD; the drain of the PMOS tuning transistor M2 is connected to one end of resistor R2 and the other end of resistor R5; the other ends of resistor R2 and the other ends of resistor R6 are connected to the fourth terminal of the ring oscillator circuit; wherein, the equivalent resistance of the second tuning network is formed by connecting resistor R2 and the on-resistance of the PMOS tuning transistor M2 in series, and then connecting them in parallel with resistors R5 and R6.
[0017] It should be noted that the frequency tuning range of the ring oscillator is determined by the output node (i.e., the first output terminal OUT). N Second output terminal OUT PThe effective load resistance variation range is determined by the resistance of the circuit. Although resistors R1, R2, R3, R4, R5, and R6 are added in this invention, to ensure that the tuning range is not narrowed due to the introduction of the noise suppression structure, this invention rationally selects the resistance values of each resistor and the range of the on-resistance of the PMOS tuning transistor (for example, the resistance values of resistors R1 and R2 are both 2KΩ, the resistance values of resistors R3 and R6 are both 10KΩ, and the resistance values of resistors R4 and R5 are both 8KΩ; the on-resistance values of PMOS tuning transistor M1 and PMOS tuning transistor M2 are both in the range of 2KΩ to 5KΩ). This makes the effective resistance range of the first and second tuning networks the same as the effective resistance range when two PMOS tuning transistors (e.g., the on-resistance of PMOS tuning transistor M1 and the on-resistance of PMOS tuning transistor M2) are directly connected to the two output terminals of the ring oscillator circuit (both are 2KΩ to 5KΩ).
[0018] Please continue to refer to Figure 1 The ring oscillator circuit includes: PMOS transistors M3, M4, M5, and M6; the source of PMOS transistor M3, serving as the first terminal of the ring oscillator circuit, is connected to the power supply VDD; the drain of PMOS transistor M3, serving as the second terminal of the ring oscillator circuit, is also connected to the gate of PMOS transistor M4 and the drain of NMOS transistor M5; the drain of NMOS transistor M5 serves as the first output terminal OUT of the ring oscillator circuit. N The gate of PMOS transistor M3 is connected to the drain of PMOS transistor M4; the source of PMOS transistor M4, serving as the third terminal of the ring oscillator circuit, is connected to the power supply VDD; the drain of PMOS transistor M4, serving as the fourth terminal of the ring oscillator circuit, is also connected to the drain of NMOS transistor M6; the drain of NMOS transistor M6 is used as the second output terminal OUT of the ring oscillator circuit. P The gate of NMOS transistor M5 is used to receive the first input signal IN. P The gate of NMOS transistor M6 is used to receive the second input signal IN. N The sources of NMOS transistors M5 and M6 are both grounded. Resistor R1 is connected to the first drain node (N1 in the figure) between the drains of PMOS transistor M3 and NMOS transistor M5, and resistor R2 is connected to the second drain node (N2 in the figure) between the drains of PMOS transistor M4 and NMOS transistor M6. By changing the load impedance of the two drain nodes, flicker noise from PMOS tuned transistors M1 and M2 is suppressed and high-frequency noise components are filtered out. The equivalent resistance of the first tuning network and the equivalent resistance of the second tuning network serve as the output load of the ring oscillator circuit. The RC time constant of the first drain node and the second drain node are adjusted synchronously to achieve tuning of the oscillation frequency.
[0019] Specifically, PMOS tuning transistors M1 and M2, when in operation, can be equivalent to a variable on-resistor controlled by the control voltage Vc. The flicker noise and thermal noise they generate can be equivalent to a noise voltage source connected in series in the channel or a noise current source connected in parallel between the drain and source, which is injected into the first output terminal OUT of the ring oscillator circuit through the drain. N Second output terminal OUT P By connecting the drain of the PMOS tuning transistor M1 to the first output terminal OUT... N A series resistor R1 is connected between the drain of the PMOS tuner M2 and the second output terminal OUT. P After connecting the series resistor R2, the channel of the noise source (PMOS tuner M1) is directed towards the first output terminal OUT. N And the channel of the PMOS tuning transistor M2 looks towards the second output terminal OUT. P The total impedance of the transistor increases. According to the voltage divider principle, the resistances of resistors R1 and R2 increase, forcing more noise current to flow through the on-resistance of the tuning transistor itself rather than the output node, thus injecting it into the first output terminal OUT. N Second output terminal OUT P The noise voltage is significantly reduced, thereby suppressing the transmission of noise.
[0020] Meanwhile, resistor R1 and the parasitic capacitance at the drain of PMOS tuner M1 (including drain-body junction capacitance, gate-drain overlap capacitance, and parasitic capacitance at the output node) together form a first low-pass filter network, and resistor R2 and the parasitic capacitance at the drain of PMOS tuner M2 form a second low-pass filter network; the cutoff frequencies of the first low-pass filter network and the second low-pass filter network are the same.
[0021] For high-frequency noise components (such as high-frequency components of thermal noise and high-frequency modulation sidebands of flicker noise) with frequencies higher than the cutoff frequency of the first or second low-pass filter network, the first or second low-pass filter network attenuates them and suppresses their injection into the output node. For extremely low-frequency noise (such as the fundamental frequency of flicker noise) with frequencies lower than the cutoff frequency, although the first or second low-pass filter network cannot attenuate them directly, they can be suppressed by combining the impedance isolation mechanism mentioned above (resistors R1 and R2 significantly increase the impedance of the noise injection path).
[0022] The above is the complete content of the method proposed in this invention. To verify the effectiveness of the method proposed in this invention, simulation software is used for verification.
[0023] The simulation experimental components of this invention are manufactured using SMIC 130nm technology. A complete quadrature voltage-controlled oscillator circuit was built on the Cadence IC617 simulation platform under a Linux system environment. The simulation was performed using the Spectre RF simulation tool, with the power supply voltage VDD set to 1.2V, the operating temperature to 27℃, and the control voltage VC to 0.6V.
[0024] Simulation 1 Under the above operating conditions, using the Spectre RF simulation tool, with corresponding output ports set at the differential output terminals of each voltage-controlled oscillator, PSS+PNOISE simulations were performed on the tuning methods of this invention and the traditional PMOS, respectively. The results are as follows: Figure 2 As shown, the horizontal axis represents the offset frequency in Hz, and the vertical axis represents the phase noise of the output signal in dBc / Hz. Figure 2 It can be seen that the phase noise of the present invention at a frequency offset of 1MHz at a 4GHz operating frequency is -118.22dBc / Hz, while the phase noise of the present invention at a frequency offset of 1MHz at a 4GHz operating frequency using the traditional PMOS tuning method is -111.92dBc / Hz.
[0025] Simulation 2 Under the above operating conditions, using the Spectre RF simulation tool, with corresponding output ports set at the differential output terminals of each voltage-controlled oscillator, and with the control voltage as the variable, PSS+PNOISE simulations were performed on the present invention and the traditional PMOS tuning method, respectively. The results are as follows. Figure 3 As shown, the horizontal axis represents the control voltage in V, and the vertical axis represents the frequency range of the output signal in GHz. Figure 3 It can be seen that the tuning range of the present invention under the same control voltage conditions is basically the same as that of the traditional PMOS-based tuning method, both being 3.7GHz-4.3GHz.
[0026] Simulation results show that the ring oscillator using the low-noise tuning method proposed in this invention, which is tuned by a tuning network, greatly improves the phase noise performance of the ring oscillator while keeping the tuning range of the oscillator basically unchanged.
[0027] To address the problem that existing ring oscillator tuning methods struggle to effectively suppress flicker noise from the tuning transistor while maintaining a wide tuning range, this invention provides a low-noise tuning method for ring oscillators. This method utilizes the same control voltage to synchronously control two identical and symmetrically arranged first and second tuning networks on opposite sides of the ring oscillator circuit. This causes the equivalent resistances of both networks to change synchronously, jointly adjusting the load at the two output terminals of the ring oscillator circuit, thereby achieving tuning of the oscillation frequency. Furthermore, by adding resistor R1 to the first tuning network and resistor R2 to the second tuning network, the injection impedance of flicker noise generated by the corresponding PMOS tuning transistor is increased, effectively suppressing noise. The signal is transmitted to the core node of the ring oscillator. Simultaneously, resistor R1 and the parasitic capacitance in PMOS tuning transistor M1 form a first low-pass filter network, and resistor R2 and the parasitic capacitance in PMOS tuning transistor M2 form a second low-pass filter network, jointly filtering out high-frequency noise components in the output signal of the ring oscillator circuit. Furthermore, by rationally configuring the resistance values of each resistor in the tuning network and the range of the PMOS tuning transistor's on-resistance, the equivalent resistance range of the first and second tuning networks is the same as the equivalent resistance range when directly connecting the PMOS tuning transistor to the output terminal of the ring oscillator circuit. This significantly reduces phase noise while ensuring the original frequency tuning range of the ring oscillator. Therefore, this invention overcomes the technical contradiction of the prior art where noise suppression and tuning range are mutually exclusive, achieving effective isolation and filtering of tuning transistor flicker noise and high-frequency noise over a wide tuning range, significantly improving the phase noise performance of the ring oscillator, without increasing additional chip area or significantly increasing power consumption, and is easy to integrate.
[0028] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.
Claims
1. A low-noise tuning method for a ring oscillator, characterized in that, The low-noise tuning method includes: The same control voltage Vc is used to synchronously control two identical and symmetrically arranged first and second tuning networks on both sides of the ring oscillator circuit, so that the equivalent resistance of the first and second tuning networks changes synchronously, and together adjusts the load of the two output terminals of the ring oscillator circuit, thereby achieving tuning of the oscillation frequency. The first tuning network includes a resistor R1 and a PMOS tuning transistor M1, and the second tuning network includes a resistor R2 and a PMOS tuning transistor M2. When the control voltage Vc synchronously controls the equivalent resistance of the first tuning network and the second tuning network to change synchronously, the resistors R1 and R2 respectively increase the flicker noise injection impedance generated by the corresponding PMOS tuning transistors M1 and M2 to suppress noise transmission. Furthermore, the resistor R1 and the parasitic capacitance at the drain of the PMOS tuning transistor M1 form a first low-pass filter network, and the resistor R2 and the parasitic capacitance at the drain of the PMOS tuning transistor M2 form a second low-pass filter network to jointly filter out the high-frequency noise components in the output signal of the ring oscillator circuit.
2. The low-noise tuning method for a ring oscillator according to claim 1, characterized in that, The first tuning network also includes: resistor R3 and resistor R4; The gate of the PMOS tuned transistor M1 is connected to the control voltage Vc. The source of the PMOS tuned transistor M1, one end of the resistor R3, one end of the resistor R4, and the first end of the ring oscillator circuit are all connected to the power supply VDD. The drain of the PMOS tuned transistor M1 is connected to one end of the resistor R1 and the other end of the resistor R4. The other end of resistor R1 and the other end of resistor R3 are both connected to the second end of the ring oscillator circuit; The equivalent resistance of the first tuning network is formed by connecting the resistor R1 in series with the on-resistance of the PMOS tuning transistor M1, and then connecting it in parallel with the resistor R3 and the resistor R4.
3. The low-noise tuning method for a ring oscillator according to claim 2, characterized in that, The second tuning network also includes resistors R5 and R6; The gate of the PMOS tuned transistor M2 is connected to the control voltage Vc. The source of the PMOS tuned transistor M2, one end of the resistor R5, one end of the resistor R6, and the third terminal of the ring oscillator circuit are all connected to the power supply VDD. The drain of the PMOS tuned transistor M2 is connected to one end of the resistor R2 and the other end of the resistor R5. The other end of resistor R2 and the other end of resistor R6 are both connected to the fourth terminal of the ring oscillator circuit. The equivalent resistance of the second tuning network is formed by connecting the resistor R2 and the on-resistance of the PMOS tuning transistor M2 in series, and then connecting them in parallel with the resistor R5 and the resistor R6.
4. The low-noise tuning method for a ring oscillator according to claim 3, characterized in that, The ring oscillator circuit includes: PMOS transistor M3, PMOS transistor M4, NMOS transistor M5, and NMOS transistor M6; The source of the PMOS transistor M3 serves as the first terminal of the ring oscillator circuit and is connected to the power supply VDD. The drain of the PMOS transistor M3 serves as the second terminal of the ring oscillator circuit and is also connected to the gate of the PMOS transistor M4 and the drain of the NMOS transistor M5; the drain of the NMOS transistor M5 serves as the first output terminal OUT of the ring oscillator circuit. N ; The gate of the PMOS transistor M3 is connected to the drain of the PMOS transistor M4. The source of the PMOS transistor M4 serves as the third terminal of the ring oscillator circuit and is connected to the power supply VDD. The drain of the PMOS transistor M4, serving as the fourth terminal of the ring oscillator circuit, is also connected to the drain of the NMOS transistor M6; the drain of the NMOS transistor M6 serves as the second output terminal OUT of the ring oscillator circuit. P ; The gate of the NMOS transistor M5 is used to receive the first input signal IN. P The gate of the NMOS transistor M6 is used to receive the second input signal IN. N The source of NMOS transistor M5 and the source of NMOS transistor M6 are both grounded; Wherein, resistor R1 is connected to the first drain node between the drain of PMOS transistor M3 and the drain of NMOS transistor M5, and resistor R2 is connected to the second drain node between the drain of PMOS transistor M4 and the drain of NMOS transistor M6. By changing the load impedance of the two drain nodes, flicker noise from PMOS tuned transistor M1 and PMOS tuned transistor M2 is suppressed and the high-frequency noise component is filtered out. The equivalent resistance of the first tuning network and the equivalent resistance of the second tuning network serve as the output load of the ring oscillator circuit. The oscillation frequency is tuned by synchronously changing and adjusting the RC time constant of the first drain node and the RC time constant of the second drain node.
5. The low-noise tuning method for a ring oscillator according to claim 3, characterized in that, The equivalent resistance range of the first tuning network and the second tuning network is the same as the equivalent resistance range when two PMOS tuning transistors are directly connected to the two output terminals of the ring oscillator circuit.
6. The low-noise tuning method for a ring oscillator according to claim 5, characterized in that, The resistance values of resistors R1 and R2 are both 2KΩ, the resistance values of resistors R3 and R6 are both 10KΩ, and the resistance values of resistors R4 and R5 are both 8KΩ. The on-resistance of both the PMOS tuning transistor M1 and the PMOS tuning transistor M2 ranges from 2KΩ to 5KΩ.