Crystal oscillator driving circuit and oscillator

Abstract

The application provides a crystal oscillator driving circuit and an oscillator. The crystal oscillator driving circuit comprises an oscillation signal unit, a power supply unit, an amplitude detection unit and a control unit. The oscillation signal unit has a crystal oscillator interface for connecting an external crystal oscillator, and provides a driving current for the external crystal oscillator to maintain oscillation of the external crystal oscillator. The power supply unit is configured to provide power supply for the oscillation signal unit. The amplitude detection unit is configured to detect a first number of times when a voltage amplitude of the oscillation signal unit is greater than a first threshold value, a second number of times when the voltage amplitude is greater than a second threshold value and a third number of times when the voltage amplitude is greater than a third threshold value. The first threshold value is a minimum value of a voltage at which the external crystal oscillator starts to oscillate, and the second threshold value and the third threshold value are respectively a lower limit and an upper limit of a voltage set to maintain oscillation of the external crystal oscillator. The control unit is configured to form a control signal according to a numerical relationship among the first number of times, the second number of times and the third number of times, and the control signal is used to indicate a power supply size of the power supply unit. The crystal oscillator driving circuit can reduce power consumption of the crystal oscillator.

Description

Technical Field

[0001] This application relates primarily to the field of integrated circuit technology, and in particular to a crystal oscillator driving circuit and an oscillator. Background Technology

[0002] The crystal oscillator drive circuit in an MCU (Microcontroller Unit) chip is a highly integrated key module, with a negative resistance amplifier at its core. This circuit provides continuous and precise energy compensation to an external crystal oscillator such as a quartz crystal, forming a self-excited oscillation closed loop together with the piezoelectric effect of the crystal itself, thereby generating a stable and accurate clock frequency.

[0003] Many integrated circuit applications, such as wireless radio frequency communication, high-precision sensor acquisition, power management units, and various standard bus interfaces, rely on a precise clock reference source to function properly. Among the many sub-circuits in IoT devices, the Real-Time Clock (RTC) module holds a special position. Even when the main processor core and most other sub-circuits are in low-power sleep mode, the RTC still needs to maintain uninterrupted timing operation; therefore, its power consumption must be minimized. A crystal oscillator is used to generate the stable frequency required for the RTC to function properly, while the crystal driver circuit is responsible for providing the necessary drive current for the crystal's oscillation. Thus, the driver circuit directly determines the power consumption of the entire crystal oscillator during operation. Summary of the Invention

[0004] The technical problem to be solved by this application is to provide a crystal oscillator driving circuit and oscillator that can reduce crystal oscillator power consumption.

[0005] To address the aforementioned technical problems, in a first aspect, this application provides a crystal oscillator driving circuit, comprising: an oscillation signal unit having a crystal oscillator interface for connecting an external crystal oscillator, the oscillation signal unit being configured to provide a driving current to the external crystal oscillator to maintain the oscillation of the external crystal oscillator; a power supply unit being configured to provide power to the oscillation signal unit; an amplitude detection unit being configured to detect a first number of times the voltage amplitude of the oscillation signal unit is greater than a first threshold, a second number of times it is greater than a second threshold, and a third number of times it is greater than a third threshold, wherein the first threshold is the minimum voltage value at which the external crystal oscillator starts oscillating, and the second threshold and the third threshold are respectively set lower and upper voltage limits for maintaining the oscillation of the external crystal oscillator; and a control unit being configured to generate a control signal based on the numerical relationship between the first number of times, the second number of times, and the third number of times, the control signal being used to indicate the power supply magnitude of the power supply unit.

[0006] Optionally, the oscillation signal unit includes an oscillation inverter and a feedback resistor, with the two ends of the feedback resistor connected to the power supply terminal and the control terminal of the oscillation inverter, respectively.

[0007] Optionally, the power supply unit includes multiple current source branches connected in parallel, wherein each current source branch has a switch, and the control signal is used to control the on / off state of the switch.

[0008] Optionally, each of the current source branches includes at least one switch connected in series and at least one reference current source.

[0009] Optionally, the amplitude detection unit includes a first detection branch, a second detection branch, and a third detection branch, wherein the first detection branch is configured to detect the first number of times, the second detection branch is configured to detect the second number of times, and the third detection branch is configured to detect the third number of times.

[0010] Optionally, the first detection branch and / or the second detection branch and / or the third detection branch include: one NMOS transistor or multiple NMOS transistors connected in series, the power supply terminal of the one NMOS transistor or multiple NMOS transistors connected in series is connected to the counter, and the control terminal of each NMOS transistor is connected to the power supply terminal of the oscillation signal unit.

[0011] Optionally, the number of NMOS transistors in the second detection branch is greater than the number of NMOS transistors in the first detection branch, and the number of NMOS transistors in the third detection branch is greater than the number of NMOS transistors in the second detection branch.

[0012] Optionally, the control unit is configured to: in response to the first number being greater than the second number, generate a first control signal indicating an increase in the power supply current of the power supply unit; in response to the first number being equal to and not zero within an error range of the second number, generate a second control signal indicating a maintenance of the power supply current of the power supply unit; and in response to the second number being equal to and not zero within an error range of the third number, generate a third control signal indicating a decrease in the power supply current of the power supply unit.

[0013] Optionally, the control unit is a digital logic circuit or a microcontroller.

[0014] In a second aspect, this application provides an oscillator including a crystal driving circuit, wherein the crystal interface of the crystal driving circuit is connected to an external crystal oscillator, and wherein the crystal driving circuit adopts the crystal driving circuit described in the first aspect.

[0015] Compared with the prior art, this application has the following advantages: by adjusting the crystal oscillator drive current in real time through negative feedback closed loop, the crystal oscillator is always kept stable within the rated vibration amplitude, which can not only ensure that the crystal oscillator can oscillate normally, but also reduce the overall power consumption of the crystal oscillator drive circuit, thus meeting the requirements of low power consumption applications such as real-time clocks. Attached Figure Description

[0016] The accompanying drawings are included to provide a further understanding of this application; they are incorporated into and constitute a part of this application. The drawings illustrate embodiments of this application and, together with this specification, serve to explain the principles of this application. In the drawings: Figure 1 This is a schematic diagram of a crystal oscillator application circuit. Figure 2 This is a schematic diagram of a Piece crystal oscillator drive circuit; Figure 3 This is a schematic diagram of a crystal oscillator driving circuit according to an embodiment of this application; Figure 4 This is a circuit diagram of the power supply unit in one embodiment of this application. Detailed Implementation

[0017] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are merely some examples or embodiments of this application. For those skilled in the art, these drawings can be applied to other similar scenarios without creative effort. Unless obvious from the context or otherwise specified, the same reference numerals in the drawings represent the same structures or operations.

[0018] As indicated in this application and claims, unless the context clearly indicates otherwise, the words "a," "an," "an," and / or "the" are not specifically singular and may include plural forms. Generally speaking, the terms "comprising" and "including" only indicate the inclusion of explicitly identified steps and elements, which do not constitute an exclusive list, and the method or apparatus may also include other steps or elements.

[0019] Furthermore, it should be noted that the use of terms such as "first" and "second" to define components is merely for the purpose of distinguishing the corresponding components. Unless otherwise stated, these terms have no special meaning and therefore should not be construed as limiting the scope of protection of this application. In addition, although the terminology used in this application is selected from commonly known and used terms, some terms mentioned in this application's specification may have been chosen by the applicant according to his or her judgment, and their detailed meanings are explained in the relevant sections of this description. Moreover, this application should be understood not only through the actual terms used, but also through the meaning implied by each term.

[0020] It should be understood that when a component is referred to as "on another component," "connected to another component," "coupled to another component," or "in contact with another component," it can be directly on, connected to, coupled to, or in contact with that other component, or there may be an intervening component. In contrast, when a component is referred to as "directly on another component," "directly connected to," "directly coupled to," or "directly in contact with" another component, there is no intervening component. Similarly, when a first component is referred to as "electrically contacting" or "electrically coupled to" a second component, there is an electrical path between the first and second components that allows current to flow. This electrical path may include capacitors, coupled inductors, and / or other components that allow current to flow, even if there is no direct contact between the conductive components.

[0021] Figure 1 This is a schematic diagram of a crystal oscillator application circuit, for reference. Figure 1 As shown, the crystal oscillator Q is an external passive crystal resonator that determines the oscillation frequency and provides a high-precision, high-stability frequency reference. OSC_IN / OSC_OUT are the crystal oscillator input / output pins, connecting to an external crystal oscillator to transmit the oscillation signal. Inv is the on-chip inverting amplifier, the core amplification unit, providing 180° inversion and gain to the oscillation signal to maintain oscillation. R F As a feedback resistor, a DC bias is set for the inverting amplifier, ensuring it operates in amplification mode and guarantees oscillation. C L1 / C L2 These are the load capacitors, which, together with the crystal oscillator, form a resonant circuit. Matching the load capacitor of the crystal oscillator ensures accurate frequency. Ext An external series resistor is used to limit the crystal oscillator's drive current, prevent overdrive damage, and improve waveform quality. C S The parallel capacitor allows for fine-tuning of the frequency and is generally omitted in applications. In this crystal oscillator application circuit, the inverting amplifier and feedback resistor are inside the chip, referred to as the crystal oscillator driver circuit; other components are located outside the chip.

[0022] Figure 2 This is a schematic diagram of a Pierce crystal oscillator driver circuit, for reference. Figure 2 As shown, the inverting amplifier M1 is connected to the current source I. B Used to drive the crystal oscillator circuit and maintain oscillation, R F This is the feedback resistor. When the crystal oscillator is turned on, the current source I... B A fixed current is supplied to the inverting amplifier M1. At this time, the crystal oscillator has not yet started oscillating. Through the feedback resistor R FThe inverting amplifier M1 is operated in the saturation region. At this time, the inverting amplifier M1 is equivalent to a negative resistor, which powers the crystal oscillator, causing it to start oscillating and its amplitude to increase continuously. As the crystal oscillator amplitude gradually increases, the energy consumption of the crystal oscillator also gradually increases. When the energy consumption of the crystal oscillator and the energy supply of the crystal oscillator drive circuit reach a balance point, the amplitude no longer increases, and the crystal oscillator enters a stable operating state.

[0023] As can be seen from the working principle of the crystal oscillator drive circuit described above, within the normal operating range, the oscillation amplitude of the crystal oscillator exhibits a positive correlation with the drive current; that is, the larger the drive current, the larger the steady-state oscillation amplitude of the crystal oscillator usually is. Therefore, in the design practice of low-power oscillators, in order to reduce overall power consumption, it is usually necessary to reduce the drive current I... B The design uses smaller values ​​to maintain a lower amplitude level for the crystal oscillator during the stable oscillation phase, thereby effectively controlling energy consumption.

[0024] However, in practical engineering applications, the oscillation amplitude of crystal oscillators is easily disturbed by multiple external factors. Specifically, the intrinsic parameters of crystal oscillators from different brands differ, as does the load capacitance C. L Fluctuations caused by parasitic effects and changes in application scenarios, circuit board coupling noise, and power supply ripple interference can all significantly affect the stability of crystal oscillator amplitude. In such cases, if the drive current of a traditional crystal oscillator driver circuit is set too low, adverse changes in these external conditions can easily lead to oscillation stoppage or severe clock frequency drift, directly threatening the functional safety of the chip and the reliability of the system. Therefore, existing crystal oscillator driver circuit designs typically use a large current value, reserving sufficient design margin to counteract various uncertainties and ensure reliable oscillation and stable oscillation under various harsh operating conditions. This makes it difficult to reduce the power consumption of the crystal oscillator, affecting the low-power application of the chip.

[0025] refer to Figure 3 As shown, this embodiment provides a crystal oscillator driving circuit, mainly including an oscillation signal unit, a power supply unit, an amplitude detection unit, and a control unit. The oscillation signal unit has a crystal oscillator interface OSC_IN / OSC_OUT for connecting to an external crystal oscillator. This oscillation signal unit provides drive current to the external crystal oscillator to maintain its oscillation. The power supply unit is configured to provide power to the oscillation signal unit. The amplitude detection unit is configured to detect the voltage amplitude of the oscillation signal unit for a first number of times it exceeds a first threshold, a second number of times it exceeds a second threshold, and a third number of times it exceeds a third threshold. The first threshold is the minimum voltage required for the external crystal oscillator to start oscillating, and the second and third thresholds are the set lower and upper voltage limits for maintaining the external crystal oscillator's oscillation, respectively. The control unit is configured to generate a control signal based on the numerical relationship between the first, second, and third counts. The control signal is used to indicate the power supply magnitude of the power supply unit.

[0026] Traditional fixed-current drive circuits, in order to adapt to extreme conditions such as crystal oscillator parameter dispersion, environmental disturbances, and process deviations, require the drive current to be set to a maximum margin value, which is usually much higher than the actual required drive current, resulting in a significant waste of power. The drive circuit in this embodiment reduces unnecessary power consumption through closed-loop dynamic adjustment. A large current is used briefly during the crystal oscillation start-up phase to ensure reliable oscillation. After start-up, dynamic adjustment is performed. The control unit generates a control signal based on the numerical relationship of the first, second, and third readings to instruct the power supply unit on the power supply level. This ensures that the drive current is maintained at the minimum current value that meets the functional safety requirements of the crystal oscillator during steady-state operation. There is no need to reserve a current margin for extreme conditions, resulting in a lower drive current and lower power consumption compared to traditional methods.

[0027] For example, Vth1 is the minimum voltage required for the external crystal oscillator to start oscillating, Vth2 is the lower limit of the voltage required to maintain the external crystal oscillator's oscillation, and Vth3 is the upper limit of the voltage required to maintain the external crystal oscillator's oscillation. During the crystal oscillator's operation, the voltage amplitude of the oscillation signal unit is detected to be greater than the first threshold for the first number of times, greater than the second threshold for the second number of times, and greater than the third threshold for the third number of times. Therefore, if the voltage amplitude is less than Vth1, the first, second, and third counts are all zero, indicating that the external crystal oscillator is not oscillating. If the voltage amplitude is between Vth1 and Vth2, the second and third counts are both zero, indicating that the external crystal oscillator can start oscillating, but the crystal amplitude is small and not within the normal amplitude range, meaning that the current driving current of the crystal oscillator is small. If the voltage amplitude is between Vth2 and Vth3, the first count equals the second count, and the third count is zero, indicating that the current crystal oscillator is within the normal amplitude range, and the supply current is appropriate. When the voltage amplitude is greater than Vth3, the first, second, and third readings are equal and non-zero, indicating that the crystal oscillator amplitude is too large, meaning the supplied current is relatively high. Based on this, the control unit can generate the following control signals: a first control signal indicating an increase in the supply current of the power supply unit is generated in response to the first reading being greater than the second reading; a second control signal indicating a maintenance of the supply current of the power supply unit is generated in response to the first and second readings being equal and non-zero within the error range; and a third control signal indicating a decrease in the supply current of the power supply unit is generated in response to the second and third readings being equal and non-zero within the error range.

[0028] In some embodiments, the oscillation signal unit includes an inverter (inverting amplifier) ​​and a feedback resistor. The two ends of the feedback resistor are connected to the power supply terminal and the control terminal of the inverter, respectively. For example, the inverter can be implemented using an NMOS device, with its drain connected to the power supply unit as the power supply terminal, its gate connected to the crystal oscillator input pin OSC_IN as the control terminal, and its source grounded. The feedback resistor is connected between the drain (crystal oscillator output pin OSC_OUT) and the gate, forming a DC negative feedback bias path. After power-on, the feedback resistor provides a stable gate-source voltage bias for the inverter, enabling it to operate in the saturation region and exhibiting equivalent negative resistance characteristics, thus injecting energy into the external crystal oscillator and ensuring reliable crystal oscillation.

[0029] In some embodiments, the power supply unit includes multiple current source branches connected in parallel, each current source branch having a switch, and a control signal used to control the switching on and off. Further, each current source branch includes at least one switch connected in series and at least one reference current source. In this embodiment, the switching transistors of each current source branch can be implemented using the same type of NMOS or PMOS device. The switching transistor of each current source branch is independently controlled by a multi-bit control signal output by the control unit, with each control signal bit corresponding one-to-one with a current source branch. By changing the number of current source branches that are turned on, continuous step adjustment of the drive current is achieved. For example, if an 8-way equal-weighted current source structure is used, the drive current can be adjusted in 8 levels, with the adjustment step being the output value of a single current source branch. During the power-on oscillation stage, the control signal controls the switching transistors of all current source branches to turn on, outputting the maximum drive current to ensure that the crystal oscillator can reliably start oscillating under the most severe operating conditions, avoiding the risk of oscillation failure in traditional fixed small current designs. After oscillation is completed, the control signal dynamically adjusts the number of current source branches turned on according to the amplitude detection results, realizing negative feedback regulation of the drive current and stabilizing the oscillation amplitude within the preset target range.

[0030] In some embodiments, the amplitude detection unit includes a first detection branch, a second detection branch, and a third detection branch, wherein the first detection branch is configured to detect the first number of times, the second detection branch is configured to detect the second number of times, and the third detection branch is configured to detect the third number of times.

[0031] In this embodiment, each amplitude detection branch is relatively independent to avoid mutual influence in detection. There are differences in the detection voltage thresholds of each amplitude detection branch. The counting period of each counter is synchronized with the oscillation period. Through the hierarchical detection of three voltage thresholds, the oscillation amplitude can be divided into four intervals (<Vth1, Vth1 - Vth2, Vth2 - Vth3, >Vth3). Of course, more amplitude detection branches can also be adopted to achieve detection of more intervals, so as to provide more gear positions for subsequent driving current adjustment. For example, for the Vth2 - Vth3 interval, more detection voltage thresholds can also be designed, such as Vth2.1, Vth2.2, Vth2.3, etc., where Vth2 < Vth2.1 < Vth2.2 < Vth2.3 < Vth3. The voltage threshold setting can be matched with the number of multi-channel current source branches to achieve continuous adjustment of multi-gear current and avoid amplitude oscillation or overshoot caused by a single large step adjustment.

[0032] In some embodiments, the first detection branch and / or the second detection branch and / or the third detection branch includes: one NMOS transistor or multiple NMOS transistors connected in series. The power supply terminal of one NMOS transistor or multiple NMOS transistors connected in series is connected to the counter, and the control terminal of each NMOS transistor is connected to the power supply terminal of the oscillation signal unit.

[0033] In this embodiment, the control terminal of each NMOS transistor is directly connected to the power supply terminal of the oscillation signal unit, that is, the crystal oscillator output pin OSC_OUT. The oscillation amplitude detection is realized by using the gate threshold voltage characteristic of the NMOS transistor. For the detection branch with only a single NMOS transistor, its detection threshold is the inherent gate-source turn-on voltage Vgs of this NMOS transistor. When the peak voltage (amplitude) of OSC_OUT is higher than this turn-on voltage, the NMOS transistor completes a "cut-off → on → cut-off" state switch within each oscillation period, and its drain (power supply terminal) outputs a complete clock pulse for the subsequent counter to accumulate and count. For the detection branch with multiple NMOS transistors connected in series, its equivalent detection threshold is related to the number of NMOS transistors connected in series. For example, when 2 identical NMOS transistors are connected in series, the equivalent threshold Vth2 > Vth1. By analogy, a three-level threshold configuration of Vth1 < Vth2 < Vth3 can be achieved. Of course, Vth1 < Vth2 < Vth3 can also be achieved by designing NMOS transistors of different sizes.

[0034] In some embodiments, the number of NMOS transistors in the second detection branch is greater than the number of NMOS transistors in the first detection branch, and the number of NMOS transistors in the third detection branch is greater than the number of NMOS transistors in the second detection branch.

[0035] In this embodiment, all NMOS transistors in each detection branch use the same device structure. The only difference is the number of transistors connected in series to achieve different detection thresholds for three or more levels. The inherent gate-source turn-on voltage of each NMOS transistor is Vgs. When multiple NMOS transistors of the same specification are connected in series, the gates of all NMOS transistors are shorted and connected to the oscillation output terminal OSC_OUT. The sources are connected in series to the drains of the next-level NMOS transistors, and the source of the lowest-level NMOS transistor is grounded. If the first detection branch uses one NMOS transistor, the equivalent threshold Vth1 = Vgs, corresponding to the minimum voltage requirement for crystal oscillation. If the second detection branch uses two NMOS transistors of the same specification connected in series, the equivalent threshold Vth2 > Vth1, corresponding to the lower limit of the target oscillation amplitude. If the third detection branch uses three NMOS transistors of the same specification connected in series, the equivalent threshold Vth3 > Vth2, corresponding to the upper limit of the target oscillation amplitude. Compared to achieving threshold differentiation by adjusting the size of NMOS transistors, this embodiment uses a circuit structure with multiple strings of the same transistor. All detection NMOS transistors have the same aspect ratio, doping process and layout structure, and the temperature coefficient and process drift characteristics of the threshold are consistent, which improves the stability of voltage amplitude judgment.

[0036] In some embodiments, the control unit is a digital logic circuit or a microcontroller. The digital logic circuit may consist of comparators, finite state machines, and register arrays, driven by a low-frequency clock, suitable for low-power real-time clock scenarios with fixed functions. The microcontroller can flexibly adjust parameters such as voltage threshold and current adjustment step size to adapt to various crystal oscillators and complex operating conditions, balancing power consumption and scalability. Both methods can output a control signal for current adjustment by logically determining the results of three or more levels of counting, thereby regulating the supply current and reducing crystal oscillator power consumption.

[0037] For example, with Figure 3 Taking the crystal oscillator drive circuit shown as an example, the meanings of each component and symbol in the circuit can be found in Tables 1-3.

[0038] Table 1 Vibration signal generation circuit

[0039] Table 2 Amplitude Detection Circuit

[0040] Table 3 Control Unit

[0041] In this embodiment, the crystal oscillator drive circuit features amplitude closed-loop control. By adjusting the drive current, it achieves stable control of the crystal oscillation amplitude. The circuit can be divided into four parts: oscillation generation, amplitude detection, logic judgment, and current adjustment, forming a negative feedback closed loop.

[0042] Oscillation generation: An oscillation inverter M1, a feedback resistor R F and an external crystal oscillator form an oscillation loop. After power-on, it starts to oscillate and outputs a sinusoidal oscillation signal OSC_OUT, and the peak voltage of the signal is Vosc. A multi-channel configurable current source array is provided inside the power supply unit to provide drive current for the crystal oscillator oscillation loop. The larger the drive current, the higher the oscillation peak Vosc of OSC_OUT, and vice versa, the lower the peak value.

[0043] Amplitude detection: Taking the circuit shown in the first amplitude detection as an example, when the voltage of OSC_OUT is lower than the gate turn-on voltage of M2, the M2 transistor is cut off, and the drain is pulled to a high level by the current source, approaching the power supply voltage of the first amplitude detection, and CLK1 is at a high level. When the voltage of OSC_OUT rises and exceeds the turn-on voltage of the M2 transistor, the M2 transistor conducts, and the drain is pulled to a low level, approaching the ground potential, and CLK1 is at a low level. Changes within one oscillation period: When OSC_OUT changes from low → high → low, the M2 transistor will experience a process of "cut off → conduct → cut off", and CLK1 outputs a falling edge and a rising edge, forming a pulse clock. Only when Vosc is high enough to exceed the gate threshold Vth1 of the M2 transistor, M2 will conduct once in each period and generate one flip. If Vosc decreases and is lower than Vth1, the M2 transistor will always be in the cut-off state, CLK1 will no longer flip, and the count value of the first counter is 0.

[0044] In the case of setting three-level amplitude detection branches, three fixed voltage thresholds are preset respectively. The detection threshold voltages of the first amplitude detection, the second amplitude detection, and the third amplitude detection are Vth1, Vth2, and Vth3 respectively. Of course, by designing different NMOS sizes and the number of NMOS in series, Vth1 < Vth2 < Vth3 can be achieved. If the peak value Vosc of OSC_OUT is higher than a certain level of voltage threshold, the detection MOS transistor of this level conducts / turns off periodically with the oscillation signal normally, outputs continuous clock pulses, and the backend counter accumulates counts normally, and the count value is stable at the normal value. If the peak value Vosc of OSC_OUT is lower than a certain level of voltage threshold, the oscillation signal is not sufficient to turn on the detection transistor of this level, the detection transistor remains cut off or cannot complete periodic flipping, the output clock pulses start to decrease and be missing, and the count value of the counter gradually decreases and drops to 0 when it is lower than the threshold. The three-level detection branches compare Vosc with their own voltage thresholds independently, output CLK1, CLK2, and CLK3 clocks respectively, and the quantization results Nm1, Nm2, and Nm3 are output by each counter. Generally, since CLK1 has clock output throughout the entire working process, after shaping, it can be used as the clock output of the crystal oscillator module and the reference clock of the current control circuit.

[0045] Logical judgment: The control unit receives the counting results of each detection branch and determines the current oscillation amplitude state according to the voltage threshold levels. If Vosc is higher than Vth1, Vth2, and Vth3 at the same time, the counters of all three detection branches are normal full counts, determining that the oscillation amplitude is too high and there is overdrive. If Vosc is higher than Vth1 and Vth2 at the same time but less than Vth3, Nm1 and Nm2 are counted normally, and Nm3 is equal to or close to 0, determining that the amplitude is within the normal range. If Vosc > Vth1 but less than Vth2 and Vth3, only Nm1 has a normal count, and Nm2 and Nm3 are equal to or close to 0, determining that the oscillation amplitude is too low.

[0046] Current adjustment: The control unit outputs a control signal to switch the number of current source branches input in the current source array according to the oscillation amplitude determination result. One implementation method of the supply current is as Figure 4 shown, where PB is the gate voltage generated by the reference PMOS current source. If it is determined that the amplitude is too low, the number of input current source branches is increased to increase the oscillation drive current and raise Vosc to gradually reach the normal threshold range. If it is determined that the amplitude is normal, the current configuration is maintained to keep the oscillation amplitude stable. If it is determined that the amplitude is too high, the number of input current source branches is reduced to decrease the drive current, lower Vosc, reduce power consumption, and at the same time avoid crystal oscillator overdrive, EMI deterioration, and device aging.

[0047] In summary, during the startup process of the crystal oscillator, the drive current remains at a high current or the highest current for a period of time to ensure the startup of the crystal oscillator. Since the current is large at this time, the oscillation peak value of the crystal oscillator after startup is the maximum value Vosc_max. After startup and entering the normal working state, the amplitude detection unit and the control unit are turned on. At this time, since Vosc_max > Vth3, it is determined that the amplitude is too high, and the control unit provides a control signal to gradually reduce the drive current in the power supply unit. As the amplitude gradually decreases, until Nm1 = Nm2 and Nm3 = 0, it is considered that the crystal oscillator has entered the target working area. At this time, the drive current remains constant, and Vosc is maintained within the set range of Vth2 < Vosc < Vth3. During the subsequent working process, if due to changes in external environments such as power supply voltage, temperature, and noise, the amplitude becomes smaller and it is determined that Nm2 < Nm1, indicating that the amplitude has abnormally decreased, the drive current will be increased to make the crystal oscillator return to the stable state. The crystal oscillator drive circuit in this embodiment enables the oscillation amplitude Vosc of the crystal oscillator to always be stably maintained within the range of Vth2 < Vosc < Vth3, achieving controllable amplitude, ensuring the normal function of the crystal oscillator, and reducing the working current and power consumption.

[0048] Another embodiment of this application provides an oscillator, including a crystal oscillator driving circuit. The crystal oscillator driving circuit has a crystal oscillator interface connected to an external crystal oscillator. The crystal oscillator driving circuit is the same as that described in the foregoing embodiments. Because the oscillator in this embodiment uses the crystal oscillator driving circuit described in the foregoing embodiments, it can be seen that the oscillator in this embodiment also has lower power consumption compared to a traditional vibrator.

[0049] The basic concepts have been described above. Obviously, for those skilled in the art, the above disclosure is merely illustrative and does not constitute a limitation of this application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements, and corrections to this application. Such modifications, improvements, and corrections are suggested in this application, and therefore remain within the spirit and scope of the exemplary embodiments of this application.

[0050] In some embodiments, numbers describing the quantity of components and attributes are used. It should be understood that such numbers used in the description of embodiments are modified in some examples with the terms "approximately," "approximately," or "generally." Unless otherwise stated, "approximately," "approximately," or "generally" indicates that the numbers are allowed to vary by ±20%. Accordingly, in some embodiments, the numerical parameters used in the specification and claims are approximate values, which may be changed depending on the characteristics required by individual embodiments. In some embodiments, numerical parameters should take into account specified significant digits and employ a general method of digit reservation. Although the numerical ranges and parameters used to confirm their breadth of scope in some embodiments of this application are approximate values, in specific embodiments, such values ​​are set as precisely as feasible.

[0051] Although this application has been described with reference to specific embodiments, those skilled in the art should recognize that the above embodiments are only used to illustrate this application, and various equivalent changes or substitutions can be made without departing from the spirit of this application. Therefore, any changes or modifications to the above embodiments within the essential spirit of this application will fall within the scope of the claims of this application.

Claims

1. A crystal oscillator driving circuit, characterized in that, include: An oscillation signal unit has a crystal interface for connecting an external crystal oscillator, the oscillation signal unit being configured to provide a drive current to the external crystal oscillator to maintain the oscillation of the external crystal oscillator; A power supply unit is configured to provide power to the oscillation signal unit; An amplitude detection unit is configured to detect the number of times the voltage amplitude of the oscillation signal unit is greater than a first threshold, the number of times it is greater than a second threshold, and the number of times it is greater than a third threshold, respectively. The first threshold is the minimum voltage value at which the external crystal oscillator starts oscillating, and the second threshold and the third threshold are the set lower and upper voltage limits for maintaining the oscillation of the external crystal oscillator, respectively. The control unit is configured to generate a control signal based on the numerical relationship between the first number, the second number, and the third number, the control signal being used to indicate the power supply magnitude of the power supply unit.

2. The crystal oscillator driving circuit as described in claim 1, characterized in that, The oscillation signal unit includes an oscillation inverter and a feedback resistor, with the two ends of the feedback resistor connected to the power supply terminal and the control terminal of the oscillation inverter, respectively.

3. The crystal oscillator driving circuit as described in claim 1, characterized in that, The power supply unit includes multiple current source branches connected in parallel, each of which has a switch, and the control signal is used to control the on / off state of the switch.

4. The crystal oscillator driving circuit as described in claim 3, characterized in that, Each of the current source branches includes at least one switch connected in series and at least one reference current source.

5. The crystal oscillator driving circuit as described in claim 1, characterized in that, The amplitude detection unit includes a first detection branch, a second detection branch, and a third detection branch, wherein the first detection branch is configured to detect the first number of times, the second detection branch is configured to detect the second number of times, and the third detection branch is configured to detect the third number of times.

6. The crystal oscillator driving circuit as described in claim 5, characterized in that, The first detection branch and / or the second detection branch and / or the third detection branch include: one NMOS transistor or multiple NMOS transistors connected in series, the power supply terminal of the one NMOS transistor or multiple NMOS transistors connected in series is connected to the counter, and the control terminal of each NMOS transistor is connected to the power supply terminal of the oscillation signal unit.

7. The crystal oscillator driving circuit as described in claim 6, characterized in that, The number of NMOS transistors in the second detection branch is greater than the number of NMOS transistors in the first detection branch, and the number of NMOS transistors in the third detection branch is greater than the number of NMOS transistors in the second detection branch.

8. The crystal oscillator driving circuit as described in claim 1, characterized in that, The control unit is configured to: in response to the first number being greater than the second number, generate a first control signal indicating an increase in the power supply current of the power supply unit; in response to the first number being equal to and not zero within an error range of the second number, generate a second control signal indicating a maintenance of the power supply current of the power supply unit; and in response to the second number being equal to and not zero within an error range of the third number, generate a third control signal indicating a decrease in the power supply current of the power supply unit.

9. The crystal oscillator driving circuit according to any one of claims 1-8, characterized in that, The control unit is a digital logic circuit or a microcontroller.

10. An oscillator, characterized in that, The device includes a crystal oscillator driving circuit, wherein the crystal oscillator interface of the crystal oscillator driving circuit is connected to an external crystal oscillator, and wherein the crystal oscillator driving circuit adopts the crystal oscillator driving circuit as described in any one of claims 1-9.

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