Phase-locked method, controller, ups device, and storage medium for ups device

Abstract

The embodiment of the application relates to the technical field of UPS equipment, and discloses a phase locking method of a UPS equipment. The phase locking method comprises the following steps: determining a target operation mode of the UPS equipment, determining a target phase locking feature based on the target operation mode, determining, in at least two preset phase locking modes, a phase locking mode corresponding to the target phase locking feature as the target phase locking mode, the phase locking rates of different phase locking modes being different, and controlling the UPS equipment to perform a phase locking operation based on the target phase locking mode. In the embodiment of the application, the phase locking mode matched with the current working condition of the UPS equipment is adaptively selected as the target phase locking mode for the phase locking operation according to the current working condition of the UPS equipment between the two phase locking modes, so that the phase locking efficiency can be improved, and the reliability and safety of the phase locking can be improved.

Description

Technical Field

[0001] This application relates to the field of UPS equipment technology, and in particular to a phase-locked loop method, controller, UPS equipment, and storage medium for a UPS equipment. Background Technology

[0002] UPS equipment provided by related technologies typically uses a single phase-locked loop (PLL) mode to ensure that the phase frequency characteristics of the mains power supply input to the UPS are consistent with the phase frequency characteristics supplied by the UPS to the load. However, different types of loads have different sensitivities to the PLL rate, and the required PLL rate for the same type of load varies under different operating conditions. Therefore, the PLL efficiency of using a single PLL mode is relatively low. Summary of the Invention

[0003] One objective of this application is to provide a phase-locking method, controller, UPS device, and storage medium for a UPS device, in order to solve the technical problem of low phase-locking efficiency in related technologies.

[0004] In a first aspect, embodiments of this application provide a phase-locking method for a UPS device, comprising: determining a target operating mode of the UPS device; determining a target phase-locking characteristic based on the target operating mode; determining, among at least two preset phase-locking modes, a phase-locking mode corresponding to the target phase-locking characteristic as the target phase-locking mode; wherein the phase-locking rates of different phase-locking modes are different; and controlling the UPS device to perform phase-locking operations based on the target phase-locking mode.

[0005] In this embodiment, the phase-locking mode that matches the current operating condition of the UPS equipment is adaptively selected as the target phase-locking mode for phase-locking operation between two phase-locking modes. This not only improves phase-locking efficiency, but also enhances the reliability and security of phase-locking.

[0006] Optionally, the target phase-locked feature includes DQ phase-locked feature and zero-crossing phase-locked feature. Determining the target phase-locked feature based on the target operating mode includes: generating zero-crossing phase-locked feature in response to the target operating mode being battery operating mode; or, obtaining the mains power change rate of the UPS device in response to the target operating mode being AC power operating mode, wherein the mains power change rate is used to represent the change rate of the AC power applied to the UPS device, and generating the target phase-locked feature based on the mains power change rate.

[0007] The UPS equipment operates in battery mode. To avoid load malfunctions caused by a high phase-locked loop (PLL) rate, such as excessively high motor speed, this embodiment of the application selects to generate a zero-crossing PLL feature. Compared with the zero-crossing PLL mode, the phase-locking rate of the zero-crossing PLL feature is lower. Therefore, when the zero-crossing PLL mode is used to perform phase-locking operations in subsequent embodiments of this application, it will not cause load malfunctions, thus improving the reliability and stability of phase-locking.

[0008] Optionally, generating target phase-locked features based on the mains power change rate includes: generating DQ phase-locked features when the mains power change rate is less than a preset change threshold; or generating zero-crossing phase-locked features when the mains power change rate is greater than or equal to a preset change threshold.

[0009] If the rate of change of the mains power is less than the preset change threshold, it indicates that the frequency of the mains power supply is relatively stable and is less likely to cause abnormal load operation during phase locking. In order to improve the phase locking efficiency, this application embodiment generates DQ phase locking features, and then uses the DQ phase locking mode corresponding to the DQ phase locking features to perform phase locking operations, thereby enabling phase locking operations to be completed quickly and efficiently.

[0010] If the rate of change of the mains power is greater than or equal to the preset change threshold, it indicates that the frequency of the mains power supply is relatively volatile. If the phase-locked loop (PLL) rate is relatively fast, it is more likely to cause abnormal load operation. In order to avoid causing abnormal load operation, this application embodiment generates a zero-crossing PLL feature. Since the PLL rate of the zero-crossing PLL mode is less than that of the DQ PLL mode, this application embodiment subsequently uses the zero-crossing PLL mode corresponding to the zero-crossing PLL feature to perform the phase-locking operation, which is less likely to cause abnormal load operation and is beneficial to improving the reliability and stability of the phase-locking.

[0011] Optionally, if the rate of change of the mains power exceeds a preset threshold, before generating the zero-crossing phase-locked loop feature, the method further includes: controlling the UPS equipment to switch from mains power operation mode to battery operation mode.

[0012] In this embodiment, when the rate of change of the mains power exceeds a preset threshold, the UPS device is controlled to switch from mains power operation mode to battery operation mode. Since the power output of the battery is DC power, there is no distinction between positive and negative half-cycle power. Therefore, when the UPS device switches from mains power operation mode to battery operation mode, it can avoid the situation where a large current flows back from the load side to the grid side. This can reliably protect the switching transistors of the power factor correction circuit and the main inverter circuit during the phase-locked loop process.

[0013] Optionally, the two phase-locked modes include DQ phase-locked mode and zero-crossing phase-locked mode. Determining the phase-locked mode corresponding to the target phase-locked feature as the target phase-locked mode from the preset at least two phase-locked modes includes: responding to the target phase-locked feature being a DQ phase-locked feature, determining the DQ phase-locked mode as the target phase-locked mode from the preset at least two phase-locked modes; or, responding to the target phase-locked feature being a zero-crossing phase-locked feature, determining the zero-crossing phase-locked mode as the target phase-locked mode from the preset at least two phase-locked modes.

[0014] Optionally, performing phase-locked operation based on the target phase-locked mode includes: responding to the target phase-locked mode being a zero-crossing phase-locked mode, adjusting the tracking step size of the zero-crossing phase-locked mode from a first preset step size to a second preset step size, wherein the second preset step size is greater than the first preset step size; running the zero-crossing phase-locked mode based on the second preset step size; acquiring the first phase-locked feedback information of the UPS device in the zero-crossing phase-locked mode; and controlling the UPS device based on the first phase-locked feedback information.

[0015] In the zero-crossing phase-locked mode and when the mains power change rate is large, the tracking step size can be flexibly increased, which is beneficial to improving the phase-locked rate.

[0016] Optionally, the first phase-locked loop (PLL) feedback information includes a first frequency difference and a first phase difference. Controlling the UPS device based on the first PLL feedback information includes: responding to the first frequency difference being less than a first frequency threshold and the first phase difference being less than a first phase threshold, adjusting the tracking step size of the zero-crossing PLL mode from a second preset step size to a first preset step size; running the zero-crossing PLL mode based on the first preset step size; acquiring the second PLL feedback information of the UPS device in the zero-crossing PLL mode; and controlling the UPS device based on the second PLL feedback information.

[0017] In this embodiment, the tracking step size of the zero-crossing phase-locked mode is adjusted from the second preset step size to the first preset step size. When the UPS device performs phase-locking according to the smaller preset step size, the phase-locking accuracy can be improved, and the consistency of phase and frequency between the mains power supply and the output power supply can be improved.

[0018] Optionally, the second phase-locked loop (PLL) feedback information includes a second frequency difference and a second phase difference. Controlling the UPS device based on the second PLL feedback information includes: responding to the second frequency difference being less than a second frequency threshold and the second phase difference being less than a second phase threshold, generating phase-locked loop success information, wherein the second frequency threshold is less than a first frequency threshold and the second phase threshold is less than a first phase threshold; or, responding to the second frequency difference being greater than or equal to the second frequency threshold, or the second phase difference being greater than or equal to the second phase threshold, operating in zero-crossing PLL mode based on a first preset step size.

[0019] In a second aspect, embodiments of this application provide a controller, including a memory and a processor. The memory is connected to the processor, and the processor is used to execute one or more computer programs stored in the memory. When the processor executes one or more computer programs, it causes the controller to implement the phase-locking method of the UPS device described above.

[0020] In a third aspect, embodiments of this application provide a UPS device including the controller described above.

[0021] In a fourth aspect, embodiments of this application provide a computer-readable storage medium storing a computer program, the computer program including program instructions, which, when executed by a processor, cause the processor to perform the phase-locking method of the UPS device described above. Attached Figure Description

[0022] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is a schematic diagram of the circuit structure of a UPS device provided in an embodiment of this application;

[0024] Figure 2 A schematic diagram of the specific circuit structure of the power factor correction circuit, main inverter circuit, and DC-DC conversion circuit provided in the embodiments of this application;

[0025] Figure 3 A circuit structure diagram of a UPS device provided in another embodiment of this application;

[0026] Figure 4 A schematic flowchart illustrating a phase-locked loop method for a UPS device provided in an embodiment of this application;

[0027] Figure 5 A schematic flowchart illustrating a phase-locked loop method for a UPS device according to another embodiment of this application;

[0028] Figure 6 This is a schematic diagram of the structure of a phase-locked loop device for a UPS device provided in an embodiment of this application;

[0029] Figure 7 This is a schematic diagram of the structure of a controller provided in an embodiment of this application. Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0031] It should be noted that, unless there is a conflict, the various features in the embodiments of this application can be combined with each other, all of which are within the protection scope of this application. Furthermore, although functional modules are divided in the device schematic diagram and a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in a different order than the module division in the device or the order in the flowchart. Moreover, the terms "first," "second," and "third" used in this application do not limit the data or execution order, but only distinguish identical or similar items with essentially the same function and effect.

[0032] The embodiments of this application provide the following explanation of the technical terms for zero-crossing phase-locked mode and DQ phase-locked mode:

[0033] I. Zero-crossing phase-locked loop mode

[0034] Zero-crossing phase-locked mode includes a zero-crossing detection phase, a frequency and phase phase phase, and a phase-locking phase.

[0035] 1.1. Zero-crossing detection phase

[0036] The UPS equipment is equipped with a zero-crossing detection circuit, which is used to detect the zero-crossing point of the mains power supply applied to the UPS equipment and the zero-crossing point of the output power supply provided by the UPS equipment to the load.

[0037] 1.2. Frequency and Phase Determination Stage

[0038] Frequency detection phase: The frequency of the mains power supply or output power supply is calculated by detecting the time interval between two adjacent zero-crossing points and using the reciprocal of the time interval. For example, if the time interval between adjacent zero-crossing points is 0.02 seconds, then the frequency of the mains power supply is 50Hz.

[0039] Phase detection phase: Using the zero-crossing point as a reference time, and combining it with known mains frequency and time information, the phase of the mains power supply or output power supply at the current moment is determined. For example, if the mains power supply frequency is 50Hz and the period is 0.02 seconds, if a zero-crossing point is detected at a certain moment, the phase at the current moment can be calculated based on the ratio of the time elapsed since that zero-crossing point to the period.

[0040] 1.3. Phase-locked Logging Stage

[0041] The phase difference is obtained by comparing the phase of the mains power supply with the phase of the output power supply. The UPS equipment adjusts the frequency and phase of the output power supply in predetermined steps to gradually reduce the phase difference until the phase frequency characteristics of the mains power supply and the output power supply are consistent, thus completing the phase locking operation.

[0042] The zero-crossing phase-locked mode gradually adjusts the frequency and phase of the output power supply by a predetermined step size, and the phase-locking operation can be completed in about 30ms.

[0043] II. DQ Phase-Locked Mode

[0044] The full name of the DQ phase-locked loop method is the phase-locked loop (PLL) method based on a synchronous rotating coordinate system (dq coordinate system), and it is often referred to as the "dq-PLL phase-locked method".

[0045] In the DQ phase-locked loop method, the voltage component of a specific axis (usually the q-axis) in the dq coordinate system is detected, and the control signal is adjusted using a PI regulator to drive the voltage-controlled oscillator, thereby changing the frequency and phase of the output power supply and achieving phase and frequency locking with the mains power supply.

[0046] The DQ phase-locked mode has a faster phase-locking rate, typically requiring only 3 mains cycles to complete the phase-locking operation.

[0047] The inventors discovered that UPS equipment provided by related technologies typically uses DQ phase-locked loop (PLL) mode for phase locking. Although the DQ PLL mode has a faster phase-locking rate, this approach is prone to the following problems:

[0048] When the mains power grid fails to supply power, the UPS equipment switches from mains operation mode to battery operation mode, powered by the UPS equipment's battery. When the mains power grid suddenly resumes operation, before the UPS equipment switches back from battery operation mode to mains operation mode, the UPS equipment performs phase-locked operation based on DQ phase-locked mode. Only when the output power of the UPS equipment can fully track the mains power supply can the UPS equipment switch back to mains operation mode.

[0049] If the load of the UPS equipment is a motor, during the DQ phase-locked loop (PLL) process, the high phase-locking rate can easily cause the motor speed to exceed the limit, requiring the battery to output a large current. When the battery continuously outputs a large current, its terminal voltage will drop rapidly. To protect the battery from irreversible damage due to over-discharge, UPS equipment typically has a low-voltage shutdown protection feature. When the battery terminal voltage drops to a set protection threshold, the UPS equipment executes the low-voltage shutdown protection operation, cutting off the power supply to the load, i.e., shutting down the battery. In UPS equipment, the battery, as an auxiliary power source, needs to be constantly operational; the battery being shut down is absolutely unacceptable.

[0050] In this embodiment, the phase-locked mode (DQ) and the zero-crossing phase-locked mode are adaptively selected based on the current operating conditions of the UPS equipment. This not only improves the phase-locking efficiency but also enhances the reliability and safety of the phase-locking, preventing the battery from being incorrectly shut down due to the use of an inappropriate phase-locking mode, thereby improving the overall operational reliability of the UPS equipment.

[0051] The following embodiment of this application provides a UPS device. Please refer to [link / reference]. Figure 1 The UPS equipment 100 includes a zero-crossing detection circuit 11, a first switching switch 12, a power factor correction circuit 13, a main inverter circuit 14, a second switching switch 15, a DC-DC conversion circuit 16, a battery 17, and a controller 18.

[0052] The zero-crossing detection circuit 11 is used to detect the zero-crossing points of the mains power supply and the output power supply of the UPS equipment. The circuit structure of the zero-crossing detection circuit 11 is relatively complex. In some embodiments, the zero-crossing detection circuit 11 includes a sampling circuit, an optocoupler isolation circuit, and a comparator. The sampling circuit samples the mains power supply or the output power supply to obtain a sampling signal. The optocoupler isolation circuit is electrically connected to the sampling circuit and is used to optically isolate the sampling signal, outputting an optocoupler isolation signal. A preset voltage value is applied to the inverting input terminal of the comparator, and the non-inverting input terminal is electrically connected to the output terminal of the optocoupler isolation circuit to receive the optocoupler isolation signal. When the voltage value of the optocoupler isolation signal is greater than the preset voltage value, the comparator outputs a high level to the controller 18, indicating that the absolute value of the mains power supply or the output power supply voltage is greater than 0. When the voltage value of the optocoupler isolation signal is equal to or less than the preset voltage value, the comparator outputs a low level to the controller 18, indicating that the absolute value of the mains power supply or the output power supply voltage is equal to or less than 0, thus indicating that this position is a zero-crossing point.

[0053] One end of the first switching switch 12 is electrically connected to the mains power grid, and the other end is electrically connected to the power factor correction circuit 13. The first switching switch 12 is also electrically connected to the controller 18, and is controlled by the controller 18 to control the input of the mains power supply. When the UPS device 100 is in battery operation mode, if the mains power grid suddenly supplies power, before switching to mains operation mode, the controller 18 performs a phase-locked loop operation and controls the first switching switch 12 to be in the open state. At this time, the mains power supply cannot yet be applied to the UPS device. After the controller 18 completes the phase-locked loop operation, the controller 18 controls the first switching switch to be in the closed state, at which point the mains power supply can be applied to the UPS device.

[0054] The power factor correction circuit 13 is used to boost the mains power supply. It is understood that the circuit structure of the power factor correction circuit 13 is relatively complex. For an example, please refer to [link to example circuit]. Figure 2 The power factor correction circuit 13 consists of a first inductor L1, a second inductor L2, a first switch Q1, a second switch Q2, and a first capacitor C1.

[0055] The main inverter circuit 14 is electrically connected to the power factor correction circuit 13 and is used to invert the power output from the power factor correction circuit 13. It is understood that the circuit structure of the main inverter circuit 14 is relatively complex. For example, please refer to... Figure 2 The main inverter circuit 14 includes a third switch Q3, a fourth switch Q4, a fifth switch Q5, and a sixth switch Q6.

[0056] When the mains power supply is positive, the controller 18 controls the switching states of the second switch Q2, the fourth switch Q4, and the fifth switch Q5 according to the boost mode to boost the voltage of the mains power supply. When the mains power supply is negative, the controller 18 controls the switching states of the first switch Q1, the third switch Q3, and the sixth switch Q6 according to the boost mode to boost the voltage of the mains power supply.

[0057] One end of the second switching switch 15 is electrically connected to the power factor correction circuit 13, and the other end is electrically connected to the DC-DC conversion circuit 16. The second switching switch 15 is also electrically connected to the controller 18 and is used to control the current output of the battery under the control of the controller 18.

[0058] The DC-DC converter circuit 16 is electrically connected to the battery 17 and also to the controller 18. Under the control of the controller 18, the DC-DC converter circuit 16 boosts the voltage of the battery 17 and then applies it to the power factor correction circuit 13 through the second switching switch 15.

[0059] Please see Figure 3The DC-DC converter circuit 16 includes a bridge inverter circuit 161, a resonant circuit 162, and a bridge rectifier circuit 163. The bridge inverter circuit 161 inverts the power supplied by the battery 17. The resonant circuit 162 resonates the power output from the bridge inverter circuit 161, producing a sinusoidal power supply. The bridge rectifier circuit 163 rectifies the sinusoidal power supply, outputting a DC power supply.

[0060] Please combine Figure 2 The bridge inverter circuit 161 includes a seventh switch Q7, an eighth switch Q8, a ninth switch Q9, and a tenth switch Q10. The controller 18 controls the switching states of the seventh switch Q7, the eighth switch Q8, the ninth switch Q9, and the tenth switch Q10 according to the inverter mode, so as to invert the DC power supply of the battery 17 into AC pulses.

[0061] Please combine Figure 2 The resonant circuit 162 includes a resonant coil S1, a second capacitor C2, a resonant inductor L3, and a magnetizing inductor (not shown in the figure). The resonant coil S1, the second capacitor C2, the resonant inductor L3, and the magnetizing inductor work together to resonate the AC pulse and output a sinusoidal power supply.

[0062] Please combine Figure 2 The bridge rectifier circuit 163 includes an eleventh switch Q11, a twelfth switch Q12, a thirteenth switch Q13, and a fourteenth switch Q14. The controller 18 controls the switching states of the eleventh switch Q11, the twelfth switch Q12, the thirteenth switch Q13, and the fourteenth switch Q14 according to the rectification mode, so as to rectify the sine wave power supply into a DC power supply.

[0063] The phase-locked loop method provided in the embodiments of this application can be applied to the UPS devices described in the above embodiments. Please refer to... Figure 4 The phase-locking method for UPS equipment includes steps S41 to S44.

[0064] In step S41 of this embodiment, the target operating mode of the UPS equipment is determined.

[0065] The operating mode refers to the mode in which the UPS device provides power to the load. Operating modes include battery operating mode and AC power operating mode. Battery operating mode is when the UPS device controls the battery to provide power to the load, while AC power operating mode is when the UPS device processes AC power and then provides it to the load. This application embodiment parses the mode marking information to determine the target operating mode of the UPS device. If the mode marking information indicates that the UPS device is operating in battery operating mode, then the target operating mode is battery operating mode. If the mode marking information indicates that the UPS device is operating in AC power operating mode, then the target operating mode is AC power operating mode.

[0066] In step S42 of this application embodiment, the target phase-locked characteristics are determined based on the target operating mode.

[0067] The target phase-locked feature is used to indicate that the UPS device performs phase-locked operation using the target phase-locked mode.

[0068] In some embodiments, the target phase-locked feature includes a zero-crossing phase-locked feature, which indicates that the UPS device performs phase-locked operation using a zero-crossing phase-locked mode. If the target operating mode is battery operating mode, this embodiment generates a zero-crossing phase-locked feature. Since the UPS device operates in battery operating mode, to avoid load malfunctions caused by a high phase-locking rate (e.g., excessively high motor speed), this embodiment selects to generate a zero-crossing phase-locked feature. The phase-locking rate of the zero-crossing phase-locked mode corresponding to this feature is lower than that of the DQ phase-locked mode. Therefore, when this embodiment subsequently performs phase-locked operation using the zero-crossing phase-locked mode, it will not cause load malfunctions, thus improving the reliability and stability of phase-locking.

[0069] In some embodiments, the target phase-locked feature includes a DQ phase-locked feature, which indicates that the UPS device performs phase-locked operation in DQ phase-locked mode. If the target operating mode is mains operating mode, this embodiment obtains the mains power change rate of the UPS device, which indicates the rate of change of the mains power applied to the UPS device, and generates the target phase-locked feature based on the mains power change rate.

[0070] The generation of target phase-locked features based on the mains power change rate includes the following steps: generating DQ phase-locked features when the mains power change rate is less than a preset change threshold, or generating zero-crossing phase-locked features when the mains power change rate is greater than or equal to the preset change threshold.

[0071] The preset change threshold is customized by the designer based on engineering experience; for example, the preset change threshold is 1Hz / 20ms. If the mains power change rate is less than the preset change threshold, it indicates that the frequency of the mains power supply is relatively stable, and it is less likely to cause abnormal load operation during phase-locking. In order to improve phase-locking efficiency, this application embodiment generates DQ phase-locking features, and subsequently uses the DQ phase-locking mode corresponding to the DQ phase-locking features to perform phase-locking operations, thereby enabling phase-locking operations to be completed quickly and efficiently.

[0072] If the rate of change of the mains power is greater than or equal to the preset change threshold, it indicates that the frequency of the mains power supply is relatively volatile. If the phase-locked loop (PLL) rate is relatively fast, it is more likely to cause abnormal load operation. In order to avoid causing abnormal load operation, this application embodiment generates a zero-crossing PLL feature. Since the PLL rate of the zero-crossing PLL mode is less than that of the DQ PLL mode, this application embodiment subsequently uses the zero-crossing PLL mode corresponding to the zero-crossing PLL feature to perform the phase-locking operation, which is less likely to cause abnormal load operation and is beneficial to improving the reliability and stability of the phase-locking.

[0073] In some embodiments, when the rate of change of the mains power exceeds a preset threshold, before generating the zero-crossing phase-locked loop feature, the method further includes: controlling the UPS device to switch from mains power operation mode to battery operation mode, that is: in this embodiment, the first switching switch is controlled to enter the off state, and the second switching switch is controlled to enter the closed state.

[0074] Please combine Figure 2 When the UPS is operating in mains power mode, because the UPS is in phase-locked tracking mode, the phase and frequency of the mains power supply are not yet consistent with the phase and frequency of the output power supply. If the mains power supply changes from the positive half-cycle to the negative half-cycle, the output power supply is likely to be in the positive half-cycle. At this time, a large current can flow back from the load side to the grid side. The large current can easily damage the switching transistors of the power factor correction circuit and the main inverter circuit.

[0075] In this embodiment, when the rate of change of the mains power exceeds a preset threshold, the UPS device is controlled to switch from mains power operation mode to battery operation mode. Since the power output of the battery is DC power, there is no distinction between positive and negative half-cycle power. Therefore, when the UPS device switches from mains power operation mode to battery operation mode, it can avoid the situation where a large current flows back from the load side to the grid side. This can reliably protect the switching transistors of the power factor correction circuit and the main inverter circuit during the phase-locked loop process.

[0076] In step S43 of this application embodiment, the phase-locking mode corresponding to the target phase-locking feature is determined as the target phase-locking mode from at least two preset phase-locking modes, and the phase-locking rates of different phase-locking modes are different.

[0077] Phase-locked mode is the mode supported by the phase-locked algorithm used by the UPS equipment to perform phase-locked operations.

[0078] There are two phase-locked loop (PLL) modes: DQ PLL mode and zero-crossing PLL mode. DQ PLL mode refers to the UPS equipment using the DQ PLL algorithm for phase locking. Zero-crossing PLL mode refers to the UPS equipment using the zero-crossing PLL algorithm for phase locking. The DQ PLL mode corresponds to the DQ PLL characteristics, and the zero-crossing PLL mode corresponds to the zero-crossing PLL characteristics.

[0079] Determining the phase-locked mode corresponding to the target phase-locked feature as the target phase-locked mode from at least two preset phase-locked modes includes the following steps: in response to the target phase-locked feature being a DQ phase-locked feature, determining the DQ phase-locked mode as the target phase-locked mode from at least two preset phase-locked modes; or, in response to the target phase-locked feature being a zero-crossing phase-locked feature, determining the zero-crossing phase-locked mode as the target phase-locked mode from at least two preset phase-locked modes.

[0080] In step S44 of this embodiment, the UPS device is controlled to perform a phase-locked operation based on the target phase-locked mode.

[0081] If the target phase-locked mode is zero-crossing phase-locked mode, the UPS device is controlled to perform phase-locked operation based on the zero-crossing phase-locked mode. In this embodiment, when in battery operation mode or mains operation mode but the mains power change rate is greater than or equal to a preset change threshold, a zero-crossing phase-locked mode with a lower phase-locking rate is selected to control the UPS device to perform phase-locked operation. This avoids the problem of excessively high motor speed caused by selecting the higher phase-locking rate DQ phase-locked mode in battery operation mode, and also avoids the problem of excessively high motor speed caused by excessively high mains power change rate. This avoids performing low-voltage protection operation on the battery, which is beneficial to improving the overall reliability and stability of the UPS device.

[0082] If the target phase-locked mode is DQ phase-locked mode, the UPS equipment is controlled to perform phase-locking operation based on DQ phase-locked mode. In this embodiment of the application, when the mains power operation mode is in progress but the mains power change rate is less than a preset change threshold, the DQ phase-locked mode with a higher phase-locking rate is selected to control the UPS equipment to perform phase-locking operation, thereby improving the phase-locking rate and phase-locking efficiency.

[0083] In some embodiments, performing phase-locked operation based on the target phase-locked mode includes steps S441 to S444.

[0084] In this embodiment of the application, the execution step S441 is as follows: In response to the target phase-locked mode being a zero-crossing phase-locked mode, the tracking step size of the zero-crossing phase-locked mode is adjusted from the first preset step size to the second preset step size.

[0085] The second preset step size is greater than the first preset step size. The first preset step size and the second preset step size are customized by the designer based on engineering experience. The first preset step size and the second preset step size are any values ​​between (0, 2Hz / s). For example, the first preset step size is 0.5Hz / s and the second preset compensation is 1Hz / s.

[0086] The zero-crossing phase-locked loop (PLL) modes used in related technologies all employ a fixed step size for phase locking. When the frequency variation range of the mains power supply is large, such as 0.5Hz / s-2Hz / s, a small tracking step size requires a long phase-locking time. This means that after the mains power is supplied, the UPS equipment must wait a considerable amount of time before switching to mains operation mode, resulting in a poor user experience. Conversely, a large tracking step size can easily reduce phase-locking accuracy, leading to a significant phase difference between the mains power supply and the output power supply in steady state.

[0087] In the zero-crossing phase-locked mode and when the mains power change rate is large, the tracking step size can be flexibly increased, which is beneficial to improving the phase-locked rate.

[0088] In this embodiment of the application, step S442 is executed, which involves running the zero-crossing phase-locked mode based on the second preset step size.

[0089] In this embodiment, the original first preset step size of the zero-crossing phase-locked mode is replaced with a second preset step size, and the zero-crossing phase-locked mode is run based on the second preset step size.

[0090] In this embodiment of the application, step S443 is performed to obtain the first phase-locked feedback information of the UPS device in zero-crossing phase-locked mode.

[0091] The first phase-locked loop (PLL) feedback information includes a first frequency difference and a first phase difference. In this embodiment, a first frequency of the mains power supply and a second frequency of the output power supply are obtained, and the first frequency is subtracted from the second frequency to obtain the first frequency difference. In this embodiment, a first phase of the mains power supply and a second phase of the output power supply are obtained, and the first phase is subtracted from the second phase to obtain the first phase difference.

[0092] In this embodiment of the application, step S444 is performed to control the UPS device based on the first phase-locked loop feedback information.

[0093] Based on the first phase-locked loop feedback information, the embodiments of this application use closed-loop control of the UPS equipment to make the phase frequency characteristics of the mains power supply and the phase frequency characteristics of the output power supply more consistent, thereby improving the accuracy and reliability of phase-locking.

[0094] In some embodiments, controlling the UPS device based on the first phase-locked loop feedback information includes the following steps: responding to a first frequency difference being less than a first frequency threshold and a first phase difference being less than a first phase threshold, adjusting the tracking step size of the zero-crossing phase-locked loop mode from a second preset step size to a first preset step size, running the zero-crossing phase-locked loop mode based on the first preset step size, obtaining the second phase-locked loop feedback information of the UPS device in the zero-crossing phase-locked loop mode, and controlling the UPS device based on the second phase-locked loop feedback information.

[0095] In some embodiments, controlling the UPS device based on the first phase-locked loop feedback information includes the following steps: responding to a first frequency difference greater than or equal to a first frequency threshold, or a first phase difference greater than or equal to a first phase threshold, and running a zero-crossing phase-locked loop mode based on a second preset step size.

[0096] The first frequency threshold and the first phase threshold are defined by the designer based on engineering experience.

[0097] When the first frequency difference is less than the first frequency threshold and the first phase difference is less than the first phase threshold, it indicates that after the UPS device operates in zero-crossing phase-locked mode according to the second preset step size, the phase difference and frequency difference between the mains power supply and the output power supply can be quickly reduced, and it is not necessary to continue operating in zero-crossing phase-locked mode according to the second preset step size. At the same time, in this embodiment, the tracking step size of the zero-crossing phase-locked mode is adjusted from the second preset step size to the first preset step size. When the UPS device performs phase locking according to a smaller preset step size, it can improve the phase locking accuracy and improve the consistency of the phase and frequency between the mains power supply and the output power supply.

[0098] When the first frequency difference is greater than or equal to the first frequency threshold, or the first phase difference is greater than or equal to the first phase threshold, it indicates that the phase difference or frequency difference between the mains power supply and the output power supply is still large. The UPS needs to continue to operate in zero-crossing phase-locked mode based on the second preset step size in order to accelerate the reduction of the phase difference or frequency difference between the mains power supply and the output power supply.

[0099] The second phase-locked loop (PLL) feedback information includes a second frequency difference and a second phase difference. After the UPS device operates in zero-crossing PLL mode based on a first preset step size, this embodiment of the application obtains the third frequency of the mains power supply and the fourth frequency of the output power supply, and subtracts the third frequency from the fourth frequency to obtain the second frequency difference. This embodiment of the application also obtains the third phase of the mains power supply and the fourth phase of the output power supply, and subtracts the third phase from the fourth phase to obtain the second phase difference.

[0100] In some embodiments, controlling the UPS device based on the second phase-locked loop feedback information includes the following steps: responding to a second frequency difference being less than a second frequency threshold and a second phase difference being less than a second phase threshold, generating phase-locked loop success information.

[0101] In some embodiments, controlling the UPS device based on the second phase-locked loop feedback information includes the following steps: responding to a second frequency difference greater than or equal to a second frequency threshold, or a second phase difference greater than or equal to a second phase threshold, and operating a zero-crossing phase-locked loop mode based on a first preset step size.

[0102] The second frequency threshold is less than the first frequency threshold, and the second phase threshold is less than the first phase threshold.

[0103] If the second frequency difference is less than the second frequency threshold and the second phase difference is less than the second phase threshold, it indicates that the phase difference or frequency difference between the mains power supply and the output power supply has further decreased to within the allowable error range. Therefore, this embodiment generates phase-locked loop success information to indicate that the phase-locked loop operation has been completed, and subsequently, the zero-crossing phase-locked loop mode is run based on the first preset step size. When the UPS equipment is in battery operation mode and the mains power grid can provide mains power, this embodiment controls the first switching switch to enter the closed state and controls the second switching switch to enter the open state. At this time, even if the load is a motor, connecting to the mains power supply will not affect the operation of the motor.

[0104] If the second frequency difference is greater than or equal to the second frequency threshold, or the second phase difference is greater than or equal to the second phase threshold, it indicates that the phase difference or frequency difference between the mains power supply and the output power supply still has a narrowing range. Therefore, in this embodiment, the zero-crossing phase-locked mode continues to operate based on the first preset step size.

[0105] To illustrate in detail the phase-locking method for UPS equipment provided in the embodiments of this application, the embodiments of this application are combined with... Figure 5 This will be explained in detail, and the specific process is as follows:

[0106] S51, determine whether the UPS device is in battery operation mode or mains power operation mode but whether the mains power change rate is greater than or equal to the preset change threshold. If yes, execute S52; otherwise, execute S59.

[0107] S52, adjust the tracking step size of the zero-crossing phase-locked mode from the first preset step size to the second preset step size, and execute S53.

[0108] S53, run the zero-crossing phase-locked mode based on the second preset step size, and execute S54.

[0109] S54, determine whether the first frequency difference is less than the first frequency threshold and whether the first phase difference is less than the first phase threshold. If yes, execute S55; otherwise, return to execute S53.

[0110] S55, adjust the tracking step size of the zero-crossing phase-locked mode from the second preset step size to the first preset step size, and execute S56.

[0111] S56, run the zero-crossing phase-locked mode based on the first preset step size, and execute S57.

[0112] S57, determine whether the second frequency difference is less than the second frequency threshold and whether the second phase difference is less than the second phase threshold. If yes, execute S58; otherwise, return to execute S56.

[0113] S58, generate phase-locked loop success information, and continue running the zero-crossing phase-locked loop mode based on the first preset step size.

[0114] S59, running DQ phase-locked mode.

[0115] In this embodiment, the phase-locked mode (DQ) and the zero-crossing phase-locked mode are adaptively selected based on the current operating conditions of the UPS equipment. This not only improves the phase-locking efficiency but also enhances the reliability and safety of the phase-locking, preventing the battery from being incorrectly shut down due to the use of an inappropriate phase-locking mode, thereby improving the overall operational reliability of the UPS equipment.

[0116] It should be noted that in the above embodiments, there is no necessarily a certain order between the steps. Those skilled in the art can understand from the description of the embodiments of this application that the above steps may have different execution orders in different embodiments, that is, they may be executed in parallel or in turn, etc.

[0117] As another aspect of the embodiments of this application, this application provides a phase-locked device for a UPS device. The phase-locked device for the UPS device can be a software module, which includes several instructions stored in a memory. A processor can access the memory, call the instructions, and execute them to complete the phase-locked method for the UPS device described in the various embodiments above.

[0118] In some implementations, the phase-locked loop (PLL) device of a UPS can also be constructed from hardware components. For example, the PLL device of a UPS can be constructed from one or more chips, which can work in coordination to complete the PLL method of the UPS described in the various implementations above. As another example, the PLL device of a UPS can also be constructed from various logic devices, such as general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), microcontrollers, ARM (Acorn RISC Machine) or other programmable logic devices, discrete gate or transistor logic, discrete hardware components, or any combination of these components.

[0119] Please see Figure 6 The phase-locked device 600 of the UPS equipment includes a mode determination module 61, a feature generation module 62, a phase-lock determination module 63, and a phase-lock execution module 64.

[0120] The mode determination module 61 is used to determine the target operating mode of the UPS equipment. The feature generation module 62 is used to determine the target phase-locked characteristics based on the target operating mode. The phase-locked determination module 63 is used to determine the phase-locked mode corresponding to the target phase-locked characteristics as the target phase-locked mode from at least two preset phase-locked modes; the phase-locked rates of different phase-locked modes are all different. The phase-locked execution module 64 is used to control the UPS equipment to perform phase-locked operations based on the target phase-locked mode.

[0121] In this embodiment, the phase-locked mode (DQ) and the zero-crossing phase-locked mode are adaptively selected based on the current operating conditions of the UPS equipment. This not only improves the phase-locking efficiency but also enhances the reliability and safety of the phase-locking, preventing the battery from being incorrectly shut down due to the use of an inappropriate phase-locking mode, thereby improving the overall operational reliability of the UPS equipment.

[0122] In some embodiments, the target phase-locked feature includes a DQ phase-locked feature and a zero-crossing phase-locked feature. The feature generation module 62 is specifically used to: generate a zero-crossing phase-locked feature in response to the target operating mode being a battery operating mode; or, in response to the target operating mode being a mains operating mode, obtain the mains power change rate of the UPS device, the mains power change rate being used to represent the change rate of the mains power applied to the UPS device, and generate the target phase-locked feature based on the mains power change rate.

[0123] In some embodiments, the feature generation module 62 is specifically used to: generate DQ phase-locked features in response to a mains power change rate being less than a preset change threshold; or, generate zero-crossing phase-locked features in response to a mains power change rate being greater than or equal to a preset change threshold.

[0124] In some embodiments, if the rate of change of the mains power exceeds a preset threshold, before generating the zero-crossing phase-locked loop feature, the phase-locked loop determination module 63 is further configured to: control the UPS equipment to switch from mains power operation mode to battery operation mode.

[0125] In some embodiments, the two phase-locked modes include a DQ phase-locked mode and a zero-crossing phase-locked mode. The phase-locked determination module 63 is specifically used to: determine the DQ phase-locked mode as the target phase-locked mode in response to the target phase-locked feature being a DQ phase-locked feature; or, determine the zero-crossing phase-locked mode as the target phase-locked mode in response to the target phase-locked feature being a zero-crossing phase-locked feature.

[0126] In some embodiments, the phase-locked execution module 64 is specifically used to: respond to the target phase-locked mode being a zero-crossing phase-locked mode, adjust the tracking step size of the zero-crossing phase-locked mode from a first preset step size to a second preset step size, wherein the second preset step size is greater than the first preset step size, run the zero-crossing phase-locked mode based on the second preset step size, obtain the first phase-locked feedback information of the UPS device in the zero-crossing phase-locked mode, and control the UPS device based on the first phase-locked feedback information.

[0127] In some embodiments, the first phase-locked feedback information includes a first frequency difference and a first phase difference. The phase-locked execution module 64 is specifically used to: respond to the first frequency difference being less than a first frequency threshold and the first phase difference being less than a first phase threshold, adjust the tracking step size of the zero-crossing phase-locked mode from a second preset step size to a first preset step size, run the zero-crossing phase-locked mode based on the first preset step size, obtain the second phase-locked feedback information of the UPS device in the zero-crossing phase-locked mode, and control the UPS device based on the second phase-locked feedback information.

[0128] In some embodiments, the second phase-locked feedback information includes a second frequency difference and a second phase difference. The phase-locked execution module 64 is specifically used to: generate phase-locked success information in response to the second frequency difference being less than a second frequency threshold and the second phase difference being less than a second phase threshold, wherein the second frequency threshold is less than a first frequency threshold and the second phase threshold is less than a first phase threshold; or, run a zero-crossing phase-locked mode based on a first preset step size in response to the second frequency difference being greater than or equal to the second frequency threshold, or the second phase difference being greater than or equal to the second phase threshold.

[0129] It should be noted that the phase-locked device of the UPS equipment described above can execute the phase-locked method of the UPS equipment provided in the embodiments of this application, and has the corresponding functional modules and beneficial effects of the method. Technical details not described in detail in the embodiments of the phase-locked device of the UPS equipment can be found in the phase-locked method of the UPS equipment provided in the embodiments of this application.

[0130] See Figure 7 , Figure 7 This is a schematic diagram of a controller provided in an embodiment of this application. The controller 700 includes one or more processors 71 and a memory 72. The memory 72 is connected to one or more processors 71, for example, via a bus.

[0131] Processor 71 is configured to support the controller in performing the corresponding functions in the methods described in the above method embodiments. The processor may be a central processing unit (CPU), a network processor (NP), a hardware chip, or any combination thereof. The aforementioned hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The aforementioned PLD may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof.

[0132] Memory 72 is used to store program code, etc. Memory may include volatile memory (VM), such as random access memory (RAM); memory may also include non-volatile memory (NVM), such as read-only memory (ROM), flash memory, hard disk drive (HDD), or solid-state drive (SSD); memory may also include combinations of the above types of memory.

[0133] The memory 72 can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as the program instructions / modules corresponding to the phase-locking method of the UPS device in the embodiments of this application. The processor executes the phase-locking method of the UPS device and various functional applications and data processing of the phase-locking device of the UPS device by running the non-volatile software programs, instructions, and modules stored in the memory, that is, it realizes the functions of the phase-locking method of the UPS device and the various modules or units of the phase-locking device of the UPS device provided in the above method embodiments.

[0134] The memory 72 may include a program storage area and a data storage area, wherein the program storage area may store the operating system and applications required for at least one function. The data storage area may store data created based on the use of the phase-locked device of the UPS equipment. In some embodiments, the memory may optionally include memory remotely configured relative to the processor, which can be connected to the phase-locked device of the UPS equipment via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0135] The one or more modules are stored in the memory. When executed by the one or more processors, they perform the phase-locked loop method of the UPS device in any of the above method embodiments. For example, they perform the method steps described in the above method embodiments to realize the functions of the modules described in the above device embodiments.

[0136] This application also provides a computer-readable storage medium storing a computer program, the computer program including program instructions, which, when executed by a controller, cause the computer to perform the method described in the foregoing embodiments.

[0137] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.

[0138] The above-disclosed embodiments are merely preferred embodiments of this application and should not be construed as limiting the scope of this application. Therefore, any equivalent variations made in accordance with the claims of this application shall still fall within the scope of this application.

Claims

1. A phase-locked loop method for a UPS device, characterized in that, include: Determine the target operating mode of the UPS equipment; Determine the target phase-locked characteristics based on the target operating mode; Among at least two preset phase-locked modes, the phase-locked mode corresponding to the target phase-locked feature is determined as the target phase-locked mode, and the phase-locked rates of different phase-locked modes are different; The UPS device is controlled to perform phase-locked operation based on the target phase-locked mode.

2. The phase-locked loop method according to claim 1, characterized in that, The target phase-locked characteristics include DQ phase-locked characteristics and zero-crossing phase-locked characteristics. Determining the target phase-locked characteristics based on the target operating mode includes: In response to the target operating mode being battery operating mode, a zero-crossing phase-locked loop feature is generated; or, In response to the target operating mode being AC power operating mode, the AC power change rate of the UPS device is obtained, and the AC power change rate is used to represent the change rate of the AC power applied to the UPS device; The target phase-locked loop feature is generated based on the mains power change rate.

3. The phase-locked loop method according to claim 2, characterized in that, The generation of target phase-locked features based on the mains power change rate includes: In response to the mains power change rate being less than a preset change threshold, a DQ phase-locked loop characteristic is generated; or, When the rate of change of the mains power is greater than or equal to a preset change threshold, a zero-crossing phase-locked loop feature is generated.

4. The phase-locked loop method according to claim 3, characterized in that, Provided that the rate of change of the mains power exceeds a preset threshold, before generating the zero-crossing phase-locked loop feature, the method further includes: controlling the UPS device to switch from the mains power operation mode to the battery operation mode.

5. The phase-locked loop method according to claim 1, characterized in that, The two phase-locked modes include DQ phase-locked mode and zero-crossing phase-locked mode. The step of determining the phase-locked mode corresponding to the target phase-locked feature as the target phase-locked mode from at least two preset phase-locked modes includes: In response to the target phase-locked feature being a DQ phase-locked feature, the DQ phase-locked mode is determined as the target phase-locked mode from at least two preset phase-locked modes; or, In response to the target phase-locked feature being a zero-crossing phase-locked feature, the zero-crossing phase-locked mode is determined as the target phase-locked mode from at least two preset phase-locked modes.

6. The phase-locked loop method according to any one of claims 1 to 5, characterized in that, The step of performing phase-locking operation based on the target phase-locking mode includes: In response to the target phase-locked mode being a zero-crossing phase-locked mode, the tracking step size of the zero-crossing phase-locked mode is adjusted from a first preset step size to a second preset step size, wherein the second preset step size is greater than the first preset step size; The zero-crossing phase-locked mode is operated based on the second preset step size; Obtain the first phase-locked feedback information of the UPS device in the zero-crossing phase-locked mode; The UPS device is controlled based on the first phase-locked feedback information.

7. The phase-locked loop method according to claim 6, characterized in that, The first phase-locked feedback information includes a first frequency difference and a first phase difference, and controlling the UPS device based on the first phase-locked feedback information includes: In response to the first frequency difference being less than the first frequency threshold and the first phase difference being less than the first phase threshold, the tracking step size of the zero-crossing phase-locked mode is adjusted from the second preset step size to the first preset step size. The zero-crossing phase-locked mode is operated based on the first preset step size; Obtain the second phase-locked feedback information of the UPS device in the zero-crossing phase-locked mode; The UPS device is controlled based on the second phase-locked feedback information.

8. The phase-locked loop method according to claim 7, characterized in that, The second phase-locked feedback information includes a second frequency difference and a second phase difference. Controlling the UPS device based on the second phase-locked feedback information includes: The response occurs when the second frequency difference is less than a second frequency threshold, and the second phase difference is less than a second phase threshold, the second frequency threshold is less than a first frequency threshold, and the second phase threshold is less than a first phase threshold; or... In response to the second frequency difference being greater than or equal to the second frequency threshold, or the second phase difference being greater than or equal to the second phase threshold, the zero-crossing phase-locked mode is run based on the first preset step size.

9. A controller, characterized in that, The device includes a memory and a processor, the memory being connected to the processor, the processor being configured to execute one or more computer programs stored in the memory, the processor causing the controller to implement the phase-locked loop method for the UPS device as described in any one of claims 1-8 when executing the one or more computer programs.

10. A UPS device, characterized in that, Includes the controller as described in claim 9.

11. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, the computer program including program instructions that, when executed by a processor, cause the processor to perform the phase-locking method of the UPS device as described in any one of claims 1-8.

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