PLC backplane bus communication system based on FPGA and sensor network

Abstract

The application discloses a kind of based on FPGA and sensor network's PLC backplane bus communication system, comprising: topological table generation module is used to generate linear topological table;Bidirectional link module is used to generate bidirectional transmission channel;Small block framing module is used to generate transmission small block;Water transfer forwarding module is used to extract payload and forward transmission small block;Timestamp construction module is used to generate inter-block arbitration timestamp;Arbitration construction module is used to generate inter-block insertion request;Chain confirmation module is used to form chain confirmation result;Insertion output module is used to insert the small block to be inserted at block boundary and output communication result.The application improves the real-time, continuity and arbitration stability of PLC backplane bus communication.

Description

Technical Field

[0001] This invention relates to the field of industrial communication technology, and in particular to a PLC backplane bus communication system based on FPGA and sensor network. Background Technology

[0002] With the increasing demand for real-time communication in industrial control systems, sensor networks, and PLC backplanes, industrial communication technologies for control node status acquisition, high-speed transmission between backplane nodes, and real-time data insertion have received widespread attention. Existing PLC backplane bus communication systems mainly rely on fixed-frame-length messages, centralized master station polling, or ordinary priority queues to complete data exchange between nodes. However, in practical applications, the following problems are commonly encountered: The real-time levels of sensor status data and control interaction data differ significantly. Fixed message transmission processes can cause high-real-time data to wait until the complete message is sent before it can be transmitted, leading to increased transmission delays for alarm data and control feedback data. Backplane nodes typically forward data sequentially along physical connections. Existing forwarding mechanisms are insufficient in handling the correlation between node addresses, transmission directions, and port link relationships, which can easily result in decreased link utilization and low efficiency in extracting node payloads. When multiple nodes generate real-time data simultaneously, traditional bus arbitration often relies on centralized authorization from the master station or ordinary priority comparison, making it difficult to establish a definite insertion order at small block boundaries. This results in a lack of stable coordination between real-time data preemption, node conflict confirmation, and restoration of the original message order.

[0003] Therefore, how to provide a PLC backplane bus communication system based on FPGA and sensor network is a problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0004] One objective of this invention is to propose a PLC backplane bus communication system based on FPGA and sensor networks. This invention achieves the orderly insertion of real-time data at block boundaries in the PLC backplane bus through linear topology table building, dual LVDS differential link transmission, transmission block framing, pipeline forwarding, improved Ricart-Agrawala arbitration, and chain confirmation. It has the advantages of high real-time transmission performance, stable node conflict control, and good bus communication continuity.

[0005] According to an embodiment of the present invention, a PLC backplane bus communication system based on FPGA and sensor network includes: The topology table creation module is used to collect sensor status data and backplane node configuration data to generate a linear topology table; The bidirectional link module is used to configure dual LVDS differential links between adjacent nodes based on the linear topology table, generating a bidirectional transmission channel. The small block framing module is used to encapsulate sensor status data into bus messages and divide them into transmission blocks carrying inter-block forwarding control information and priority arbitration control information according to the real-time transmission granularity. The pipeline forwarding module is used to perform address matching and direction identification on the transmission blocks based on the bidirectional transmission channel, extract the payload that matches the address of this node, and forward the transmission blocks. The timestamp construction module is used to encapsulate real-time data into small blocks to be inserted when real-time data exists on a node, and to generate inter-block arbitration timestamps. The arbitration construction module is used to build an improved Ricart-Agrawala arbitration algorithm, which generates inter-block insertion requests based on inter-block insertion windows as mutually exclusive objects and inter-block arbitration timestamps as sorting criteria. The chain confirmation module is used to write chain confirmation status during the forwarding of transmission blocks based on the bidirectional transmission channel, and form chain confirmation results. The insertion output module is used to determine the target node based on the chain confirmation result, so that the target node inserts the small block to be inserted at the block boundary, restores the small block transmission order of the bus message, and outputs the PLC backplane bus communication result.

[0006] Optionally, the topology table creation module specifically comprises: Collect sensor status data output by the sensor network, extract sensor identifier, acquisition time, status type identifier and status value to form a status acquisition record; Collect backplane node configuration data from the PLC backplane, extract node address, node role identifier, node port identifier and physical connection location to form a node configuration record; The status collection records are associated with the node configuration records based on the node addresses to generate node status association records, and the relationship between adjacent nodes is determined based on the node port identifier and physical connection location. The starting position of the communication master station is determined based on the node role identifier, and the connection order of the communication slave stations is arranged according to the relationship between adjacent nodes to generate a linear connection record; The node status association records and linear connection records are merged according to the node address to generate a linear topology table for use by the bidirectional link module.

[0007] Optionally, the bidirectional link module specifically comprises: Extract node addresses, neighbor relationships, and communication slave connection order from the linear topology table; generate neighbor node pairs based on neighbor relationships; and determine the link direction identifier according to the starting position of the communication master station. Based on the link direction identifier, dual LVDS differential links are configured between adjacent node pairs so that the dual LVDS differential links carry the main station inflow direction data and the main station outflow direction data respectively; In a dual LVDS differential link, the transmitting port and receiving port are bound to the corresponding node port identifiers of adjacent nodes to generate a port link binding record. Configure the FPGA link transceiver logic based on the port link binding record, so that the receiving port performs data sampling and clock recovery on the transmission block, and the sending port outputs the transmission block according to the link direction identifier; The port link binding record, link direction identifier, and FPGA link transceiver logic are aggregated according to the communication slave connection order to generate a bidirectional transmission channel for the pipeline forwarding module and the chain confirmation module to call.

[0008] Optionally, the small block framing module specifically comprises: Receive linear topology table and sensor status data, extract node addresses from the linear topology table, collect sensor status data according to node addresses, and arrange the collection results according to the acquisition time to form a node data sequence to be encapsulated. The message header is constructed and the payload area is arranged for the data sequence to be encapsulated at the node. The node address correspondence is written into the message header and the sensor status data is written into the payload area to form a bus message. The bus message is divided into lengths according to the real-time transmission granularity. The start and end positions of each block are marked, and the bus message is truncated from the start to the end position to form a small payload sequence. Configure block boundary numbers according to the order of the small load sequence, organize inter-block forwarding control information according to the block boundary numbers, and organize priority arbitration control information according to the real-time transmission level of sensor status data. The small payload sequence, inter-block forwarding control information and priority arbitration control information are associated and framed to generate a small transmission block carrying inter-block forwarding control information and priority arbitration control information, and the small transmission block is handed over to the pipeline forwarding module for processing.

[0009] Optionally, the pipeline forwarding module specifically comprises: Receive small transmission blocks from the bidirectional transmission channel, extract inter-block forwarding control information from the small transmission blocks, and parse them to form the target node address and transmission direction identifier; Match the target node address with the local node address. When the target node address matches the local node address, extract the payload from the transmission block and write the payload into the corresponding upper-layer logical interface of the local node. The transmission direction identifier is compared with the link direction identifier in the bidirectional transmission channel to determine the forwarding path corresponding to the transmission block; The transmission block is written to the corresponding sending port according to the forwarding path, and the inter-block forwarding control information and priority arbitration control information in the transmission block are forwarded synchronously with the transmission block. The address matching results, direction identification results, and forwarding paths are associated and recorded to generate a pipeline forwarding record for the chain confirmation module to call.

[0010] Optionally, the timestamp construction module specifically comprises: Detect the real-time data in the upper-layer logical interface of this node, organize the real-time data according to the address of this node and the real-time transmission level, and form a data record to be inserted; The data record to be inserted is encapsulated into a small block, the local node address is written into the inter-block forwarding control information, the real-time transmission level is written into the priority arbitration control information, and a small block to be inserted is generated. Extract the forwarding path and direction identification results from the pipeline forwarding record, extract the block boundary number and priority arbitration control information from the transmission block being forwarded, and parse it to form the current block boundary number and the priority value of the next block; The real-time transmission level of the block to be inserted is compared with the priority value of the next block. If the real-time transmission level is greater than the priority value of the next block, the block to be inserted is marked as an arbitration candidate block. The current block boundary number, the real-time transmission level of the candidate arbitration block, the priority value of the next block, and the address of this node are combined in the order of field arrangement to generate an inter-block arbitration timestamp, which is then handed over to the arbitration construction module for processing.

[0011] Optionally, the arbitration construction module specifically comprises: The node receives the inter-block arbitration timestamp output by the timestamp construction module, extracts the current block boundary number, the real-time transmission level of the arbitration candidate block, the priority value of the next block, and the address of the node from the inter-block arbitration timestamp, and forms the arbitration request record of the node. Mark the block boundary position corresponding to the current block boundary number as the inter-block insertion window, write the inter-block insertion window into the mutual exclusion access object table, and write the arbitration request record of this node into the mutual exclusion access request table. Using the request entry condition, timestamp sorting condition, and yield condition in the improved Ricart-Agrawala arbitration algorithm as the construction objects, the real-time transmission level being greater than the next small block priority value is configured as the request entry condition; Configure the current block boundary number as the window grouping field, configure the real-time transmission level as the first sorting field, configure the next small block priority value as the second sorting field, configure the local node address as the peer adjudication field, and generate inter-block sorting rules. An improved Ricart-Agrawala arbitration algorithm is constructed based on the mutual exclusion access object table, mutual exclusion access request table, request entry conditions, and inter-block sorting rules. The improved Ricart-Agrawala arbitration algorithm is then used to sort the arbitration request records of the current node within the insertion window between the same blocks. The arbitration request record of the current node with the highest sort position is identified as the inter-block insertion candidate request. The inter-block insertion candidate request is associated with the inter-block insertion window, the inter-block arbitration timestamp, and the arbitration candidate block. An inter-block insertion request is generated and handed over to the chain confirmation module for processing.

[0012] Optionally, the chain confirmation module specifically comprises: Receive inter-block insertion requests output by the arbitration construction module, extract the inter-block insertion window, inter-block arbitration timestamp, and arbitration candidate blocks from the inter-block insertion requests, and form an insertion request to be confirmed; Extract the forwarding path, address matching results, and direction identification results from the pipeline forwarding records, and combine them with the bidirectional transmission channel to determine the sequence of confirmation nodes corresponding to the insertion request to be confirmed; The pending confirmation insertion request is transmitted along the confirmation node sequence, so that the nodes in the confirmation node sequence read the local arbitration request record corresponding to the real-time data of their own nodes, and compare the local arbitration request record with the pending confirmation insertion request by sorting and comparing the inter-block arbitration timestamps. Write a permission status to the pending insertion request when no local arbitration request record has been formed; write a permission status to the pending insertion request when the local arbitration request record is in a later sorting position than the pending insertion request; write a blocking status to the pending insertion request when the local arbitration request record is in a earlier sorting position than the pending insertion request. The permitted and blocked states are aggregated according to the confirmation node sequence to form a chain of confirmation states. The chain of confirmation states is then associated with the inter-block insertion window, the inter-block arbitration timestamp, and the arbitration candidate blocks to generate a chain of confirmation results, which are then processed by the insertion output module.

[0013] Optionally, the insertion output module specifically comprises: Receive the chain confirmation result output by the chain confirmation module, and extract the chain confirmation status, inter-block insertion window, inter-block arbitration timestamp and arbitration candidate block from the chain confirmation result; Perform status determination on the chained confirmation status. When the permission status covers the confirmation node sequence and the blocking status does not exist, determine the request source node marked by the inter-block arbitration timestamp as the target node. Based on the inter-block insertion window, locate the block boundary position in the bidirectional transmission channel, establish an insertion binding relationship between the block boundary position and the target node, and generate an insertion control record; The target node writes the arbitration candidate block at the block boundary position according to the insertion control record, and converts the arbitration candidate block into a block to be inserted and connects it to the bidirectional transmission channel. The transmission blocks in the bus message are sequentially arranged according to the block boundary number, the transmission order of the bus message blocks is restored, and the blocks to be inserted, the transmission blocks and the chain confirmation results are associated, and the PLC backplane bus communication results are output.

[0014] The beneficial effects of this invention are: This invention organizes sensor status data and backplane node configuration data into a linear topology table using a topology table building module. A bidirectional link module then configures dual LVDS differential links between adjacent nodes based on this linear topology table, creating a defined bidirectional transmission channel between the communication master and slave stations in the PLC backplane. Transmission blocks are pipelined and forwarded within this bidirectional channel. During forwarding, nodes simultaneously perform address matching, direction identification, and payload extraction, avoiding the waiting time caused by buffering complete messages before processing. This improves the data flow efficiency, node response speed, and link utilization of the backplane bus.

[0015] This invention divides bus messages into transmission blocks at the real-time transmission granularity. Through a timestamp construction module, an arbitration construction module, and a chain confirmation module, an insertion control mechanism based on an improved Ricard-Agrawala arbitration algorithm is built within the inter-block insertion window. This enables nodes to generate inter-block arbitration timestamps when real-time data is present and completes chain confirmation during the forwarding of transmission blocks. By sorting inter-block arbitration timestamps, determining chain confirmation status, and identifying the target node, real-time data can be inserted into bidirectional transmission channels at block boundaries while maintaining the original transmission order of bus messages. This reduces the transmission latency of high-real-time data and improves arbitration stability and PLC backplane communication continuity in scenarios with multiple concurrent initiation nodes. Attached Figure Description

[0016] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings: Figure 1 This is a structural diagram of a PLC backplane bus communication system based on FPGA and sensor network proposed in this invention; Figure 2 This is a schematic diagram of the transmission block framing of a PLC backplane bus communication system based on FPGA and sensor network proposed in this invention. Detailed Implementation

[0017] The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, illustrating only the basic structure of the invention, and therefore only show the components relevant to the invention.

[0018] refer to Figures 1-2 A PLC backplane bus communication system based on FPGA and sensor network includes: The topology table creation module is used to collect sensor status data and backplane node configuration data to generate a linear topology table; The bidirectional link module is used to configure dual LVDS differential links between adjacent nodes based on the linear topology table, generating a bidirectional transmission channel. The small block framing module is used to encapsulate sensor status data into bus messages and divide them into transmission blocks carrying inter-block forwarding control information and priority arbitration control information according to the real-time transmission granularity. The pipeline forwarding module is used to perform address matching and direction identification on the transmission blocks based on the bidirectional transmission channel, extract the payload that matches the address of this node, and forward the transmission blocks. The timestamp construction module is used to encapsulate real-time data into small blocks to be inserted when real-time data exists on a node, and to generate inter-block arbitration timestamps. The arbitration construction module is used to build an improved Ricart-Agrawala arbitration algorithm, which generates inter-block insertion requests based on inter-block insertion windows as mutually exclusive objects and inter-block arbitration timestamps as sorting criteria. The chain confirmation module is used to write chain confirmation status during the forwarding of transmission blocks based on the bidirectional transmission channel, and form chain confirmation results. The insertion output module is used to determine the target node based on the chain confirmation result, so that the target node inserts the small block to be inserted at the block boundary, restores the small block transmission order of the bus message, and outputs the PLC backplane bus communication result.

[0019] In this embodiment, the topology table creation module specifically includes: The sensor status data output by the sensor network is collected, and the sensor status data is sorted in order according to the collection time. The sensor identifier, collection time, status type identifier and status value are extracted from each sensor status data. The sensor identifier is used as the status source index, the collection time is used as the time sorting index, and the status type identifier and status value are written into the same data unit to form a status collection record. Collect backplane node configuration data from the PLC backplane, merge the backplane node configuration data according to the node address, and extract the node address, node role identifier, node port identifier and physical connection location from the backplane node configuration data. Use the node address as the unique index of the node, use the node role identifier as the basis for distinguishing between the communication master station and the communication slave station, and write the node port identifier and physical connection location into the same node unit to form a node configuration record. The status acquisition records are associated with the node configuration records based on the node address, so that the status acquisition records and node configuration records corresponding to the same node address are grouped into the same association unit, generating a node status association record. The connection of adjacent nodes is determined based on the node port identifier and physical connection location to form the relationship between adjacent nodes. Based on the node role identifier, locate the node configuration record corresponding to the communication master station, determine the physical connection position corresponding to the communication master station as the starting position of the communication master station, and arrange the connection order of the communication slave stations sequentially from the starting position of the communication master station along the relationship between adjacent nodes to generate a linear connection record. The node status association record and the linear connection record are merged according to the node address, so that the status source index in the node status association record and the connection order in the linear connection record correspond to the same node address, generating a linear topology table for the bidirectional link module to call.

[0020] In this embodiment, the bidirectional link module specifically comprises: Extract node addresses, adjacent node relationships, and communication slave station connection order from the linear topology table. Pair two directly connected node addresses according to the adjacent node relationship to generate adjacent node pairs. Using the starting position of the communication master station as the direction reference, mark the arrangement direction from the starting position of the communication master station to the end of the communication slave station connection order as the outflow direction of the master station, and mark the arrangement direction from the end of the communication slave station connection order to the starting position of the communication master station as the inflow direction of the master station, thus forming a link direction identifier. Based on the link direction identifier, dual LVDS differential links are configured between adjacent node pairs. One set of differential links in the dual LVDS differential links is assigned to the inflow data of the master station, and the other set of differential links in the dual LVDS differential links is assigned to the outflow data of the master station, so that adjacent node pairs have a bidirectional data carrying relationship corresponding to the link direction identifier. In the dual LVDS differential link, the transmitting port and receiving port are bound to the corresponding node port identifiers of the adjacent nodes. The port correspondence between the transmitting port and the receiving port is established according to the node address. The node port identifier, link direction identifier and port correspondence are written into the same link record to generate a port link binding record. Configure the FPGA link transceiver logic based on the port link binding record, so that the receiving port receives the transmission block according to the port correspondence, performs data sampling and clock recovery on the transmission block, and enables the sending port to select the output path according to the link direction identifier and output the transmission block along the selected output path. The port link binding record, link direction identifier and FPGA link transceiver logic are aggregated according to the communication slave connection order, so that the port connection relationship, direction bearing relationship and transmission block transceiver relationship of each adjacent node pair are kept in correspondence, and a bidirectional transmission channel is generated for the pipeline forwarding module and the chain confirmation module to call.

[0021] In this embodiment, the small block framing module specifically comprises: Receive linear topology table and sensor status data, extract node addresses from linear topology table, match the node address field in sensor status data with the node address in linear topology table item by item, so that sensor status data that match the same node address are grouped into the same node group, and then sort the sensor status data in the node group in ascending order according to the acquisition time to form a node data sequence to be encapsulated. The message header is constructed and the payload area is arranged for the data sequence to be encapsulated at the node. The node address correspondence of the data sequence to be encapsulated at the node is written in the message header. The sensor status data is written in the payload area according to the order of the acquisition time, so that the message header and the payload area form a continuous frame structure and form a bus message. The bus message is divided into lengths according to the real-time transmission granularity. The real-time transmission granularity is used as the single transmission length constraint. The division positions are marked sequentially starting from the beginning position of the bus message. Adjacent division positions are determined as the block start position and block end position, respectively. The bus message is then truncated from the block start position to the block end position to form a small block payload sequence. Configure block boundary numbers according to the arrangement order of the small block load sequence, so that each small block load in the small block load sequence has a corresponding block boundary position mark. Organize inter-block forwarding control information to indicate the arrangement relationship and forwarding order of small blocks according to the block boundary numbers. Organize priority arbitration control information to participate in inter-block insertion judgment according to the real-time transmission level carried by the sensor status data. The small block payload sequence, inter-block forwarding control information and priority arbitration control information are associated and framed so that the small block payload, inter-block forwarding control information and priority arbitration control information corresponding to the same block boundary number are combined into the same transmission unit, generating a transmission small block carrying inter-block forwarding control information and priority arbitration control information, and the transmission small block is handed over to the pipeline forwarding module for processing.

[0022] In this embodiment, the pipeline forwarding module specifically comprises: Receive transmission blocks from the bidirectional transmission channel, read the inter-block forwarding control information in the transmission blocks according to the channel source of the receiving port, separate the fields of the inter-block forwarding control information, extract the node address content used to indicate the receiving object and organize it into the target node address, extract the direction content used to indicate the direction of transmission flow and organize it into the transmission direction identifier. The target node address is matched bit by bit with the local node address. When the target node address matches the local node address, the payload area in the transmission block is separated from the transmission block to form the effective payload. The effective payload is written to the upper-layer logical interface according to the writing format of the upper-layer logical interface corresponding to this node. The transmission direction identifier is compared with the link direction identifier in the bidirectional transmission channel. When the transmission direction identifier and the link direction identifier are consistent, the sending port associated with the receiving port is determined as the forwarding path corresponding to the transmission block. According to the forwarding path, the transmission block is written to the corresponding sending port. During the writing process, the inter-block forwarding control information and priority arbitration control information in the transmission block are kept in the sending port along with the payload, so that the transmission block continues to forward synchronously along the forwarding path after extracting the payload. The matching status between the target node address and the local node address is organized into an address matching result. The comparison status between the transmission direction identifier and the link direction identifier is organized into a direction identification result. The address matching result, the direction identification result, and the forwarding path are then associated and recorded to generate a pipeline forwarding record for the chain confirmation module to call.

[0023] In this embodiment, the timestamp construction module is specifically as follows: The system detects real-time data in the upper-layer logical interface of this node, reads the status of the sending buffer in the upper-layer logical interface, reads the real-time data and real-time transmission level when there is content to be sent in the sending buffer, uses the address of this node as the sending source, uses the real-time transmission level as the insertion priority, uses the real-time data as the payload to be inserted, and writes the address of this node, the real-time transmission level and the real-time data into the same record unit to form the data to be inserted record. The data record to be inserted is encapsulated into small blocks. The control area and the payload area are established according to the framing structure of the transmission blocks. The local node address is written into the inter-block forwarding control information in the control area, the real-time transmission level is written into the priority arbitration control information in the control area, and the real-time data is written into the payload area, so that the data record to be inserted is converted into a small block to be inserted that can enter the bidirectional transmission channel. Extract the forwarding path and direction identification results from the pipeline forwarding record, locate the transmission block that the current node is forwarding based on the forwarding path, read the block boundary number and priority arbitration control information from the transmission block that is being forwarded, parse the priority arbitration control information to obtain the priority content of the next block carried by the current transmission block, organize the block boundary number into the current block boundary number, and organize the priority content of the next block into the priority value of the next block. The real-time transmission level of the block to be inserted is compared with the priority value of the next block. If the real-time transmission level is greater than the priority value of the next block, it is determined that the block to be inserted has a higher insertion order than the next block pointed to by the current transmission block, and the block to be inserted is marked as an arbitration candidate block. The current block boundary number, the real-time transmission level of the arbitration candidate block, the priority value of the next block, and the address of this node are combined in the order of their fields. The current block boundary number is used to mark the location of the block boundary where the contention occurs, the real-time transmission level of the arbitration candidate block is used to mark the order of the insertion request, the priority value of the next block is used to mark the original transmission order of the comparison, and the address of this node is used to mark the source of the request. After combination, an inter-block arbitration timestamp is generated and handed over to the arbitration construction module for processing.

[0024] In this embodiment, the arbitration construction module is specifically as follows: The inter-block arbitration timestamp output by the timestamp construction module is received. The inter-block arbitration timestamp is split into fields to obtain the current block boundary number, the real-time transmission level of the arbitration candidate block, the priority value of the next block, and the address of this node in sequence. The current block boundary number is used as the window positioning content, the real-time transmission level is used as the insertion request order content, the priority value of the next block is used as the original transmission order content, and the address of this node is used as the request source content to form the arbitration request record of this node. Map the current block boundary number to the end position of the transmission block being forwarded, mark the insertable position after the end position as the inter-block insertion window, write the inter-block insertion window into the mutex access object table, so that the mutex access object table records the transmission positions that can be contested, write the arbitration request record of this node into the mutex access request table, so that the mutex access request table records the request source and request order of the participants in the inter-block insertion window contest; Using the request entry condition, timestamp sorting condition, and yielding condition in the improved Ricart-Agrawala arbitration algorithm as the construction objects, the real-time transmission level is configured to be greater than the next small block priority value as the request entry condition, so that requests whose real-time transmission level does not exceed the next small block priority value do not enter the mutual exclusion access request table, and the arbitration request records of this node that meet the request entry condition enter the timestamp sorting process. Configure the current block boundary number as the window grouping field so that arbitration request records of the same node at the same block boundary position are grouped into the same inter-block insertion window. Configure the real-time transmission level as the first sorting field so that arbitration request records of the same node with larger real-time transmission level values ​​are sorted earlier. Configure the next small block priority value as the second sorting field so that the original transmission order participates in the sorting verification. Configure the local node address as the peer adjudication field so that when the real-time transmission levels are the same, a unique adjudication is completed according to the node address, and an inter-block sorting rule is generated. An improved Ricart-Agrawala arbitration algorithm is constructed based on the mutual exclusion access object table, mutual exclusion access request table, request entry conditions, and inter-block sorting rules. The improved Ricart-Agrawala arbitration algorithm first filters the arbitration request records of the current node according to the request entry conditions, then completes window grouping according to the current block boundary number, then completes timestamp sorting according to the inter-block sorting rules, and triggers the transfer condition when the sorted position is not at the top, so that the corresponding arbitration request record of the current node exits the current inter-block insertion window competition. The arbitration request record of the current node with the highest sorting position is identified as the inter-block insertion candidate request. The inter-block insertion candidate request is associated with the inter-block insertion window, the inter-block arbitration timestamp, and the arbitration candidate block, so that the insertion position, sorting basis and the content to be inserted form the same request unit. An inter-block insertion request is generated and handed over to the chain confirmation module for processing.

[0025] This invention transforms the Ricard-Agrawala arbitration algorithm from traditional distributed critical section access control into a dedicated arbitration mechanism for inter-block insertion windows on the PLC backplane bus. It marks the insertable position corresponding to the current block boundary number as a mutually exclusive access object, transforming the arbitration object from an abstract bus occupancy right into a definite block boundary transmission position. Simultaneously, it splits the inter-block arbitration timestamp into the current block boundary number, the real-time transmission level of the arbitration candidate block, the priority value of the next block, and the address of the current node. This ensures that the timestamp is no longer solely used for request ordering but simultaneously carries window positioning, insertion request order, original transmission order verification, and node source determination. Furthermore, it configures a real-time transmission level greater than the next block priority value as a request entry condition, filtering out requests with lower original transmission orders before entering arbitration, avoiding invalid arbitration consuming FPGA processing resources. The current block boundary number is then used as… The window grouping field uses real-time transmission level as the first sorting field, the next small block priority value as the second sorting field, and the local node address as the peer arbitration field. This ensures that requests within the same inter-block insertion window can be sorted according to real-time priority, original transmission order constraints, and node uniqueness. Furthermore, by using a yield condition, arbitration request records of local nodes that are not at the top of the sort order are removed from the current inter-block insertion window competition. This allows the improved Ricart-Agrawala arbitration algorithm to form unique inter-block insertion candidate requests when multiple nodes simultaneously possess real-time data. This reduces the waiting overhead of traditional global mutual exclusion arbitration, lowers the probability of real-time data being blocked by ordinary transmission small blocks, improves the determinism of block boundary insertion order, and enhances the arbitration stability, transmission continuity, and FPGA hardware implementation adaptability of the PLC backplane bus in high real-time data concurrency scenarios in sensor networks.

[0026] In this embodiment, the chain confirmation module specifically comprises: Receive the inter-block insertion request output by the arbitration construction module, separate the fields of the inter-block insertion request, extract the inter-block insertion window, the inter-block arbitration timestamp and the arbitration candidate small block, take the inter-block insertion window as the boundary position of the block to be contested, take the inter-block arbitration timestamp as the sorting basis to be compared, and take the arbitration candidate small block as the content to be inserted to form an insertion request to be confirmed. The forwarding path, address matching result, and direction identification result are extracted from the pipeline forwarding record. The arrangement of nodes passed through by the transmission block is determined based on the forwarding path, the node receiving status is determined based on the address matching result, and the transmission flow direction is determined based on the direction identification result. The sequence of confirmation nodes corresponding to the insertion request to be confirmed is then formed by combining the node connection relationship in the bidirectional transmission channel. The pending confirmation insertion request is transmitted along the confirmation node sequence, so that the nodes in the confirmation node sequence read the local arbitration request record corresponding to the real-time data of their own nodes, and sort and compare the inter-block arbitration timestamp in the local arbitration request record with the inter-block arbitration timestamp in the pending confirmation insertion request. The sorting position is determined according to the order of the current block boundary number, real-time transmission level, next small block priority value and node address. When a node has not formed a local arbitration request record, it is determined that there is no insertion competition prior to the insertion request to be confirmed and a permission status is written to the insertion request to be confirmed. When the local arbitration request record is in a later order than the insertion request to be confirmed, it is determined that the insertion request to be confirmed maintains its priority and a permission status is written to the insertion request to be confirmed. When the local arbitration request record is in a earlier order than the insertion request to be confirmed, it is determined that the local arbitration request record has priority and a blocking status is written to the insertion request to be confirmed. The permitted and blocked states are collected sequentially according to the sequence of confirmed nodes. The permitted and blocked states are written into the same confirmed record according to the node arrangement order to form a chain of confirmed states. The chain of confirmed states is associated with the inter-block insertion window, the inter-block arbitration timestamp, and the arbitration candidate blocks to ensure that the confirmed state, insertion position, sorting basis, and content to be inserted correspond. The chain of confirmed results is generated and handed over to the insertion output module for processing.

[0027] In this embodiment, the insertion output module specifically comprises: The system receives the chain confirmation result output by the chain confirmation module, separates the fields of the chain confirmation result, reads the chain confirmation status, inter-block insertion window, inter-block arbitration timestamp and arbitration candidate block, uses the chain confirmation status as the basis for insert permission determination, uses the inter-block insertion window as the basis for insertion position determination, uses the inter-block arbitration timestamp as the basis for request source determination, and uses the arbitration candidate block as the content to be transmitted. The status determination is performed on the chain confirmation status. The node status is read item by item according to the confirmation node sequence. When the permission status and the confirmation node sequence form a one-to-one overlay relationship and the blocking status does not exist, the inter-block insertion request is determined to have passed the chain confirmation. Then, the address of this node is extracted from the inter-block arbitration timestamp, and the request source node corresponding to this node address is determined as the target node. Based on the inter-block insertion window, locate the block boundary position in the bidirectional transmission channel, read the current block boundary number corresponding to the inter-block insertion window, map the current block boundary number to the end position of the transmission block, take the end position of the transmission block as the block boundary position, establish an insertion binding relationship between the block boundary position and the target node, and generate an insertion control record. The target node writes the arbitration candidate block at the block boundary position according to the insertion control record, aligns the control area of ​​the arbitration candidate block with the transmission format of the bidirectional transmission channel, marks the aligned arbitration candidate block as the block to be inserted, and connects the block to be inserted to the bidirectional transmission channel. The transmission blocks in the bus message are sequentially arranged according to the block boundary sequence number. The transmission blocks before the block boundary position, the blocks to be inserted, and the transmission blocks after the block boundary position are sequentially connected to restore the transmission order of the bus message blocks. The blocks to be inserted, the transmission blocks, and the chain confirmation results are associated, and the PLC backplane bus communication results are output.

[0028] Example 1: To verify the feasibility of this invention in practice, it was applied to an industrial control cabinet containing a PLC main control unit, backplane communication slave stations, sensor acquisition boards, and execution control boards. This control cabinet collects temperature, pressure, vibration, current, and switch status data, and sends the collected results to the main control unit via the PLC backplane bus. Simultaneously, the main control unit issues control commands to the execution control boards. In actual operation, normal status data and alarm-related real-time data coexist. Traditional backplane communication typically uses complete message sequence transmission. Real-time alarm data must wait for the current message to finish before entering the bus, resulting in delayed alarm response. When multiple slave stations generate real-time data simultaneously, problems such as transmission request conflicts, increased master station polling waiting time, and complex restoration of the original message sequence can easily occur.

[0029] In this embodiment, the sensor status data output by the sensor network first enters the topology table module. This module generates a linear topology table based on the backplane node configuration data, ensuring a defined connection order for the communication master station, acquisition slave stations, and control slave stations according to node addresses, node ports, and physical connection locations. The bidirectional link module configures dual LVDS differential links between adjacent nodes based on the linear topology table, forming a bidirectional transmission channel capable of simultaneously carrying data flowing in and out of the master station. The small-block framing module encapsulates the sensor status data into bus messages and then divides them into transmission blocks according to real-time transmission granularity. Each transmission block carries inter-block forwarding control information and priority arbitration control information. After the transmission blocks enter the bidirectional transmission channel, the pipeline forwarding module performs address matching and direction identification at each node. When a matching node address is found, the payload is extracted and submitted to the upper-layer logic interface. Simultaneously, the transmission block continues to be forwarded, preventing transmission interruptions caused by nodes waiting for complete message buffering.

[0030] When a slave station detects real-time data indicating excessive vibration, the timestamp construction module reads the real-time data from the upper-layer logical interface of this node, encapsulates the real-time data into a block to be inserted, and parses the current block boundary number and the priority value of the next block from the currently forwarding transmission blocks. If the real-time transmission level of the block to be inserted is greater than the priority value of the next block, the timestamp construction module generates an inter-block arbitration timestamp. The arbitration construction module uses the inter-block insertion window corresponding to the current block boundary position as the mutually exclusive access object, uses the inter-block arbitration timestamp as the sorting basis, constructs an improved Ricart-Agrawala arbitration algorithm, and generates an inter-block insertion request. The chain confirmation module transmits the insertion request to be confirmed along the confirmation node sequence, writes a permit state or a blocking state during the transmission block forwarding process, and forms a chain confirmation result. The insertion output module determines the target node when the permit state covers the confirmation node sequence and the blocking state does not exist, causes the target node to write the block to be inserted at the block boundary position, and restores the block transmission order of the bus message according to the block boundary number.

[0031] To verify the effectiveness, the proposed solution and the comparative solution were tested under the same conditions. The comparative solution used fixed-length complete message transmission, master station polling authorization, and ordinary priority queue processing, where real-time data could only enter the transmission queue after the current complete message ended. The proposed solution used transmission block framing, inter-block insertion windows, improved Ricart-Agrawala arbitration, and chained confirmation processing, where real-time data could enter the block boundary insertion process after the priority conditions were met. During the test, the control cabinet maintained the same number of nodes, the same sensor sampling load, and the same alarm trigger frequency, and recorded the results of normal state data transmission, real-time alarm data insertion, multi-node concurrent requests, and continuous bus operation. As shown in Table 1: Table 1 Communication Real-Time Performance Verification Table

[0032] As shown in Table 1, the proposed solution significantly reduces real-time data waiting latency, concurrent request conflict recovery time, and payload extraction time compared to the comparative solution. This indicates that small-block framing and pipelined forwarding can reduce the waiting time caused by complete message blocking. Simultaneously, the inter-block arbitration timestamp, the improved Ricard-Agrawala arbitration algorithm, and the chained confirmation state can form a stable target node determination when multiple nodes simultaneously initiate real-time data insertion, ensuring orderly insertion of real-time data at block boundaries. The improved success rate of normal state message order recovery and the effective utilization rate of the backplane channel demonstrate that the proposed solution maintains the original bus message block transmission order while inserting high real-time data, balancing real-time performance, continuity, and communication stability.

[0033] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A PLC backplane bus communication system based on FPGA and sensor network, characterized in that, include: The topology table creation module is used to collect sensor status data and backplane node configuration data to generate a linear topology table; The bidirectional link module is used to configure dual LVDS differential links between adjacent nodes based on the linear topology table, generating a bidirectional transmission channel. The small block framing module is used to encapsulate sensor status data into bus messages and divide them into transmission blocks carrying inter-block forwarding control information and priority arbitration control information according to the real-time transmission granularity. The pipeline forwarding module is used to perform address matching and direction identification on the transmission blocks based on the bidirectional transmission channel, extract the payload that matches the address of this node, and forward the transmission blocks. The timestamp construction module is used to encapsulate real-time data into small blocks to be inserted when real-time data exists on a node, and to generate inter-block arbitration timestamps. The arbitration construction module is used to build an improved Ricart-Agrawala arbitration algorithm, which generates inter-block insertion requests based on inter-block insertion windows as mutually exclusive objects and inter-block arbitration timestamps as sorting criteria. The chain confirmation module is used to write chain confirmation status during the forwarding of transmission blocks based on the bidirectional transmission channel, and form chain confirmation results. The insertion output module is used to determine the target node based on the chain confirmation result, so that the target node inserts the small block to be inserted at the block boundary, restores the small block transmission order of the bus message, and outputs the PLC backplane bus communication result.

2. The PLC backplane bus communication system based on FPGA and sensor network according to claim 1, characterized in that, The topology table creation module specifically includes: Collect sensor status data output by the sensor network, extract sensor identifier, acquisition time, status type identifier and status value to form a status acquisition record; Collect backplane node configuration data from the PLC backplane, extract node address, node role identifier, node port identifier and physical connection location to form a node configuration record; The status collection records are associated with the node configuration records based on the node addresses to generate node status association records, and the relationship between adjacent nodes is determined based on the node port identifier and physical connection location. The starting position of the communication master station is determined based on the node role identifier, and the connection order of the communication slave stations is arranged according to the relationship between adjacent nodes to generate a linear connection record; The node status association records and linear connection records are merged according to the node address to generate a linear topology table for use by the bidirectional link module.

3. The PLC backplane bus communication system based on FPGA and sensor network according to claim 1, characterized in that, The bidirectional link module is specifically: Extract node addresses, neighbor relationships, and communication slave connection order from the linear topology table; generate neighbor node pairs based on neighbor relationships; and determine the link direction identifier according to the starting position of the communication master station. Based on the link direction identifier, dual LVDS differential links are configured between adjacent node pairs so that the dual LVDS differential links carry the main station inflow direction data and the main station outflow direction data respectively; In a dual LVDS differential link, the transmitting port and receiving port are bound to the corresponding node port identifiers of adjacent nodes to generate a port link binding record. Configure the FPGA link transceiver logic based on the port link binding record, so that the receiving port performs data sampling and clock recovery on the transmission block, and the sending port outputs the transmission block according to the link direction identifier; The port link binding record, link direction identifier, and FPGA link transceiver logic are aggregated according to the communication slave connection order to generate a bidirectional transmission channel for the pipeline forwarding module and the chain confirmation module to call.

4. The PLC backplane bus communication system based on FPGA and sensor network according to claim 1, characterized in that, The small block framing module is specifically as follows: Receive linear topology table and sensor status data, extract node addresses from the linear topology table, collect sensor status data according to node addresses, and arrange the collection results according to the acquisition time to form a node data sequence to be encapsulated. The message header is constructed and the payload area is arranged for the data sequence to be encapsulated at the node. The node address correspondence is written into the message header and the sensor status data is written into the payload area to form a bus message. The bus message is divided into lengths according to the real-time transmission granularity. The start and end positions of each block are marked, and the bus message is truncated from the start to the end position to form a small payload sequence. Configure block boundary numbers according to the order of the small load sequence, organize inter-block forwarding control information according to the block boundary numbers, and organize priority arbitration control information according to the real-time transmission level of sensor status data. The small payload sequence, inter-block forwarding control information and priority arbitration control information are associated and framed to generate a small transmission block carrying inter-block forwarding control information and priority arbitration control information, and the small transmission block is handed over to the pipeline forwarding module for processing.

5. The PLC backplane bus communication system based on FPGA and sensor network according to claim 1, characterized in that, The pipeline forwarding module is specifically as follows: Receive small transmission blocks from the bidirectional transmission channel, extract inter-block forwarding control information from the small transmission blocks, and parse them to form the target node address and transmission direction identifier; Match the target node address with the local node address. When the target node address matches the local node address, extract the payload from the transmission block and write the payload into the corresponding upper-layer logical interface of the local node. The transmission direction identifier is compared with the link direction identifier in the bidirectional transmission channel to determine the forwarding path corresponding to the transmission block; The transmission block is written to the corresponding sending port according to the forwarding path, and the inter-block forwarding control information and priority arbitration control information in the transmission block are forwarded synchronously with the transmission block. The address matching results, direction identification results, and forwarding paths are associated and recorded to generate a pipeline forwarding record for the chain confirmation module to call.

6. The PLC backplane bus communication system based on FPGA and sensor network according to claim 1, characterized in that, The timestamp construction module is specifically as follows: Detect the real-time data in the upper-layer logical interface of this node, organize the real-time data according to the address of this node and the real-time transmission level, and form a data record to be inserted; The data record to be inserted is encapsulated into a small block, the local node address is written into the inter-block forwarding control information, the real-time transmission level is written into the priority arbitration control information, and a small block to be inserted is generated. Extract the forwarding path and direction identification results from the pipeline forwarding record, extract the block boundary number and priority arbitration control information from the transmission block being forwarded, and parse it to form the current block boundary number and the priority value of the next block; The real-time transmission level of the block to be inserted is compared with the priority value of the next block. If the real-time transmission level is greater than the priority value of the next block, the block to be inserted is marked as an arbitration candidate block. The current block boundary number, the real-time transmission level of the candidate arbitration block, the priority value of the next block, and the address of this node are combined in the order of field arrangement to generate an inter-block arbitration timestamp, which is then handed over to the arbitration construction module for processing.

7. A PLC backplane bus communication system based on FPGA and sensor network according to claim 1, characterized in that, The arbitration construction module is specifically as follows: The node receives the inter-block arbitration timestamp output by the timestamp construction module, extracts the current block boundary number, the real-time transmission level of the arbitration candidate block, the priority value of the next block, and the address of the node from the inter-block arbitration timestamp, and forms the arbitration request record of the node. Mark the block boundary position corresponding to the current block boundary number as the inter-block insertion window, write the inter-block insertion window into the mutual exclusion access object table, and write the arbitration request record of this node into the mutual exclusion access request table. Using the request entry condition, timestamp sorting condition, and yield condition in the improved Ricart-Agrawala arbitration algorithm as the construction objects, the real-time transmission level being greater than the next small block priority value is configured as the request entry condition; Configure the current block boundary number as the window grouping field, configure the real-time transmission level as the first sorting field, configure the next small block priority value as the second sorting field, configure the local node address as the peer adjudication field, and generate inter-block sorting rules. An improved Ricart-Agrawala arbitration algorithm is constructed based on the mutual exclusion access object table, mutual exclusion access request table, request entry conditions, and inter-block sorting rules. The improved Ricart-Agrawala arbitration algorithm is then used to sort the arbitration request records of the current node within the insertion window between the same blocks. The arbitration request record of the current node with the highest sort position is identified as the inter-block insertion candidate request. The inter-block insertion candidate request is associated with the inter-block insertion window, the inter-block arbitration timestamp, and the arbitration candidate block. An inter-block insertion request is generated and handed over to the chain confirmation module for processing.

8. The PLC backplane bus communication system based on FPGA and sensor network according to claim 1, characterized in that, The chain confirmation module is specifically as follows: Receive inter-block insertion requests output by the arbitration construction module, extract the inter-block insertion window, inter-block arbitration timestamp, and arbitration candidate blocks from the inter-block insertion requests, and form an insertion request to be confirmed; Extract the forwarding path, address matching results, and direction identification results from the pipeline forwarding records, and combine them with the bidirectional transmission channel to determine the sequence of confirmation nodes corresponding to the insertion request to be confirmed; The pending confirmation insertion request is transmitted along the confirmation node sequence, so that the nodes in the confirmation node sequence read the local arbitration request record corresponding to the real-time data of their own nodes, and compare the local arbitration request record with the pending confirmation insertion request by sorting and comparing the inter-block arbitration timestamps. Write a permission status to the pending insertion request when no local arbitration request record has been formed; write a permission status to the pending insertion request when the local arbitration request record is in a later sorting position than the pending insertion request; write a blocking status to the pending insertion request when the local arbitration request record is in a earlier sorting position than the pending insertion request. The permitted and blocked states are aggregated according to the confirmation node sequence to form a chain of confirmation states. The chain of confirmation states is then associated with the inter-block insertion window, the inter-block arbitration timestamp, and the arbitration candidate blocks to generate a chain of confirmation results, which are then processed by the insertion output module.

9. A PLC backplane bus communication system based on FPGA and sensor network according to claim 1, characterized in that, The insertion output module is specifically: Receive the chain confirmation result output by the chain confirmation module, and extract the chain confirmation status, inter-block insertion window, inter-block arbitration timestamp and arbitration candidate block from the chain confirmation result; Perform status determination on the chained confirmation status. When the permission status covers the confirmation node sequence and the blocking status does not exist, determine the request source node marked by the inter-block arbitration timestamp as the target node. Based on the inter-block insertion window, locate the block boundary position in the bidirectional transmission channel, establish an insertion binding relationship between the block boundary position and the target node, and generate an insertion control record; The target node writes the arbitration candidate block at the block boundary position according to the insertion control record, and converts the arbitration candidate block into a block to be inserted and connects it to the bidirectional transmission channel. The transmission blocks in the bus message are sequentially arranged according to the block boundary number, the transmission order of the bus message blocks is restored, and the blocks to be inserted, the transmission blocks and the chain confirmation results are associated, and the PLC backplane bus communication results are output.

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