A method and apparatus for testing a device with POE function

Abstract

The application discloses a kind of equipment test method and device with POE function, and specifically relates to POE equipment test field, including obtaining the device type information of equipment to be tested, and when the equipment to be tested is PSE equipment to be tested, the WAN port of PSE equipment to be tested is connected to the left RJ45 of PSE function detection small plate through network cable, when the equipment to be tested is PD equipment to be tested, the WAN port of PD equipment to be tested is connected to the RJ45 of PD function detection small plate through network cable, to output the test connection state corresponding to the device type. By taking the power supply establishment result as the release prerequisite of data detection channel, and then detecting the PC network port LINK state by PC after power supply establishment, the power supply detection and link detection of POE function equipment can be constructed into an intelligent sensing system cascade judgment process with front and rear constraint relationship, so as to relatively inhibit the misjudgment when PoE capability is not complete.

Description

Technical Field

[0001] This invention relates to the field of POE device testing technology, and more specifically, to a device testing method and apparatus with POE functionality. Background Technology

[0002] In the shipment testing of devices with PoE functionality, the mainstream practice in the industry is to confirm whether the power supply function and network port data function of the device under test meet the shipment standards. Typically, a programmable PoE tester or analyzer, a PoE-enabled switch, or matching PSE or PD devices are used to perform power supply tests and link tests on the PSE device under test or the PD device under test, respectively. However, in the context of batch testing on factory production lines, the testing process is constrained by limited testing station space, the need for workers to quickly set up the testing environment, the short testing cycle of a single device under test, and the inability to configure additional large or costly testing equipment. Under these constraints, while existing practices can provide individual results such as normal power supply, normal load, or normal PC network port LINK, the power supply detection and data detection usually occur independently. There is a lack of a detection relationship based on the establishment of the previous stage power supply constraining the subsequent link determination. Therefore, when there is a defect in any of the stages of protocol establishment, output establishment, load maintenance, and network port data connectivity of the device under test, observable phenomena such as LED lighting up but PC network port LINK being abnormal, PC network port LINK being established but power supply being unstable, and power loss after a short period of load being considered as a test pass may still occur. This can lead to devices with incomplete PoE capabilities being misjudged as functionally normal and entering the shipment stage. The technical problem to be solved by this application is: how to construct the power supply detection and data detection of devices with PoE function into a cascaded judgment process of intelligent sensing system with a pre- and post-constraint relationship while retaining the low cost and small volume test board architecture, so as to avoid misjudgment when PoE capability is incomplete. Summary of the Invention

[0003] To overcome the aforementioned deficiencies of the prior art, embodiments of the present invention provide a device testing method and apparatus with PoE functionality. By using a test board to separate and construct the power supply detection path and data detection path of the device under test, and controlling the subsequent link detection release based on the power supply establishment result of the previous stage, and then performing cascaded determination by combining the load maintenance state and the network port link state, the problems mentioned in the background art are solved.

[0004] To achieve the above objectives, the present invention provides the following technical solution: a device testing method with PoE functionality, comprising: S1. Obtain the device type information of the device under test. When the device under test is a PSE device under test, connect the WAN port of the PSE device under test to the left RJ45 of the PSE function test board via a network cable. When the device under test is a PD device under test, connect the WAN port of the PD device under test to the RJ45① of the PD function test board via a network cable to output the test connection status corresponding to the device type. S2. When testing the connection status corresponding to the PSE device under test, the signal input transformer connected to the left RJ45 is used to separate the input signal into a power supply signal output through the tap and a data signal output through the data path. The power supply signal is sent to the protocol power supply to perform the protocol establishment judgment, and the data signal is sent to the data branch where the relay is located to form a data detection path to be released. S3. When the protocol power supply is successfully established, control the DC-DC converter to step down the protocol power supply output and supply power to the cement resistor and LED, so that the cement resistor performs load sustaining detection on the PSE device under test, and outputs the power supply establishment result based on the continuous lighting state of the LED within the preset observation time. S4. When the power supply establishment result indicates that the protocol establishment, output establishment and load maintenance are continuously satisfied, the control relay connects the data detection path, so that the data signal is input to the PC through the right RJ45, network cable and LAN port, and the PC detects whether the PC network port LINK is normal. When the power supply establishment result is not established or the PC network port LINK is abnormal, the PSE test device function abnormal result is output. When the power supply establishment result is established and the PC network port LINK is normal, the PSE test device function normal result is output. S5. When the test connection status corresponds to the PD device under test, the DC port of the PD function detection board provides DC power input to the protocol power supply and the transformer. The protocol power supply performs protocol judgment based on the power-on response of the PD device under test. After the protocol judgment is correct, the power supply is supplied to the PD device under test through the transformer and RJ45① to output the power-on establishment result of the PD device under test. S6. When the PD device under test is powered on and the power indicator of the PD device under test is continuously lit within the preset observation window, connect the RJ45 ② of the PD function detection board to the LAN port of the PC via a network cable and have the PC detect whether the PC network port LINK is normal. If the power indicator of the PD device under test is abnormal or the PC network port LINK is abnormal, output the PD device under test function abnormal result. If the power indicator of the PD device under test is continuously lit and the PC network port LINK is normal, output the PD device under test function normal result. Appendix Figure 2The test board is equipped with RJ45 ① and RJ45 ②. RJ45 ① is used to connect to the WAN port of the PD (Device Under Test) via a network cable, serving as the interface for the PD's access and power output. RJ45 ② is used to connect to the LAN port of the PC via a network cable, serving as the interface for data link testing. (See attached manual.) Figure 1 In the test board, the RJ45 on the left is the left-side RJ45, and the RJ45 on the right is the right-side RJ45. The left-side RJ45 connects to the WAN port of the PSE (Physical Equipment under Test) via a network cable, serving as the input interface for the PSE to access the test board. The right-side RJ45 connects to the LAN port of the PC via a network cable, serving as the data output interface. By connecting the RJ45 to the PSE... Figure 1 The left RJ45, right RJ45 and attached Figure 2 The above distinction between RJ45① and RJ45② ensures a clear correspondence between the interface positions, connected objects, and functional relationships of the PSE function testing board and the PD function testing board in their respective test paths, thereby avoiding confusion in interface designations in the specification, claims, and drawings.

[0005] In a preferred embodiment, in S1, the device type information of the device under test is obtained, and the test connection status corresponding to the device type is output, including: S1-1. Obtain the test board identifier, access interface identifier, and access port identifier when the device under test is connected, and combine the test board identifier, access interface identifier, and access port identifier to generate the connection description information to be determined. S1-2. Match the connection description information to be determined with the connection rules corresponding to the preset type. The connection rules corresponding to the preset type include at least the left RJ45 of the PSE function detection board corresponding to the WAN port of the PSE device under test and the RJ45① of the PD function detection board corresponding to the WAN port of the PD device under test, so as to output the device type matching result. S1-3. When the device type matching result indicates that the match is successful, output the test connection status corresponding to the matched device type. When the device type matching result indicates that the match is unsuccessful, output the connection abnormal status and prohibit subsequent test processes from entering the protocol judgment.

[0006] In a preferred embodiment, S2 includes: S2-1. Input the input signal connected to the left RJ45 to the transformer, and take out the power supply component as the power supply signal from the transformer tap, and take out the network data component as the data signal from the transformer data path. S2-2. Input the power supply signal into the protocol power supply, and the protocol power supply performs power acceptance identification on the power supply signal. If the power acceptance identification is successful, output the protocol establishment success signal. If the power acceptance identification is unsuccessful, output the protocol establishment failure signal. S2-3. Input the data signal into the data branch where the relay is located, and use the protocol establishment success signal as the relay connection control signal, so that the relay connects the data branch when it receives the protocol establishment success signal and keeps the data branch disconnected when it receives the protocol establishment failure signal, so as to form a data detection path to be released.

[0007] In a preferred embodiment, S3 includes: S3-1. Input the protocol power supply output into the DC-DC converter, and output the stepped-down voltage from the DC-DC converter to the cement resistor and LED to form a load-bearing detection branch connected to the PSE device under test. S3-2. After the load test branch is formed, the PSE device under test is continuously powered to the cement resistor through the left RJ45, transformer, tap, protocol power supply and DC-DC converter, so that the cement resistor forms a load state for the PSE device under test.

[0008] In a preferred embodiment, S3 further includes: S3-3. After the LED is connected to the load detection branch, obtain the starting time when the LED turns from off to on, and continuously read the on / off state of the LED from the starting time. S3-4. When the LED remains lit during continuous reading, output a valid power supply result; when the LED turns off during continuous reading, output a invalid power supply result.

[0009] In a preferred embodiment, S4 includes: S4-1. After the power supply establishment result is output, input the power supply establishment result into the relay as the connection control quantity, so that the relay connects the data detection path, and the data signal output by the transformer is input into the PC through the right RJ45, network cable and LAN port. S4-2. After the relay is turned on, the power supply establishment result and PC network port LINK status are obtained synchronously at each reading time. The first joint state is recorded when the power supply establishment result is established and the PC network port LINK status is connected. The second joint state is recorded when the power supply establishment result is established and the PC network port LINK status is disconnected. The third joint state is recorded when the power supply establishment result is not established and the PC network port LINK status is connected. The fourth joint state is recorded when the power supply establishment result is not established and the PC network port LINK status is disconnected. S4-3. Arrange the joint states corresponding to each reading time in chronological order, and record the reading time as the effective start time of the link when the first joint state appears. If the first joint state does not appear before the effective start time of the link, output the PSE device under test function abnormality result.

[0010] In a preferred embodiment, S4 further includes: S4-4. After the effective start time of the link, compare the joint state corresponding to the adjacent reading time one by one, and maintain the normal judgment when the joint state corresponding to the adjacent reading time is the first joint state. When the joint state corresponding to any reading time changes to the second joint state, the third joint state or the fourth joint state, record the reading time as the failure time and output the PSE device under test function abnormal result. S4-5. When the joint state corresponding to each reading time after the effective start time of the link remains in the first joint state, output the PSE device under test function normal result. After outputting the PSE device under test function abnormal result, keep the PSE device under test function abnormal result until the end of this test.

[0011] In a preferred embodiment, S5 includes: S5-1. Input the DC power from the DC port into the protocol power supply and the transformer respectively, and send the power receiving identification signal to the PD device under test via RJ45① through the protocol power supply. At the same time, collect the power receiving response signal returned by the PD device under test. S5-2. Input the power-receiving response signal into the protocol power supply, and the protocol power supply will verify the corresponding power-receiving response signal according to the order of sending the power-receiving identification signal. When the power-receiving response signal and the power-receiving identification signal correspond to each other, the protocol will output a correct judgment signal. When the power-receiving response signal is missing, out of order, or does not correspond, the protocol will output an incorrect judgment signal. S5-3. After the output protocol judges the correct signal, the DC power input from the DC port is output to the PD device under test through the transformer and RJ45① to form a power supply path, and the power receiving status of the PD device under test after the power supply path is established is recorded as the power receiving establishment result of the PD device under test.

[0012] In a preferred embodiment, S6 includes: S6-1. After the PD device under test is powered on, continuously read the on / off status of the PD device under test power light, and record the first time the PD device under test power light turns on when it turns off. When the PD device under test power light remains on from the first time it turns on, connect RJ45② to the LAN port of the PC via a network cable. S6-2. After connecting RJ45② to the LAN port of the PC, the power light status of the PD device under test and the LINK status of the PC network port are synchronously acquired at each reading time. The first corresponding state is when the power light of the PD device under test is on and the PC network port LINK is connected. The second corresponding state is when the power light of the PD device under test is on and the PC network port LINK is disconnected. The third corresponding state is when the power light of the PD device under test is off and the PC network port LINK is connected. The fourth corresponding state is when the power light of the PD device under test is off and the PC network port LINK is disconnected. S6-3. Arrange the corresponding states according to the order of each reading time, and output the PD device under test function normally when the corresponding state of each reading time is the first corresponding state after the first light-up time. When the corresponding state changes to the second, third or fourth corresponding state at any reading time, output the PD device under test function abnormal result and keep the PD device under test function abnormal result until the end of this test.

[0013] A device testing apparatus with PoE functionality, comprising: The type access module is used to obtain the device type information of the device under test. When the device under test is a PSE device under test, the WAN port of the PSE device under test is connected to the left RJ45 of the PSE function test board via a network cable. When the device under test is a PD device under test, the WAN port of the PD device under test is connected to the RJ45① of the PD function test board via a network cable to output the test connection status corresponding to the device type. The branch link module is used to input the signal connected to the left RJ45 to the transformer when the test connection status corresponds to the PSE device under test. The transformer separates the input signal into a power supply signal output through the tap and a data signal output through the data path. The power supply signal is sent to the protocol power supply to perform the protocol establishment judgment, and the data signal is sent to the data branch where the relay is located to form a data detection path to be released. The load establishment module is used to control the DC-DC converter to step down the protocol power supply output and supply power to the cement resistor and LED when the protocol power supply is successfully established. This enables the cement resistor to perform load maintenance detection on the PSE device under test and outputs the power supply establishment result based on the continuous illumination state of the LED within a preset observation period. The release judgment module is used to control the relay to connect the data detection path when the power supply establishment result indicates that the protocol establishment, output establishment and load maintenance are continuously satisfied. This allows the data signal to be input to the PC through the RJ45, network cable and LAN port on the right side. The PC then checks whether the PC network port LINK is normal. If the power supply establishment result is not established or the PC network port LINK is abnormal, the module outputs the PSE test device function abnormal result. If the power supply establishment result is established and the PC network port LINK is normal, the module outputs the PSE test device function normal result. The power-on module is used to provide DC power input from the DC port of the PD function detection board to the protocol power supply and transformer when the PD device under test is in the test connection state. The protocol power supply performs protocol judgment based on the power-on response of the PD device under test. After the protocol judgment is correct, power is supplied to the PD device under test through the transformer and RJ45① to output the power-on result of the PD device under test. The linkage verification module is used to connect the RJ45② of the PD function detection board to the LAN port of the PC via a network cable when the PD device under test is powered on and the power indicator of the PD device under test is continuously lit within the preset observation window. The PC then checks whether the PC network port LINK is normal. If the power indicator of the PD device under test is abnormal or the PC network port LINK is abnormal, the module outputs a result indicating that the PD device under test is functionally abnormal. If the power indicator of the PD device under test is continuously lit and the PC network port LINK is normal, the module outputs a result indicating that the PD device under test is functionally normal.

[0014] The technical effects and advantages of this invention are as follows: 1. By using the establishment of power supply as a prerequisite for data detection path, and then detecting the PC network port LINK status by PC after power supply is established, the power supply detection and link detection of devices with PoE function can be constructed into a cascaded judgment process of intelligent sensing system with a pre- and post-constraint relationship, thereby relatively suppressing misjudgment when PoE capability is incomplete. 2. By using a transformer to separate the input signal from the left RJ45 into a power supply signal and a data signal, and by having the protocol power supply perform power acceptance identification and protocol establishment judgment first, the data detection can be established on the basis that the protocol path has been established, thus improving the correspondence of the detection results. 3. By forming a load detection branch through DC-DC converter, cement resistor and LED, and outputting the power supply establishment result based on the continuous illumination of LED under load, the instantaneous power-on after the protocol is established can be distinguished from continuous power supply, thereby improving the identification effect of load maintenance capability. 4. By synchronously acquiring the power supply establishment result and PC network port LINK status at each reading time and constructing a joint status sequence, and then judging based on the continuous status after the effective start time of the link, it is possible to distinguish between power supply failure, link interruption and residual connectivity, thus helping to improve the completeness of anomaly identification. 5. By first sending a power-receiving identification signal and verifying the power-receiving response signal in the PD function detection path, and then establishing a power supply path after the protocol judgment is correct, the subsequent power lamp detection and link detection of the PD under test can be based on the condition that the prior protocol is established, thereby relatively reducing the risk of misjudgment caused by erroneous power-on. 6. By using PSE and PD function detection boards to complete access, splitting, load and link detection, and combining the left RJ45, right RJ45, RJ45① and RJ45② to form a clear interface division of labor, the burden of test environment construction can be reduced and the efficiency of test implementation can be improved in factory production line scenarios. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the PSE function detection board structure of the present invention.

[0016] Figure 2 This is a schematic diagram of the PD function detection board structure of the present invention.

[0017] Figure 3 This is a schematic diagram of the PSE function testing process of the present invention.

[0018] Figure 4 This is a schematic diagram of the PD function testing process of the present invention. Detailed Implementation

[0019] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] Refer to the instruction manual appendix Figure 1-4 The present invention provides a device testing method with PoE functionality, comprising: S1. Obtain the device type information of the device under test. When the device under test is a PSE device under test, connect the WAN port of the PSE device under test to the left RJ45 of the PSE function test board via a network cable. When the device under test is a PD device under test, connect the WAN port of the PD device under test to the RJ45① of the PD function test board via a network cable to output the test connection status corresponding to the device type. In this embodiment, S1 is used to confirm the connection relationship between the device under test (DUT) and the testing board before the DUT enters power supply detection and data detection, to avoid subsequent protocol judgment path errors or misjudgment of test results due to incorrect test board selection, incorrect access interface, or incorrect access port. Its basic principle is to first convert the current connection relationship of the DUT into calculable connection description information to be determined, then compare this connection description information with the pre-configured type-corresponding connection relationship, and output the test connection status corresponding to the device type for direct use in subsequent steps. This implementation process includes the following steps: In S1-1, the purpose is to convert the physical connection relationship formed by the current access of the device under test into connection description information that can be used for subsequent matching calculations. During execution, the current connection status of the device under test after completing the access is used as the input. The test board identifier, access interface identifier, and access port identifier corresponding to this access are read. Among them, the test board identifier is used to distinguish between the PSE function detection board and the PD function detection board, the access interface identifier is used to indicate that the interface accessed by the device under test is the WAN port, and the access port identifier is used to indicate whether the network cable is connected to the left RJ45 or RJ45①. Subsequently, the test board identifier, access interface identifier, and access port identifier are combined according to the predetermined field order to generate the connection description information to be judged, and the connection description information to be judged is written into the current test record for S1-2 to read. If any identifier is missing or there is a conflict, the connection description error information is output and the subsequent matching calculation is terminated. In S1-2, the purpose is to determine the device type corresponding to the current access relationship by comparing the connection description information to be determined with the type-corresponding connection relationship item by item. During execution, the connection description information to be determined output by S1-1 and the pre-configured type-corresponding connection relationship are used as input. The type-corresponding connection relationship includes at least the left RJ45 of the PSE function detection board corresponding to the WAN port of the PSE device under test, and the RJ45① of the PD function detection board corresponding to the WAN port of the PD device under test. During comparison, consistency judgment is performed in sequence according to the test board identifier, access interface identifier, and access port identifier. If all three identifiers are consistent, the matching result is output. If any identifier is inconsistent, the matching result is output. If the matching with the previous connection relationship is successful, the matching result of the PSE device under test is output. If the matching with the next connection relationship is successful, the matching result of the PD device under test is output. If none of them match, the connection abnormality result is output. In S1-3, the purpose is to generate a unique test connection status based on the device type matching result and to prohibit subsequent protocol judgments when a connection is abnormal. During execution, the device type matching result output by S1-2 is used as the input. When the device type matching result is PSE (Personal Suppressed Equipment) matching, the PSE test connection status is output and written to the test status area for S2 to read. When the device type matching result is PD (Personal Suppressed Equipment) matching, the PD test connection status is output and written to the test status area for S5 to read. When the device type matching result is a connection abnormality, the connection abnormality status is output and written to the abnormality record area, and a protocol judgment prohibition signal is output to prevent subsequent steps from entering the protocol judgment stage. Through the above processing, the device under test completes access routing before entering subsequent detection, and subsequent steps only read the confirmed test connection status to execute the corresponding detection path. Through the above implementation method, the test board, access interface, and access port of the device under test are first combined and characterized when the device is connected. Then, the device type is matched according to the type-corresponding connection relationship, and the matching result is converted into the test connection status directly called in subsequent steps. This allows the PSE function detection path and the PD function detection path to be accurately separated before entering the protocol judgment, avoiding erroneous detection caused by incorrect test board or port connection. In practical application: when the worker connects the WAN port of the device under test to the corresponding test board during shipment inspection, the test device reads the test board identifier, access interface identifier, and access port identifier and forms the connection description information to be judged. Then, it compares it item by item with the pre-configured type-corresponding connection relationship. If it matches the PSE device under test, it enters the PSE function detection path; if it matches the PD device under test, it enters the PD function detection path; if it does not match, it outputs a connection abnormality status and prohibits subsequent protocol judgment.

[0021] S2. When testing the connection status corresponding to the PSE device under test, the signal input transformer connected to the left RJ45 is used to separate the input signal into a power supply signal output through the tap and a data signal output through the data path. The power supply signal is sent to the protocol power supply to perform the protocol establishment judgment, and the data signal is sent to the data branch where the relay is located to form a data detection path to be released. In this embodiment, S2 is used to split the mixed input signal from the left RJ45 connection into a power supply detection path and a data detection path when testing the connection state corresponding to the PSE device under test. The power supply detection path first completes the protocol establishment judgment, and then the protocol establishment result controls whether the data detection path meets the release conditions, thus ensuring that subsequent data detection is established only after the power supply path is established. The basic principle is to first split the input signal through a transformer, then perform power acceptance identification on the power supply signal through the protocol power supply, and finally convert the protocol establishment result into a relay connection control signal to determine whether the data branch is in an on or off state. This implementation process includes the following steps: In S2-1, the purpose is to separate the input signal from the left RJ45 connection into a power supply signal and a data signal, providing independent input for subsequent protocol establishment judgment and data branch control. During execution, the mixed signal from the PSE device under test via the network cable and the left RJ45 input is used as the input quantity. This input signal is sent to the transformer, and the power supply component is taken out from the transformer tap as the power supply signal. At the same time, the network data component is taken out from the transformer data path as the data signal. The power supply signal is written to the protocol power supply input terminal for S2-2 to read, and the data signal is written to the data branch input terminal where the relay is located for S2-3 to read. If no power supply component is taken out from the transformer tap side, the power supply signal is recorded as null. If no network data component is taken out from the data path, the data signal is recorded as null, and the corresponding null value status is written into the current test record. In S2-2, the purpose is to use the power supply signal to determine whether the PSE (Physical Equipment Under Test) has completed protocol establishment, and to convert the determination result into a control signal that can be directly called by subsequent data branches. During execution, the power supply signal output from S2-1 is used as the input quantity to input the power supply signal to the protocol power supply, which then performs power acceptance identification on the power supply signal. When the protocol power supply detects that the power supply signal meets the current power acceptance identification requirements, it outputs a protocol establishment success signal and writes the protocol establishment success signal to the relay control input terminal for S2-3 to read. When the protocol power supply does not detect a power supply signal that meets the power acceptance identification requirements, it outputs a protocol establishment failure signal and writes the protocol establishment failure signal to the relay control input terminal. If the power supply signal is empty, power acceptance identification is not performed, and a protocol establishment failure signal is directly output. In S2-3, the purpose is to control whether the data signal enters the subsequent data detection path based on the protocol establishment result, thereby forming a connection relationship of prior power supply establishment constraint and subsequent data detection release. During execution, the data signal output from S2-1 and the protocol establishment success signal or protocol establishment failure signal output from S2-2 are used as inputs. The data signal is input to the data branch where the relay is located, and the protocol establishment success signal is used as the relay connection control signal. When the relay receives the protocol establishment success signal, it controls the relay to connect the data branch, keeping the data signal in the ready-to-output state for subsequent steps to read. When the relay receives the protocol establishment failure signal, it controls the relay to keep the data branch disconnected, preventing the data signal from entering the subsequent output path. If the data signal is empty, even if the protocol establishment is successful, the current data branch state will be recorded as no valid data state and written into the test record. Through the above implementation method, the input signal connected to the left RJ45 is first split into a power supply signal and a data signal by the transformer. Then, the protocol power supply outputs the protocol establishment result based on the power supply signal. Finally, the relay controls the connection or disconnection of the data branch based on the protocol establishment result. This makes the data detection path of the PSE device under test no longer independently allowed, but rather the power acceptance recognition of the previous power supply path is used as the entry condition. This helps to reduce misjudgments when there is only network data connectivity but the power supply path is not established. In practical applications: when the PSE device under test is connected to the left RJ45 of the PSE function detection board via a network cable, the mixed signal first enters the transformer. The power supply signal is led out from the transformer tap side and sent to the protocol power supply. The data signal is led out from the data path and sent to the data branch where the relay is located. If the protocol power supply completes the power acceptance recognition, it outputs a protocol establishment success signal and controls the relay to connect the data branch, so that subsequent steps can continue to read the data signal. If the protocol power supply fails to complete the power acceptance recognition, it outputs a protocol establishment failure signal and keeps the data branch disconnected, so that subsequent data detection is not allowed.

[0022] S3. When the protocol power supply is successfully established, control the DC-DC converter to step down the protocol power supply output and supply power to the cement resistor and LED, so that the cement resistor performs load sustaining detection on the PSE device under test, and outputs the power supply establishment result based on the continuous lighting state of the LED within the preset observation time. In this embodiment, S3 is used to confirm whether the power supply output of the PSE device under test can form an effective load and maintain it continuously after the protocol is successfully established, so as to provide a basis for the release of the subsequent data detection path. The basic principle is to first send the protocol power supply output to the DC-DC converter to form a load detection branch that can be used by the cement resistor and LED, then use the cement resistor to apply a load state to the PSE device under test, and at the same time use the LED on and off state to characterize the power supply maintenance during the load process. Finally, based on the continuous reading results, the power supply establishment result or the power supply failure result is output. The implementation process includes the following steps: In S3-1, the purpose is to convert the protocol power supply output into a branch voltage that can be directly used for load testing, thereby establishing a load testing branch connected to the PSE (Physical Equipment Under Test). During execution, the protocol power supply output after successful protocol establishment (output from S2) is used as the input. The protocol power supply output is input to the DC-DC converter, which performs voltage reduction processing and outputs the reduced voltage to both the cement resistor and the LED. The DC-DC output voltage value is derived from a preset configuration, pre-set during production line assembly according to the rated connection requirements of the cement resistor and the lighting requirements of the LED, ensuring that the output diameter of the same batch of test boards remains consistent. After the voltage is reduced, one path is connected to the input terminal of the cement resistor, and the other path is connected to the input terminal of the LED, thus forming a load testing branch connected to the PSE. The establishment status of the load testing branch is written into the current test record for S3-2 and S3-3 to read. If there is no protocol power supply output or no reduced voltage output from the DC-DC converter, the load testing branch is recorded as not established and a power supply failure result is output. In S3-2, the purpose is to establish an actual load state for the PSE (Physical Equipment Under Test) through a cement resistor, in order to test the PSE's continuous power supply capability after the protocol is established. During execution, the load testing branch established in S3-1 is used as the input condition, causing the PSE to continuously supply power to the cement resistor through the left RJ45, transformer, tap, protocol power supply, and DC-DC converter. The cement resistor receives the stepped-down voltage and forms a fixed load, thereby putting the PSE into a load state. The resistance value of the cement resistor is a preset configuration, selected during the test board design stage according to the shipment test load requirements of the PSE, and used on the production line. The process remains unchanged to ensure that different devices under test complete the test under the same load conditions. After the load state is formed, the current load start time is written into the test record for subsequent LED status reading. If the load detection branch has been established but the cement resistor has not formed an effective load, the current state is recorded as a load abnormality and the power supply failure result is output. In practical applications, for example, if the device under test can stably output power to the detection board after the protocol is established, and the PSE device under test maintains output without power loss after the cement resistor is continuously connected, it indicates that it has the corresponding load maintenance capability. If power loss occurs after the cement resistor is connected, the subsequent LED status will directly reflect the abnormality. In S3-3, the purpose is to visualize and record the power supply maintenance process under load conditions by continuously reading the LED's on / off state. During execution, the current on / off state of the LED after it is connected to the load detection branch in S3-1 is used as the input quantity. First, it is detected whether the LED has changed from off to on. When the LED changes from off to on, this moment is recorded as the start moment, and the on / off state of the LED is continuously read at a fixed reading cycle starting from the start moment. The value of the reading cycle is obtained from the preset configuration and is written during the initialization of the detection device to ensure that the continuous reading caliber is consistent. The LED on / off states obtained at each moment of continuous reading are written into the state sequence in chronological order for S3-4 to judge hourly. If the LED never changes from off to on, the start moment is not recorded, the current detection result is directly recorded as power supply failure, and subsequent continuous reading is stopped. In S3-4, the purpose is to make a final determination on whether the power supply of the PSE under load is valid based on the LED on / off state sequence. During execution, the start time output from S3-3 and the LED on / off state sequence are used as inputs. Starting from the first lighting state corresponding to the start time, the LED on / off state at each subsequent reading time is read one by one. When the LED remains lit at each reading time during the continuous reading process, the power supply valid result is output and written to the test state area for S4 to read. When the LED changes from lit to off at any reading time during the continuous reading process, the power supply invalid result is immediately output and written to the test state area. If a missing value appears in the state sequence, the missing value is treated as an interrupt and the power supply invalid result is directly output. Through this processing, the power supply valid result no longer depends on the instantaneous lighting, but on whether the LED remains lit under load, so that subsequent data detection is only allowed to enter the condition when the power supply is maintained as valid. Through the above implementation method, the protocol power supply output is first converted into the load detection branch voltage by the DC-DC converter. Then, the cement resistor forms a fixed load state for the PSE device under test. The continuous on / off state of the LED during the load process is used as the power supply maintenance criterion. Finally, the power supply establishment result or power supply failure result is output, thereby further limiting the power supply detection after the protocol is established to the load maintenance level, reducing the situation where the device is mistakenly judged as functionally normal when only the protocol is established but the load cannot be sustained. In practical applications: when the PSE device under test is connected to the PSE function detection board via the left RJ45 and the protocol is established, the protocol power supply output is input to the DC-DC converter. The DC-DC converter outputs a stepped-down voltage to the cement resistor and the LED. The cement resistor forms a fixed load for the PSE device under test, and the LED synchronously represents the current power supply state. If the LED continues to light up after the start time, the power supply establishment result is output and used by S4. If the LED turns off or remains off during the load process, the power supply failure result is output, preventing subsequent data detection paths from being allowed.

[0023] S4. When the power supply establishment result indicates that the protocol establishment, output establishment and load maintenance are continuously satisfied, the control relay connects the data detection path, so that the data signal is input to the PC through the right RJ45, network cable and LAN port, and the PC detects whether the PC network port LINK is normal. When the power supply establishment result is not established or the PC network port LINK is abnormal, the PSE test device function abnormal result is output. When the power supply establishment result is established and the PC network port LINK is normal, the PSE test device function normal result is output. In this embodiment, S4 is used to control whether the data detection path is allowed after the power supply establishment result has been output, and to make a final judgment on whether the PSE device under test has complete PoE function by synchronously and jointly determining the power supply establishment result and the PC network port LINK status. The basic principle is to first convert the power supply establishment result into a relay connection control quantity so that the data signal only enters the PC side when the power supply is established, and then synchronously collect the power supply establishment result and the PC network port LINK status at each reading time to construct a joint status sequence, and distinguish between normal function and abnormal function based on whether the power supply is continuously established and the link is connected in the joint status sequence. The implementation process includes the following steps: In S4-1, the purpose is to convert the power supply establishment result into the data detection path release control, so that the PC-side link detection is established under the premise of power supply establishment. During execution, the power supply establishment result output by S3 and the data signal output by the transformer in S2 are used as input quantities. The power supply establishment result is input to the relay as the connection control quantity. When the power supply establishment result is established, the relay is controlled to connect the data detection path, so that the data signal output by the transformer is input to the PC through the right RJ45, network cable and LAN port, and the current relay state is recorded as the connected state. When the power supply establishment result is not established, the relay is controlled to keep the data detection path disconnected, and the current relay state is recorded as the disconnected state. After the data signal is received by the PC, it is written to the current link detection buffer for S4-2 to read. If the power supply establishment result is missing, it is treated as power supply failure, the relay remains disconnected, and the current test result is directly written to the abnormal candidate state. In S4-2, the purpose is to merge the power supply establishment result and the PC network port LINK status into a unified joint state after the data detection path is opened, so as to perform continuous judgment in chronological order. During execution, the relay status output by S4-1, the power supply establishment result continuously output by S3, and the PC network port LINK status returned in real time by the PC side are used as inputs. When the relay is in the on state, the power supply establishment result and the PC network port LINK status are synchronously acquired once at each reading moment according to the preset reading cycle. The value of the reading cycle is obtained from the preset configuration and is written during the initialization of the test program to ensure that the joint state at each reading moment has consistent timing. Interval; After synchronous acquisition, the first joint state is recorded as the result of power supply establishment being established and the PC network port LINK status being connected; the second joint state is recorded as the result of power supply establishment being established and the PC network port LINK status being disconnected; the third joint state is recorded as the result of power supply establishment being invalid and the PC network port LINK status being connected; and the fourth joint state is recorded as the result of power supply establishment being invalid and the PC network port LINK status being disconnected. The joint state corresponding to each reading time is written into the joint state sequence for S4-3 and S4-4 to read. If the PC network port LINK status is not read at any reading time, the reading time is treated as the PC network port LINK status being disconnected. In S4-3, the purpose is to determine the starting position where power supply is established and link connection first occur simultaneously from the joint state sequence, thus providing a starting point for subsequent continuity judgment. During execution, the joint state sequence output by S4-2 is used as the input, and the joint states corresponding to each reading time are sequentially arranged and scanned according to the order of each reading time. When the first joint state is detected for the first time, the reading time corresponding to the first joint state is recorded as the link valid start time, and the link valid start time is written into the current test record for S4-4 and S4-5 to read. If the first joint state does not appear within all reading times after the relay is turned on, it is determined that the power supply establishment result and the PC network port LINK state are not satisfied simultaneously, and the PSE under test device function abnormality result is directly output and written into the abnormal record area. This processing ensures that subsequent normal judgment only starts from the moment when power supply is established and link connection is established simultaneously, and does not replace the link valid start time with the relay turn-on time or the time when any single state is established. In S4-4, the purpose is to identify abnormal situations such as power supply branch failure, link interruption, or both failure based on the continuous changes in the joint state after the effective start time of the link. During execution, the effective start time of the link and the sequence of joint states after it are used as input. Starting from the first joint state corresponding to the effective start time of the link, the joint states corresponding to adjacent reading times are compared one by one. When the joint states corresponding to adjacent reading times are both the first joint state, the normal judgment continues, and the current comparison result is written into the continuous success record. When the joint state corresponding to any reading time changes from the first joint state to the second, third, or fourth joint state, that reading time is recorded as the failure time. The system immediately outputs the PSE (Physical Equipment Tester) malfunction result. The second joint state indicates that power supply is available but the PC network port LINK is disconnected; the third joint state indicates that power supply is not available but the PC network port LINK remains connected; and the fourth joint state indicates that power supply is not available and the PC network port LINK is disconnected. If the joint state sequence is missing at a certain reading time, the missing time is treated as a failure time and the PSE malfunction result is output. In practical applications, for example, if the PSE malfunction maintains power supply and the PC network port LINK is connected in the first few reading times, but experiences a power failure under load at a subsequent reading time, the joint state corresponding to that reading time will change from the first joint state to the fourth joint state, thus being directly identified as abnormal. In S4-5, the purpose is to output the final functional result based on the overall maintenance of the joint state after the effective start time of the link, and to maintain the abnormal result until the end of the test after an anomaly occurs. During execution, the continuous establishment records, failure times, and current functional results output by S4-4 are used as inputs. When the joint state corresponding to each reading time after the effective start time of the link is maintained as the first joint state, the PSE device under test is output as a normal function result, and the normal function result of the PSE device under test is written into the test result area. When S4-4 has already output the PSE device under test as an abnormal function result, the abnormal function result of the PSE device under test is maintained until the end of the test, and it will not be restored to normal function due to the reappearance of the first joint state at subsequent reading times. The maintenance method is implemented by rule constraints, that is, once the PSE device under test is written as an abnormal function result in the same test cycle, the same abnormal result is only allowed to be written repeatedly before the end of subsequent test cycles, and it is not allowed to be rewritten as a normal function result. Through this processing, the final output result reflects whether the power supply is always established and the link is connected throughout the entire detection cycle, rather than just reflecting the instantaneous state at a certain moment. Through the above implementation method, the power supply establishment result first controls the relay to connect the data detection path, and then the power supply establishment result and the PC network port LINK status are collected synchronously to construct a joint state sequence. The link effective start time and the continuity of subsequent joint states are used as the final judgment basis. Thus, the power supply detection and link detection, which could originally occur independently, are reconstructed into a cascaded judgment process with a before-after constraint relationship. This can distinguish different abnormal situations such as power supply establishment but link not established, power supply failure but link residual connection, and simultaneous power supply and link failure, reducing misjudgments caused by relying solely on single detection results. In practical applications: after the PSE device under test completes the protocol establishment and forms a power supply establishment result, the relay is connected. The data signal output by the transformer is input to the PC through the right RJ45, network cable and LAN port. The test program synchronously collects the power supply establishment result and the PC network port LINK status according to a fixed reading cycle and generates a joint state sequence. If all joint states after the link effective start time are the first joint state, the PSE device under test function is output as normal. If the second, third or fourth joint state appears at any reading time, the PSE device under test function is immediately output as abnormal and is maintained until the end of this test.

[0024] S5. When the test connection status corresponds to the PD device under test, the DC port of the PD function detection board provides DC power input to the protocol power supply and the transformer. The protocol power supply performs protocol judgment based on the power-on response of the PD device under test. After the protocol judgment is correct, the power supply is supplied to the PD device under test through the transformer and RJ45① to output the power-on establishment result of the PD device under test. In this embodiment, S5 is used to first confirm whether the PD device under test (DUT) correctly responds to the power acceptance signal sent by the protocol power supply when the test connection status corresponds to the PD device under test. Then, after the protocol judgment is correct, a power supply path is established, thereby avoiding direct power supply to the PD device under test when the protocol is not established. The basic principle is that the DC power input from the DC port is first sent to the protocol power supply and the transformer respectively. Then, the protocol power supply sends a power acceptance signal to the PD device under test via RJ45① and collects the power acceptance response signal. Subsequently, the protocol judgment is completed based on the consistency of the sending order and the response order. Finally, when the protocol judgment is correct, the DC power is released to be output to the PD device under test via the transformer and RJ45①. This implementation process includes the following steps: In S5-1, the purpose is to establish the identification and transmission paths and response acquisition paths required for protocol judgment, providing transmission and response sequences for subsequent protocol judgment. During execution, the DC power input from the DC port and the PD device under test connected to RJ45① are used as input quantities. The DC power input from the DC port is input to the protocol power supply and the transformer, respectively. The protocol power supply obtains the working power required for identification control, and the transformer obtains the DC input required for establishing the subsequent power supply path. Subsequently, the protocol power supply sends a power receiving identification signal to the PD device under test via RJ45①, and acquires the power receiving response signal returned by the PD device under test after each transmission. The power receiving identification signals sent each time are numbered in the order of transmission to form an identification sequence, and the power receiving response signals acquired each time are numbered in the order of return to form a response sequence. The identification sequence and response sequence are written into the current test record for S5-2 to read. If no corresponding power receiving response signal is acquired after transmission, a missing marker is written into the response sequence. In S5-2, the purpose is to determine whether the current protocol is correctly established based on the correspondence between the power-received identification signal and the power-received response signal. During execution, the identification sequence and response sequence output from S5-1 are used as inputs. The power-received response signal is input to the protocol power supply, which then verifies the correspondence between each power-received response signal according to the order in which the power-received identification signal was sent. During verification, power-received identification signals and power-received response signals at the same number position are grouped into corresponding units. The existence of the response in this group of corresponding units, whether the return order is consistent with the sending order, and whether the response content corresponds to the current power-received identification signal are compared. If each group corresponds to the current power-received identification signal... If all units meet the requirements of existence, consistency, and correspondence, a protocol judgment correct signal is output and written to the power supply release status area for S5-3 to read. If any corresponding unit has a missing response, out-of-order response, or mismatched response content, a protocol judgment error signal is output and written to the power supply release status area. In practical applications, for example, if the protocol power supply sends two power-on identification signals in sequence, and the PD device under test returns the corresponding power-on response signal in the same order, the protocol judgment is considered correct. If the second power-on response returns before the first, or only returns one response, the protocol judgment is considered incorrect. In S5-3, the purpose is to establish a power supply path only when the protocol judgment is correct, and to convert the power supply status after establishment into a PD device under test power supply establishment result that can be directly called in subsequent steps. During execution, the protocol judgment correct signal or protocol judgment incorrect signal output from S5-2 and the DC power input from the DC port are used as input quantities. When the protocol judgment correct signal is output, the DC power input from the DC port is output to the PD device under test through the transformer and RJ45① to form a power supply path, and the current power supply status of the PD device under test after the power supply path is established is recorded as follows. The power-on establishment result of the PD under test is written to the test status area for S6 to read. When the output protocol judgment error signal is received, the power supply path is not established, and the current status is recorded as the PD under test power-on failure result and written to the test status area. If there is no DC power input at the DC port, even if the protocol judgment is correct, the current status will be treated as the PD under test power-on failure result. Through this process, the PD under test only enters the power-on state when the protocol response is correct. Subsequent power light detection and PC network port LINK detection are all based on the premise that the power supply path has been established. Through the above implementation method, the protocol power supply first sends a power-receiving identification signal to the PD device under test via RJ45① and collects the power-receiving response signal. Then, based on the correspondence between the identification sequence and the response sequence, the protocol judgment result is output. Finally, the power supply path is established only when the protocol judgment is correct, and the power supply establishment result of the PD device under test is output. This makes the subsequent testing of the PD device under test no longer based on direct power supply, but on the premise that the protocol is established. This helps to reduce misjudgments caused when the protocol is not established but the device is briefly powered on. In practical applications: when the PD device under test is connected to the RJ45① of the PD function detection board, the DC power input from the DC port is sent to the protocol power supply and the transformer respectively. The protocol power supply sends a power-receiving identification signal to the PD device under test via RJ45① and records the returned power-receiving response signal. If each power-receiving response signal corresponds to the power-receiving identification signal in the order of transmission, the protocol judgment correct signal is output and the power supply path is established, so that the PD device under test enters the power-receiving establishment state. If the power-receiving response signal is missing, out of order, or does not correspond, the protocol judgment error signal is output and the power supply path is not established.

[0025] S6. When the PD device under test is powered on and the power indicator of the PD device under test is continuously lit within the preset observation window, connect the RJ45 ② of the PD function detection board to the LAN port of the PC via a network cable and have the PC detect whether the PC network port LINK is normal. If the power indicator of the PD device under test is abnormal or the PC network port LINK is abnormal, output the PD device under test function abnormal result. If the power indicator of the PD device under test is continuously lit and the PC network port LINK is normal, output the PD device under test function normal result. In this embodiment, S6 is used to perform a linked verification of the continuous power-on state and data link state of the PD under test after the power-on establishment result is established, thereby determining whether the PD under test has both stable power-on capability and normal network port function. The basic principle is to first confirm the continuous power-on state after power-on establishment by the on / off change of the power indicator of the PD under test, and then, after connecting the RJ45② to the LAN port of the PC via the network cable, synchronously collect the power indicator state of the PD under test and the LINK state of the PC network port to construct a corresponding state sequence. Finally, based on whether the corresponding state after the first light-on moment remains that the power indicator is on and the PC network port LINK is connected, the result of normal function of the PD under test or abnormal function of the PD under test is output. This implementation process includes the following steps: In S6-1, the purpose is to confirm the power-on status of the PD (Device Under Test) after power-on establishment by observing the on / off status of the PD's power indicator light, and to determine the start time for subsequent linkage verification. During execution, the PD power-on establishment result output from S5 is used as the input. When the PD power-on establishment result is valid, the on / off status of the PD's power indicator light is continuously read. The reading cycle value is derived from a preset configuration and written when the test program starts to ensure consistent status acquisition at each reading time. When the PD power indicator light changes from off to on, Record this moment as the first light-on moment and write it into the current test record for S6-2 and S6-3 to read. Then continue to read the on / off status of the power light of the PD device under test. When the power light of the PD device under test remains lit from the first light-on moment, confirm that RJ45② has formed a data detection connection with the LAN port of the PC through the network cable, and enter the subsequent synchronization status acquisition process. If the power light of the PD device under test never turns from off to on, or turns off immediately after the first light-on moment, directly output the candidate status of the PD device under test as a functional abnormality and write it into the abnormal record area. In S6-2, the purpose is to jointly represent the power indicator status of the PD device under test (PD) and the PC network port LINK status within the same reading time, so as to form a corresponding state sequence that can be used for continuous judgment. During execution, the PD PD power indicator status after the first lighting moment and the PC network port LINK status returned by the PC in real time are used as input quantities. After the RJ45② is connected to the LAN port of the PC, the PD PD power indicator status and the PC network port LINK status are synchronously acquired once at each reading moment. After synchronous acquisition, the PD PD power indicator being on and the PC network port LINK being connected is recorded as the first corresponding state, the PD PD power indicator being on and the PC network port LINK being disconnected is recorded as the second corresponding state, and the PD PD power indicator being off and the PC network port LINK being disconnected is recorded as the third corresponding state. The connection of the network port LINK is recorded as the third corresponding state. The power indicator of the PD under test is off and the PC network port LINK is disconnected, which is recorded as the fourth corresponding state. The states corresponding to each reading time are written into the corresponding state sequence in chronological order for S6-3 to read. If the PC network port LINK state is not obtained at a certain reading time, the reading time is treated as the PC network port LINK being disconnected. If the power indicator of the PD under test is not obtained at a certain reading time, the reading time is treated as the power indicator of the PD under test being off. In practical applications, when the PD under test is powered on normally but the network port has not established a link, the state corresponding to the reading time is recorded as the second corresponding state. When the PD under test is powered off and the PC-side link is synchronously interrupted, the state corresponding to the reading time is recorded as the fourth corresponding state. In S6-3, the purpose is to output the final functional result of the PD under test based on the continuous maintenance of the corresponding state sequence after the first light-up moment, and to maintain the abnormal result until the end of the test after an anomaly occurs. During execution, the corresponding state sequence output by S6-2 and the first light-up moment recorded by S6-1 are used as inputs. The corresponding states are arranged according to the order of each reading moment, and the corresponding state of each reading moment is checked one by one starting from the first reading moment after the first light-up moment. When the corresponding state of each reading moment after the first light-up moment is the first corresponding state, the PD under test is output as a normal function result, and the normal function result of the PD under test is written to the test result area. When any reading moment... When the corresponding state changes to the second, third, or fourth corresponding state, the PD under test (PD) functional abnormality result is immediately output and written to the test result area and the abnormality record area. The method of retaining the abnormal result is determined by rule constraints. That is, once the PD under test is output as an abnormal result in the same test cycle, even if the first corresponding state reappears at a subsequent reading time, the test result will not be rewritten as the PD under test functional normal result, but will be retained as the PD under test functional abnormal result until the end of the test. If there is a missing state in the corresponding state sequence, the missing time will be treated as an abnormal time and the PD under test functional abnormality result will be output. Through the above implementation method, the first lighting moment is determined by the change of the power indicator light of the PD device under test from off to on. Then, under the condition of RJ45 ② and PC LAN port connection, the power indicator light status of the PD device under test and the PC network port LINK status are synchronously acquired to construct a corresponding state sequence. Whether the first corresponding state is maintained after the first lighting moment is used as the final judgment criterion. This incorporates the power-on stability and network port link status of the PD device under test into the same linkage verification process, reducing misjudgments caused by relying solely on the power indicator light or the PC network port LINK connection. In practical applications: after the PD device under test completes power-on establishment via RJ45 ①, the testing device continuously... Read the power indicator status of the PD device under test and record the first time the light turns on. Then, with the RJ45② connected to the PC's LAN port via a network cable, synchronously collect the power indicator status of the PD device under test and the PC's network port LINK status at a fixed reading cycle. If the power indicator remains on and the PC's network port LINK is connected at each reading time after the first time the light turns on, the PD device under test is considered to be functioning normally. If at any reading time the power indicator is on but the PC's network port LINK is disconnected, the power indicator is off but the PC's network port LINK is connected, or the power indicator is off and the PC's network port LINK is disconnected, the PD device under test is considered to be functioning abnormally and this result is maintained until the end of the test.

[0026] Furthermore, it also includes a device testing apparatus with PoE functionality, comprising: The type access module is used to obtain the device type information of the device under test. When the device under test is a PSE device under test, the WAN port of the PSE device under test is connected to the left RJ45 of the PSE function test board via a network cable. When the device under test is a PD device under test, the WAN port of the PD device under test is connected to the RJ45① of the PD function test board via a network cable to output the test connection status corresponding to the device type. The branch link module is used to input the signal connected to the left RJ45 to the transformer when the test connection status corresponds to the PSE device under test. The transformer separates the input signal into a power supply signal output through the tap and a data signal output through the data path. The power supply signal is sent to the protocol power supply to perform the protocol establishment judgment, and the data signal is sent to the data branch where the relay is located to form a data detection path to be released. The load establishment module is used to control the DC-DC converter to step down the protocol power supply output and supply power to the cement resistor and LED when the protocol power supply is successfully established. This enables the cement resistor to perform load maintenance detection on the PSE device under test and outputs the power supply establishment result based on the continuous illumination state of the LED within a preset observation period. The release judgment module is used to control the relay to connect the data detection path when the power supply establishment result indicates that the protocol establishment, output establishment and load maintenance are continuously satisfied. This allows the data signal to be input to the PC through the RJ45, network cable and LAN port on the right side. The PC then checks whether the PC network port LINK is normal. If the power supply establishment result is not established or the PC network port LINK is abnormal, the module outputs the PSE test device function abnormal result. If the power supply establishment result is established and the PC network port LINK is normal, the module outputs the PSE test device function normal result. The power-on module is used to provide DC power input from the DC port of the PD function detection board to the protocol power supply and transformer when the PD device under test is in the test connection state. The protocol power supply performs protocol judgment based on the power-on response of the PD device under test. After the protocol judgment is correct, power is supplied to the PD device under test through the transformer and RJ45① to output the power-on result of the PD device under test. The linkage verification module is used to connect the RJ45② of the PD function detection board to the LAN port of the PC via a network cable when the PD device under test is powered on and the power indicator of the PD device under test is continuously lit within the preset observation window. The PC then checks whether the PC network port LINK is normal. If the power indicator of the PD device under test is abnormal or the PC network port LINK is abnormal, the module outputs a result indicating that the PD device under test is functionally abnormal. If the power indicator of the PD device under test is continuously lit and the PC network port LINK is normal, the module outputs a result indicating that the PD device under test is functionally normal.

[0027] Working Principle: This solution first determines which test path the device under test (DUT) should enter, and then completes the functional testing with preceding and following constraints according to that path. For PSE DUTs, the PSE functional testing board is first connected via the left RJ45. The transformer splits the input signal into a power supply signal and a data signal. The protocol power supply first determines whether the protocol is established, and then the DC-DC converter, cement resistor, and LED confirm whether the DUT can continuously supply power under load. Only after the power supply is established is the relay allowed to connect the data detection path, so that the PC can continue to detect whether the PC network port LINK is normal. In this way, the power supply detection and link detection are constructed into an intelligent sensing system judgment process with preceding and following constraints, avoiding misjudgment caused by looking at only one result. For PD DUTs, the DC port and protocol power supply work together to complete the power receiving identification and protocol judgment. After the protocol judgment is correct, the transformer and RJ45① supply power to the PD DUT. Then, the power light status of the PD DUT and the PC network port LINK status are linked for verification, and finally the result of normal or abnormal function of the PD DUT is output. For example, in a factory shipment testing scenario, workers first connect the switch or terminal device under test to the corresponding testing board. If the device connected has PSE functionality, the testing board first determines whether the device has truly completed protocol establishment and can supply power under load. Only after the LED remains lit, indicating stable power supply, is the PC allowed to continue testing whether the network port is truly connected. This can identify devices that "can supply power for a short time but lose power after being loaded" or "have normal power supply but abnormal network port". If the device connected has PD functionality, the testing board first determines whether the device responds correctly to power reception. After confirming that it can receive power normally, it combines whether the device's power indicator remains lit and whether a link is established on the PC side to determine whether its function is complete. In this way, large testing instruments are not required on the production line, and it is possible to quickly distinguish whether a device has complete PoE capability.

[0028] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A device testing method with PoE functionality, characterized in that, include: S1. Obtain the device type information of the device under test. When the device under test is a PSE device under test, connect the WAN port of the PSE device under test to the left RJ45 of the PSE function test board via a network cable. When the device under test is a PD device under test, connect the WAN port of the PD device under test to the RJ45① of the PD function test board via a network cable to output the test connection status corresponding to the device type. S2. When testing the connection status corresponding to the PSE device under test, the signal input transformer connected to the left RJ45 is used to separate the input signal into a power supply signal output through the tap and a data signal output through the data path. The power supply signal is sent to the protocol power supply to perform the protocol establishment judgment, and the data signal is sent to the data branch where the relay is located to form a data detection path to be released. S3. When the protocol power supply is successfully established, control the DC-DC converter to step down the protocol power supply output and supply power to the cement resistor and LED, so that the cement resistor performs load sustaining detection on the PSE device under test, and outputs the power supply establishment result based on the continuous lighting state of the LED within the preset observation time. S4. When the power supply establishment result indicates that the protocol establishment, output establishment and load maintenance are continuously satisfied, the control relay connects the data detection path, so that the data signal is input to the PC through the right RJ45, network cable and LAN port, and the PC detects whether the PC network port LINK is normal. When the power supply establishment result is not established or the PC network port LINK is abnormal, the PSE test device function abnormal result is output. When the power supply establishment result is established and the PC network port LINK is normal, the PSE test device function normal result is output. S5. When the test connection status corresponds to the PD device under test, the DC port of the PD function detection board provides DC power input to the protocol power supply and the transformer. The protocol power supply performs protocol judgment based on the power-on response of the PD device under test. After the protocol judgment is correct, the power supply is supplied to the PD device under test through the transformer and RJ45① to output the power-on establishment result of the PD device under test. S6. When the PD device under test is powered on and the power indicator of the PD device under test is continuously lit within the preset observation window, connect the RJ45 ② of the PD function detection board to the LAN port of the PC via a network cable and have the PC detect whether the PC network port LINK is normal. If the power indicator of the PD device under test is abnormal or the PC network port LINK is abnormal, output the PD device under test function abnormal result. If the power indicator of the PD device under test is continuously lit and the PC network port LINK is normal, output the PD device under test function normal result.

2. The device testing method with PoE functionality according to claim 1, characterized in that: In S1, the device type information of the device under test is obtained, and the test connection status corresponding to the device type is output, including: S1-1. Obtain the test board identifier, access interface identifier, and access port identifier when the device under test is connected, and combine the test board identifier, access interface identifier, and access port identifier to generate the connection description information to be determined. S1-2. Match the connection description information to be determined with the connection rules corresponding to the preset type. The connection rules corresponding to the preset type include at least the left RJ45 of the PSE function detection board corresponding to the WAN port of the PSE device under test and the RJ45① of the PD function detection board corresponding to the WAN port of the PD device under test, so as to output the device type matching result. S1-3. When the device type matching result indicates that the match is successful, output the test connection status corresponding to the matched device type. When the device type matching result indicates that the match is unsuccessful, output the connection abnormal status and prohibit subsequent test processes from entering the protocol judgment.

3. The device testing method with PoE functionality according to claim 2, characterized in that: S2 includes: S2-1. Input the input signal connected to the left RJ45 to the transformer, and take out the power supply component as the power supply signal from the transformer tap, and take out the network data component as the data signal from the transformer data path. S2-2. Input the power supply signal into the protocol power supply, and the protocol power supply performs power acceptance identification on the power supply signal. If the power acceptance identification is successful, output the protocol establishment success signal. If the power acceptance identification is unsuccessful, output the protocol establishment failure signal. S2-3. Input the data signal into the data branch where the relay is located, and use the protocol establishment success signal as the relay connection control signal, so that the relay connects the data branch when it receives the protocol establishment success signal and keeps the data branch disconnected when it receives the protocol establishment failure signal, so as to form a data detection path to be released.

4. A device testing method with PoE functionality according to claim 3, characterized in that: S3 includes: S3-1. Input the protocol power supply output into the DC-DC converter, and output the stepped-down voltage from the DC-DC converter to the cement resistor and LED to form a load-bearing detection branch connected to the PSE device under test. S3-2. After the load test branch is formed, the PSE device under test is continuously powered to the cement resistor through the left RJ45, transformer, tap, protocol power supply and DC-DC converter, so that the cement resistor forms a load state for the PSE device under test.

5. A device testing method with PoE functionality according to claim 4, characterized in that: S3 further includes: S3-3. After the LED is connected to the load detection branch, obtain the starting time when the LED turns from off to on, and continuously read the on / off state of the LED from the starting time. S3-4. When the LED remains lit during continuous reading, output a valid power supply result; when the LED turns off during continuous reading, output a invalid power supply result.

6. A device testing method with PoE functionality according to claim 5, characterized in that: S4 includes: S4-1. After the power supply establishment result is output, input the power supply establishment result into the relay as the connection control quantity, so that the relay connects the data detection path, and the data signal output by the transformer is input into the PC through the right RJ45, network cable and LAN port. S4-2. After the relay is turned on, the power supply establishment result and PC network port LINK status are obtained synchronously at each reading time. The first joint state is recorded when the power supply establishment result is established and the PC network port LINK status is connected. The second joint state is recorded when the power supply establishment result is established and the PC network port LINK status is disconnected. The third joint state is recorded when the power supply establishment result is not established and the PC network port LINK status is connected. The fourth joint state is recorded when the power supply establishment result is not established and the PC network port LINK status is disconnected. S4-3. Arrange the joint states corresponding to each reading time in chronological order, and record the reading time as the effective start time of the link when the first joint state appears. If the first joint state does not appear before the effective start time of the link, output the PSE device under test function abnormality result.

7. A device testing method with PoE functionality according to claim 6, characterized in that: S4 further includes: S4-4. After the effective start time of the link, compare the joint state corresponding to the adjacent reading time one by one, and maintain the normal judgment when the joint state corresponding to the adjacent reading time is the first joint state. When the joint state corresponding to any reading time changes to the second joint state, the third joint state or the fourth joint state, record the reading time as the failure time and output the PSE device under test function abnormal result. S4-5. When the joint state corresponding to each reading time after the effective start time of the link remains in the first joint state, output the PSE device under test function normal result. After outputting the PSE device under test function abnormal result, keep the PSE device under test function abnormal result until the end of this test.

8. A device testing method with PoE functionality according to claim 7, characterized in that: S5 includes: S5-1. Input the DC power from the DC port into the protocol power supply and the transformer respectively, and send the power receiving identification signal to the PD device under test via RJ45① through the protocol power supply. At the same time, collect the power receiving response signal returned by the PD device under test. S5-2. Input the power-receiving response signal into the protocol power supply, and the protocol power supply will verify the corresponding power-receiving response signal according to the order of sending the power-receiving identification signal. When the power-receiving response signal and the power-receiving identification signal correspond to each other, the protocol will output a correct judgment signal. When the power-receiving response signal is missing, out of order, or does not correspond, the protocol will output an incorrect judgment signal. S5-3. After the output protocol judges the correct signal, the DC power input from the DC port is output to the PD device under test through the transformer and RJ45① to form a power supply path, and the power receiving status of the PD device under test after the power supply path is established is recorded as the power receiving establishment result of the PD device under test.

9. A device testing method with PoE functionality according to claim 8, characterized in that: S6 includes: S6-1. After the PD device under test is powered on, continuously read the on / off status of the PD device under test power light, and record the first time the PD device under test power light turns on when it turns off. When the PD device under test power light remains on from the first time it turns on, connect RJ45② to the LAN port of the PC via a network cable. S6-2. After connecting RJ45② to the LAN port of the PC, the power light status of the PD device under test and the LINK status of the PC network port are synchronously acquired at each reading time. The first corresponding state is when the power light of the PD device under test is on and the PC network port LINK is connected. The second corresponding state is when the power light of the PD device under test is on and the PC network port LINK is disconnected. The third corresponding state is when the power light of the PD device under test is off and the PC network port LINK is connected. The fourth corresponding state is when the power light of the PD device under test is off and the PC network port LINK is disconnected. S6-3. Arrange the corresponding states according to the order of each reading time, and output the PD device under test function normally when the corresponding state of each reading time is the first corresponding state after the first light-up time. When the corresponding state changes to the second, third or fourth corresponding state at any reading time, output the PD device under test function abnormal result and keep the PD device under test function abnormal result until the end of this test.

10. A device testing apparatus with PoE functionality, comprising a device testing method with PoE functionality according to claim 1, characterized in that, include: The type access module is used to obtain the device type information of the device under test. When the device under test is a PSE device under test, the WAN port of the PSE device under test is connected to the left RJ45 of the PSE function test board via a network cable. When the device under test is a PD device under test, the WAN port of the PD device under test is connected to the RJ45① of the PD function test board via a network cable to output the test connection status corresponding to the device type. The branch link module is used to input the signal connected to the left RJ45 to the transformer when the test connection status corresponds to the PSE device under test. The transformer separates the input signal into a power supply signal output through the tap and a data signal output through the data path. The power supply signal is sent to the protocol power supply to perform the protocol establishment judgment, and the data signal is sent to the data branch where the relay is located to form a data detection path to be released. The load establishment module is used to control the DC-DC converter to step down the protocol power supply output and supply power to the cement resistor and LED when the protocol power supply is successfully established. This enables the cement resistor to perform load maintenance detection on the PSE device under test and outputs the power supply establishment result based on the continuous illumination state of the LED within a preset observation period. The release judgment module is used to control the relay to connect the data detection path when the power supply establishment result indicates that the protocol establishment, output establishment and load maintenance are continuously satisfied. This allows the data signal to be input to the PC through the RJ45, network cable and LAN port on the right side. The PC then checks whether the PC network port LINK is normal. If the power supply establishment result is not established or the PC network port LINK is abnormal, the module outputs the PSE test device function abnormal result. If the power supply establishment result is established and the PC network port LINK is normal, the module outputs the PSE test device function normal result. The power-on module is used to provide DC power input from the DC port of the PD function detection board to the protocol power supply and transformer when the PD device under test is in the test connection state. The protocol power supply performs protocol judgment based on the power-on response of the PD device under test. After the protocol judgment is correct, power is supplied to the PD device under test through the transformer and RJ45① to output the power-on result of the PD device under test. The linkage verification module is used to connect the RJ45② of the PD function detection board to the LAN port of the PC via a network cable when the PD device under test is powered on and the PD device under test power light is continuously lit within the preset observation window. The PC then checks whether the PC network port LINK is normal. If the PD device under test power light is abnormal or the PC network port LINK is abnormal, the module outputs a PD device under test function abnormal result. If the PD device under test power light is continuously lit and the PC network port LINK is normal, the module outputs a PD device under test function normal result.

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