A subway vehicle-mounted multi-bus protocol conversion simulation test method and device

Abstract

The present application belongs to the field of rail transit vehicle communication test, and particularly relates to a subway vehicle multi-bus protocol conversion simulation test method and device. It aims to solve the problems of inconsistent message time limit in multi-bus protocol conversion, easy mixing of online mapping rule switching, and separation of fault injection and real conversion path. The present application includes: receiving multi-function vehicle bus, controller area network bus or differential serial bus messages, extracting source object address and payload generation object identifier and data record, performing time window verification, quality attenuation and prediction compensation in the deterministic scheduling window, completing field extraction, bit segment positioning, type conversion, enumeration mapping or scaling offset calculation according to the mapping version query active mapping table, and forming target messages and test logs through target shadow cache, bit domain latch submission, mirror mapping table switching and fault injection judgment. The present application can realize multi-bus data conversion, configuration switching and test evidence association and tracing.

Description

Technical Field

[0001] This invention belongs to the field of rail transit vehicle-mounted communication testing technology, specifically relating to a simulation testing method and device for multi-bus protocol conversion in subway vehicles. Background Technology

[0002] Subway train onboard communication systems typically require the exchange of process data between the train network control system, broadcast control unit, door control equipment, recording equipment, and other onboard devices. Multi-function vehicle buses are commonly used for train-level or vehicle-level process data communication, while some devices under test or being tested often use controller area network (CLAN) buses, differential serial buses, or register-level communication methods for local data exchange. Because different buses have different message structures, refresh cycles, data field locations, validity period determination methods, and anomaly response mechanisms, relying solely on a single protocol device or a common protocol gateway during onboard joint commissioning and testing can easily lead to problems such as fragmented interfaces, cumbersome configuration switching, mixing of old and new data states, and difficulty in reproducing fault test results.

[0003] Existing protocol conversion devices typically focus on converting one type of bus message into another. Their conversion process primarily deals with raw byte streams, lacking a unified data record for multiple bus objects. For the sampling time, allowed release time, expiration deadline, quality level, and mapped version of the source message, existing solutions often fail to manage them in a closed loop within the same record. This leads to situations where, when different bus cycles are inconsistent, the target bus side may receive outdated data, partially updated data, or inconsistent version data.

[0004] Furthermore, subway onboard testing requires frequent switching of mapping rules, constructing fault scenarios such as timeouts, delays, drops, and illegal fields, and correlating output packets, quality migration, and log evidence for judgment. Conventional testing methods often rely on external instruments for fault injection, separating fault traffic from the actual protocol conversion path, which can easily lead to inconsistencies between test conclusions and the actual operating path. Directly replacing mapping rules during configuration changes may also result in a mix of old and new rules in the task queue, shadow cache, and target packets, leading to transient mistransmissions, loop propagation, or old version cache pollution.

[0005] Therefore, a protocol conversion simulation test method and device suitable for metro vehicle multi-bus environment is needed to enable multi-functional vehicle bus, controller area network bus and differential serial bus messages to form a closed loop processing between unified data objects, deterministic scheduling windows, mapping versions, quality degradation, prediction compensation, shadow buffer, mirror mapping table and fault injection scenarios. Summary of the Invention

[0006] To address the aforementioned problems in existing technologies, namely inconsistencies in message timeliness during multi-bus protocol conversion, partial updates to target fields, potential version mixing due to online changes to mapping tables, separation of fault injection from the actual conversion path, and difficulty in associating and tracing test results, this invention provides a simulation test method and apparatus for multi-bus protocol conversion on a subway vehicle.

[0007] In a first aspect, this invention proposes a simulation and testing method for multi-bus protocol conversion in subway vehicles, comprising:

[0008] Receive messages from multi-function vehicle bus, controller area network bus or differential serial bus, extract source bus, source object address and payload, combine source bus and source object address to generate object identifier, parse payload to obtain engineering value, and write object identifier, raw data, engineering value, quality level, sampling time stamp, allowed release time stamp, expiration deadline time stamp and mapping version into the same data record; Within the deterministic scheduling window, time window verification is performed based on the allowed release timescale and the expiration deadline timescale, and quality degradation is determined based on the sampling timescale and quality level. Predicted compensation values ​​are generated for data records that are not updated in the window and meet the change constraints. Based on the mapping version, query the activity mapping table, and perform field extraction, bit segment positioning, type conversion, enumeration mapping or scaling offset calculation on the data records that pass the time window verification to obtain the target field value; In the publishing window, the target field value is written to the target shadow cache and bit field latch commit is performed to form the target message; when the mapping table changes, the new mapping rule is verified in the mirror mapping table area, and then the active mapping table pointer is switched at the scheduling boundary and the old version cache is cleared. Perform fault injection determination within the same conversion path, and output target messages, quality migration records, and test logs according to the test scenario identifier.

[0009] Furthermore, the source bus, source object address, and payload are extracted, including: After the message passes the bus verification, the source bus is determined according to the physical interface into which the message enters; the multi-function vehicle bus port number, controller area network message identifier or differential serial bus register address is written as the source object address; According to the mapping entry in the activity mapping table that matches the object identifier, truncate bit segments from the message valid data area according to the source byte offset, source bit offset, and bit length; write the truncated bit segments as the payload for parsing the engineering values.

[0010] Furthermore, the object identifier, raw data, engineering value, quality level, sampling timescale, allowed release timescale, expiration deadline timescale, and mapped version are written into the same data record, including: Write the time when message sampling is completed into the sampling time stamp; When multi-source aggregation is not required, the sampling time stamp or the starting boundary of the corresponding transformation window is written to the allowed publication time stamp. When multi-source aggregation is required, the completion time of multi-source aggregation is written to the allowed publication time stamp. Read the timeout threshold that matches the object identifier from the activity mapping table, and add the sampling time stamp to the timeout threshold to form the failure cutoff time stamp; Write the mapping version, project value, and initial quality level to the same data record.

[0011] Furthermore, within the deterministic scheduling window, time window verification is performed based on the allowed release timescale and the expiration deadline timescale, including: A hardware timer generates window boundary signals, and the acquisition window, conversion window, publishing window, and monitoring window are opened according to the window boundary signals. The acquisition window only receives bus messages and writes them to the input queue; the conversion window only establishes or updates data records and performs mapping lookups; the publishing window only submits target messages or register responses; and the monitoring window only updates heartbeat, window record, and log. When a task is scheduled in a non-matching window, the pending messages are retained in the corresponding window.

[0012] Furthermore, based on the sampling timescale and quality level, a quality degradation determination is performed, and predicted compensation values ​​are generated for data records that are not updated within the window and meet the change constraints, including: When the system time is earlier than the allowed publication time stamp, data records are prohibited from entering the mapping lookup; When the system is between the allowed release time and the expiration deadline and no new data is received, the quality decay factor is reduced by the duration of the unupdated period. When the system time exceeds the failure deadline, the quality level is rewritten to the timeout level, and the default value, conversion request is discarded, or the previous value is retained according to the mapping item rollback action. When adjacent historical project values ​​meet the smoothing constraint, a predicted compensation value is formed based on the difference between adjacent historical project values ​​and the compensation coefficient, and the quality level is rewritten as the old value level.

[0013] Furthermore, based on the mapping version, the activity mapping table is queried, and field extraction, bit segment positioning, type conversion, enumeration mapping, or scaling offset calculation are performed on the data records that pass the time window verification, including: Find the mapping item by source bus, object identifier, mapping version, and update direction; Extract the fields to be converted according to the source byte offset, source bit offset and bit length recorded in the mapping item, reassemble the field values ​​according to the byte order, and form the target field value according to the data type, enumeration table, scaling factor and offset; When multiple data records hit the same target object, arbitration is performed based on the priority of the mapping item, the sampling time stamp, and the loading order of the mapping table, and the arbitrated target field value is written to the corresponding target shadow cache.

[0014] Furthermore, the arbitrated target field value is written to the corresponding target shadow cache, including: Read the current value of the target shadow cache, only rewrite the target byte or target bit field overwritten by the target field value, and synchronously update the write mask; Record the source priority, object identifier, and window boundaries corresponding to each target bit field; The submission condition is that the target bit fields corresponding to the hit mapping items within the same publishing window have been written and the corresponding write mask has been set. When the submission conditions are met or the window ends and there is no higher priority source covering the data, the synthesized complete target data area is submitted as a target message all at once.

[0015] Furthermore, when the mapping table changes, after verifying the new mapping rules in the mirror mapping table area, the active mapping table pointer is switched at the scheduling boundary and the old version cache is cleared, including: Write the new mapping rules into the mirror mapping table area, and verify the source address, target address, field length, target bit field overlap, source-target closed loop, time window constraint and enumeration mapping completeness, and generate digest code and new version stamp; After the verification is successful and the configuration switching window is entered, newly arrived bus messages that have not yet been converted are temporarily stored in the switching cache queue. Replace the activity mapping table pointer at the predetermined scheduling boundary; after the switch is completed, re-inject the temporary messages in the order of sampling timestamp or message timestamp, and perform discard, remapping or rollback processing on cached messages with inconsistent versions.

[0016] Furthermore, fault injection determination is performed within the same conversion path, including: The test scenario fingerprint is generated based on the scenario configuration, involved bus, activity mapping version, injection template, and expected response template, and written to the corresponding data record, fault injection event, and log record. In protocol conversion, message encapsulation, sending request or port refresh processing, perform delayed sending, discard sending request, write illegal request field, stop port refresh or rewrite response frame verification field; The scenario outcome is determined by the correlation between response latency, quality level migration, rollback actions, and recovery events. When the target bus points to the original source bus, the object identifier and the mapping version are the same, and the backpropagation layer number is zero, discard the conversion request and record the loop closure suppression event.

[0017] In a second aspect, the present invention proposes a subway vehicle-mounted multi-bus protocol conversion simulation test device, comprising a main control processing unit, a multi-functional vehicle bus communication interface unit, a controller local area network bus communication interface unit, a differential serial bus communication interface unit, a human-machine interaction unit, a power supply and electrical isolation unit, and a storage unit. The multi-functional vehicle bus communication interface unit includes a communication board and redundant channel connection interfaces. The communication board is connected to the main control processing unit through a parallel data bus, an address bus, and a read / write control line, and is configured with a source port and a destination port. The controller local area network bus communication interface unit and the differential serial bus communication interface unit are respectively connected to the main control processing unit; The main control processing unit is equipped with a multi-functional vehicle bus port shadow buffer area, a controller area network transmission frame buffer area, a differential serial bus register buffer area, an active mapping table area, a mirror mapping table area, a switching buffer queue and a log buffer area, and is connected to a hardware timer to schedule bus acquisition, protocol mapping, target message publishing and status monitoring according to window boundaries. The human-machine interaction unit is used to input bus parameters, mapping rules, fault injection modes and test scenarios. The power supply and electrical isolation unit is used to supply power and isolate the bus side from the master control side. The storage unit is used to save the mapping table, configuration data and test logs.

[0018] The beneficial effects of this invention are: This invention writes the source bus, source object address, payload, engineering value, quality level, sampling time stamp, allowed release time stamp, expiration deadline time stamp, and mapping version into the same data record. This ensures that data from different bus sources is no longer simply forwarded as raw byte streams, but rather forms a unified record with timing, quality, and version constraints upon entering the conversion process. Since subsequent mapping, quality degradation, rollback actions, and log tracking are all based on this same data record, it reduces data timeliness ambiguity caused by inconsistencies in multi-bus cycles.

[0019] This invention separates data acquisition, conversion, distribution, and monitoring through a deterministic scheduling window, and uses a hardware timer to generate window boundary signals. This ensures that the states of multi-functional vehicle bus port polling, controller area network message processing, differential serial bus response encapsulation, and protocol mapping do not overwrite each other at any given time. Because tasks retain pending messages when scheduled in non-matching windows, it reduces queue congestion, target buffer intermediate states, and uncertainty in window processing caused by asynchronous burst messages.

[0020] This invention allows the target bus output to distinguish between normal values, old values, timeout values, and predicted compensation values ​​by allowing the release time stamp, failure deadline time stamp, quality level, and quality decay factor to jointly constrain whether data records participate in mapping. For data records that are not updated in the window but whose change trend meets the smoothing constraint, a one-time predicted compensation value is formed by the difference between adjacent historical engineering values ​​and the compensation coefficient. This maintains the continuity of the target bus output without mistaking timeout data for normal data, and the quality level is used for testing and identification.

[0021] This invention generates target field values ​​by using field offsets, bit offsets, bit lengths, data types, byte order, enumeration tables, scaling factors, and offsets in the active mapping table. This ensures that field conversion between multi-function vehicle buses, controller area network buses, and differential serial buses has clear inputs, criteria, and outputs. When multiple data records hit the same target object, arbitration is performed based on mapping item priority, sampling timescale, and mapping table loading order, ensuring a defined overlay order when multiple sources write to the same target object.

[0022] This invention utilizes a target shadow cache and bit field latch commit mechanism to only rewrite the target byte or target bit field covered by the target field value, and determines the commit condition based on the write mask within the same publishing window. Since the complete target data area is committed all at once when the commit condition is met or the window ends and there is no higher-priority source covering it, it avoids the intermediate state where some fields of the target message are updated and others are not due to asynchronous updates from multiple sources.

[0023] This invention performs source address, target address, field length, target bit field overlap, source-target closed loop, time window constraints, and enumeration mapping completeness checks on new mapping rules through a mirrored mapping table area. Then, it switches the active mapping table pointer at the scheduling boundary and clears the old version cache, ensuring that configuration changes do not directly interrupt the current conversion cycle. For bus messages temporarily stored during the switching period, they are re-injected according to the sampling timestamp or message timestamp order, and cached messages with inconsistent versions are discarded, remapped, or rolled back. This effectively suppresses mis-sending caused by mixing new and old mapping rules and old version cache pollution.

[0024] This invention performs fault injection judgment within the same conversion path, ensuring that delayed transmission, dropped transmission requests, illegal request field writing, and port refresh stop or allow rewriting of response frame verification fields all occur during protocol conversion, packet encapsulation, transmission request, or port refresh processing. Because the test scenario fingerprint is simultaneously written to data records, fault injection events, and log records, the output target packet, quality migration record, and test log can be associated with the same scenario identifier, thereby improving the consistency and traceability of fault test results with the actual conversion path.

[0025] This invention determines whether the target bus points to the original source bus, whether the object identifier and the mapping version are the same, and whether the number of back propagation layers is zero by using loopback suppression events. When the conditions are met, the conversion request is discarded and the event is recorded, which can reduce the risk of packet loopback propagation in bidirectional mapping or multi-level forwarding scenarios.

[0026] The device of this invention integrates a multi-functional vehicle bus communication interface unit, a controller area network bus communication interface unit, a differential serial bus communication interface unit, a human-machine interaction unit, a power supply and electrical isolation unit, and a storage unit on the same main control processing platform. The main control processing unit is configured with multiple types of shadow cache, active mapping table area, mirror mapping table area, switching cache queue, and log cache area. It can complete multi-bus protocol conversion, online mapping rule change, fault injection, quality migration record, and test log storage on a unified hardware platform, reducing the connection complexity and test process switching cost caused by the parallel use of multiple single-protocol devices in the subway onboard commissioning scenario. Attached Figure Description

[0027] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings: Figure 1 This is the main flowchart of a simulation test method for multi-bus protocol conversion in a subway vehicle according to the present invention; Figure 2 This is a flowchart of time window verification and quality compensation in a simulation test method for multi-bus protocol conversion in a subway vehicle according to the present invention; Figure 3 This is a flowchart of configuration switching and test judgment in a simulation test method for multi-bus protocol conversion in a subway vehicle according to the present invention.

[0028] Figure 4 This is an architecture diagram of a subway vehicle-mounted multi-bus protocol conversion simulation test device according to the present invention. Detailed Implementation

[0029] The present application will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the invention. Furthermore, it should be noted that, for ease of description, only the parts relevant to the invention are shown in the accompanying drawings.

[0030] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0031] The first embodiment of this invention proposes a simulation test method for multi-bus protocol conversion in subway vehicles, comprising the following steps: S10: Receives messages from the multi-function vehicle bus, controller area network bus, or differential serial bus, extracts the source bus, source object address, and payload, combines the source bus and source object address to generate an object identifier, parses the payload to obtain the engineering value, and writes the object identifier, raw data, engineering value, quality level, sampling time stamp, allowed release time stamp, expiration deadline time stamp, and mapping version into the same data record; S20: Within the deterministic scheduling window, perform time window verification based on the allowed release timescale and the expiration deadline timescale, perform quality decay determination based on the sampling timescale and quality level, and generate predicted compensation values ​​for data records that are not updated in the window and meet the change constraints. S30: Query the activity mapping table based on the mapping version, and perform field extraction, bit segment positioning, type conversion, enumeration mapping or scaling offset calculation on the data records that have passed the time window verification to obtain the target field value; S40: Write the target field value to the target shadow cache in the publish window and perform bit field latch commit to form the target message; S50: When the mapping table changes, after verifying the new mapping rules in the mirror mapping table area, switch the active mapping table pointer at the scheduling boundary and clear the old version cache; S60: Perform fault injection judgment within the same conversion path, and output target messages, quality migration records and test logs according to the test scenario identifier.

[0032] To more clearly illustrate the simulation and testing method for multi-bus protocol conversion in a subway vehicle according to the present invention, the following is a detailed explanation. Figure 1 The steps in the embodiments of the present invention are described in detail below: S10: Receives messages from the multi-function vehicle bus, controller area network bus, or differential serial bus, extracts the source bus, source object address, and payload, combines the source bus and source object address to generate an object identifier, parses the payload to obtain the engineering value, and writes the object identifier, raw data, engineering value, quality level, sampling time stamp, allowed release time stamp, expiration deadline time stamp, and mapping version into the same data record.

[0033] In this embodiment, step S10 includes: Step S11: After the message passes the bus verification, determine the source bus according to the physical interface into which the message enters.

[0034] Step S12: Write the multi-function vehicle bus port number, controller area network message identifier, or differential serial bus register address as the source object address.

[0035] Step S13: According to the mapping entry matching the object identifier in the activity mapping table, extract bit segments from the message valid data area according to the source byte offset, source bit offset and bit length, and write the extracted bit segments as the payload for parsing the engineering value.

[0036] Step S14: Write the message sampling completion time into the sampling time stamp.

[0037] Step S15: When multi-source aggregation is not required, write the sampling time stamp or the starting boundary of the corresponding transformation window into the allowed publication time stamp. When multi-source aggregation is required, write the completion time of multi-source aggregation into the allowed publication time stamp.

[0038] Step S16: Read the timeout threshold that matches the object identifier from the activity mapping table, and add the sampling time stamp to the timeout threshold to form the failure cutoff time stamp.

[0039] Step S17: Write the mapping version, project value, and initial quality level into the same data record.

[0040] During step S10, the main control processing unit first obtains the original messages from the multi-function vehicle bus communication interface, the controller area network bus communication interface, and the differential serial bus communication interface, respectively. For multi-function vehicle bus messages, after reading the data at the destination port and passing the link layer verification, the interface unit writes the port number, the original byte stream of the port data area, the reading completion time, and the channel identifier into the receive buffer. For controller area network bus messages, when there are valid messages in the receive first-in-first-out buffer, the interface unit reads the message identifier, frame type, data length, and data area. For differential serial bus messages, after detecting that the frame interval meets the frame end condition and the cyclic redundancy check passes, the interface unit reads the slave address, function code, register address, and register data. For differential serial bus messages, the frame interval meeting the frame end condition specifically means that a frame end criterion is not less than 3.5 character times, and the character time is calculated from the current serial port baud rate, data bits, parity bits, and stop bit parameters. Therefore, the physical interface into which the message enters is used to determine the source bus, and the port number, message identifier, or register address is used to determine the source object address.

[0041] The object identifier is obtained by concatenating the source bus and source object address using fixed fields. For example, the source bus code occupies the high-order field, and the source object address occupies the low-order field. When the source bus is a multi-function vehicle bus and the source object address is port 0x01, the generated object identifier uniquely points to the process data under that port. When the source bus is a controller area network bus and the source object address is message identifier 0x181, the generated object identifier points to the data area of ​​that message. When the source bus is a differential serial bus and the source object address is register 0x1000, the generated object identifier points to the data in that register. After the object identifier is generated, the conversion task queries the active mapping table to see if a corresponding mapping entry exists. If a mapping entry exists, a bit segment is truncated from the original data area according to the source byte offset, source bit offset, and bit length. If the source field spans multiple bytes, the relevant bytes are first reassembled according to the byte order recorded in the mapping entry, and then the reassembled result is subjected to shift and mask operations to obtain the payload used to parse the engineering values. If the message verification fails, the data length is less than the required length of the mapping item, or the bit range is out of bounds, the message will not generate a normal data record, but will generate an invalid quality level abnormal record or be directly discarded, and the source bus, source object address and abnormal reason will be recorded in the log buffer.

[0042] The engineering value is formed by the payload, data type, byte order, scaling factor, and offset. For literal fields, the payload can be directly used as the engineering value; for scaling fields, the engineering value can be formed as "engineering value = original field value × scaling factor + offset"; for enumeration fields, the engineering value is converted from the original code to the target code or status code by the enumeration mapping table. Data records use a unified structure to store object identifier, source bus, source object address, original data, engineering value, quality level, sampling timestamp, allowed publication timestamp, expiration deadline timestamp, and mapping version. The sampling timestamp comes from the hardware timer or system clock count value. For the multi-function vehicle bus, it is based on the time when the data is read into the buffer at the destination port. For the controller area network bus, it is based on the time when the receive interrupt is triggered or the controller timestamp. For the differential serial bus, it is based on the time when the complete message verification passes. The initial quality level is written as normal when the message passes verification and the field is successfully parsed; it is written as invalid when the receive buffer overflows, verification fails, or the field range is invalid. The mapping version is taken from the version of the currently active mapping table, enabling subsequent steps to identify under which rules the record was generated.

[0043] The data record also includes a loopback suppression flag, which includes at least a source bus, a target bus, an object identifier, a mapping version, and a backpropagation layer number, with the initial value of the backpropagation layer number set to 1. When a conversion task generates a target field value and prepares to send it to the target bus, it writes the source bus from the current data record into the source bus field of the loopback suppression flag, writes the target bus into the target bus field, and keeps the object identifier and mapping version unchanged. When a subsequent conversion task detects that the target bus, object identifier, and mapping version of a conversion request are consistent with the source bus, object identifier, and mapping version recorded in the loopback suppression flag, and the backpropagation layer number has been reduced to zero, it discards the conversion request and records a loopback suppression event.

[0044] S20: Within the deterministic scheduling window, perform time window verification based on the allowed release timescale and the expiration deadline timescale, perform quality degradation determination based on the sampling timescale and quality level, and generate predicted compensation values ​​for data records that are not updated in the window and meet the change constraints.

[0045] In this embodiment, step S20 includes: Step S21: A window boundary signal is generated by a hardware timer, and the acquisition window, conversion window, publishing window and monitoring window are opened according to the window boundary signal.

[0046] In step S22, the acquisition window only receives bus messages and writes them to the input queue, the conversion window only establishes or updates data records and performs mapping lookups, the publishing window only submits target messages or register responses, and the monitoring window only updates heartbeat, super window records, and logs.

[0047] Step S23: When a task is scheduled in a non-matching window, the message to be processed is retained in the corresponding window.

[0048] Step S24: When the system time is earlier than the allowed publication time stamp, data records are prohibited from entering the mapping lookup.

[0049] Step S25: When the system time is between the allowed release time and the expiration deadline and no new data is received, reduce the quality decay factor by the duration of no update.

[0050] Step S26: When the system time exceeds the failure deadline, the quality level is rewritten to the timeout level, and the default value, conversion request is discarded, or the previous value is retained according to the mapping item rollback action.

[0051] Step S27: When adjacent historical project values ​​meet the smoothing constraint, a predicted compensation value is formed based on the difference between adjacent historical project values ​​and the compensation coefficient, and the quality level is rewritten as the old value level.

[0052] like Figure 2As shown, during step S20, the main control processing unit uses a hardware timer to form a deterministic scheduling window. Preferably, a period is divided into an acquisition window, a conversion window, a publishing window, and a monitoring window, using 1ms as the basic time base. The acquisition window is used for polling the multi-function vehicle bus port, extracting data from the Controller Area Network (CAN) receive queue, and determining the completion of differential serial bus frames; the conversion window is used for extracting messages from the input queue, establishing or updating data records, performing time window verification, and looking up the active mapping table; the publishing window is used for submitting CAN transmit messages, the multi-function vehicle bus target port data area, and differential serial bus response frames; the monitoring window is used for task heartbeat, window overrun statistics, fault recording, and log writing to disk. The hardware timer only updates the window state and releases the corresponding semaphore at each window boundary, without performing message parsing or mapping calculations in the interrupt service routine, to reduce window boundary jitter. If a multi-function vehicle bus task is scheduled in the conversion window, the task will not perform port polling, but will retain the pending port group to the next acquisition window; if a protocol conversion task is awakened in the acquisition window or the publishing window, the input message will be kept in the queue or the processing breakpoint will be recorded, waiting for the conversion window to continue processing.

[0053] The time window verification is based on the allowed publication timescale and the expiration deadline timescale. If the current system time is earlier than the allowed publication timescale, it indicates that the data may still be in the multi-source aggregation waiting or window alignment stage, and the conversion task should not send this data record into the mapping lookup. If the current system time is between the allowed publication timescale and the expiration deadline timescale, and if the object has not received a new message but the historical data is still before the valid deadline, it is allowed to determine whether to continue using it based on the quality level and quality decay factor. The quality decay factor is initially 1; in the periodic check that has not been updated but has not yet timed out, the quality decay factor is updated according to "new quality decay factor = larger value {0, previous quality decay factor - unupdated check interval ÷ validity period length × decay coefficient}". The validity period length is the expiration deadline timescale minus the sampling timescale, and the decay coefficient can be given by the mapping item or system parameters. In this embodiment, 0.5 can be used as an example value. The quality decay factor is written to the quality migration record for subsequent fault injection judgment and test log traceability.

[0054] The smoothing constraint is that the absolute value of the difference between two adjacent historical engineering values ​​does not exceed the maximum change rate threshold preset in the mapping item. If the mapping item is not configured with this threshold, 20% of the previous engineering value is used by default as the maximum allowable change. When the current system time exceeds the expiration deadline, the data record will no longer be used as normal input for mapping, and the quality level will be rewritten as the timeout level. The conversion task reads the rollback action in the mapping item: when the rollback action is the default value output, the default value recorded in the mapping item is written into the subsequent target field; when the rollback action is to discard the conversion request, no target field value is generated; when the rollback action is to retain the previous value, the previously committed value in the target shadow cache is used and the reason for retention is recorded. For periodic engineering values, if the current window is not updated but the two most recent historical engineering values ​​exist and the difference between them does not exceed the smoothing constraint configured in the mapping item, a predicted compensation value is generated. The predicted compensation value is formed according to "predicted compensation value = previous historical engineering value + compensation coefficient × (previous historical engineering value - the previous historical engineering value)", where the compensation coefficient is preset according to the data category, and in this embodiment, it can be 0.5. The predicted compensation output can only be used within the upper limit of the number of times defined in the mapping item. After use, the quality level will be rewritten to the old value level, and the prediction reason, compensation coefficient, historical engineering values ​​involved in the calculation and output window will be written into the quality migration record.

[0055] S30: Query the activity mapping table based on the mapping version, and perform field extraction, bit segment positioning, type conversion, enumeration mapping or scaling offset calculation on the data records that have passed the time window verification to obtain the target field value.

[0056] In this embodiment, step S30 includes: Step S31: Locate the mapping item by source bus, object identifier, mapping version, and update direction.

[0057] Step S32: Extract the field to be converted according to the source byte offset, source bit offset and bit length recorded in the mapping item, reorganize the field value according to the byte order, and form the target field value according to the data type, enumeration table, scaling factor and offset.

[0058] Step S33: When multiple data records hit the same target object, arbitration is carried out according to the priority of the mapping item, the sampling time stamp and the loading order of the mapping table, and the arbitrated target field value is written to the corresponding target shadow cache.

[0059] During step S30, each mapping entry in the active mapping table stores the source bus, source object identifier, source byte offset, source bit offset, bit length, target bus, target object identifier, target byte offset, target bit offset, data type, byte order, enumerated mapping table, scaling factor, offset, update direction, priority, timeout threshold, rollback action, and default value. The transformation task reads the mapping version from the data record and performs a lookup only if the mapping version matches the version in the active mapping table; if the versions do not match, the old version caching strategy is used to discard, remap, or rollback the data. During the lookup, the source bus, object identifier, and update direction are compared simultaneously to prevent the same source object from misusing mapping rules in both forward and reverse transformations.

[0060] Field extraction targets the original data area. If the mapping item records a source byte offset of 1, a source bit offset of 0, and a bit length of 16, the conversion task takes the first and second bytes of the original data area and reassembles them into the original field value according to the mapping item's byte order. If the bit length is less than 1 byte or crosses the target byte boundary, all bytes within the coverage area are extracted first, and then the target bit segment is obtained through right shift and masking. After the field value is formed, the conversion task converts it to an unsigned integer, signed integer, status enumeration, or Boolean value according to the data type. For scaled fields, the target field value is formed according to "target field value = original field value × scaling factor + offset". For enumerated fields, the conversion task searches for the target code corresponding to the original code in the enumeration mapping table. If the search fails, the default code is output according to the mapping item's abnormal action or the conversion is discarded. For example, the first and second bytes of the multi-function vehicle bus source port 0x01 can represent the original speed value. If the scaling factor is 0.1 and the offset is 0, the engineering value corresponding to the original field value 320 is 32.0 km / h. The lower 4 bits of the differential serial bus register 0x1001 can represent the door status code. The enumeration mapping table can map 0 to the closed state, 1 to the open state, and 2 to the fault state.

[0061] When multiple data records hit the same target object, the main control processing unit does not directly overwrite the target data area, but first performs arbitration. The arbitration order is as follows: first, compare the priority of the mapping items, with the target field value having higher priority; if the priorities are the same, compare the sampling timestamps, with the target field value having a newer sampling timestamp having priority; if the sampling timestamps are still the same, follow the loading order of the mapping table, with the earlier loading order having priority. The arbitration result includes the target object identifier, target byte offset, target bit offset, bit length, target field value, source priority, source object identifier, sampling timestamp, and mapping version. This arbitration result is written to the corresponding target shadow cache for the publish window to perform bit field latch commit.

[0062] S40: Write the target field value to the target shadow cache in the publishing window and perform bit field latch commit to form the target message.

[0063] In this embodiment, step S40 includes: Step S41: Read the current value of the target shadow cache, only rewrite the target byte or target bit field covered by the target field value, and synchronously update the write mask.

[0064] Step S42: Record the source priority, object identifier, and window boundary corresponding to each target bit field.

[0065] Step S43, the submission condition is that the target bit fields corresponding to the hit mapping items within the same publishing window have been written and the corresponding write mask has been set.

[0066] Step S44: When the submission conditions are met or the window ends and there is no higher priority source covering the data, the synthesized complete target data area is submitted as the target message in one go.

[0067] During step S40, the target shadow buffer includes a multi-function vehicle bus port shadow buffer, a controller area network (CAN) transmit frame buffer, and a differential serial bus register buffer. When the conversion task writes the target field value to the shadow buffer, it first reads the current value of the target buffer, then forms a target mask based on the target byte offset, target bit offset, and bit length, and only reads, modifies, and writes the bytes or bit segments covered by the mask. For target bit segments not covered by the current target field value, the original value of the shadow buffer remains unchanged. After writing is complete, the system synchronously updates the write mask, source priority, object identifier, sampling timestamp, window boundary, and mapping version. Thus, even if data from multiple sources arrives asynchronously, the intermediate state with only partial field updates will not be exposed in the target message.

[0068] Bit-field latch commit is used in multi-source aggregation scenarios. Taking the mapping of the lower 4 bits of the differential serial bus register 0x1001 to bits 0-3 of the second byte of the multi-function vehicle bus target port 0x02 as an example, if bits 4-7 of the same target byte are also provided by the Controller Area Network (CAN) message, the system writes the fields from both sources into the same target shadow buffer and sets the corresponding write mask accordingly. When both bit fields have been written within the same publishing window, or when the publishing window ends and there is no higher priority source waiting to be covered, the system commits the synthesized complete byte in the shadow buffer to the multi-function vehicle bus target port all at once. For CAN target messages, after the system detects that the send mailbox is idle in the publishing window, it loads the complete data area into the send mailbox; for differential serial bus target registers, the system writes the synthesized register value into the holding register area or response frame buffer in the publishing window; for multi-function vehicle bus target ports, the system writes the complete port data area into the source port data area in the publishing window and triggers transmission. If a target bit field is still missing when the publishing window ends and the mapping item requires a complete submission, the target message will be postponed to the next publishing window; if the mapping item allows the previous value to be retained, the missing bit field will use the previous valid value in the shadow cache and the source of retention will be recorded in the log.

[0069] S50: When the mapping table changes, after verifying the new mapping rules in the mirror mapping table area, switch the active mapping table pointer at the scheduling boundary and clear the old version cache.

[0070] In this embodiment, step S50 includes: Step S51: Write the new mapping rules into the mirror mapping table area, verify the source address, target address, field length, target bit field overlap, source-target closed loop, time window constraint and enumeration mapping completeness, and generate digest code and new version stamp.

[0071] Step S52: After the verification is successful and the configuration switching window is entered, the newly arrived bus messages that have not yet participated in the conversion are temporarily stored in the switching cache queue.

[0072] Step S53: Replace the activity mapping table pointer at the predetermined scheduling boundary. After the switch is completed, re-inject the temporary messages according to the sampling timestamp or message timestamp order, and perform discard, remapping or rollback processing on cached messages with inconsistent versions.

[0073] like Figure 3As shown, during step S50, the system sets up the active mapping table area and the mirror mapping table area. The active mapping table area is used for querying the current conversion window, while the mirror mapping table area is used to receive new mapping rules issued by the human-machine interaction unit or test script. After the new mapping rule is written to the mirror mapping table area, the configuration management module first verifies whether the source bus and source object address are valid, then verifies whether the target bus and target object address exist, and then verifies whether the field length exceeds the range of the source data area or the target data area. For the target bit field, the system checks whether there is overlapping writing of the same target object, the same target byte, or bit field with the same priority; for source-target closed loop, the system determines whether it is possible to form a closed loop propagation from the multi-function vehicle bus to the controller area network bus and back to the multi-function vehicle bus, or a closed loop propagation from the differential serial bus to the multi-function vehicle bus and back to the differential serial bus, based on the source bus, target bus, object identifier, update direction, and loopback suppression identifier; for time window constraints, the system checks whether the allowed release time stamp, the expiration deadline time stamp, and the target bus release cycle conflict; for enumeration mapping, the system checks whether all source enumeration values ​​have target encoding or default processing actions. After all verifications pass, the system generates a digest code and a new version stamp for the mirror mapping table.

[0074] Mapping table switching is only allowed to be performed at predetermined scheduling boundaries. Preferably, at the end of the monitoring window, a short critical segment is entered, where the main control processing unit saves the old active mapping table pointer and the old version stamp, replaces the active mapping table pointer with the mirror mapping table pointer in one go, and increments the global mapping version. The switching cache queue has a preset maximum depth. When the number of temporarily stored messages reaches this maximum depth, the oldest message in the queue is discarded according to the oldest message overwrite strategy, and a switching cache overflow fault code is recorded. After the pointer replacement is completed, the system cleans up the old version cache: old version data records in the unified data record pool are marked as invalid, the old mapping source mark is cleared from the multi-functional vehicle bus port shadow cache, the controller area network transmission frame cache, and the differential serial bus register cache, and a filtering mark is set for messages carrying old version stamps in the message queue. Bus messages that arrive during the switching window and have not yet participated in the conversion are written to the switching cache queue. After the switch is completed, the system re-injects the temporarily stored messages into the conversion queue according to the sampling timestamp or message timestamp order. If the version of the temporary message matches the version in the new activity mapping table, it is processed directly; if the versions of the temporary message do not match, it is discarded, remapped, or rolled back according to the mapping item or system parameters. For semantically compatible differential serial bus query responses, they can be remapped according to the new mapping table; for multi-functional vehicle bus input cache messages, it is preferable to discard the old version cache and wait for new sampled data to avoid the old version cache polluting the new configuration cycle. After the old version data record is marked as invalid, it will no longer participate in the subsequent protocol conversion process. Its quality migration trajectory and fault events have been written to the log cache area before the marking. The automatic judgment module reads the complete quality level migration sequence and recovery events from the log cache area, which is not affected by the invalidation mark.

[0075] S60: Perform fault injection judgment within the same conversion path, and output target messages, quality migration records and test logs according to the test scenario identifier.

[0076] In this embodiment, step S60 includes: Step S61: Generate a test scenario fingerprint based on the scenario configuration, involved bus, activity mapping version, injection template, and expected response template, and write it into the corresponding data record, fault injection event, and log record.

[0077] Step S62: In the protocol conversion, message encapsulation, sending request or port refresh processing, perform delayed sending, discard sending request, write illegal request field, stop port refresh or rewrite response frame verification field.

[0078] Step S63: Determine the scenario result based on the correlation between response latency, quality level migration, rollback action, and recovery event.

[0079] Step S64: When the target bus points to the original source bus, the object identifier and the mapping version are the same, and the backpropagation layer number is zero, discard the conversion request and record the loop closure suppression event.

[0080] During step S60, the test scenario is configured by the human-machine interaction unit, including at least the scenario identifier, involved bus, injection type, duration, response latency threshold, quality level migration requirements, rollback action requirements, and recovery judgment conditions. The system combines the scenario configuration, involved bus, current active mapping version, injection template, and expected response template to generate a test scenario fingerprint, and writes this test scenario fingerprint into the scenario identifier field, fault injection event, and log record of the relevant data records. Fault injection does not bypass the conversion logic through an external independent path, but is performed during protocol conversion, message encapsulation, sending request, or port refresh processing. For differential serial bus response frames, the response frame verification field can be rewritten if software verification fields can be rewritten; for controller area network buses, anomalies can be constructed by discarding sending requests, delaying the triggering of sending requests, or writing syntactically sendable but service-illegal message fields; for multi-function vehicle buses, anomalies can be constructed by stopping specified port refresh, suppressing new data flag confirmation, or stopping source port data writing to simulated port timeout. Each injection records the injection time, object identifier, mapping version, target bus, and injection action.

[0081] The scenario result determination is based on the target message, quality migration record, and test log in the same conversion path. The automatic determination module reads the target bus transmission completion time or response frame encapsulation completion time and calculates the response latency; reads the quality level migration trajectory in the data record and determines whether it changes in the order of normal level, old value level or timeout level, and recovery to normal level; reads the rollback action record and determines whether the default value output, discard request, or retention of the previous value is consistent with the scenario expectation; reads the recovery event and determines whether the same fault does not occur again for several consecutive cycles after recovery. Only when the response latency, quality level migration, rollback action, and recovery event all meet the scenario template are the scenario results determined to be passed. If it is found that the target bus in the conversion link points back to the original source bus, and the object identifier and mapping version are the same, and the back propagation layer number in the loopback suppression field is zero, the protocol conversion task discards the conversion request, records the loopback suppression event, and associates the event with the same test scenario fingerprint.

[0082] The first embodiment will be described in detail with specific examples. In one example, the active mapping table version is 7. Bits 0 to 7 of byte 0 of the multi-function vehicle bus source port 0x01 are configured as a life signal field. The target is the differential serial bus holding register 0x1000, the data type is an 8-bit unsigned integer, the scaling factor is 1, the offset is 0, the timeout threshold is 150ms, and the rollback action is the default value output, with a default value of 0xFF. In the acquisition window, the main control processing unit reads the data area of ​​source port 0x01, obtains the life signal 0x5A, and generates an object identifier with the source bus being the multi-function vehicle bus and the source object address being 0x01. In the conversion window, the system writes the original data 0x5A, the engineering value 0x5A, the normal quality level, the sampling time stamp t0, the allowed release time stamp t0, the failure deadline time stamp t0+150ms, and the mapping version 7 into the same data record. When the current time meets the range from the allowed release time stamp to the failure deadline time stamp, the conversion task queries the active mapping table of version 7 and obtains the target field value 0x5A by direct mapping. Within the release window, the system writes 0x5A to the differential serial bus register shadow buffer and submits the response buffer after setting the mask in register 0x1000. When the external master station reads register 0x1000, the response frame returns 0x5A. If no new life signal is received from port 0x01 within 150ms, the object's quality level is changed to a timeout level. The system then writes 0xFF to register 0x1000 as a rollback action and records the object identifier, mapping version, timeout timestamp, and rollback action in the log.

[0083] In another example, bytes 1 and 2 of the multi-function vehicle bus source port 0x01 represent the raw speed value, and bytes 0 and 1 of the target Controller Area Network (CAN) bus message identifier 0x181 are used. The scaling factor is 0.1, and the event trigger threshold is 5 km / h. If the raw field value is 320, the engineering value is 32.0 km / h; if the previously published engineering value was 26.0 km / h, the difference is 6.0 km / h, which meets the event trigger threshold, and the system generates the target message 0x181 in the publishing window. If no new speed field is received in the next cycle, and the previous two historical engineering values ​​are 40.0 km / h and 38.0 km / h respectively, the mapping item allows one prediction compensation with a compensation factor of 0.5, so the prediction compensation value is 40.0 + 0.5 × (40.0 - 38.0) = 41.0 km / h. The system uses 41.0 km / h as a one-time target field value for publishing, marks the quality level as the old value level, and writes the compensation source and compensation count in the quality migration record.

[0084] In another example, the lower 4 bits of the differential serial bus register 0x1001 are mapped to bits 0 to 3 of the second byte of the multi-function vehicle bus target port 0x02. After the differential serial bus task receives and verifies the write register request in the acquisition window, the conversion task extracts the lower 4 bits of the door status code in the conversion window and maps them to form the multi-function vehicle bus target field value according to the enumeration mapping. Since other bit fields of the second byte of the target port 0x02 may also be written by the Controller Area Network (CAN) bus source, the system writes the 4-bit target field value to the multi-function vehicle bus port shadow buffer and sets the write mask, instead of immediately submitting the port data area. Before the end of the release window, if all the required bit fields of the same byte have been written or there is no higher priority source covering them, the system submits the complete second byte at once. If the user adds a mapping rule from the controller LAN message identifier 0x280 to the 0th byte of the multi-function vehicle bus port 0x03 via the human-machine interface, the system first verifies the address, field length, bit field overlap, closed-loop propagation, and enumeration mapping completeness in the mirror mapping table area. After the verification passes, version 8 is generated, and the active mapping table pointer is switched at the next scheduling boundary. Old version messages arriving during the switch are written to the switch buffer queue. After the switch, messages are discarded or remapped according to version consistency, thus preventing version 7 and version 8 messages from being mixed in the same conversion link.

[0085] In the fault injection example, the test scenario is identified as 0x2001, involving a multi-function vehicle bus and a differential serial bus. The injection type is a timeout for the multi-function vehicle bus destination port 0x02, with a duration of 300ms. The expected response is to generate a timeout level and output a default value within 150ms, and then restore the quality level to the normal level within 20ms after recovery. The system generates a test scenario fingerprint based on the scenario configuration, activity mapping version, injection template, and expected response template, and writes it to the relevant data records. After injection begins, the fault injection executor suppresses new data updates for destination port 0x02 in the acquisition window. When the system detects that no valid data has been received for more than 150ms, it rewrites the corresponding object's quality level to a timeout level, outputs the default value according to the mapping item, and records the fault injection event in the log. After injection ends, if a valid message is received again in the acquisition window, the system generates a recovery event and associates it with the same tracking identifier. The automatic judgment module checks the response latency, quality level migration order, default value output, and recovery event. If all conform to the scenario template, the test result is recorded as passed.

[0086] The second embodiment of the present invention proposes a simulation and testing device for multi-bus protocol conversion on a subway vehicle, such as... Figure 4 As shown, it includes a main control processing unit, a multi-functional vehicle bus communication interface unit, a controller area network bus communication interface unit, a differential serial bus communication interface unit, a human-machine interaction unit, a power supply and electrical isolation unit, and a storage unit.

[0087] The main control processing unit is used to run the acquisition window, conversion window, publishing window and monitoring window scheduling logic in the above method embodiments, and to maintain the multi-functional vehicle bus port shadow buffer, controller area network transmission frame buffer, differential serial bus register buffer, activity mapping table area, mirror mapping table area, switching buffer queue and log buffer area.

[0088] The storage unit is used to store mapping tables, configuration data, and test logs. The mapping tables and configuration data can use a storage format with version stamps and digest codes. The test logs must at least store a timestamp, source bus, object identifier, mapping version, quality level migration, scenario identifier, fault code, and judgment result. The storage unit adopts a dual-configuration-area mirrored storage method, setting up a first configuration area and a second configuration area in the flash memory. Each configuration area must at least contain a configuration entity, version number, cyclic redundancy check value, and commit status flag. When the system powers on, the main control processing unit checks the two configuration areas sequentially. If the cyclic redundancy check of a certain configuration area is correct and the commit status is marked as valid, then that configuration area is loaded. If both configuration areas are valid, the one with the newer version number is selected first. If both are invalid, the factory default configuration is loaded. When the user performs a save configuration operation, the system first writes the configuration entity, the new version number, the cyclic redundancy check value, and the valid commit flag into the spare configuration area. After the writing is completed, the active configuration area pointer is updated.

[0089] The multi-functional vehicle bus communication interface unit includes a communication board and redundant channel connection interfaces. The communication board is connected to the main control processing unit via a parallel data bus, an address bus, and read / write control lines, and is configured with source and destination ports.

[0090] In this embodiment, the timing of the parallel data bus, address bus, and read / write control lines satisfies the following: the address signal establishment time before read enable or write enable is not less than 40 nanoseconds; the address signal retention time after read enable or write enable is not less than 40 nanoseconds; the chip select signal low-level pulse width is not less than 80 nanoseconds; the read enable or write enable low-level pulse width is not less than 80 nanoseconds; the write data establishment time before the rising edge of read enable is not less than 40 nanoseconds, and the retention time is not less than 40 nanoseconds; the access time from read enable to data validity is not greater than 80 nanoseconds; and the recovery time between two adjacent bus operations is not less than 40 nanoseconds. The source port is used to send process data to the multi-functional vehicle bus network, and the destination port is used to receive process data from the multi-functional vehicle bus network. The main control processing unit performs operations to write to the port data area and trigger transmission on the source port, and performs operations to read the port data area, clear the new data flag, and update the local cache on the destination port.

[0091] The redundant channel connection interfaces correspond to the first and second channels of the multi-function vehicle bus, respectively. The main control processing unit maintains the sampling time stamp and quality level of the two channels. In this embodiment, the first channel serves as the primary channel, and the second channel serves as the backup channel. The main control processing unit maintains the failure counter and validity counter of the two channels, respectively. When the primary channel fails to receive valid data for two consecutive refresh cycles, it automatically switches to the backup channel, and the most recent valid port data at the time of switching is used as a transitional output buffer. After the backup channel switches, it is used as the new primary channel after it has received valid data for three consecutive refresh cycles. When the original primary channel recovers and is valid for five consecutive refresh cycles, a hysteresis strategy is used to perform a switchback. The valid data is defined as the detection of a new data flag on the destination port within the current refresh cycle, and the read data passes the link layer verification and meets the time window supervision condition. When the current primary channel fails to receive valid refresh data for a consecutive period while the backup channel remains valid, the channel data with the newer sampling time stamp and higher quality level is selected to enter the conversion process, and the channel switching event is written to the log buffer.

[0092] The Controller Area Network (CAN) bus communication interface unit is connected to the main control processing unit. It receives CAN messages and constructs messages containing message identifiers, data lengths, data areas, sampling timestamps, and mapping versions. It also loads target messages into the publishing window and triggers transmission requests. The Differential Serial Bus (DSBC) communication interface unit is also connected to the main control processing unit. It identifies, verifies, and resolves register addresses based on frame intervals to form DBC data records. It also encapsulates read / write responses based on the DBC register buffer. The Human-Machine Interface (HMI) unit is used to input bus parameters, mapping rules, fault injection modes, and test scenarios. It also receives operating status, fault codes, quality levels, and test logs returned by the main control processing unit. The power supply and electrical isolation unit supplies power to the main control processing unit, communication interface unit, and HMI unit, and isolates the bus side from the main control side to reduce the impact of on-board interference on protocol conversion and test judgment.

[0093] The main control processing unit is connected to a hardware timer, which generates window boundary signals. The main control processing unit schedules bus acquisition, protocol mapping, target message publishing, and status monitoring according to the window boundaries. During the bus acquisition phase, only data is written to the input queue; during the protocol mapping phase, only data records are established or updated, mapping looksups are performed, and target shadow cache writing is done; during the target message publishing phase, only multi-function vehicle bus port data, Controller Area Network (CAN) messages, or differential serial bus responses are submitted; and during the status monitoring phase, only heartbeat, window recording, fault recording, and log maintenance are performed. Thus, the device can complete protocol conversion, window control, configuration switching, fault injection, and test result correlation between the multi-function vehicle bus, CAN bus, and differential serial bus on the same hardware platform.

[0094] The terms “first”, “second”, etc., are used to distinguish similar objects, not to describe or indicate a specific order or sequence.

[0095] The term "comprising" or any other similar term is intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus / device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent in such process, method, article, or apparatus / device.

[0096] The technical solution of the present invention has been described above with reference to the preferred embodiments shown in the accompanying drawings. However, it will be readily understood by those skilled in the art that the scope of protection of the present invention is obviously not limited to these specific embodiments. Without departing from the principles of the present invention, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will all fall within the scope of protection of the present invention.

Claims

1. A simulation test method for multi-bus protocol conversion on a subway vehicle, characterized in that, include: Receive messages from multi-function vehicle bus, controller area network bus or differential serial bus, extract source bus, source object address and payload, combine source bus and source object address to generate object identifier, parse payload to obtain engineering value, and write object identifier, raw data, engineering value, quality level, sampling time stamp, allowed release time stamp, expiration deadline time stamp and mapping version into the same data record; Within the deterministic scheduling window, time window verification is performed based on the allowed release timescale and the expiration deadline timescale, and quality degradation is determined based on the sampling timescale and quality level. Predicted compensation values ​​are generated for data records that are not updated in the window and meet the change constraints. Based on the mapping version, query the activity mapping table, and perform field extraction, bit segment positioning, type conversion, enumeration mapping or scaling offset calculation on the data records that pass the time window verification to obtain the target field value; In the publishing window, the target field value is written to the target shadow cache and bit field latch commit is performed to form the target message; When the mapping table changes, after verifying the new mapping rules in the mirror mapping table area, the active mapping table pointer is switched at the scheduling boundary and the old version cache is cleared. Perform fault injection determination within the same conversion path, and output target messages, quality migration records, and test logs according to the test scenario identifier.

2. The method according to claim 1, characterized in that, Extract the source bus, source object address, and payload, including: After the message passes the bus verification, the source bus is determined according to the physical interface into which the message enters; the multi-function vehicle bus port number, controller area network message identifier or differential serial bus register address is written as the source object address; According to the mapping entry in the activity mapping table that matches the object identifier, truncate bit segments from the message valid data area according to the source byte offset, source bit offset, and bit length; write the truncated bit segments as the payload for parsing the engineering values.

3. The method according to claim 1, characterized in that, Write the object identifier, raw data, engineering value, quality grade, sampling timescale, allowed release timescale, expiration deadline timescale, and mapped version into the same data record, including: Write the time when message sampling is completed into the sampling time stamp; When multi-source aggregation is not required, the sampling time stamp or the starting boundary of the corresponding transformation window is written to the allowed publication time stamp. When multi-source aggregation is required, the completion time of multi-source aggregation is written to the allowed publication time stamp. Read the timeout threshold that matches the object identifier from the activity mapping table, and add the sampling time stamp to the timeout threshold to form the failure cutoff time stamp; Write the mapping version, project value, and initial quality level to the same data record.

4. The method according to claim 1, characterized in that, Within the deterministic scheduling window, time window verification is performed based on the allowed release timescale and the expiration deadline timescale, including: A hardware timer generates window boundary signals, and the acquisition window, conversion window, publishing window, and monitoring window are opened according to the window boundary signals. The acquisition window only receives bus messages and writes them to the input queue; the conversion window only establishes or updates data records and performs mapping lookups; the publishing window only submits target messages or register responses; and the monitoring window only updates heartbeat, window record, and log. When a task is scheduled in a non-matching window, the pending messages are retained in the corresponding window.

5. The method according to claim 1, characterized in that, Based on the sampling timescale and quality level, a quality degradation determination is performed, and predicted compensation values ​​are generated for data records that are not updated within the window and meet the change constraints, including: When the system time is earlier than the allowed publication time stamp, data records are prohibited from entering the mapping lookup; When the system is between the allowed release time and the expiration deadline and no new data is received, the quality decay factor is reduced by the duration of the unupdated period. When the system time exceeds the failure deadline, the quality level is rewritten to the timeout level, and the default value, conversion request is discarded, or the previous value is retained according to the mapping item rollback action. When adjacent historical project values ​​meet the smoothing constraint, a predicted compensation value is formed based on the difference between adjacent historical project values ​​and the compensation coefficient, and the quality level is rewritten as the old value level.

6. The method according to claim 1, characterized in that, Based on the mapping version, query the activity mapping table and perform field extraction, bit segment positioning, type conversion, enumeration mapping, or scaling offset calculation on the data records that pass the time window verification, including: Find the mapping item by source bus, object identifier, mapping version, and update direction; Extract the fields to be converted according to the source byte offset, source bit offset and bit length recorded in the mapping item, reassemble the field values ​​according to the byte order, and form the target field value according to the data type, enumeration table, scaling factor and offset; When multiple data records hit the same target object, arbitration is performed based on the priority of the mapping item, the sampling time stamp, and the loading order of the mapping table, and the arbitrated target field value is written to the corresponding target shadow cache.

7. The method according to claim 6, characterized in that, Write the arbitrated target field value to the corresponding target shadow cache, including: Read the current value of the target shadow cache, only rewrite the target byte or target bit field overwritten by the target field value, and synchronously update the write mask; Record the source priority, object identifier, and window boundaries corresponding to each target bit field; The submission condition is that the target bit fields corresponding to the hit mapping items within the same publishing window have been written and the corresponding write mask has been set. When the submission conditions are met or the window ends and there is no higher priority source covering the data, the synthesized complete target data area is submitted as a target message all at once.

8. The method according to claim 1, characterized in that, When the mapping table changes, after verifying the new mapping rules in the mirror mapping table area, the active mapping table pointer is switched at the scheduling boundary and the old version cache is cleared, including: Write the new mapping rules into the mirror mapping table area, and verify the source address, target address, field length, target bit field overlap, source-target closed loop, time window constraint and enumeration mapping completeness, and generate digest code and new version stamp; After the verification is successful and the configuration switching window is entered, newly arrived bus messages that have not yet been converted are temporarily stored in the switching cache queue. Replace the activity mapping table pointer at the predetermined scheduling boundary; after the switch is completed, re-inject the temporary messages in the order of sampling timestamp or message timestamp, and perform discard, remapping or rollback processing on cached messages with inconsistent versions.

9. The method according to claim 1, characterized in that, Perform fault injection determination within the same conversion path, including: The test scenario fingerprint is generated based on the scenario configuration, involved bus, activity mapping version, injection template, and expected response template, and written to the corresponding data record, fault injection event, and log record. In protocol conversion, message encapsulation, sending request or port refresh processing, perform delayed sending, discard sending request, write illegal request field, stop port refresh or rewrite response frame verification field; The scenario outcome is determined by the correlation between response latency, quality level migration, rollback actions, and recovery events. When the target bus points to the original source bus, the object identifier and the mapping version are the same, and the backpropagation layer number is zero, discard the conversion request and record the loop closure suppression event.

10. A subway vehicle-mounted multi-bus protocol conversion simulation and testing device, characterized in that, It includes a main control processing unit, a multi-functional vehicle bus communication interface unit, a controller area network bus communication interface unit, a differential serial bus communication interface unit, a human-machine interaction unit, a power supply and electrical isolation unit, and a storage unit; The multi-functional vehicle bus communication interface unit includes a communication board and redundant channel connection interfaces. The communication board is connected to the main control processing unit through a parallel data bus, an address bus, and a read / write control line, and is configured with a source port and a destination port. The controller local area network bus communication interface unit and the differential serial bus communication interface unit are respectively connected to the main control processing unit; The main control processing unit is equipped with a multi-functional vehicle bus port shadow buffer area, a controller area network transmission frame buffer area, a differential serial bus register buffer area, an active mapping table area, a mirror mapping table area, a switching buffer queue and a log buffer area, and is connected to a hardware timer to schedule bus acquisition, protocol mapping, target message publishing and status monitoring according to window boundaries. The human-machine interaction unit is used to input bus parameters, mapping rules, fault injection modes and test scenarios. The power supply and electrical isolation unit is used to supply power and isolate the bus side from the master control side. The storage unit is used to save the mapping table, configuration data and test logs.

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