Single photon avalanche diode, spad array, receiving chip and lidar

Abstract

The application belongs to the technical field of optical devices, and provides a single-photon avalanche diode, a SPAD array, a receiving chip and a laser radar. In the single-photon avalanche diode, a first doping type deep well isolation region is formed in a peripheral region of a first doping type substrate and extends to a shallow trench isolation insulating structure from the back surface of the device. A first electrode is formed on the back surface of the device and is electrically connected to the first doping type deep well isolation region. A second electrode is formed on the front surface of the device and is electrically connected to an avalanche main junction. The anode and the cathode of each SPAD device are located on opposite surfaces of the device, the process integration of the device is improved, and the risk of lateral edge breakdown of the device is reduced.

Description

Technical Field

[0001] This application belongs to the field of optical device technology, and particularly relates to a single-photon avalanche diode, a SPAD array, a receiver chip, and a lidar. Background Technology

[0002] Single-photon avalanche diode (SPAD) arrays, due to their advantages such as high sensitivity to single-photon intensities, high time resolution, and strong anti-interference capabilities, are widely used in applications such as laser detection and ranging systems (Lidar), autonomous driving, fluorescence lifetime imaging, quantum communication, and biomedical imaging. These SPAD arrays, consisting of at least two SPADs connected in parallel, are used as a single-point silicon photomultiplier (SiPM). With advancements in silicon manufacturing technology, SPAD array design using silicon as the absorption and avalanche material has become a hot topic in industry. Furthermore, by utilizing various complementary metal-oxide-semiconductor (CMOS) manufacturing technologies, SPADs can be easily integrated with different quenching and readout circuits, thus offering significant technological advantages.

[0003] Driven by the dual demands for improved performance and reduced costs, the design size of SPAD arrays is continuously shrinking, reaching 7µm, 6µm, and even 3µm. This reduction in size decreases dark count noise (DCR), shortens dead time, improves timing jitter accuracy, and meets the requirements of high-speed imaging. Furthermore, with improved pixel miniaturization and CMOS compatibility, SPAD arrays can leverage mass production to reduce costs and expand into consumer applications. However, in the design of small-pixel SPAD processes, the close proximity of the anode and cathode can easily lead to lateral breakdown of the device. Summary of the Invention

[0004] To address the aforementioned technical problems, this application provides a single-photon avalanche diode, a SPAD array, a receiving chip, and a lidar, aiming to solve the problem that the anode and cathode of current single-photon avalanche diodes are too close together, which easily leads to lateral breakdown of the device.

[0005] A first aspect of this application provides a single-photon avalanche diode, the single-photon avalanche diode comprising: First type of doped substrate; The first doped type epitaxial absorption region is formed on the first doped type substrate; The avalanche master junction is formed on the first doped epitaxial absorption region; Shallow trench isolation insulation structure is formed in the epitaxial absorption region of the first doped type and is located in the peripheral region of each of the avalanche master junctions; A first doped type deep well isolation region is formed in the peripheral region of the first doped type substrate and the first doped type epitaxial absorption region, and extends from the back side of the device to the shallow trench isolation insulation structure. The first electrode, corresponding to the avalanche main junction, is formed on the back side of the device, and the first electrode is electrically connected to the first doped type deep well isolation region surrounding the corresponding avalanche main junction. The second electrode, corresponding to and connected to the plurality of avalanche main junctions, is formed on the front side of the device and is electrically connected to the avalanche main junctions.

[0006] In one embodiment, the doping concentration of the first doped type deep well isolation region is gradient-set from the first doped type substrate to the shallow trench isolation insulation structure.

[0007] In one embodiment, the doping concentration of the first doped type deep well isolation region is greater than or equal to 5e17cm. -3 And less than or equal to 5e20cm -3 .

[0008] In one embodiment, the first doped type deep well isolation region is a ring structure, and the first doped type epitaxial absorption region corresponding to the avalanche main junction is located within the ring structure.

[0009] In one embodiment, the horizontal cross-sectional shape of the first doped type deep well isolation region corresponding to the avalanche master junction is an open shape, which includes at least one of linear, arc, or L-shaped.

[0010] In one embodiment, each avalanche master knot includes an N-type master knot region and a P-type master knot region, the N-type master knot region and the P-type master knot region forming an avalanche region.

[0011] In one embodiment, the vertical cross-section of the shallow trench isolation insulation structure is an inverted trapezoid; or The vertical cross-section of the shallow trench insulation structure is a multi-layer stepped structure, wherein the width of each step in the multi-layer stepped structure gradually increases; or The vertical cross-section of the shallow trench isolation insulation structure is arc-shaped, which is used to reflect photons irradiating its surface to the avalanche master junction.

[0012] A second aspect of this application also provides a SPAD array, the SPAD array including one or more single-photon avalanche diodes as described in any of the above embodiments.

[0013] In one embodiment, at least one or more adjacent single-photon avalanche diodes share a deep trench isolation structure located in the central region of the first doped type deep well isolation region. The deep trench isolation structure comprises at least one of an insulating dielectric material, doped polysilicon, or a metallic material.

[0014] In one embodiment, each avalanche main node is connected to the first electrode through a first electrode via, and adjacent avalanche main nodes share the first electrode via.

[0015] A third aspect of this application also provides a receiving chip, the receiving chip comprising a SPAD array as described in any embodiment of the first aspect.

[0016] A fourth aspect of this application also provides a lidar, which includes a transmitting chip and a receiving chip, wherein the transmitting chip is used to transmit a detection laser, and the receiving chip is used to receive the echo of the detection laser and obtain detection information of a target object based on the echo.

[0017] The beneficial effects of the embodiments of this application are as follows: A first doped deep well isolation region is formed in the peripheral area of ​​a first doped substrate and extends from the back side of the device to a shallow trench isolation insulation structure. By setting a first electrode to be formed on the back side of the device and electrically connected to the first doped deep well isolation region, and a second electrode to be formed on the front side of the device and electrically connected to the avalanche main junction, the anode and cathode of each SPAD device are located on opposite sides of the device, which improves the device process integration and reduces the risk of lateral edge breakdown of the device. Attached Figure Description

[0018] Figure 1 This is a top view of a schematic diagram of a single-photon avalanche diode provided in an embodiment of this application. Figure 1 ; Figure 2 This is a schematic diagram of the cross-section AA' of the single-photon avalanche diode provided in the embodiments of this application; Figure 3 This is a top view schematic diagram of the single-photon avalanche diode provided in the embodiments of this application. Figure 2 ; Figure 4a This is a top view of the SPAD array provided in the embodiments of this application; Figure 4b This is a top view of the SPAD array provided in the embodiments of this application; Figure 5a This is a top view of the SPAD array provided in the embodiments of this application; Figure 5bThis is a top view of the SPAD array provided in the embodiments of this application; Figure 5c This is a top view of the SPAD array provided in the embodiments of this application. Detailed Implementation

[0019] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0020] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0021] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0022] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or at least two of that feature. In the description of this application, "at least two" means one or more, unless otherwise explicitly specified.

[0023] Single-photon avalanche diodes (SPADs) are typically designed in the micrometer to millimeter range, depending on the application. SPAD technology is moving towards miniaturization and integration, further increasing pixel density and reducing overall device size through 3D stacking technology. Driven by the dual demands of improving performance and reducing costs, the design size of SPADs is continuously shrinking, with designs reaching 7µm, 6µm, and even 3µm. This is because smaller size can reduce dark count noise (DCR), shorten dead time, improve timing jitter accuracy, and meet the needs of high-speed imaging. Furthermore, with the improvement of pixel miniaturization and CMOS compatibility, SPAD arrays can reduce costs through mass production and expand consumer applications. Therefore, small pixel design is a future trend, but this brings many process and design challenges, such as the small pixel design involving solving the lateral breakdown problem discussed in this application. Small pixels face the problem of lateral edge breakdown caused by the anode and cathode being too close together, which is the biggest limitation restricting the continued miniaturization of small pixels.

[0024] To address the aforementioned technical problems, embodiments of this application provide a SPAD array, which includes a plurality of single-photon avalanche diodes arranged in an array. Figure 2 for Figure 1 The schematic diagram of the device in the image shows a longitudinal section of cross-section AA'. Combined with... Figure 1 and Figure 2 As shown, the SPAD array in this embodiment includes: a first-doped substrate 8, a first-doped epitaxial absorption region 7, an avalanche main junction 500, a shallow trench isolation structure 4, a first-doped deep well isolation region 5, a first electrode 10, and a second electrode 9. The first-doped epitaxial absorption region 7 is formed on the first-doped substrate 8, and the avalanche main junction 500 is formed on the first-doped epitaxial absorption region 7. The shallow trench isolation structure 4 is formed within the first-doped epitaxial absorption region 7 and is located in the peripheral region of each avalanche main junction 500. The first-doped deep well isolation region 5 is formed in the peripheral region of the first-doped substrate 8 and the first-doped epitaxial absorption region 7, and extends from the back side of the device to the shallow trench isolation structure 4. The first electrode 10 is correspondingly connected to the avalanche main junction 500, and the first electrode 10 is formed on the back side of the device, and is electrically connected to the first-doped deep well isolation region 5 surrounding the corresponding avalanche main junction 500. The second electrode 9 is connected to the avalanche main junction 500. The second electrode 9 is formed on the front side of the device and is electrically connected to the avalanche main junction 500.

[0025] In this embodiment, the cross-sectional shape of the first electrode 10 is the same as that of the first doped deep well isolation region 5, which is formed in the peripheral region of the first doped substrate 8 and extends from the back side of the device to the shallow trench isolation insulation structure 4. Thus, the first electrode 10 does not block incident light from the back side of the device. By setting the first electrode 10 to be formed on the back side of the device and electrically connected to the first doped deep well isolation region 5, and the second electrode 9 to be formed on the front side of the device and electrically connected to the avalanche main junction 500, the anode and cathode of each single-photon avalanche diode (SPAD device) are located on opposite sides of the device, improving the device's process integration and reducing the risk of lateral edge breakdown.

[0026] In some embodiments, the second electrode 9 is the front side of the SPAD device, and the first electrode 10 is the back side of the SPAD device. If the second electrode 9 is the cathode and the first electrode 10 is the anode, and the SPAD device is a back-illuminated (BSI) chip, light is incident from one side of the first electrode 10. The projection of the first electrode 10 on the front side of the device is located in the peripheral area of ​​the second electrode 9, and the projection of the avalanche junction 500 on the front side of the SPAD device is located on the second electrode 9. This allows the incident light to be irradiated onto the avalanche junction 500 as much as possible and reflected by the second electrode 9, thereby improving the light absorption efficiency of the SPAD device.

[0027] In some embodiments, if the device is a front-illuminated (FSI) chip, the incident light is incident from one side of the second electrode 9, the second electrode 9 is the cathode, the first electrode 10 is the anode, the second electrode 9 can be set as a transparent electrode, or the second electrode 9 can be set along the edge of the SPAD device, so that the light can illuminate the avalanche junction 500 as much as possible, the first electrode 10 fully covers the back of the SPAD device, and performs total internal reflection of the incident light to improve the light absorption efficiency of the SPAD device.

[0028] In some embodiments, the avalanche main junction 500 corresponds to a first electrode 10 and a second electrode 9. When the first doping type is P-type doping, the first doping type substrate 8 is a P-type substrate, the first doping type epitaxial absorption region 7 is a P-type absorption region, the first electrode 10 is an anode, the second electrode 9 is a cathode, the first doping type deep well isolation region 5 is a P-type deep well structure, the single-photon avalanche diode is an N on P structure, and the incident light is incident on the avalanche main junction 500 through the P-type substrate on the back side.

[0029] In some embodiments, the doping type of the first doped substrate 8 and the first doped epitaxial absorption region 7 is N-type doped, the first electrode 10 is a cathode, and the second electrode 9 is an anode.

[0030] In some embodiments, the doping concentration of the first doped type deep well isolation region 5 is gradient-set from the first doped type substrate 8 to the shallow trench isolation insulating structure 4.

[0031] In some embodiments, the doping concentration of the first doped type deep well isolation region 5 is greater than or equal to 5e17 cm⁻¹. -3 And less than or equal to 5e20cm -3 .

[0032] In some embodiments, the doping concentration of the first doped type deep well isolation region 5 is at least 10 times that of the first doped type epitaxial absorption region 7.

[0033] In this embodiment, in the silicon bulk material of the device, an FDTI trench etching process is first performed, followed by Si material epitaxy to fill the trenches. Finally, through thermal diffusion, a first-doped deep-well isolation region 5 with a high doping concentration and a concentration gradient impurity distribution is formed in the silicon bulk material. Through process control, the doping concentration of the first-doped deep-well isolation region 5 is greater than 5e18cm. -3 In the above concentration distribution, the width of the first doped type deep well isolation region 5 is smaller than the width of the isolation structure.

[0034] In some embodiments, the doping concentration of the first doped type deep well isolation region 5 gradually decreases from the first doped type substrate 8 to the shallow trench isolation insulating structure 4. Thus, the doping concentration of the silicon material filled in the deep well trench is lower near the front of the device and higher near the back of the device, so that the first doped type deep well isolation region on the front of the device can effectively reduce the risk of lateral edge breakdown of the device without etching backfill.

[0035] In some embodiments, after the first doped type deep well isolation region on the front side of the device is filled, silicon material can be grown epitaxially, and the front side of the device can be processed on the epitaxial layer. In this way, the distance between the cathode and anode on the device surface can be increased.

[0036] In some embodiments, the insulating medium material may be an insulating medium such as silicon oxide or silicon nitride.

[0037] In some embodiments, the deep trench isolation structure 6, by selecting appropriate metal and dielectric materials and designing different refractive indices and film thicknesses of the dielectric layer, can enable the metal and dielectric materials to form an optical filter, which absorbs or reflects photons of different wavelengths in self-excited photons, thereby reducing crosstalk in the device.

[0038] In some embodiments, in array-packaged single-photon avalanche diodes, trench structures can be etched into the package structure to reduce crosstalk between single-photon avalanche diodes.

[0039] In some embodiments, the first doped type deep well isolation region 5 is a ring structure, and the first doped type epitaxial absorption region 7 corresponding to the avalanche main junction 500 is located inside the ring structure.

[0040] In some embodiments, the first doped type deep well isolation region 5 is a ring structure, such as... Figure 1 As shown, the shape of the first doped deep well isolation region 5 in the horizontal cross section is the same as that of the shallow trench isolation insulation structure 4. The first doped deep well isolation region 5 is in contact with the shallow trench isolation insulation structure 4 to form an isolation structure, which is beneficial to reflect photons back to the Si material of the substrate for reabsorption. It can also improve the photon detection efficiency (PDE) to a certain extent, reduce the overflow of self-excited photons, reduce the probability of photon crosstalk, and reduce the optical crosstalk of the device.

[0041] In some embodiments, combined with Figure 3 As shown, the horizontal cross-sectional shape of the first doped type deep well isolation region 5 corresponding to the avalanche master junction 500 is an open shape, which includes at least one of linear, arc or L-shaped.

[0042] In one embodiment, the avalanche main junction 500 is connected to the first electrode 10 through a first electrode via, and adjacent avalanche main junctions 500 share the first electrode via.

[0043] In one embodiment, the avalanche master knot 500 includes an N-type master knot region and a P-type master knot region, which together form an avalanche region.

[0044] In one embodiment, the avalanche master junction 500 includes stacked N-type master junction regions and P-type master junction regions, which together form a PN junction.

[0045] In some embodiments, the N-type main junction region and the P-type main junction region are two doped regions with different polarities. The N-type main junction region and the P-type main junction region form a PN junction. The amplification region is the region with the strongest electric field of the PN junction. The amplification region is mainly used for the generation and amplification of avalanches. The depletion region is the space charge region generated by the device under a certain voltage. Electrons or holes generated in it can drift into the amplification region through the electric field to generate avalanches.

[0046] In one embodiment, the vertical cross-section of the shallow groove isolation insulation structure 4 is an inverted trapezoid.

[0047] Combination Figure 2As shown, because the shallow trench isolation insulation structure 4 has a trapezoidal shape, photons reflected by the sidewalls of the shallow trench isolation insulation structure 4 have a high probability of entering other avalanche master junctions 500. Furthermore, this crosstalk may propagate to distant locations due to the relatively small reflection from the lens, causing crosstalk to remote devices and further exacerbating the avalanche chain of crosstalk. In this embodiment, an inverted trapezoidal shallow trench isolation insulation structure 4 is used. In this case, the inwardly inclined interface of the shallow trench isolation insulation structure 4 reflects the incident light back into its own device, reducing photon leakage and lowering the probability of crosstalk from self-excited photons.

[0048] In one embodiment, the vertical cross-section of the shallow groove isolation insulation structure 4 is a multi-layer stepped structure, and the width of each step in the multi-layer stepped structure gradually increases.

[0049] In this embodiment, the vertical cross-section of the shallow trench isolation insulation structure 4 is a multi-layer stepped structure. The width of the multi-layer stepped structure increases step by step, causing the shallow trench isolation insulation structure 4 to tilt inward, reflecting the light incident on it back into its own device, reducing photon overflow and lowering the probability of crosstalk of self-excited photons.

[0050] In one embodiment, the width of the multi-tiered stepped structure increases progressively, and the width of the multi-tiered stepped structure is set as an arithmetic sequence.

[0051] In one embodiment, the vertical cross-section of the shallow trench isolation insulation structure 4 is an arc-shaped structure, used to reflect photons illuminating its surface to the avalanche master junction 500.

[0052] In this embodiment, by setting the vertical cross-section of the shallow trench isolation insulation structure 4 to be an arc-shaped structure, the interface between the shallow trench isolation insulation structure 4 and the first doped epitaxial absorption region 7 can form a total internal reflection interface tilted inward to the avalanche main junction 500, which reflects the photons irradiating its surface to the avalanche main junction 500 (i.e., the region of the avalanche main junction 500 itself), reducing the overflow of self-excited photons and lowering the crosstalk probability of self-excited photons.

[0053] To address the aforementioned technical problems, embodiments of this application provide a SPAD array, which includes a plurality of single-photon avalanche diodes as described in any of the above embodiments.

[0054] In this embodiment, the SPAD array includes arrayed single-photon avalanche diodes. In the SPAD array, some areas can use the single-photon avalanche diodes described in any of the above embodiments, while other areas can use single-photon avalanche diodes with coplanar electrodes. In the single-photon avalanche diodes with coplanar electrodes, the anode and cathode are located on the same side.

[0055] In some embodiments, in a SPAD array, see Figure 4aAs shown, the central region uses a single-photon avalanche diode array as described in any of the above embodiments. The central region uses a double-sided electrode single-photon avalanche diode array 110, which can improve the absorption efficiency of the small pixel SPAD array for incident light, reduce dark counting noise, improve timing jitter accuracy, and meet the needs of high-speed imaging. Meanwhile, coplanar electrode single-photon avalanche diodes are used in the edge region of the SPAD array.

[0056] In some embodiments, in a SPAD array, see Figure 4b As shown, the SPAD array includes a single-photon avalanche diode and a coplanar electrode single-photon avalanche diode as described in any of the above embodiments. The single-photon avalanche diode described in the above embodiments is defined as a double-sided electrode single-photon avalanche diode. The coplanar electrode single-photon avalanche diode and the double-sided electrode single-photon avalanche diode are arranged separately.

[0057] In some embodiments, combined with Figure 4b As shown, for example, the SPAD array includes a coplanar electrode single-photon avalanche diode array 120 and a biplanar electrode single-photon avalanche diode array 110, with the coplanar electrode single-photon avalanche diode array 120 and the biplanar electrode single-photon avalanche diode array 110 arranged alternately in columns.

[0058] In some embodiments, in a SPAD array, at least one or more adjacent single-photon avalanche diodes share a deep trench isolation structure 6.

[0059] In some embodiments, combined with Figure 2 As shown, within the SPAD array, avalanche master junctions 500 are arranged in an array, and a deep trench isolation structure 6 is provided around at least one or part of the avalanche master junctions 500. Adjacent single-photon avalanche diodes share a deep trench isolation structure 6. The deep trench isolation structure 6 is located in the central region of the first doped type deep well isolation region 5. The deep trench isolation structure includes at least one of insulating dielectric material, doped polysilicon, or metal material.

[0060] In this embodiment, the self-excited photons generated by the avalanche master junction 500 when excited by incident light can be reflected when they hit the deep trench isolation structure. This increases absorption and also prevents the self-excited photons from interfering with the adjacent avalanche master junction 500, which is an important way to improve crosstalk.

[0061] In some embodiments, the deep trench isolation structure 6 may include a metal material (e.g., tungsten metal) forming a metal-filled structure. The metal-filled structure can serve as an electrode contact or an optical shielding layer, for example, isolating self-excited photons generated by the avalanche main junction 500 under incident light excitation, reducing the overflow of self-excited photons, reducing the probability of photon crosstalk, and reducing the optical crosstalk of the device.

[0062] In some embodiments, the deep trench isolation structure 6 includes an insulating dielectric material that can isolate self-excited photons generated by the avalanche main junction 500 under incident light excitation, reduce the overflow of self-excited photons, reduce the probability of photon crosstalk, and reduce the optical crosstalk of the device.

[0063] In some embodiments, combined with Figure 5a As shown, taking a single-photon avalanche diode array (SPAD array) including a 3*3 single-photon avalanche diode array structure as an example, the cathode of the single-photon avalanche diode is on the front side of the device, and the anode is connected from the back side through the pattern of the first doped type deep well isolation region 5, which can effectively reduce the risk of lateral edge breakdown.

[0064] In some embodiments, combined with Figure 5b As shown, by sharing the anode contact holes on the back side, the space occupied by the anode electrode can be further reduced.

[0065] In some embodiments, combined with Figure 5c As shown, the shape of the first-doped deep-well isolation region 5 can vary, and the array of devices can also be of different sizes. The first-doped deep-well isolation region 5 transfers the anode connection from the front side to the back side, and then fills the trench in the first-doped deep-well isolation region 5 on the front side with etching. This effectively increases the distance between the cathode and anode of the device. For small-sized single-photon avalanche diodes, this can effectively reduce the risk of lateral edge breakdown. Furthermore, by connecting the anode from the back side of the device through the first-doped deep-well isolation region 5, the high-doping concentration portion of the substrate can be saved, thereby reducing ineffective optical absorption areas, which is beneficial for optimizing the optical structure of the device and reducing the complexity of the process.

[0066] This application also provides a receiving chip, which may include: a single-photon avalanche diode as described in any of the above embodiments, or a SPAD array as described in one or more of the above embodiments.

[0067] This application embodiment also provides a lidar, which includes a transmitting chip and the aforementioned receiving chip. The transmitting chip is used to emit a detection laser, and the receiving chip is used to receive the echo of the detection laser and obtain the target object based on the echo.

[0068] In this embodiment, the receiving chip includes the aforementioned SPAD array. A first-doped deep-well isolation region 5 is formed in the peripheral region of a first-doped substrate 8 and extends from the back side of the device to the shallow trench isolation insulation structure 4. By setting multiple first electrodes 10 formed on the back side of the device and electrically connected to the first-doped deep-well isolation region 5, and multiple second electrodes 9 formed on the front side of the device and electrically connected to the avalanche main junction 500, the anode and cathode of each SPAD device are located on opposite sides of the device, thereby improving the device process integration and reducing the risk of lateral edge breakdown.

[0069] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional device areas and modules is used as an example. In practical applications, the above functions can be assigned to different functional device areas and modules as needed, that is, the internal structure of the device can be divided into different functional device areas or modules to complete all or part of the functions described above. In the embodiments, the functional device areas and modules can be integrated into one device, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0070] Furthermore, the specific names of each functional device area and module are merely for easy differentiation and are not intended to limit the scope of protection of this application. The specific working processes of the units and modules in the above system can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0071] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0072] In addition, the functional device regions in the various embodiments of this application can be integrated into one device, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0073] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A single-photon avalanche diode, characterized in that, The single-photon avalanche diode includes: First type of doped substrate; The first doped type epitaxial absorption region is formed on the first doped type substrate; The avalanche master junction is formed on the first doped epitaxial absorption region; Shallow trench isolation insulation structure is formed in the epitaxial absorption region of the first doped type and is located in the peripheral region of each of the avalanche master junctions; A first doped type deep well isolation region is formed in the peripheral region of the first doped type substrate and the first doped type epitaxial absorption region, and extends from the back side of the device to the shallow trench isolation insulation structure. The first electrode is connected to the avalanche master junctions and is formed on the back side of the device. The first electrode is electrically connected to the first doped type deep well isolation region surrounding the corresponding avalanche master junction. The second electrode, corresponding to and connected to the avalanche main junction, is formed on the front side of the device and is electrically connected to the avalanche main junction.

2. The single-photon avalanche diode as described in claim 1, characterized in that, The doping concentration of the first doped type deep well isolation region is gradient-set from the first doped type substrate to the shallow trench isolation insulation structure.

3. The single-photon avalanche diode as described in claim 2, characterized in that, The doping concentration of the first doped type deep well isolation region is greater than or equal to 5e17 cm⁻¹ -3 And less than or equal to 5e20cm -3 .

4. The single-photon avalanche diode as described in claim 1, characterized in that, The first doped type deep well isolation region is a ring structure, and the first doped type epitaxial absorption region corresponding to the avalanche main junction is located within the ring structure.

5. The single-photon avalanche diode as described in claim 1, characterized in that, The horizontal cross-sectional shape of the first doped type deep well isolation region corresponding to the avalanche master junction is an open shape, which includes at least one of linear, arc or L-shaped.

6. The single-photon avalanche diode as described in any one of claims 1-5, characterized in that, The vertical cross-section of the shallow groove isolation insulation structure is an inverted trapezoid; or The vertical cross-section of the shallow trench insulation structure is a multi-layer stepped structure, wherein the width of each step in the multi-layer stepped structure gradually increases; or The vertical cross-section of the shallow trench isolation insulation structure is arc-shaped, which is used to reflect photons irradiating its surface to the avalanche master junction.

7. A SPAD array, characterized in that, The SPAD array includes one or more single-photon avalanche diodes as described in any one of claims 1-6.

8. The SPAD array as described in claim 7, characterized in that, At least one or more adjacent single-photon avalanche diodes share a deep trench isolation structure, the deep trench isolation structure being located in the central region of the first doped type deep well isolation region, the deep trench isolation structure comprising at least one of an insulating dielectric material, doped polycrystalline silicon, or a metallic material.

9. The SPAD array as described in claim 7, characterized in that, Each avalanche main node is connected to the first electrode through a first electrode via, and adjacent avalanche main nodes share the first electrode via.

10. A receiving chip, characterized in that, The receiving chip includes a single-photon avalanche diode as described in any one of claims 1-6, or a SPAD array as described in any one of claims 7-9.

11. A lidar, characterized in that, The lidar includes a transmitting chip and a receiving chip as described in claim 10; The transmitting chip is used to emit detection laser; The receiving chip is used to receive the echo of the detection laser and obtain the detection information of the target object based on the echo.

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