Bias-controllable bimodal van der waals heterojunction phototransistor and preparation method thereof

Abstract

The application discloses a kind of controllable bias bimodal van der Waals heterojunction phototransistor and preparation method thereof, transistor includes substrate, Ta2NiX5 (X=S, Se) flake, ReS2 flake, source electrode and drain electrode;ReS2 flake is partially stacked on Ta2NiX5 flake to form van der Waals heterojunction, Ta2NiX5 flake is in contact with source electrode, ReS2 flake is in contact with drain electrode.The application is by regulation and control bias, realizes visible light to near-infrared wide-band fast photoelectric detection when no bias, realizes flexible reversible switching of photoelectric synapse function at low bias, without complex gate or double branch structure, also without chemical or physical doping.The device structure is simplified, regulation and control efficient, bimodal performance is excellent, preparation process is compatible with existing semiconductor technology, in photoelectric detection, imaging, neuromorphic computing and other fields Application prospect is wide, provides efficient hardware scheme for the development of sensing storage calculation integration technology.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor optoelectronic devices and neuromorphic computing technology, and particularly relates to a bias-controllable dual-mode van der Waals heterojunction phototransistor, its fabrication method and application. Background Technology

[0002] The rapid evolution of artificial intelligence and neuromorphic computing is driving a fundamental transformation in hardware systems towards integrated sensing, storage, and computing, high integration, and ultra-low power consumption. Complementary metal-oxide-semiconductor (CMOS) technology, based on the traditional von Neumann architecture, suffers from a "memory wall" bottleneck and energy efficiency constraints due to the separation of sensing, computing, and storage units, making it difficult to meet the stringent requirements of next-generation intelligent devices for real-time, efficient information processing. Against this backdrop, integrating front-end optical sensing and back-end information processing functions into a single device has become a key path to break through existing computing paradigms and build next-generation intelligent systems. Traditional photodetectors are limited to the detection and conversion of light signals, while integrated devices combining detection and synaptic functions can directly perform preliminary information processing and temporary storage while sensing light signals, thereby achieving higher functional integration and system energy efficiency at the hardware level, showing broad prospects in fields such as bionic vision and edge intelligence. Therefore, deeply integrating high-performance photodetectors and photosynaptic characteristics into a single device is the core technological direction for developing efficient intelligent optoelectronic systems.

[0003] However, achieving efficient integration and flexible reversible switching of the aforementioned dual-modal functions in a single device still faces significant challenges. Existing technical solutions mainly suffer from the following limitations: First, most solutions rely on three-terminal device structures, using complex gate voltage modulation to alter bandgap or defect state distributions to achieve functional switching. This not only significantly increases process complexity and integration difficulty but also often makes it difficult to synergistically optimize key performance aspects such as broadband detection and multimodal synaptic plasticity. Second, some designs employ a configuration based on parallel dual photodiodes, relying on series capacitors to artificially delay the photoresponse to simulate synaptic behavior. While this method achieves dual-modal functionality, it inevitably introduces additional physical space and passive components, hindering device miniaturization and high-density integration. More critically, existing devices generally exhibit shortcomings in core performance: in photodetector mode, they are often limited by narrow detection bands, slow response speeds, or reliance on external bias voltages; in synaptic mode, they suffer from low sensitivity, poor signal-to-noise ratio, and high power consumption, severely restricting their practical application.

[0004] Two-dimensional semiconductor materials, with their atomic-level thickness, absence of dangling bonds, and tunable external fields, provide an ideal platform for constructing high-performance, reconfigurable dual-mode optoelectronic devices. However, current device designs based on two-dimensional materials still commonly involve complex heterogeneous integration or gate control designs, resulting in cumbersome fabrication processes, high costs, and difficulty in achieving a good balance between structural simplicity, process feasibility, and functional diversity.

[0005] It is evident that the existing technology still lacks a dual-mode device solution that is simple in structure, has controllable low bias voltage, and can simultaneously achieve high-performance photoelectric detection and high-sensitivity photoelectric synapse functions. It is also unclear how to achieve flexible and reversible switching and performance optimization of the two modes in a single two-dimensional van der Waals heterojunction. This has become a key bottleneck restricting the practical application of dual-mode optoelectronic devices. Summary of the Invention

[0006] Objective: This invention aims to provide a bias-controllable dual-mode van der Waals heterojunction phototransistor and its fabrication method. By independently controlling the operating state of the van der Waals heterojunction with no / low bias, it simultaneously achieves wide-band photodetection and high-sensitivity photosynaptic performance, and applies it to neuromorphic computing and imaging fields. This invention does not rely on complex methods such as chemical / physical doping and defect manipulation, effectively avoiding problems such as material polarity instability and irreversible control. It provides a simple, feasible, bias-controllable dual-mode phototransistor, its fabrication method, and its applications.

[0007] Technical solution: The present invention provides a bias-controllable dual-mode van der Waals heterojunction phototransistor, comprising a substrate, a Ta2NiX5 thin film, a ReS2 thin film, a source electrode and a drain electrode, wherein in the Ta2NiX5, X is S or Se; The Ta2NiX5 sheet is disposed above the substrate and in contact with the source electrode; The ReS2 sheet is disposed on the Ta2NiX5 sheet and the two are partially stacked. The ReS2 sheet is in contact with the drain electrode, and the Ta2NiX5 sheet and the ReS2 sheet form a van der Waals heterojunction.

[0008] Furthermore, the substrate is a rigid substrate or a flexible substrate; The rigid substrate includes Si, quartz glass, sapphire, or mica; The flexible substrate includes polyimide or polyethylene terephthalate.

[0009] Furthermore, the thickness of the ReS2 sheet is 1 nm to 50 nm; the thickness of the Ta2NiX5 sheet is 1 nm to 50 nm; and the thickness of the source electrode and the drain electrode are both 5 nm to 500 nm.

[0010] Furthermore, the source electrode and drain electrode are made of one or more composites of Cr, Ti, Ni, Cu, Al, Au, Pd, Pt, and Ag.

[0011] This invention also discloses a method for fabricating a bias-controllable dual-mode van der Waals heterojunction phototransistor, comprising the following steps: S1: The substrate is cleaned using standard semiconductor processes. Source and drain electrode patterns are defined using photolithography, electron beam exposure, or laser direct writing technology. Electrode materials are deposited by electron beam evaporation or thermal evaporation. Excess photoresist is then removed using a lift-off process to complete the fabrication of source and drain electrodes. S2: Ta2NiX5 and ReS2 thin films were obtained by mechanical peeling, where X = S or Se; S3: Transfer the Ta2NiX5 sheet onto the PDMS carrier, accurately align it under a microscope-assisted three-dimensional displacement platform, and then transfer it onto the substrate with the prepared electrode. Heat it to 70~80℃ to make good contact between the Ta2NiX5 sheet and the source electrode. S4: Transfer the ReS2 sheet onto the PDMS carrier, and use an optical microscope to help position it to accurately transfer it onto the surface of the Ta2NiX5 sheet. Heat it to 70~80℃ and hold it for 3~5 min to control the formation of a partially stacked structure and construct the Ta2NiX5 / ReS2 van der Waals heterojunction. At the same time, make good contact between the ReS2 sheet and the drain electrode. S5: The device is subjected to low-temperature annealing to optimize the interface contact and device stability, resulting in a bias-controllable dual-mode van der Waals heterojunction phototransistor.

[0012] Furthermore, in steps S3 and S4, the PDMS carrier is a polydimethylsiloxane carrier.

[0013] This invention also discloses the application of a bias-controllable dual-mode van der Waals heterojunction phototransistor in the field of photoelectric detection. Without an external bias voltage, the transistor achieves high-sensitivity and fast photoelectric detection in the visible to near-infrared bands, with a response speed at the microsecond level.

[0014] Furthermore, without an external bias voltage, the photoelectric detection performance of the transistor is used to achieve clear imaging of the optical signal.

[0015] Furthermore, when a low bias voltage of 0.5~3 V is applied, the transistor simulates the long-term enhancement and long-term inhibition plasticity behavior of biological synapses, realizing real-time processing and non-volatile storage of information; based on the transistor, an artificial neural network can be constructed to realize the recognition of structured numbers and images.

[0016] Beneficial effects: Compared with the prior art, the present invention has the following significant advantages: This invention employs a two-dimensional van der Waals heterostructure of Ta2NiX5 / ReS2, eliminating the need for complex gate or dual-branch designs. It achieves flexible and reversible switching between photodetection and photosynaptic functions solely through low-bias control, offering advantages such as structural simplicity, high-efficiency control, and excellent dual-modal performance. Furthermore, the fabrication process is highly compatible with existing semiconductor technologies, demonstrating broad application prospects in fields such as photodetection, imaging, and neuromorphic computing, and providing an efficient hardware solution for the development of integrated sensing, storage, and computing technologies. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the structure of the Ta2NiSe5 / ReS2 heterojunction phototransistor prepared in the example.

[0018] Figure 2 This is an optical microscope image of the Ta2NiSe5 / ReS2 heterojunction phototransistor prepared in the example.

[0019] Figure 3 The image shows the broadband photoresponse characteristic curves of the Ta2NiSe5 / ReS2 heterojunction phototransistor prepared in the example.

[0020] Figure 4 The image shows the response speed curve of the Ta2NiSe5 / ReS2 heterojunction phototransistor prepared in the example.

[0021] Figure 5 This is a photoelectric imaging characteristic diagram of the Ta2NiSe5 / ReS2 heterojunction phototransistor prepared in the example.

[0022] Figure 6 The curves show the photosynaptic characteristics of the Ta2NiSe5 / ReS2 heterojunction phototransistor prepared in the examples.

[0023] Figure 7 This is a schematic diagram and performance verification diagram of an artificial neural network constructed based on the Ta2NiSe5 / ReS2 heterojunction phototransistor according to an embodiment of the present invention. Detailed Implementation

[0024] The technical solution of the present invention will be further described below with reference to the accompanying drawings.

[0025] Figure 1 This is a schematic diagram of a heterojunction transistor based on ReS2 and Ta2NiSe5 provided in the embodiment. The heterojunction phototransistor includes: a Si substrate 1, a ReS2 thin film 2, a Ta2NiSe5 thin film 3, a drain electrode 4, and a source electrode 5; Example 1

[0026] In this embodiment, the thickness of the Ta2NiSe5 thin film is 29 nm, and the thickness of the ReS2 thin film is 34 nm.

[0027] In the heterojunction phototransistor prepared in this embodiment, the substrate is Si / SiO2, and the source and drain electrodes are Cr / Au with a thickness of 3 nm for Cr and 60 nm for Au.

[0028] The specific steps are as follows: Substrate cleaning and electrode fabrication A Si / SiO2 silicon oxide wafer with a SiO2 layer thickness of 285 nm was selected as the substrate. It was ultrasonically cleaned with acetone, ethanol, and deionized water for 10 min each, and then dried with a nitrogen gun. Photoresist was spin-coated onto the substrate surface using a spin coater and baked at 120℃ for 5 min. The source and drain electrode patterns were defined using ultraviolet lithography. After development, 3 nm Cr and 60 nm Au were deposited using electron beam evaporation. Finally, the substrate was placed in acetone to remove excess photoresist and dried with a nitrogen gun to complete the fabrication of the source and drain electrodes.

[0029] Preparation and transfer of Ta2NiSe5 thin films (1) Place the Ta2NiSe5 single crystal on the prepared Scotch tape and stick it on repeatedly 5 to 6 times. Use the adhesive force of the tape to mechanically peel it off and transfer the peeled Ta2NiSe5 sheet to the PDMS carrier through the Schott blue tape. (2) The PDMS carrier is mounted on a microscope-assisted three-dimensional displacement platform. The Ta2NiSe5 thin film is precisely aligned to the Si / SiO2 substrate on which the electrode has been prepared. The film is heated to 70~80℃ to make the film and the source electrode in close contact, thus completing the transfer of the Ta2NiSe5 thin film. The target thin film with a thickness of about 29 nm is screened under an optical microscope to ensure that the film has a complete morphology and no obvious defects.

[0030] ReS2 thin-film preparation and heterostructure construction Using the same mechanical exfoliation method as described above, a 34 nm thick ReS2 sheet was prepared and transferred onto a PDMS support. The PDMS containing the ReS2 sheet was mounted onto a three-dimensional displacement platform. The platform was aligned with the Ta2NiSe5 sheet on the substrate using a microscope. The substrate was heated to 70°C, allowing partial contact between the ReS2 and Ta2NiSe5 sheets. Heating was continued to 80°C and held at this temperature for 5 min. The PDMS support was then slowly lifted, separating the ReS2 sheet from the PDMS and forming a partially stacked ReS2 / Ta2NiSe5 van der Waals heterojunction with the Ta2NiSe5 sheet, while ensuring good contact between the ReS2 sheet and the drain electrode (e.g., ...). Figure 2 (As shown).

[0031] Device post-processing and dual-modal performance testing and applications (1) The prepared device was subjected to low-temperature annealing at 200℃ for 5 min to further optimize the interfacial contact between the two-dimensional material and the electrode, and between the two-dimensional material and the device to improve the working stability. (2) Dual-mode performance testing and application research of the device: Without external bias voltage, the Ta2NiSe5 / ReS2 van der Waals heterojunction phototransistor exhibits excellent photoelectric detection performance, realizing a wide-band optical response from visible light to near infrared. Figure 3 ), and its response speed reaches the microsecond level, possessing rapid detection capabilities ( Figure 4 It also exhibits good imaging characteristics, enabling clear optical signal imaging. Figure 5 When a low bias voltage of 1 V is applied, the device switches to photosynaptic mode, exhibiting excellent synaptic characteristics. By changing the intensity of the incident light, the device can transition from short-term plasticity to long-term plasticity. Figure 6 Based on the synaptic characteristics of this device, an artificial neural network was constructed and trained using the conductance changes under light pulses. Using the structured digit "7" as the input pattern, after feature extraction and processing by the network's input and hidden layers, a digit recognition accuracy of 97% was ultimately achieved. Figure 7 This verifies the effectiveness and reliability of the device in artificial neural network pattern recognition. Example 2

[0032] Fabrication of a bias-controllable dual-mode van der Waals heterojunction phototransistor, comprising the following steps: Fabrication of source and drain electrodes: Electrode patterns were photolithographically patterned on a substrate spin-coated with photoresist using laser direct writing. After development, electron beam evaporation deposition of Ti / Au (20 nm / 40 nm) and lift-off processes, the source and drain electrodes were obtained.

[0033] Fabrication of Ta2NiS5 / ReS2 van der Waals heterojunction: Ta2NiS5 and ReS2 sheets were obtained by mechanical exfoliation and transferred onto a PDMS carrier. The Ta2NiS5 sheet was first transferred onto the substrate and brought into contact with the source electrode. Then, the ReS2 sheet was transferred onto the Ta2NiS5 sheet to form a partially stacked van der Waals heterojunction and brought into contact with the drain electrode.

[0034] The heterojunction transistor constructed from Ta2NiS5 / ReS2 also achieves bias-controllable dual-mode characteristics, exhibiting wide-band photodetector performance at no bias and photosynaptic plasticity at low bias.

[0035] The embodiments described above are merely illustrative of implementation methods of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A bias-controllable dual-mode van der Waals heterojunction phototransistor, characterized in that, It includes a substrate, a Ta2NiX5 thin film, a ReS2 thin film, a source electrode, and a drain electrode, wherein X in Ta2NiX5 is S or Se; The Ta2NiX5 sheet is disposed above the substrate and in contact with the source electrode; The ReS2 sheet is disposed on the Ta2NiX5 sheet and the two are partially stacked. The ReS2 sheet is in contact with the drain electrode, and the Ta2NiX5 sheet and the ReS2 sheet form a van der Waals heterojunction.

2. The bias-controllable dual-mode van der Waals heterojunction phototransistor according to claim 1, characterized in that, The substrate is a rigid substrate or a flexible substrate; The rigid substrate includes Si, quartz glass, sapphire, or mica; The flexible substrate includes polyimide or polyethylene terephthalate.

3. The bias-controllable dual-mode van der Waals heterojunction phototransistor according to claim 1, characterized in that, The thickness of the ReS2 sheet is 1 nm to 50 nm; the thickness of the Ta2NiX5 sheet is 1 nm to 50 nm; and the thickness of the source electrode and the drain electrode is 5 to 500 nm.

4. The bias-controllable dual-mode van der Waals heterojunction phototransistor according to claim 1, characterized in that, The source electrode and drain electrode are made of one or more composites of Cr, Ti, Ni, Cu, Al, Au, Pd, Pt, and Ag.

5. A method for fabricating a bias-controllable dual-mode van der Waals heterojunction phototransistor as described in any one of claims 1 to 4, characterized in that, Includes the following steps: S1: The substrate is cleaned using standard semiconductor processes. Source and drain electrode patterns are defined using photolithography, electron beam exposure, or laser direct writing technology. Electrode materials are deposited by electron beam evaporation or thermal evaporation. Excess photoresist is then removed using a lift-off process to complete the fabrication of source and drain electrodes. S2: Ta2NiX5 and ReS2 thin films were obtained by mechanical peeling, where X = S or Se; S3: Transfer the Ta2NiX5 sheet onto the PDMS carrier, accurately align it under a microscope-assisted three-dimensional displacement platform, and then transfer it onto the substrate with the prepared electrode. Heat it to 70~80℃ to make good contact between the Ta2NiX5 sheet and the source electrode. S4: Transfer the ReS2 sheet onto the PDMS carrier, and use an optical microscope to help position it to accurately transfer it onto the surface of the Ta2NiX5 sheet. Heat it to 70~80℃ and hold it for 3~5 min to control the formation of a partially stacked structure and construct the Ta2NiX5 / ReS2 van der Waals heterojunction. At the same time, make good contact between the ReS2 sheet and the drain electrode. S5: The device is subjected to low-temperature annealing to optimize the interface contact and device stability, resulting in a bias-controllable dual-mode van der Waals heterojunction phototransistor.

6. The method according to claim 5, characterized in that, In steps S3 and S4, the PDMS carrier is a polydimethylsiloxane carrier.

7. The application of the bias-controllable dual-mode van der Waals heterojunction phototransistor according to any one of claims 1 to 4 in the field of photoelectric detection, characterized in that, Without an external bias voltage, the transistor enables highly sensitive and fast photoelectric detection in the visible to near-infrared bands, with a response speed at the microsecond level.

8. The application of the bias-controllable dual-mode van der Waals heterojunction phototransistor according to any one of claims 1 to 4 in the field of imaging, characterized in that, Without an external bias voltage, the photoelectric detection performance of the transistor is used to achieve clear imaging of the optical signal.

9. The application of the bias-controllable dual-mode van der Waals heterojunction phototransistor according to any one of claims 1 to 4 in the field of imaging, characterized in that, When a low bias voltage of 0.5~3 V is applied, the transistor simulates the long-term enhancement and long-term inhibition plasticity behavior of biological synapses, realizing real-time processing and non-volatile storage of information; based on the transistor, an artificial neural network can be constructed to realize the recognition of structured numbers and images.

Images