Display device

Abstract

A display device according to the present disclosure can include a substrate including a display area and a non-display area disposed outside the display area, the non-display area including a link area, a bending area, and a pad area; a first signal link wiring disposed in the link area; an organic insulating layer disposed on the first signal link wiring; a touch insulating structure disposed on the organic insulating layer; a second signal link wiring extending from the display area to the pad area along an upper surface of the touch insulating structure through the link area and the bending area; and a pad disposed in the pad area, wherein an end portion of the second signal link wiring can form a pad pattern of the pad.

Description

Technical Field

[0001] This disclosure relates to a display device. Background Technology

[0002] Display devices are used in a variety of electronic devices such as televisions, smartphones, laptops, and tablets. To this end, a series of studies have been conducted to develop thinner, lighter, and lower-power display devices.

[0003] Examples of display devices may include liquid crystal display devices (LCD), field light emission display devices (FED), organic light emission display devices (OLED), etc.

[0004] The bezel area of ​​a display device may include the area surrounding the display area on the display panel of the display device. The bezel area protects the periphery of the display panel and internal electronic components from external impacts, pressure, or external damage. On the other hand, the bezel area is visually perceived by the user, making it a factor that reduces immersion in the image emitted from the display area.

[0005] Therefore, in recent times, there has been an increasing demand for display devices that achieve narrow bezels or zero bezels, where narrow bezels have a reduced bezel area in which the screen of the display device is not displayed, and zero bezels have the effect of essentially eliminating the bezel area.

[0006] The display panel may include a curved area that allows it to be partially bent to conceal the pad area beneath the display area. This reduces the visually perceptible bezel area of ​​the display device.

[0007] The curved area includes multiple wirings for transmitting various signals to pixels in the display area, and these wirings can extend to the display area or pad area through a link area adjacent to the curved area.

[0008] Because multiple wirings are located in bending areas that are subject to bending, as well as in the link areas adjacent to the bending areas, they are susceptible to defects such as cracks. Summary of the Invention

[0009] In view of the above, the inventors of this disclosure have invented a display device through various experiments, wherein wiring extending to the display area or pad area via a link area adjacent to the bending area may include a robust structure against cracks.

[0010] One object of embodiments of the present disclosure is to provide a display device in which damage to wiring disposed in a link area adjacent to a curved area can be prevented.

[0011] Furthermore, another object of embodiments of the present disclosure is to provide a display device in which the signal transmission path of wiring extending from a link region adjacent to a curved region to a display area or a pad region can be simplified.

[0012] The objectives to be achieved according to the embodiments of this disclosure are not limited to those described above, and other objectives and advantages of the invention not mentioned herein may be understood from the following description and will become clearer from the embodiments of the invention. Furthermore, it will be readily understood that the objectives and advantages of this disclosure may be achieved by the means set forth in the claims and combinations thereof.

[0013] A display device according to an embodiment of the present disclosure may include: a substrate including a display area and a non-display area disposed outside the display area, the non-display area including a link area, a bending area and a pad area; a first signal link wiring disposed in the link area; an organic insulating layer disposed on the first signal link wiring; a touch insulating structure disposed on the organic insulating layer; a second signal link wiring extending from the display area to the pad area along the upper surface of the touch insulating structure through the link area and the bending area; and a pad disposed in the pad area, wherein the end of the second signal link wiring may form a pad pattern of the pad.

[0014] According to embodiments of the present disclosure, by forming an organic insulating film with a flat surface and no step difference in a non-display area extending from the display area in a lateral direction, it is possible to prevent crack defects in wiring in a link area adjacent to a curved area in the non-display area.

[0015] According to embodiments of this disclosure, by enhancing the robustness of the region adjacent to the curved region in the non-display area of ​​the substrate, crack-prone points can be prevented from appearing in the region extending from the display area through the curved region to the pad area.

[0016] Therefore, it can prevent signal wiring from being damaged by stress in the area adjacent to the bending area during bending operations in the bending area. Thus, it has the effect of further reducing the visually perceived border area from the outside while enhancing the robustness of the bending area and the area adjacent to the bending area.

[0017] According to embodiments of this disclosure, the defect rate of display devices due to damage to signal wiring can be reduced, thereby helping to reduce production energy required to produce additional display devices, thus having the effect of reducing greenhouse gas emissions.

[0018] This disclosure may have other effects besides those described above, which will be readily apparent to those skilled in the art from the following description. Attached Figure Description

[0019] Figure 1 This is a plan view of the display panel of a display device according to an embodiment of the present disclosure.

[0020] Figure 2 It is along Figure 1 The cross-sectional view taken from line II′ in the diagram.

[0021] Figure 3 It is based on Figure 1 Enlarged plan view of region II.

[0022] Figure 4 It is along Figure 3 The cross-sectional view taken from line IV-IV′ in the diagram.

[0023] Figure 5 It is based on Figure 3 Enlarged plan view of region III.

[0024] Figure 6 It is along Figure 3 The cross-sectional view taken by line VV′ in the diagram.

[0025] Figure 7 According to another embodiment of this disclosure Figure 3 Enlarged plan view of region III.

[0026] Figure 8 According to another embodiment of this disclosure Figure 3 The cross-sectional view taken from line VV′ in the diagram.

[0027] Figure 9 It is according to yet another embodiment of this disclosure. Figure 3 The cross-sectional view taken from line VV′ in the diagram. Detailed Implementation

[0028] The advantages and features of this disclosure, as well as methods for achieving these advantages and features, will become apparent when referring to the following embodiments, which are described in detail below with reference to the accompanying drawings. However, this disclosure is not limited to the embodiments disclosed below, but can be embodied in various different forms. Therefore, these embodiments are merely set forth to make this disclosure complete and to fully inform those skilled in the art of the subject of this disclosure of its scope.

[0029] To illustrate embodiments of this disclosure, the shapes, dimensions, ratios, angles, quantities, etc., disclosed in the accompanying drawings are illustrative, and this disclosure is not limited thereto. Throughout the detailed description, the same reference numerals refer to the same parts. Furthermore, in describing this disclosure, detailed descriptions of related known technologies will be omitted if it is determined that such detailed descriptions may unnecessarily obscure the essential points of this disclosure. When terms such as "comprising," "including," "having," "configured with," "consisting of," etc., are used in this disclosure, the presence or addition of other elements is permitted unless the term "only" is used. When a component is described using a singular form, it may include the meaning of the plural form unless explicitly stated otherwise.

[0030] It should be noted that any component will be interpreted as including tolerances or error ranges, even if not explicitly described.

[0031] When describing the positional relationship between two elements, such as when using "on," "above," "below," "beside," etc., one or more other elements can be inserted between the two elements, unless "exactly," "directly," or "near" are used.

[0032] When describing temporal relationships, such as when time sequence is described as “after,” “following,” “next,” “before,” etc., discontinuous cases may also be included, unless the terms “exactly” or “directly” are used.

[0033] It should be understood that although the terms "first," "second," etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. Therefore, without departing from the scope of the technical concept of this disclosure, the first element referred to in the following description may mean the second element.

[0034] The various features of the various embodiments of this disclosure may be partially or wholly linked or combined with each other to interconnect and operate in various technical ways, and each embodiment may be implemented independently of each other or together in an associated relationship.

[0035] In the following description, a display device according to each embodiment of the present disclosure will be described with reference to the accompanying drawings.

[0036] Figure 1 This is a plan view of the display panel of a display device according to an embodiment of the present disclosure. Figure 2 It is along Figure 1 The cross-sectional view taken from line II′ in the diagram. Figure 2 A sub-pixel of the display device is shown schematically.

[0037] Reference Figure 1and Figure 2 According to an embodiment of the present disclosure, the display device 1 may include a display panel 200, a printed circuit board 104, and a control circuit chip 105, etc.

[0038] The display panel 200 may include a display area AA and a non-display area NAA. The display area AA, which is the area for displaying an image, may have multiple pixels P, data lines DL, and gate lines GL disposed therein. In one example, the display area AA may include a touch sensor unit disposed in a different layer than the layer where the data lines DL and gate lines GL are disposed. The non-display area NAA may be an area where no image is displayed. The non-display area NAA may be located in the peripheral area or bezel area of ​​the display panel 200, but is not limited thereto. For example, the area in the display area AA other than the light-emitting area (light is emitted outward through the light-emitting area) may be referred to as the non-display area NAA. The non-display area NAA may define a bezel area of ​​the display device. The bezel area may surround the outer side of the display area AA.

[0039] In the non-display area NAA, wiring may be provided for providing electrical signals to or receiving electrical signals from the display area AA. For example, the non-display area NAA may include a drive circuit comprising a gate drive circuit, a data drive circuit, and a touch drive circuit. The non-display area NAA may include various drive sections for driving the display area AA. For example, the drive sections may include a first drive section 101 and a second drive section 103, but are not limited thereto.

[0040] The first driving section 101 can be disposed at the left and right edges of the non-display area NAA in a GIP (gate in panel) configuration. The first driving section 101 can transmit gate signals to the display area AA via gate wiring GL. For example, the first driving section 101 can be referred to as a gate driving section. The second driving section 103 can transmit data signals to the display area AA via multiple data wiring DL in the display area AA. Alternatively, touch signals can be sensed by multiple touch sensing units in the display area AA, the touch signals can be transmitted to the control circuit chip 105, and signals provided from the control circuit chip 105 can be transmitted to the display area AA. For example, the second driving section 103 can include a data driving section or a touch driving section, but is not limited thereto.

[0041] The gate wiring GL may extend in the first direction X of the display panel 200, and the data wiring DL may intersect with the gate wiring GL and extend in the second direction Y of the display panel 200.

[0042] The non-display area NAA extending in a direction away from the display area AA may include the link area, the curved area BDA, and the pad area PDA.

[0043] The link area may have signal wiring disposed therein for providing electrical signals to or receiving electrical signals from the display area AA. For example, the signal wiring may electrically connect the gate wiring GL, data wiring DL, or touch wiring in the display area AA to the second drive section 103 or the control circuit chip 105. These signal wirings will be described later with reference to the accompanying drawings.

[0044] The linking area may include a first linking area LKA1 and a second linking area LKA2. The first linking area LKA1 may be located between the display area AA and the pad area PDA, and the curved area BDA may be located between the first linking area LKA1 and the pad area PDA. The second linking area LKA2 may be located between the curved area BDA and the pad area PDA.

[0045] The bending region BDA can be bent such that the printed circuit board 104 can be configured to face the rear surface of the display region AA of the display panel 200. The printed circuit board 104 may include a control circuit chip 105. The control circuit chip 105 can control the first drive section 101 and the second drive section 103.

[0046] When the curved area BDA of the display panel 200 is bent, the pad area PDA of the non-display area NAA can be located below the display area AA. As a result, the lower non-display area perceived from the front of the display device 1 can be reduced.

[0047] The display area AA may include multiple pixels P and a hole H. The hole H may be an area in which electronic components for adding various functions to the display device 1 are disposed. Examples of electronic components may include a camera module for capturing or recording video in devices such as smartphones, laptops, and tablets, or various sensor devices for sensing external objects. The sensor devices may include, but are not limited to, at least one of proximity sensors, gesture sensors, color sensors, biometric sensors, and infrared sensors.

[0048] A pixel P may comprise multiple subpixels. Multiple subpixels allow an image to be displayed in a display area AA. These subpixels can be arranged in an array within the display area AA. In one example, the subpixels can be arranged in a matrix array, spaced apart from each other in a first direction and a second direction intersecting the first direction within the display area AA. The first direction can be horizontal, X-axis, or row-oriented, while the second direction can be vertical, Y-axis, or column-oriented. However, this is not exhaustive; the arrangement shape, order, and direction of the subpixels can vary in many ways.

[0049] This disclosure describes an embodiment in which one pixel P is configured with a first subpixel SP1, a second subpixel SP2, and a third subpixel SP3; however, this is not exhaustive. For example, a pixel P may also include additional subpixels.

[0050] The first to third sub-pixels SP1, SP2, and SP3 can each be implemented to emit light of the same color, such as white light, for each sub-pixel, or they can each be implemented to emit light of different colors, such as red, green, or blue light, for each sub-pixel. For example, the first sub-pixel SP1 can be red; the second sub-pixel SP2 can be green; and the third sub-pixel SP3 can be blue.

[0051] Reference Figure 2 The display area AA of the display panel 200 may include a pixel driving circuit (which includes a plurality of transistors disposed on the substrate 201), a light-emitting element 260, and a touch sensor unit 287. In this disclosure, for ease of illustration, the configuration of a sub-pixel will be described, but is not limited thereto.

[0052] A sub-pixel may include a light-emitting element 260 and a pixel driving circuit that applies a driving current to the light-emitting element 260. The pixel driving circuit is disposed on a substrate 201, and the light-emitting element 260 is disposed on the pixel driving circuit. The pixel driving circuit may include a plurality of transistors and a storage capacitor 230. In one example, the plurality of transistors may include a first transistor 220 and a second transistor 240.

[0053] The substrate 201 may be a flexible plastic substrate. If the substrate 201 is a plastic film, it may include multiple layers of insulating material. For example, the substrate 201 may include a first base layer 202, a second base layer 203, and a support layer 204. The first base layer 202 and the second base layer 203 may be disposed in upper and lower positions to be spaced apart from each other, and the support layer 204 may be disposed between them.

[0054] The first base layer 202 and the second base layer 203 may include a flexible insulating material. For example, the first base layer 202 and the second base layer 203 may include polyimide (PI). The support layer 204 may support the relatively flexible first base layer 202 and the second base layer 203. The support layer 204 may include an insulating material that is rigid relative to the first base layer 202 and the second base layer 203. For example, the support layer 204 may include silicon oxide (SiOx) or silicon nitride (SiNx).

[0055] A first buffer layer 205 may be disposed on the substrate 201. The first buffer layer 205 may cover the surface of the substrate 201. The first buffer layer 205 may reduce or prevent the penetration of moisture, oxygen or impurities through the substrate 201. The first buffer layer 205 may be a single layer or multiple layers made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx). The first buffer layer 205 may completely cover the surface of the substrate 201 in the display area AA. For example, the first buffer layer 205 may extend to the non-display area NAA surrounding the outer side of the display area AA.

[0056] A light-blocking layer 209 may be disposed on the first buffer layer 205. The light-blocking layer 209 blocks external light incident on the transistor. For this purpose, the light-blocking layer 209 may comprise an opaque metallic material. A second buffer layer 212 may be disposed on the light-blocking layer 209. The second buffer layer 212 protects the transistor from moisture, oxygen, or impurities. The second buffer layer 212 may be a single layer or multiple layers made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto. The second buffer layer 212 may completely cover the surface of the substrate 201 in the display area AA. For example, the second buffer layer 212 may extend to the non-display area NAA surrounding the outer side of the display area AA.

[0057] A first transistor 220 may be disposed on the second buffer layer 212. The first transistor 220 may include a first semiconductor layer 221, a first gate insulating layer 222, a first gate electrode 223, a first source electrode 224, and a first drain electrode 225. In one example, the first transistor 220 may be a switching transistor.

[0058] The first semiconductor layer 221 may include a channel region and a source / drain region. The region of the first semiconductor layer 221 that overlaps with the first gate electrode 223 in the vertical direction may be the channel region. The source / drain regions may be respectively disposed on both sides of the channel region. The first semiconductor layer 221 may be formed of one or a combination of a polycrystalline silicon semiconductor layer and a low-temperature polycrystalline silicon semiconductor layer. In another example, the first semiconductor layer 221 may include an oxide semiconductor layer. For example, it may include at least one oxide semiconductor material such as indium gallium zinc oxide (IGZO) or indium zinc oxide (IZO).

[0059] When the first semiconductor layer 221 includes an oxide semiconductor layer, the first transistor 220 can be an oxide thin-film transistor. The first semiconductor layer 221 can be configured to overlap with the light-blocking layer 209 in the vertical direction. The light-blocking layer 209 can block external light incident on the first semiconductor layer 221.

[0060] A first gate insulating layer 222 may be disposed between the first semiconductor layer 221 and the first gate electrode 223. The first gate insulating layer 222 may extend outward while covering the first semiconductor layer 221. The first gate insulating layer 222 may be configured as a single layer or multiple layers formed of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx). The first gate insulating layer 222 may completely cover the surface of the substrate 201 in the display area AA. For example, the first gate insulating layer 205 may extend to the non-display area NAA surrounding the outer side of the display area AA. In the non-display area NAA, the second buffer layer 212 and the first gate insulating layer 222 may be in contact with each other at vertical positions to form a first insulating structure 213.

[0061] A first gate electrode 223 may be disposed on a first gate insulating layer 222. A first interlayer insulating layer 214 may be disposed on the first gate electrode 223. The first interlayer insulating layer 214 may be a single layer or multiple layers made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx). In one example, the first interlayer insulating layer 214 may extend to a non-display area NAA surrounding the outer side of the display area AA.

[0062] The first source electrode 224 and the first drain electrode 225 can be electrically connected to the first semiconductor layer 221.

[0063] The storage capacitor 230 may include a first storage electrode 231 and a second storage electrode 232. For example, the first storage electrode 231 may be disposed in the same layer as the first gate electrode 223. For example, the first storage electrode 231 may be disposed at different locations on the first gate insulating layer 222, spaced apart from the first gate electrode 223. The first storage electrode 231 may be made of the same material as the first gate electrode 223. The second storage electrode 232 may be disposed on the first interlayer insulating layer 214 so as to overlap with the first storage electrode 231 in the vertical direction.

[0064] The first storage electrode 231 and the second storage electrode 232 can be made of any one or an alloy of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), in single or multiple layers. However, these materials are not exhaustive.

[0065] A second interlayer insulating layer 216 may be disposed on the second storage electrode 232. The second interlayer insulating layer 216 may be a single layer or multiple layers made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx). In one example, the second interlayer insulating layer 216 may extend to the non-display area NAA surrounding the display area AA.

[0066] On the second interlayer insulating layer 216, the second transistor 240 may be configured to be spaced apart from the first transistor 220. The second transistor 240 may be electrically connected to the first transistor 220. For example, the second transistor 240 may include a second semiconductor layer 241, a second gate insulating layer 242, a second gate electrode 243, a second source electrode 245, and a second drain electrode 246. In one example, the second transistor 240 may be a driving transistor electrically connected to the light-emitting element 260.

[0067] The second semiconductor layer 241 may include a channel region and a source / drain region. The region of the second semiconductor layer 241 that overlaps with the second gate electrode 243 in the vertical direction may be the channel region. The source / drain regions may be respectively disposed on opposite sides of the channel region. The second semiconductor layer 241 may be configured as an oxide semiconductor layer. For example, it may include at least one oxide semiconductor material such as indium gallium zinc oxide (IGZO) or indium zinc oxide (IZO). In one example, the second semiconductor layer 241 may be configured to overlap with the storage capacitor 230 in the vertical direction. Thus, the storage capacitor 230 can block external light incident on the second semiconductor layer 241 from the outside of the substrate 201. Therefore, the characteristics of the second transistor 240 can be prevented from being altered by external light.

[0068] A second gate insulating layer 242 may be disposed between the second semiconductor layer 241 and the second gate electrode 243. The second gate insulating layer 242 may extend outward while covering the second semiconductor layer 241. For example, the second gate insulating layer 242 may extend to the non-display area NAA surrounding the display area AA. The second gate insulating layer 242 may be configured as a single layer or multiple layers formed of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx).

[0069] The first gate electrode 223 or the second gate electrode 243 can be a single layer or multiple layers made of any one or an alloy of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). However, these materials are not exhaustive.

[0070] A third interlayer insulating layer 218 may be disposed on the second gate electrode 243. The third interlayer insulating layer 218 may comprise an insulating material. For example, the third interlayer insulating layer 218 may be a single layer or multiple layers comprising inorganic insulating materials such as silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON). In one example, the third interlayer insulating layer 218 may extend to a non-display area NAA surrounding the outer side of the display area AA. In the non-display area NAA, the third interlayer insulating layer 218, the second gate insulating layer 242, and the second interlayer insulating layer 216 may be in vertical contact with each other to form a second insulating structure 219.

[0071] A first source electrode 224, a first drain electrode 225, a second source electrode 245, and a second drain electrode 246 may be disposed on the third interlayer insulating layer 218.

[0072] The first source electrode 224 and the first drain electrode 225 can penetrate the third interlayer insulating layer 218, the second gate insulating layer 242, the second interlayer insulating layer 216, the first interlayer insulating layer 214, and the first gate insulating layer 222 so as to directly contact and connect with the source / drain regions of the first semiconductor layer 221, respectively.

[0073] The second source electrode 245 and the second drain electrode 246 can penetrate the third interlayer insulating layer 218 and the second gate insulating layer 242 to directly contact and connect with the source region / drain region of the second semiconductor layer 241, respectively. The second drain electrode 246 of the second transistor 240 can be electrically connected to the storage capacitor 230. For example, a portion of the second drain electrode 246 can penetrate the third interlayer insulating layer 218, the second gate insulating layer 242, and the second interlayer insulating layer 216 to directly contact and connect with the second storage electrode 232 of the storage capacitor 230.

[0074] The first source electrode 224, the first drain electrode 225, the second source electrode 245, or the second drain electrode 246 can be a single layer or multiple layers made of any one or an alloy of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), but are not limited thereto. In one example, the first source electrode 224 or the second drain electrode 225 can be a titanium / aluminum / titanium (Ti / Al / Ti) stacked structure.

[0075] A passivation layer 247 may be disposed on the first source electrode 224, the first drain electrode 225, the second source electrode 245, or the second drain electrode 246. The passivation layer 247 may be a single layer or multiple layers comprising an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. The passivation layer 247 protects the pixel driving circuit disposed beneath it.

[0076] A planarization layer 250 may be disposed on the passivation layer 247. The planarization layer 250 can planarize step differences caused by pixel driving circuitry disposed beneath it. The planarization layer 250 may include a multilayer structure formed by a first planarization layer 251 and a second planarization layer 252. For example, each of the first planarization layer 251 and the second planarization layer 252 may include an organic insulating material such as polyimide or acrylic resin. Therefore, the planarization layer 250 may be referred to as an organic insulating layer. In one example, the first planarization layer 251 and the second planarization layer 252 may extend to the non-display area NAA surrounding the outer side of the display area AA.

[0077] A pixel contact electrode 255 may be disposed on the first planarization layer 251. The pixel contact electrode 255 may penetrate the first planarization layer 251 and the passivation layer 247 to directly contact the second drain electrode 246 of the second transistor 240.

[0078] A light-emitting element 260 may be formed on the planarization layer 250. For example, a light-emitting element 260 may be disposed on the second planarization layer 252. The light-emitting element 260 may include a first electrode 261, a light-emitting layer 263, a second electrode 265, and a cover layer 267.

[0079] The light-emitting element 260 can be electrically connected to the pixel driving circuit via the first electrode 261. For example, the first electrode 261 can penetrate the second planarization layer 252 to directly contact the pixel contact electrode 255. Thus, the first electrode 261 can be electrically connected to the second transistor 240 via the pixel contact electrode 255. However, Figure 2 This is one example illustrating a method of supplying current to the first electrode 261, and is not limited to physical contact with the second transistor 240, which serves as a driving transistor, and the first electrode 261. In one example, the switching transistor electrically connected to the first electrode 261 may be a light-emitting transistor. For example, the light-emitting transistor can control the on and off states of the light-emitting element 260. The pixel contact electrode 255 may include a conductive material. For example, the pixel contact electrode 255 may include a metallic material such as aluminum (Al), chromium (Cr), copper (Cu), titanium (Ti), molybdenum (Mo), or tungsten (W). In one example, the pixel contact electrode 255 may have a multilayer structure of titanium / aluminum / titanium (Ti / Al / Ti).

[0080] The first electrode 261 may include a transparent conductive film. For example, the first electrode 261 may include indium tin oxide (ITO) or indium zinc oxide (IZO). Alternatively, the first electrode 261 may include a single-layer or multi-layer structure comprising a reflective metallic film formed of one or an alloy of silver (Ag), aluminum (Al), gold (Au), nickel (Ni), and chromium (Cr). The first electrode 261 may also be referred to as an anode electrode or a pixel electrode.

[0081] A dam 262 may be provided on the first electrode 261. The dam 262 may be configured to cover the edge of the first electrode 261. A portion of the dam 262 may extend into the second planarization layer 252. The exposed upper surface of the first electrode 261 not covered by the dam 262 may serve as a light-emitting area. The dam 262 may be formed of an organic insulating material. The dam 262 may include, for example, photosensitive polyimide, photoacrylic acid, or benzocyclobutene (BCB).

[0082] A spacer 264 may also be provided on the embankment 262. The spacer 264 may be configured to prevent damage to the embankment 262 and the first electrode 261 during the process. The spacer 264 may be formed of the same material as the embankment 262. The embankment 262 and the spacer 264 may be stacked in the vertical direction to form an organic insulating structure 266.

[0083] A light-emitting layer 263 may be disposed on the first electrode 261. The light-emitting layer 263 may include a hole transport layer (HTL), an organic light-emitting layer (EML), an electron transport layer (ETL), a hole blocking layer (HBL), a hole injection layer (HIL), an electron blocking layer (EBL), and an electron injection layer (EIL). The light-emitting layer 263 may have a multi-stack structure in which two or more organic light-emitting layers (EML) are stacked.

[0084] A second electrode 265 may be disposed on the light-emitting layer 263. The second electrode 265 may be connected to the light-emitting layer 263 formed in all pixels. Therefore, the second electrode 265 may also be referred to as a cathode electrode or a common electrode. The second electrode 265 may include a semi-transparent conductive material. For example, it may be formed of a metallic material such as magnesium (Mg), silver (Ag), or an alloy of silver (Ag) and magnesium (Mg) (Ag-Mg). In one example, the second electrode 265 may include a transparent conductive film formed of indium tin oxide (ITO), indium zinc oxide (IZO), etc.

[0085] A capping layer 267 may be provided on the second electrode 265. The capping layer 267 can improve the light extraction efficiency by preventing the loss of light generated from the light-emitting layer 263.

[0086] An encapsulation portion 270 may be provided on the light-emitting element 260. The encapsulation portion 270 can protect the light-emitting element 260 from external oxygen or moisture. The encapsulation portion 270 can extend to the non-display area NAA located outside the display area AA, while covering the display area AA.

[0087] The encapsulation portion 270 may include a multi-layer structure, wherein a first encapsulation layer 271, a second encapsulation layer 273, and a third encapsulation layer 275 are disposed. The second encapsulation layer 273 may be configured to be disposed between the first encapsulation layer 271 and the third encapsulation layer 275.

[0088] A first encapsulation layer 271 may be disposed on a cover layer 267. A second encapsulation layer 273 may be disposed on a first encapsulation layer 271. The second encapsulation layer 273 may cover the first encapsulation layer 271 and may have sufficient thickness to have a flat surface. The second encapsulation layer 273 may prevent foreign matter from penetrating into the light-emitting element 260. A third encapsulation layer 275 may be disposed on the second encapsulation layer 273. The first encapsulation layer 271 and the third encapsulation layer 275 may extend to a non-display area NAA surrounding the outer side of the display area AA. The first encapsulation layer 271 and the third encapsulation layer 275 extending to the non-display area NAA may be stacked vertically to form an inorganic insulating structure.

[0089] The first encapsulation layer 271 and the third encapsulation layer 275 may comprise inorganic insulating materials, and the second encapsulation layer 273 may comprise organic insulating materials. For example, each of the first encapsulation layer 271 and the third encapsulation layer 275 may comprise at least one material selected from silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON). The second encapsulation layer 273 may comprise at least one material selected from epoxy resin, polyimide, polyethylene, and acrylate.

[0090] A touch portion may be provided on the package portion 270. The touch portion may include a touch buffer layer 277, a touch sensor unit 287, a touch interlayer insulating layer 282, a first touch protective layer 290, and a second touch protective layer 295.

[0091] A touch buffer layer 277 may be disposed on the third encapsulation layer 275. The touch buffer layer 277 can relieve stress between the encapsulation portion 270 and the touch sensor unit 287 to prevent damage to the encapsulation portion 270 and the light-emitting element 260. The touch buffer layer 277 may include an inorganic insulating material. For example, the touch buffer layer 277 may include silicon nitride (SiNx).

[0092] The touch sensor unit 287 may include a plurality of touch electrodes 285 and a bridging electrode 281. The plurality of touch electrodes 285 and the bridging electrode 281 may be disposed on different layers. For example, the bridging electrode 281 may be disposed on a touch buffer layer 277. The plurality of touch electrodes 285 may be disposed on a touch interlayer insulating layer 282. The plurality of touch electrodes 285 may include a first touch electrode 283 and a second touch electrode 284. The bridging electrode 281 may electrically connect to an adjacent first touch electrode 283. For this purpose, the first touch electrode 283 may penetrate the touch interlayer insulating layer 282 to connect with the bridging electrode 281. The touch interlayer insulating layer 282 may include an inorganic insulating material. For example, the touch interlayer insulating layer 282 may include silicon nitride (SiNx).

[0093] The first touch electrode 283, the second touch electrode 284, or the bridging electrode 281 may include a conductive material. The first touch electrode 283, the second touch electrode 284, or the bridging electrode 281 may include a single layer or multiple layers made of any one or an alloy of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu).

[0094] The touch buffer layer 277 and the touch interlayer insulating layer 282 may extend toward the non-display area NAA. The touch buffer layer 277 and the touch interlayer insulating layer 282 in the non-display area NAA may contact each other in the vertical direction to form a touch insulating structure 280.

[0095] A touch protection layer 297 may be provided on the touch sensor unit 287. The touch protection layer 297 may include a first touch protection layer 290 and a second touch protection layer 295. The first touch protection layer 290 prevents damage to the touch sensor unit 287 caused by external impacts and moisture. The first touch protection layer 290 may include an organic insulating material. For example, the first touch protection layer 290 may be made of a photosensitive acrylic or polyimide organic material. The first touch protection layer 290 may extend into the non-display area NAA.

[0096] A second touch protection layer 295 may be disposed on the first touch protection layer 290. The second touch protection layer 295 also protects the touch sensor unit 287 from external impacts and moisture. Additionally, the second touch protection layer 295 can flatten step differences caused by the pattern of the touch sensor unit 287 beneath it. The second touch protection layer 295 may include an organic insulating material. For example, the second touch protection layer 295 may include the same organic insulating material as the first touch protection layer 290, but is not limited thereto. For example, the second touch protection layer 295 may include an organic insulating material different from the first touch protection layer 290. For example, the touch protection layer 297 may extend to the non-display area NAA surrounding the outer side of the display area AA.

[0097] Figure 3 It is based on Figure 1 View of area II. Figures 4 to 6 This is a view according to one embodiment of the present disclosure. For example, Figure 4 It is along Figure 3 The cross-sectional view taken from line IV-IV′ in the diagram. Figure 5 It is based on Figure 3 Enlarged plan view of region III. Figure 6 It is along Figure 3 The cross-sectional view taken from line VV′ in the diagram. Figure 4The diagram shows a portion of an area in which the first signal link wiring 223L is configured to transmit signals (or gate signals) for driving pixels in the display area AA. Figure 5 and Figure 6 The diagram shows that the second signal link wiring 287L is configured as part of the area for transmitting signals to the touch sensor unit.

[0098] Reference Figures 3 to 5 The display panel 200 may include a non-display area NAA disposed at a side edge portion of the display area AA. For example, it may include a first link area LKA1, a curved area BDA, a second link area LKA2, and a portion of the pad area PDA within the non-display area NAA. In one example, the second link area LKA2 may include a first area TRA1, a second area TRA2, and a third area TRA3.

[0099] The first region Ta1 can be the area where the data routing DL of the display area AA extends toward the pad area PDA. The second region TRA2 can be the area where the routing links to multiple first signals (223L, see...) extend toward the pad area PDA. Figure 4 (It is connected to the gate wiring GL) The connection wiring 255-1 extends towards the pad area PDA. In one example, the second area TRA2 may also be referred to as the GIP trace area. The third area TRA3 may be where multiple second signal link wirings (287L, see Figure 6 The first part 287-1 (which is related to the touch electrode (285, see ) Figure 2 The connection wiring 255-1 for electrical connections extends toward the pad area of ​​the PDA. In one example, the third area TRA3 may also be referred to as the touch trace area. The third area TRA3 may be located between the first area TRA1 and the second area TRA2, but is not limited thereto.

[0100] In the first link region LKA1, the first link contact electrode 225-1 of the second region TRA2, which connects to the second link region LKA2 via the bend region BDA, and the first portion 287-1 of the second signal link wiring 287L, which connects to the third region TRA3 of the second link region LKA2 via the bend region BDA, can be positioned at different locations. In the second link region LKA2, the second link contact electrode 225-2 extending to the pad region PDA and the second portion 287-2 of the second signal link wiring 287L extending to the pad region PDA can be positioned at different locations. The bend region BDA may include multiple connection wirings 255-1. Each connection wiring 255-1 electrically connects the signal wiring of the first link region LKA1 to the signal wiring of the second link region LKA2.

[0101] The first portions 287-1 of the plurality of first link contact electrodes 225-1 and the plurality of second signal link wirings 287L may each extend along a second direction (Y) in a first link region LKA1. The link wirings 255-1 may extend along the second direction (Y) in a curved region BDA. The second portions 287-2 of the plurality of second link contact electrodes 225-2 and the plurality of second signal link wirings 287L may each extend along a second direction (Y) in a second link region LKA2. The second direction Y may be the vertical direction or the center direction of the display panel 200.

[0102] Reference Figure 3 and Figure 4 A first insulating structure 213 may be provided in the first link region LKA1, the bent region BDA, the second link region LKA2, and the pad region PDA of the substrate 201. The first insulating structure 213 may include a second buffer layer 212 extending from the display region AA and a first gate insulating layer 222. For example, the first insulating structure 213 may include multiple layers comprising inorganic insulating materials.

[0103] A plurality of first signal link wirings 223L may be provided on the first insulating structure 213. The first signal link wirings 223L may be electrically connected to corresponding gate wirings GL in the display area AA. The first signal link wirings 223L may also be referred to as gate link wirings. In one example, the first signal link wirings 223L may be made of the same material as the first gate electrode 223 and formed in the same process as the first gate electrode 223.

[0104] A first pad pattern 223p may be provided on the first insulating structure 213 in the pad area of ​​the PDA. The first pad pattern 223p may be made of the same material as the first gate electrode 223 and formed in the same process as the first gate electrode 223.

[0105] A second insulating structure 219 may be provided on the first signal link wiring 223L. The second insulating structure 219 may be formed such that the third interlayer insulating layer 218, the second gate insulating layer 242, and the second interlayer insulating layer 216 extending from the display area AA are in contact with each other in the vertical direction. For example, the second insulating structure 219 may include multiple layers comprising inorganic insulating material.

[0106] The second insulating structure 219 may continuously extend to the first link region LKA1, the bend region BDA, and the second link region LKA2. The end of the second insulating structure 219 may be located in the pad region PDA. However, the first pad pattern 223p may not be covered by the second insulating structure 219.

[0107] In embodiments of this disclosure, for ease of illustration, the first signal link wiring 223L has been described by way of example as being formed in the same process as the first gate electrode 223, but is not limited thereto. For example, the first signal link wiring 223L may be formed of the same material as the second memory electrode 232 and in the same process as the second memory electrode 232, or it may be formed of the same material as the second gate electrode 243 and in the same process as the second gate electrode 243. Alternatively, in another example, the first signal link wiring 223L may include multiple wirings disposed in different layers.

[0108] Link contact electrodes 225L may be disposed on the second insulating structure 219. Link contact electrodes 225L may include a first link contact electrode 225-1 and a second link contact electrode 225-2. The first link contact electrode 225-1 may be disposed in a first link region LKA1 adjacent to the display region AA. The second link contact electrode 225-2 may be disposed in a second link region LKA2 adjacent to the pad region PDA. The first link contact electrode 225-1 and the second link contact electrode 225-2 may be disposed in the same layer and spaced apart from each other. The first link contact electrode 225-1 and the second link contact electrode 225-2 may be made of the same material as the second source electrode 245 and the second drain electrode 246 and formed in the same process as the second source electrode 245 and the second drain electrode 246.

[0109] The first link contact electrode 225-1, disposed in the first link region LKA1, can be electrically connected to the first signal link wiring 223L. For example, the first link contact electrode 225-1 can be connected to the first signal link wiring 223L via a first through-hole electrode 225c penetrating the second insulating structure 219. In one example, the first through-hole electrode 225c can be formed in a single body with the first link contact electrode 225-1. The area where the first link contact electrode 225-1 and the first signal link wiring 223L are electrically connected to each other can be the link contact region LCA.

[0110] A second link contact electrode 225-2, spaced apart from the first link contact electrode 225-1 and disposed in the second link region LKA2, may extend into the pad region PDA. For example, the second link contact electrode 225-2 may extend along an inclined surface at the end of the second insulating structure 219 to cover the first pad pattern 223p in the pad region PDA. A portion of the second link contact electrode 225-2 covering the first pad pattern 223p may be the second pad pattern 225p.

[0111] On the second insulating structure 219, a first planarization layer 251 may be configured to cover the first link contact electrode 225-1 and the second link contact electrode 225-2. The first planarization layer 251 may be disposed in the first link region LKA1, the bent region BDA, and the second link region LKA2 of the substrate 201. The first planarization layer 251 may extend to a portion of the pad region PDA. Thus, it may cover the second link contact electrode 225-2 extending along the inclined surface of the end of the second insulating structure 219.

[0112] A connection wiring 255-1 may be provided on the first planarization layer 251. The connection wiring 255-1 may extend from the first link region LKA1 through the bend region BDA to the second link region LKA2. For example, the connection wiring 255-1 may include a first portion disposed in the first link region LKA1, a second portion disposed in the second link region LKA2, and a third portion located between the first and second portions for disposal in the bend region BDA.

[0113] The connection wiring 255-1 may be made of the same material as the pixel contact electrode 255 in the display area AA and formed in the same process as the pixel contact electrode 255. In one example, the connection wiring 255-1 may have a multilayer structure of titanium / aluminum / titanium (Ti / Al / Ti).

[0114] A first portion of the connecting wire 255-1 can be connected to a first link contact electrode 225-1 in a first contact area CTA1 via a second via electrode 255c1 penetrating the first planarization layer 251. The first contact area CTA1 is the region where the first portion of the connecting wire 255-1 and the first link contact electrode 225-1 are electrically connected to each other. Thus, the first portion of the connecting wire 255-1 can be electrically connected to a first signal link wire 223L via the second via electrode 255c1, the first link contact electrode 225-1, and the first via electrode 225c. In one example, the first link contact electrode 225-1 can be disposed in each first contact area CTA1, and adjacent first link contact electrodes 225-1 can be insulated from each other.

[0115] A second portion of the connecting wire 255-1 can be connected to a second link contact electrode 225-2 in the second contact area CTA2 via a third via electrode 255c2 penetrating the first planarization layer 251. The second contact area CTA2 is the region where the second portion of the connecting wire 255-1 and the second link contact electrode 225-2 are electrically connected to each other. Thus, the second portion of the connecting wire 255-1 can be electrically connected to a second pad pattern 225p in the pad area PDA via the second link contact electrode 225-2. Therefore, signals transmitted through the pad area PDA can be provided to pixels in the display area AA via the second link contact electrode 225-2, the second contact area CTA2, the connecting wire 255-1, the first contact area CTA1, and the first link contact electrode 225-1, which serve as signal transmission paths. In one example, the second link contact electrode 225-2 can be disposed in each second contact area CTA2, and adjacent second link contact electrodes 225-2 can be insulated from each other.

[0116] A third pad pattern 255p may be provided on the second pad pattern 225p in the pad area of ​​the PDA. The third pad pattern 255p may be made of the same material as the pixel contact electrode 255 and formed in the same process as the pixel contact electrode 255. In one example, the third pad pattern 255p may have a multilayer structure of titanium / aluminum / titanium (Ti / Al / Ti).

[0117] A second planarization layer 252 may be disposed on the connection wiring 255-1. The second planarization layer 252 may be disposed in the first link region LKA1, the bending region BDA, and the second link region LKA2 of the substrate 201, while covering the connection wiring 255-1. The second planarization layer 252 may planarize the step difference caused by the circuit elements disposed beneath it. The first planarization layer 251 and the second planarization layer 252 may include organic insulating materials.

[0118] An organic insulating structure 266 may be provided on the second planarization layer 252. The organic insulating structure 266 may be a configuration in which the embankment 262 extending from the display area AA and the spacer 264 are stacked in the vertical direction.

[0119] A touch insulating structure 280 may be provided on the organic insulating structure 266. The touch insulating structure 280 may be a structure in which a touch buffer layer 277 extending from the display area AA and a touch interlayer insulating layer 282 are in contact with each other in the vertical direction. For example, the touch insulating structure 280 may include a multilayer comprising an inorganic insulating material. For example, the touch insulating structure 280 may include silicon nitride (SiNx).

[0120] The touch insulating structure 280 may cover the exposed surface of the organic insulating material disposed beneath it. For example, the touch insulating structure 280 may cover the inclined surfaces at the ends of the organic insulating structure 266, the second planarization layer 252, and the first planarization layer 251. In one example, the touch insulating structure 280 may be disposed within the pad area of ​​the PDA, but is not limited thereto.

[0121] A first touch protection layer 290 may be provided on the touch insulation structure 280. The first touch protection layer 290 may include an organic insulating material.

[0122] A fourth pad pattern 287p may be provided on the third pad pattern 255p in the pad area PDA. The fourth pad pattern 287p may be formed of the same material as the touch electrode 285 or bridging electrode 281 of the touch sensor unit 287 and in the same process as the touch electrode 285 or bridging electrode 281. Thus, a pad PD may be provided in the pad area PDA, wherein the first pad pattern 223p, the second pad pattern 225p, the third pad pattern 255p and the fourth pad pattern 287p are stacked from bottom to top. At the very top of the pad PD, the fourth pad pattern 287p may be configured to cover the underlying structure without exposing the underlying structure.

[0123] Figure 5 It is based on Figure 3 Enlarged plan view of region III. Figure 6 It is along Figure 3 The cross-sectional view taken from line VV′ in the diagram. Figure 5 and Figure 6 In, with Figure 3 and Figure 4 The same components may be represented by the same reference numerals. Therefore, repeated descriptions will be omitted or briefly described, and different features will be described.

[0124] Reference Figure 5 and Figure 6 The second signal link wiring 287L can be electrically connected to the first signal link wiring 223L via the connection wiring 255-1. For example, the second signal link wiring 287L can be made of the same material as the touch electrode 285 extending from the display area AA and formed in the same process as the touch electrode 285.

[0125] The first signal link wiring 223L can be electrically connected to the first link contact electrode 225-1 via the first via electrode 255c in the link contact area LCA. A second link contact electrode 225-2, spaced apart from the first link contact electrode 225-1, can extend to the pad area PDA to cover the first pad pattern 223p. The first link contact electrode 225-1 and the second link contact electrode 225-2 can be electrically connected to each other via the link wiring 255-1. The link wiring 255-1 can be covered by the second planarization layer 252.

[0126] The second planarization layer 252 may include contact holes. The contact holes may penetrate the organic insulating structure 266 and the second planarization layer 252 to expose a portion of the surface of the connection wiring 255-1. The contact holes may include a first contact hole 252h1 disposed in the first link region LKA1 and a second contact hole 252h2 disposed in the second link region LKA2.

[0127] The touch insulating structure 280 may be disposed on the organic insulating structure 266 and the second planarization layer 252, and in the first contact hole 252h1 and the second contact hole 252h2, and may expose a portion of the surface of the connection wiring 255-1. The touch insulating structure 280 may cover the inclined surfaces at the ends of the organic insulating structure 266, the second planarization layer 252, and the first planarization layer 251. In one example, the touch insulating structure 280 may be disposed in the pad area of ​​the PDA, but is not limited thereto.

[0128] The second signal link wiring 287L can be disposed on the touch insulation structure 280. For example, a first portion 287-1 of the second signal link wiring 287L can be disposed in a first contact area CTA1 of a first link area LKA1. A second portion 287-2 of the second signal link wiring 287L can be disposed in a second contact area CTA2 of a second link area LKA2 spaced apart from the first link area LKA1. The first portion 287-1 and the second portion 287-2 of the second signal link wiring 287L can be disposed in the same layer.

[0129] The first portion 287-1 of the second signal link wiring 287L may extend along the touch insulation structure 280 disposed in the first contact hole 252h1 to directly contact the first portion of the connection wiring 255-1. Furthermore, the second portion 287-2 of the second signal link wiring 287L may extend along the touch insulation structure 280 disposed in the second contact hole 252h2 to directly contact the second portion of the connection wiring 255-1.

[0130] The second portion 287-2 of the second signal link wiring 287L can extend to the pad area PDA to cover the third pad pattern 255p. The portion of the second portion 287-2 of the second signal link wiring 287L that extends to the pad area PDA can become the fourth pad pattern 287p. Thus, in the pad area PDA, pads PD can be provided, wherein the first pad pattern 223p, the second pad pattern 225p, the third pad pattern 255p, and the fourth pad pattern 287p are stacked from bottom to top.

[0131] The second signal link wiring 287L can be covered by the first touch protection layer 290. The first touch protection layer 290 can cover the second signal link wiring 287L disposed in the display area AA, the first link area LKA1, the curved area BDA, and the second link area LKA2.

[0132] The second signal link wiring 287L may directly contact the link wiring 255-1 in each of the first contact areas CTA1 and second contact areas CTA2 of the first link area LKA1 and the second link area LKA2 adjacent to the curved area BDA. (Refer to...) Figure 5 The first portion 287-1 of the second signal link wiring 287L may overlap with the first portion of the connection wiring 255-1 in the vertical direction within the first contact area CTA1. Furthermore, the second portion 287-2 of the second signal link wiring 287L may overlap with the second portion of the connection wiring 255-1 in the vertical direction within the second contact area CTA2.

[0133] Therefore, the signal transmitted through the pad PD can be provided to the display area AA through the second part 287-2 of the second signal link wiring 287L, the connection wiring 255-1, and the first part 287-1 of the second signal link wiring 287L, which serve as the signal transmission path.

[0134] A first touch protection layer 290 may be provided on the second signal link wiring 287L.

[0135] Reference Figure 6The first contact hole 252h1 and the second contact hole 252h2 disposed in the first contact area CTA1 and the second contact area CTA2 can be formed by removing the second planarization layer 252. During the formation of the first contact hole 252h1 and the second contact hole 252h2, a step difference can be generated on the second planarization layer 252 in region A corresponding to the upper edge portion of the first contact hole 252h1 and the second contact hole 252h2. Furthermore, during the exposure of a portion of the surface of the connecting wiring 255-1 in the first contact hole 252h1 and the second contact hole 252h2, a step difference can be generated in region B corresponding to the bottom surface of the first contact hole 252h1 and the second contact hole 252h2 by touching the insulating structure 280.

[0136] The second signal link wiring 287L can be formed along the shape of the step difference generated on the second planarization layer 252 and the step difference generated on the touch insulation structure 280. A portion where a step difference has already occurred may become a weak point where the second signal link wiring 287L is damaged, thus potentially leading to crack defects. When a physical impact or similar event is applied to the display device, the second signal link wiring 287L may break at the cracked portion. Therefore, pixel defects or operational defects occur because signals cannot be transmitted to the display area AA, and the defect rate of the display device may increase as a result.

[0137] Therefore, another embodiment of this disclosure may include a structure capable of preventing the formation of weak points that could cause cracks in the second signal link wiring 287L.

[0138] Figure 7 and Figure 8 This is a diagram according to another embodiment of the present disclosure. For example, Figure 7 It is based on Figure 3 Enlarged plan view of region III. Figure 8 It is along Figure 3 The cross-sectional view taken from line VV′ in the diagram. Figure 7 and Figure 8 This illustrates a portion of the area where the second signal link wiring is configured to transmit signals to the touch sensor unit. Figure 7 and Figure 8 In, with Figures 4 to 6 The same components may be represented by the same reference numerals. Therefore, repeated descriptions will be omitted or briefly described, and different features will be described.

[0139] Reference Figure 7 and Figure 8A first insulating structure 213 may be provided in the non-display area NAA of the substrate 201. A first signal link wiring 223L may be provided on the first insulating structure 213. A first pad pattern 223p may be provided on the first insulating structure 213 in the pad area PDA. The first pad pattern 223p may be formed of the same material as the first signal link wiring 223L and the first gate electrode 223 and in the same process as the first signal link wiring 223L and the first gate electrode 223.

[0140] A second insulating structure 219 may be provided on the first signal link wiring 223L. The second insulating structure 219 may include multiple layers comprising inorganic insulating material. For example, the second insulating structure 219 may be a structure in which the third interlayer insulating layer 218, the second gate insulating layer 242 and the second interlayer insulating layer 216 extending from the display area AA are in contact with each other in the vertical direction.

[0141] Link contact electrodes 225L may be disposed on the second insulating structure 219. Link contact electrodes 225L may include a first link contact electrode 225-1 and a second link contact electrode 225-2. The first link contact electrode 225-1 and the second link contact electrode 225-2 may be disposed in the same layer. The first link contact electrode 225-1 and the second link contact electrode 225-2 may be disposed spaced apart from each other. For example, the first link contact electrode 225-1 may be disposed in a first link region LKA1 adjacent to the display region AA. The second link contact electrode 225-2 may be disposed in a second link region LKA2 adjacent to the pad region PDA. The first link contact electrode 225-1 and the second link contact electrode 225-2 may be made of the same material as the second source electrode 245 and the second drain electrode 246 and formed in the same process as the second source electrode 245 and the second drain electrode 246.

[0142] The first link contact electrode 225-1, located in the first link region LKA1, can be electrically connected to the first signal link wiring 223L via the first through-hole electrode 225c. The first signal link wiring 223L can be electrically connected to the first link contact electrode 225-1 via the first through-hole electrode 255c in the link contact region LCA.

[0143] The second link contact electrode 225-2, which is located in the second link region LKA2, can extend to the pad region PDA to contact the first pad pattern 223p.

[0144] A first planarization layer 251 may be provided on the first link contact electrode 225-1 and the second link contact electrode 225-2. The first planarization layer 251 may extend to a portion of the pad area of ​​the PDA. Thus, it may cover the second link contact electrode 225-2 extending along the inclined surface of the end of the second insulating structure 219.

[0145] The first planarization layer 251 can planarize the step difference caused by the first link contact electrode 225-1 and the second link contact electrode 225-2.

[0146] A second planarization layer 252 may be disposed on the first planarization layer 251. The second planarization layer 252 may be disposed in the first link region LKA1, the bending region BDA, and the second link region LKA2 of the substrate 201. The first planarization layer 251 and the second planarization layer 252 may include organic insulating materials.

[0147] Since the second planarization layer 252 is disposed on the first planarization layer 251 which has a planarization surface, it can have a planar surface.

[0148] An organic insulating structure 266 may be provided on the second planarization layer 252. The organic insulating structure 266 may include the same organic insulating material as the embankment 262 and spacer 264 provided in the display area AA.

[0149] A touch insulating structure 280 may be provided on the organic insulating structure 266. The touch insulating structure 280 may be a structure in which a touch buffer layer 277 extending from the display area AA and a touch interlayer insulating layer 282 are in contact with each other in the vertical direction. For example, the touch insulating structure 280 may include multiple layers comprising inorganic insulating materials. For example, the touch insulating structure 280 may include silicon nitride (SiNx).

[0150] The touch insulation structure 280 may be disposed along a flat surface in the first link region LKA1, the curved region BDA, and the second link region LKA2. The touch insulation structure 280 may cover the inclined surfaces at the ends of the organic insulation structure 266, the second planarization layer 252, and the first planarization layer 251 in the pad region PDA.

[0151] A second signal link wiring 287L may be provided on the touch insulating structure 280. The second signal link wiring 287L may be continuously provided on the flat touch insulating structure 280. Thus, the second signal link wiring 287L may be formed at the same height in each of the first link region LKA1, the bend region BDA, and the second link region LKA2. For example, the second signal link wiring 287L may be located at the same height from the upper surface of the second planarization layer 252 in each of the first link region LKA1, the bend region BDA, and the second link region LKA2. That is, the distance (height) between the second signal link wiring 287L and the upper surface of the second planarization layer 252 may be uniform in the first link region LKA1, the bend region BDA, and the second link region LKA2. For example, the second signal link wiring 287L may be provided in a single continuous layer in the first link region LKA1, the bend region BDA, and the second link region LKA2.

[0152] The second signal link wiring 287L can extend to the pad area PDA to cover the third pad pattern 255p. A portion of the extension of the second signal link wiring 287L to the pad area PDA can become the fourth pad pattern 287p of the pad PD in the pad area PDA.

[0153] Thus, pads can be formed in the pad area of ​​the PDA, wherein the first pad pattern 223p, the second pad pattern 225p, the third pad pattern 255p and the fourth pad pattern 287p are stacked from bottom to top.

[0154] A first touch protection layer 290 may be provided on the second signal link wiring 287L. The first touch protection layer 290 may include an organic insulating material. The first touch protection layer 290 may include an opening area OA that exposes the area of ​​the second signal link wiring 287L corresponding to the curved area BDA.

[0155] In the display device, the neutral plane may be located inside the substrate 201. The neutral plane is a plane in which compressive stress and tensile stress cancel each other out during bending motion, resulting in no stress. The effect of stress can be reduced as the distance to the neutral plane increases. The first touch protection layer 290 can optimize the neutral plane by including an opening region OA disposed at a position corresponding to the bending region BDA.

[0156] According to another embodiment of this disclosure, the first planarization layer 251 disposed in the first link region LKA1 adjacent to the curved region BDA and the second link region LKA2 adjacent to the pad region PDA can be configured to have the same height without any step difference. Furthermore, the second planarization layer 252 disposed on the first planarization layer 251 can also be disposed at the same height in the first link region LKA1, the curved region BDA, and the second link region LKA2 without any step difference, because no step difference appears in the first planarization layer 251 below the second planarization layer 252. Moreover, the organic insulating structure 266 disposed on the second planarization layer 252 can also be disposed at the same height without any step difference.

[0157] Therefore, the second signal link wiring 287L can be arranged along a flat surface without an uneven understructure, thus preventing crack defects caused by irregular surfaces (such as step differences). In other words, the second signal link wiring 287L can have a flat shape between the link areas (i.e., LKA1 and LKA2) and the pad area BDA. Therefore, defects such as breakage due to cracking of the second signal link wiring 287L can be prevented, thereby reducing the defect rate of the display device. Furthermore, the reduction in the defect rate of the display device will contribute to the reduction of production energy, which is necessary for producing additional display devices, thus having the effect of reducing greenhouse gas emissions.

[0158] Furthermore, since the second signal link wiring 287L is disposed along a flat surface and has no uneven lower structure, it can prevent the second signal link wiring 287L in the first link area LKA1 or the second link area LKA2 adjacent to the curved area BDA from being damaged by stress generated when the curved area BDA undergoes bending motion. Therefore, it has the ability to further reduce the visually perceived border area from the outside while enhancing the robustness of the curved area BDA and the area adjacent to the curved area.

[0159] Furthermore, the second signal link trace 287L can be extended as a single trace through the first link region LKA1, the bend region BDA, and the second link region LKA2 to the pad region PDA. Thus, in the third region TRA3 of the second link region LKA2 (see...), Figure 3 In this configuration, signals can be provided from the pad area PDA to the display area AA without using the first contact area CTA1 and the second contact area CTA2, which are configured as a multi-level structure (see [link]). Figure 6Therefore, step differences that can occur when constructing multi-level structures can be prevented, thus making the structure of the second signal link wiring 287L robust against cracks. Furthermore, since the second signal link wiring 287L extends as a single wiring through the first link region LKA1, the bend region BDA, and the second link region LKA2 to the pad region PDA, signal loss or noise generation can be reduced, which would occur in the first contact region CTA1 and the second contact region CTA2, which are configured as multi-level structures (see...). Figure 6 In the signal path of ).

[0160] Figure 9 These are figures based on yet another embodiment of this disclosure. For example, Figure 9 It is along Figure 3 The cross-sectional view taken from line VV′ in the diagram. Figure 9 In, with Figure 8 Identical parts may be represented by the same reference numerals. Therefore, repeated descriptions will be omitted or briefly described, and different features will be described.

[0161] Reference Figure 9 A first insulating structure 213, comprising an inorganic insulating material, may be provided in the non-display area NAA of the substrate 201. A second insulating structure 219 may be provided on the first insulating structure 213. The first link area LKA1 may include a first signal link wiring 223L disposed between the first insulating structure 213 and the second insulating structure 219.

[0162] A first linking contact electrode 225-1 and a second linking contact electrode 225-2 may be provided on the second insulating structure 219.

[0163] The first link contact electrode 225-1 can be electrically connected to the first signal link wiring 223L through the first through-hole electrode 225c. The first signal link wiring 223L can be electrically connected to the first link contact electrode 225-1 through the first through-hole electrode 255c in the link contact area LCA.

[0164] A second link contact electrode 225-2, located at a position spaced apart from the first link contact electrode 225-1, may extend to the pad area of ​​the PDA, and a portion of the second link contact electrode 225-2 may form a second pad pattern 225p covering the first pad pattern 223p.

[0165] The first planarization layer 251 may cover the first link contact electrode 225-1 and the second link contact electrode 225-2. For example, the first planarization layer 251 may cover the second link contact electrode 225-2 extending along the inclined surface of the end of the second insulating structure 219 in the pad region PDA.

[0166] A second planarization layer 252 may be provided on the first planarization layer 251. Since the second planarization layer 252 is provided on the first planarization layer 251 which has a planarized surface, it can have a flat surface.

[0167] A touch insulating structure 280 may be provided on the second planarization layer 252. The touch insulating structure 280 may be a structure in which a touch buffer layer 277 extending from the display area AA and a touch interlayer insulating layer 282 are in contact with each other in the vertical direction. For example, the touch insulating structure 280 may include multiple layers comprising inorganic insulating material. For example, the touch insulating structure 280 may include silicon nitride (SiNx). The touch insulating structure 280 may cover the inclined surfaces at the ends of the first planarization layer 251 and the second planarization layer 252 in the pad area PDA. The touch insulating structure 280 may be formed as a flat surface without step differences.

[0168] A second signal link wiring 287L may be provided on the touch insulation structure 280. Since the second signal link wiring 287L is provided on the touch insulation structure 280 which is formed as a flat surface, the second signal link wiring 287L can be formed at the same height in the first link area LKA1, the curved area BDA and the second link area LKA2 without any step difference.

[0169] The second signal link wiring 287L can extend to the pad area PDA to cover the third pad pattern 255p. A portion of the extension of the second signal link wiring 287L to the pad area PDA can become the fourth pad pattern 287p of the pad PD in the pad area PDA.

[0170] Thus, pads can be formed in the pad area of ​​the PDA, wherein the first pad pattern 223p, the second pad pattern 225p, the third pad pattern 255p and the fourth pad pattern 287p are stacked from bottom to top.

[0171] A first touch protection layer 290, including an opening region OA, may be provided on the second signal link wiring 287L. The opening region OA can be formed by removing a portion of the first touch protection layer 290 corresponding to the curved region BDA, thereby exposing the second signal link wiring 287L.

[0172] According to another embodiment of this disclosure, since the second signal link wiring 287L is disposed on the first planarization layer 251, the second planarization layer 252 and the touch insulation structure 280 (which has a flat surface on the underside of the second signal link wiring 287L), cracks in the second signal link wiring 287L due to uneven surfaces can be prevented.

[0173] Furthermore, the organic insulating structure can be omitted between the second planarization layer 252 and the touch insulating structure 280. This reduces the thickness of the display device, thereby preventing damage to the curved area BDA due to stress during operations that bend the curved area BDA.

[0174] The display device according to various embodiments of the present disclosure can be described as follows.

[0175] A display device according to an embodiment of the present disclosure may include: a substrate including a display area and a non-display area disposed outside the display area, the non-display area including a link area, a bending area and a pad area; a first signal link wiring disposed in the link area; an organic insulating layer disposed on the first signal link wiring; a touch insulating structure disposed on the organic insulating layer; a second signal link wiring extending from the display area to the pad area along the upper surface of the touch insulating structure through the link area and the bending area; and a pad disposed in the pad area, wherein the end of the second signal link wiring may form a pad pattern of the pad.

[0176] According to various embodiments of this disclosure, the second signal link wiring may have a flat shape between the link region and the pad region.

[0177] According to various embodiments of this disclosure, the second signal link wiring may be located at the same height from the organic insulating layer in both the link region and the bend region.

[0178] According to various embodiments of the present disclosure, the display area may include: a plurality of transistors disposed on a substrate, each transistor including a gate electrode, a source electrode and a drain electrode; a pixel contact electrode disposed on the plurality of transistors; a light-emitting element electrically connected to the plurality of transistors through the pixel contact electrode and including a first electrode, a light-emitting layer and a second electrode; and a touch sensor unit located on the light-emitting element and including a plurality of touch electrodes.

[0179] According to various embodiments of this disclosure, the first signal link wiring may include the same material as the gate electrode and may be formed in the same process as the gate electrode.

[0180] According to various embodiments of this disclosure, the second signal link wiring may include the same material as the touch electrode and may be formed in the same process as the touch electrode.

[0181] According to various embodiments of the present disclosure, the link area may include a first link area located in a region adjacent to the display area in a non-display area, and a second link area spaced apart from the first link area and located in a region adjacent to the pad area in a non-display area, and a first signal link wiring may be disposed in the first link area.

[0182] According to various embodiments of the present disclosure, the first link region may include a first link contact electrode that overlaps with the first signal link wiring in the vertical direction, and the second link region may include a second link contact electrode disposed in the same layer as the first link contact electrode and having an end with a pattern forming a pad.

[0183] According to various embodiments of the present disclosure, the display device may further include a first touch protection layer disposed on a second signal link wiring, wherein the first touch protection layer may include an opening region exposing the second signal link wiring at a location corresponding to a curved region.

[0184] According to various embodiments of the present disclosure, the organic insulating layer may include a first planarization layer covering the first signal link wiring and a second planarization layer located on the first planarization layer.

[0185] According to various embodiments of the present disclosure, the display device may further include a structure disposed between the second planarization layer and the touch insulating structure and comprising an organic insulating material.

[0186] According to various embodiments of the present disclosure, the pad may include: a first pad pattern comprising the same material as the first signal link wiring; a second pad pattern disposed on the first pad pattern and being the end of the second link contact electrode; a third pad pattern disposed on the second pad pattern and comprising the same material as the pixel contact electrode; and a fourth pad pattern being the end of the second signal link wiring.

[0187] According to various embodiments of this disclosure, the second signal link wiring may be disposed in the same layer in the first link region, the bend region, and the second link region.

[0188] According to various embodiments of the present disclosure, the first link contact electrode may be electrically connected to a first signal link wiring, and the link wiring may extend from the first link region through a bend region to a second link region to connect the first link contact electrode and the second link contact electrode.

[0189] According to various embodiments of this disclosure, the connection wiring may be made of the same material as the pixel contact electrode and formed in the same process as the pixel contact electrode.

[0190] Although embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, those skilled in the art will understand that the present disclosure is not limited to the above embodiments, and that the above embodiments can be practiced in various modifications without departing from the technical concept of the present disclosure. Therefore, the embodiments disclosed in this disclosure are not intended to limit the technical concept of the present disclosure, but rather to explain it, and the scope of the technical concept of the present disclosure is not limited by these embodiments. Therefore, it should be understood that the above embodiments are given by way of example only in all respects and are not intended to limit the present disclosure.

Claims

1. A display device, comprising: A substrate includes a display area and a non-display area disposed outside the display area, the non-display area including a link area, a bending area and a pad area; A first signal link wiring is provided in the link area; An organic insulating layer is disposed on the first signal link wiring; The touch insulating structure is disposed on the organic insulating layer; The second signal link wiring extends from the display area to the pad area along the upper surface of the touch insulation structure through the link area and the bending area; as well as Pads are provided in the pad area; The end of the second signal link wiring forms the pad pattern of the pad.

2. The display device according to claim 1, wherein, The second signal link wiring has a flat shape between the link area and the pad area.

3. The display device according to claim 1, wherein, The second signal connection wiring is located at the same height relative to the organic insulating layer in both the link area and the bend area.

4. The display device according to claim 1, wherein, The display area includes: Multiple transistors are disposed on the substrate, each transistor including a gate electrode, a source electrode, and a drain electrode; Pixel contact electrodes are disposed on the plurality of transistors; A light-emitting element, electrically connected to the plurality of transistors via the pixel contact electrode, the light-emitting element comprising a first electrode, a light-emitting layer, and a second electrode; and A touch sensor unit, located on the light-emitting element, includes multiple touch electrodes.

5. The display device according to claim 4, wherein, The first signal link wiring comprises the same material as the gate electrode, and the first signal link wiring is formed in the same process as the gate electrode.

6. The display device according to claim 4, wherein, The second signal link wiring comprises the same material as the touch electrode, and the second signal link wiring is formed in the same process as the touch electrode.

7. The display device according to claim 4, wherein, The linked area includes: The first linking area is located in the area of ​​the non-display area adjacent to the display area; and A second link region, spaced apart from the first link region, is located in the area of ​​the non-display region adjacent to the pad region; and The first signal link wiring is disposed in the first link area.

8. The display device according to claim 7, wherein, The first link region includes a first link contact electrode that overlaps with the first signal link wiring in the vertical direction, and The second link region includes a second link contact electrode, which is disposed in the same layer as the first link contact electrode and has an end that forms the pad pattern of the pad.

9. The display device according to claim 1, wherein, The display device further includes: A first touch protection layer is disposed on the second signal link wiring; The first touch protection layer includes an opening area that exposes the second signal link wiring at a location corresponding to the curved area.

10. The display device according to claim 1, wherein, The organic insulating layer includes: A first planarization layer covering the first signal link wiring; The second planarization layer is located on the first planarization layer.

11. The display device according to claim 10, wherein, The display device further includes a structure disposed between the second planarization layer and the touch insulating structure and comprising an organic insulating material.

12. The display device according to claim 8, wherein, The pads include: The first pad pattern includes the same material as the first signal link wiring; The second pad pattern is disposed on the first pad pattern and is the end of the second link contact electrode; A third pad pattern is disposed on the second pad pattern and includes the same material as the pixel contact electrode; The fourth pad pattern is the end of the second signal link wiring.

13. The display device according to claim 7, wherein, The second signal connection wiring is disposed in the same layer in the first link area, the bend area and the second link area.

14. The display device according to claim 8, wherein, The first link contact electrode is electrically connected to the first signal link wiring; and The connecting wire extends from the first link region through the bend region to the second link region to connect the first link contact electrode and the second link contact electrode.

15. The display device according to claim 14, wherein, The connection wiring is made of the same material as the pixel contact electrode and formed in the same process as the pixel contact electrode.

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