Inter-stage darlington circuit

Abstract

An apparatus for implementing a cascode circuit between two amplifier stages to provide power clamping is disclosed. In an example aspect, the apparatus includes an amplifier circuit having an input port and an output port. The amplifier circuit includes a driver amplifier, an inter-stage matching network, a power amplifier, and a cascode circuit. The driver amplifier includes a driver amplifier output and is coupled between the input port and the output port. The power amplifier includes a power amplifier input and is coupled between the driver amplifier output and the output port. The inter-stage matching network is coupled between the driver amplifier output and the power amplifier input. The cascode circuit is coupled to the inter-stage matching network via a node coupled between the driver amplifier output and the power amplifier input.

Description

Technical Field

[0001] This disclosure relates in general to signal communication or signal processing using electronic devices, and more specifically to employing Darlington circuitry between two amplifier stages, such as utilizing interstage matching networks. Background Technology

[0002] Electronic devices include traditional computing devices such as desktop computers, laptops, smartphones, wearable devices like smartwatches, and internet servers. They also include other types of computing devices such as personal voice assistants (e.g., smart speakers), wireless access points or routers, thermostats and other automation controllers, robots, automotive electronics, devices embedded in other machines such as refrigerators and industrial tools, Internet of Things (IoT) devices, and medical devices. These diverse electronic devices provide services related to productivity, communication, social interaction, security, health and safety, remote management, entertainment, transportation, and information dissemination. Therefore, electronic devices play a vital role in modern society.

[0003] In today's interconnected world, many services provided by electronic devices rely at least in part on electronic communication. Electronic communication may include, for example, the use of one or more networks (such as the Internet, Wi-Fi, etc.). ® Electronic communication refers to the exchange of wireless or wired signals transmitted over a network (or cellular network) between two or more electronic devices. Therefore, electronic communication can include wireless transmission and reception or wired transmission and reception. To transmit and receive communications, electronic devices may use transceivers, such as wireless transceivers designed for wireless communication.

[0004] Therefore, electronic communication can be achieved by transmitting signals between two wireless transceivers at two different electronic devices. For example, using a wireless transmitter, a smartphone can send wireless signals over the air to a base station (as part of uplink communication) to support mobile services. Using a wireless receiver, a smartphone can receive wireless signals transmitted from a base station over the air (as part of downlink communication) to enable mobile services. For smartphones, mobile services may include making voice and video calls, engaging in social media interactions, sending messages, watching movies, sharing videos, and performing searches. Other mobile services may include using map information or navigation instructions, finding friends, generally participating in location-based services, transferring money, obtaining another service such as ride-hailing, and so on.

[0005] Many of these mobile services rely, at least in part, on the transmission or reception of wireless signals between two or more electronic devices. Therefore, researchers, electrical engineers, and designers of electronic devices strive to develop wireless transceivers and other wireless hardware that can effectively utilize wireless signals to provide these and other mobile services. Summary of the Invention

[0006] Power clamps protect components of wireless interface devices. In one approach, a power clamp is employed on a controller die to protect a power amplifier located on a different integrated circuit die. However, the wiring distance between such a power clamp on the controller die and the power amplifier on the amplifier die is sufficient to degrade the power clamping actually provided at the power amplifier to a level below a target power clamping protection threshold. To reduce this wiring distance and at least minimize the difference between the target protection level and the achieved protection level, this document describes employing a Darlington circuit, such as in combination with an inter-stage matching network, between two amplifier stages. In some cases, the inter-stage matching network may be coupled between a driver amplifier and a power amplifier, and the Darlington circuit may provide power clamping to protect the power amplifier. In an example embodiment, the integrated circuit die may include amplifier circuitry having a driver amplifier that powers the power amplifier. The integrated circuit die may also include a Darlington circuitry that may be coupled along the signal chain between the driver amplifier and the power amplifier via a node, which may be part of an inter-stage matching network coupled between the two amplifiers. In example operation, one or more diodes and two or more transistors arranged in a Darlington configuration can clamp the voltage level at the node. The Darlington circuit can also clamp the current flowing from the output of the driver amplifier before the current “reaches” the input of the power amplifier. Therefore, the Darlington circuit can provide power clamping for the amplifier circuit, including providing power clamping for the power amplifier coupled “downstream” from the output of the driver amplifier. Furthermore, this power clamping can be achieved while having a significantly shorter wiring distance between the power clamper and the power amplifier. These and other exemplary aspects of interstage Darlington circuits are described herein.

[0007] In an example, an apparatus is disclosed. The apparatus includes an amplifier circuit having an input port and an output port. The amplifier circuit includes a driver amplifier, a power amplifier, an interstage matching network, and a Darlington circuit. The driver amplifier includes a driver amplifier output coupled between the input port and the output port. The power amplifier includes a power amplifier input coupled between the driver amplifier output and the output port. The interstage matching network is coupled between the driver amplifier output and the power amplifier input. The Darlington circuit is coupled to the interstage matching network via a node coupled between the driver amplifier output and the power amplifier input.

[0008] In one example, an apparatus for clamping power in conjunction with an interstage matching network is disclosed. The apparatus includes an amplifier circuit having an input port and an output port. The amplifier circuit includes a driver amplifier, a power amplifier, and an interstage matching network. The driver amplifier includes a driver amplifier input and a driver amplifier output, wherein the driver amplifier input is coupled to the input port. The power amplifier includes a power amplifier input and a power amplifier output, wherein the power amplifier output is coupled to the output port. The interstage matching network is coupled between the driver amplifier output and the power amplifier input. The amplifier circuit also includes components for clamping the power of a signal flowing through the interstage matching network between the driver amplifier and the power amplifier.

[0009] In an example, a method is disclosed for clamping power relative to an amplifier circuit via a Darlington circuit or for operating a power clamp having a Darlington circuit. The method includes using a drive amplifier to amplify a signal to generate a first amplified signal. The method also includes propagating the first amplified signal via an interstage matching network. The method additionally includes, in conjunction with this propagation, using two or more transistors coupled together in a Darlington transistor arrangement to clamp the first amplified signal to generate an intermediate signal. The method further includes using a power amplifier to amplify the intermediate signal to generate a second amplified signal. Attached Figure Description

[0010] Figure 1 An environment with an example electronic device is illustrated, the example electronic device having a wireless interface device, the wireless interface device including at least one example amplifier circuit with Darlington circuitry.

[0011] Figure 2 These are schematic diagrams illustrating example radio frequency (RF) front-ends and example transceivers, each of which may include at least one amplifier circuit with a Darlington circuit.

[0012] Figure 3 This is a schematic diagram illustrating an example amplifier die including an amplifier circuit and a Darlington circuit, the amplifier circuit having an interstage matching network coupled between a driver amplifier and a power amplifier, and the Darlington circuit being coupled to the interstage matching network.

[0013] Figure 4-1 This is a circuit diagram illustrating an example Darlington circuit that can be coupled to the interstage matching network of an amplifier circuit to provide forward swing power clamping.

[0014] Figure 4-2 This is a circuit diagram illustrating an example Darlington circuit that can be coupled to the interstage matching network of an amplifier circuit to provide reverse swing power clamping.

[0015] Figure 5 This is a circuit diagram illustrating an example single-ended amplifier circuit that has a driver amplifier, an interstage matching network, and a power amplifier, and has multiple example nodes at which a Darlington circuit can be coupled to provide power clamping.

[0016] Figure 6-1 and Figure 6-2 A circuit diagram illustrating an example differential amplifier circuit is depicted, which has a driver amplifier, an interstage matching network, and a power amplifier, and has multiple example nodes at which a Darlington circuit can be coupled to provide power clamping.

[0017] Figure 7 This is a circuit diagram illustrating at least one example of a differential Darlington circuit according to the first aspect.

[0018] Figure 8 This is a circuit diagram illustrating at least one example of a differential Darlington circuit according to the second aspect.

[0019] Figure 9 This is a flowchart illustrating an example process for clamping power relative to an amplifier circuit via a Darlington circuit or for operating a power clamp with a Darlington circuit. Detailed Implementation

[0020] Introduction and Overview

[0021] To facilitate the transmission and reception of wireless signals, electronic devices may use wireless interface devices, including wireless transceivers and / or radio frequency (RF) front-ends. Wireless interface devices comprise various electrical and electronic components that operate based on voltage and current and use such voltage and current to process signals. These components are designed to operate within specified voltage and current ranges. If operating conditions deviate from these specified ranges, these components may generate erroneous signaling. Furthermore, deviations from specified operating conditions may damage the components, especially when the operating current or voltage exceeds the corresponding specified range.

[0022] To protect components of a circuit, such as transistors used for amplification or switching, the circuit may include a power clamp. A power clamp prevents the power experienced by a component from exceeding an amount that could damage the component. For this purpose, a power clamp may limit voltage levels or current values. This may include limiting voltage and current based on the permissible but optional interpretation of the word "or" to encompass an inclusive "or" relationship. In some cases, a power clamp may also be used, or alternatively, to provide, for example, overvoltage protection or electrostatic discharge (ESD) protection.

[0023] In some wireless interface device environments, at least a portion of the control functionality is separated from the amplifier functionality. For example, the controller die may be separate from the amplifier die. The controller die may be implemented using complementary metal-oxide-semiconductor (CMOS) or silicon-on-insulator (SOI) process technologies, etc. The amplifier die includes amplifier circuitry (or amplification circuitry), which may include a driver amplifier and a power amplifier. Before being amplified by the amplifier die, the controller die may use filters, pre-drive amplifiers, combinations thereof, etc., to condition signals, such as radio frequency (RF) signals.

[0024] In one method of protecting circuit components, an input clamp is deployed at the controller die to meet power protection specifications for the components used in the controller die and amplifier die. However, due to the input clamp on the controller die, the wiring of the RF input signal is relatively extensive. The RF input signal enters the controller die and propagates through multiple blocks or stages to modulate the signal. Such blocks may include input attenuators, input clamps, input switches, pre-drive amplifiers, etc. The modulated RF signal then leaves the controller die and travels to the amplifier die, which includes the power amplifier. This significant wiring distance can cause problems for the RF signal. First, the wiring distance degrades the quality of the signal itself, such as by altering the phase of the signal. Second, the wiring distance shifts the designed target power clamp protection threshold to an actual power clamp protection threshold that may be lower than the target power clamp protection threshold.

[0025] This makes the components of the amplifier die (including the power amplifier) ​​susceptible to damage from voltages and currents exceeding specified limits. Consequently, the power amplifier circuitry may be damaged, and the die may become unusable. The discovery of unusable dies during testing at the manufacturing facility can result in financial losses. Furthermore, damaged dies after deployment in electronic devices pose an even greater risk, as consumer electronics devices such as mobile phones may become inoperable and be returned by consumers.

[0026] To at least reduce the wiring distance between the input power clamp and the power amplifier, this document describes other methods for protecting circuit components, wherein the power clamp is incorporated into an integrated circuit die (or integrated circuit chip) having a drive amplifier or power amplifier. For example, the amplifier die or at least one or more transistors thereof can be implemented using gallium arsenide (GaAs) semiconductor technology. The power clamp may be coupled to a node of the amplifier circuitry on the amplifier die. In some aspects, the amplifier circuitry includes a drive amplifier that powers the power amplifier. This node may be coupled between the drive amplifier and the power amplifier.

[0027] In some cases, an interstage matching network may be coupled between the driver amplifier and the power amplifier. In at least some of these cases, the node may be associated with the interstage matching network. For example, the node may be part of a wire, metal trace, or other electrical conductor that forms at least a portion of the interstage matching network. Thus, a power clamp may be coupled to the interstage matching network between the driver amplifier and the power amplifier.

[0028] In some implementations, the power clamp may be implemented using a Darlington circuit. A Darlington circuit includes two or more transistors coupled together in a Darlington arrangement between a node associated with an interstage matching network and a second node (such as a power distribution node or another node in an amplifier circuit, e.g., for a differential power amplifier). The Darlington circuit may also include one or more diodes coupled in series. A number of these series-connected diodes can at least partially establish the trigger point of the power clamp. The Darlington circuit can limit the voltage level at the node or the amount of current flowing through the node to the input of the power amplifier based on this trigger point. A second Darlington circuit coupled to the node "in the opposite manner" prevents the opposite voltage. In other words, the first Darlington circuit prevents forward signal swaying, and the second Darlington circuit prevents reverse signal swaying.

[0029] Therefore, some of the described specific implementations include an input power clamp disposed on the same die as the power amplifier, which is part of the amplifier circuitry. The power clamp can be implemented using a Darlington circuit or coupled to the interstage matching network of the amplifier circuitry. The Darlington circuit can provide voltage or current clamping at the interstage matching network of the amplifier circuitry between the driver amplifier and the power amplifier, acting as a power clamp. This clamping at the interstage matching network can thus limit the input power of the power amplifier, which, from a signal flow or signal processing point of view, "follows" the driver amplifier and the interstage matching network.

[0030] At least the power amplifier portion of an amplifier circuit can be implemented using single-ended or differential circuitry. For differential power amplifiers, this document describes how interstage Darlington circuits can be used to reduce the size of the available clamping voltage step. In some aspects, two different differential-based interstage Darlington circuits are deployed to achieve a reduced step size. Therefore, certain specific implementations described allow for finer control of the clamping voltage.

[0031] The on-die power clamping method described herein provides a significantly shorter wiring distance between the power clamp and the power amplifier along the RF signal chain. This shorter wiring distance is achieved without significantly increasing the size of the amplifier die. Therefore, the target power clamping protection threshold can be achieved at the power amplifier with greater determinism and less signal degradation. Furthermore, the overall product cost is reduced by omitting or removing the power clamp from the controller die.

[0032] The Darlington circuit can thus be coupled to an interstage matching network stage unit via at least one node to provide input clamping functionality for at least the power amplifier. Example implementations of a power clamp based on a Darlington configuration can provide power clamping capability to the input of the power amplifier via an interstage matching network. Furthermore, as the voltage at the node increases, a stronger clamping effect can be achieved (e.g., forced or imposed), providing better protection. Additional example implementations for providing power clamping protection using a Darlington circuit with an interstage matching network are described herein.

[0033] Description Example

[0034] Figure 1 An example environment 100 is illustrated with electronic device 102 having a wireless interface device 120, which includes at least one example amplifier circuit 130 having Darlington circuitry 138. This document describes an example specific implementation of the amplifier circuit 130, which may be part of a transceiver, radio frequency front-end (RFFE), etc., of a device. In environment 100, example electronic device 102 communicates with base station 104 via wireless link 106.

[0035] exist Figure 1 In this design, electronic device 102 is depicted as a smartphone. However, electronic device 102 can be implemented as any suitable computing device or other electronic device. Examples of devices that can be implemented as electronic device 102 include cellular base stations, broadband routers, access points, cellular or mobile phones, gaming devices, navigation devices, media devices, laptop computers, desktop computers, tablet computers, server computers, network attached storage (NAS) devices, smart appliances, vehicle-based communication systems, Internet of Things (IoT) devices, sensor or security devices, asset trackers, fitness management devices, wearable devices such as smart glasses or smartwatches, wireless power devices (transmitters or receivers), medical devices, and the like.

[0036] Base station 104 communicates with electronic device 102 via wireless link 106, which can be implemented as any suitable type of wireless link carrying communication signals. Although depicted as a base station tower of a cellular radio network, base station 104 can be represented or implemented as another device, such as a satellite, terrestrial broadcast tower, access point, peer-to-peer device, mesh network node, fiber optic interface, or another electronic device generally as described above. Therefore, wireless link 106 or its extensions can be connected between electronic device 102 and base station 104 in any of a variety of ways.

[0037] Wireless link 106 may include a downlink that transmits data or control information from base station 104 to electronic device 102. Wireless link 106 may also include an uplink that transmits other data or control information from electronic device 102 to base station 104. Wireless link 106 may be implemented using any suitable wireless communication protocol or standard. Examples of such protocols and standards include 3GPP Long Term Evolution (LTE) standards, such as 4G, 5G, or 6G cellular standards; IEEE 802.11 standards, such as 802.11g, ac, ax, ad, aj, or ay standards (e.g., Wi-Fi). ® 6 or WiGig ® ); IEEE 802.16 standard (e.g., WiMAX) ® );Bluetooth ® Standards; Ultra-wideband (UWB) standards (e.g., IEEE 802.15.4); etc. In some implementations, the wireless link 106 may provide power wirelessly, and the electronic device 102 or base station 104 may include a power source.

[0038] As shown with respect to some specific embodiments, electronic device 102 may include at least one application processor 108 and at least one computer-readable storage medium 110 (CRM 110). Application processor 108 may include any type of processor, such as a central processing unit (CPU) or a multi-core processor, configured to execute processor-executable instructions (e.g., code) stored in CRM 110. CRM 110 may include any suitable type of data storage medium, such as volatile memory (e.g., random access memory (RAM)), non-volatile memory (e.g., flash memory), optical media, magnetic media (e.g., magnetic disk or magnetic tape), etc. In the context of this disclosure, CRM 110 is implemented to store instructions 112, data 114, and other information of electronic device 102, and therefore CRM 110 does not include transiently propagated signals or carrier waves.

[0039] Electronic device 102 may also include one or more input / output ports 116 (I / O ports 116) and at least one display 118. The I / O ports 116 enable data exchange or interaction with other devices, networks, or users. The I / O ports 116 may include serial ports (e.g., Universal Serial Bus (USB)). ® Display 118 may include ports such as parallel ports, Ethernet ports, audio ports, infrared (IR) ports, camera ports, or other sensor ports. Display 118 may be implemented as a display screen or projection that presents graphical images provided by other components of electronic device 102, such as a user interface (UI) associated with an operating system, program, or application. Alternatively or additionally, display 118 may be implemented as a display port or virtual interface through which graphical content of electronic device 102 is conveyed or presented.

[0040] Electronic device 102 also includes at least one wireless interface device 120 and at least one antenna 122. Example wireless interface device 120 provides connectivity to appropriate networks and peer devices via a wireless link, which may be configured similarly or differently from wireless link 106. Wireless interface device 120 can facilitate communication over any suitable type of wireless network, such as wireless local area network (LAN) (WLAN), wireless personal area network (PAN) (WPAN), peer-to-peer (P2P) network, mesh network, cellular network, wireless wide area network (WAN) (WWAN), and / or navigation network (e.g., North American Global Positioning System (GPS) or another Satellite Positioning System (SPS) or Global Navigation Satellite System (GNSS)). In the context of example environment 100, electronic device 102 can bidirectionally communicate various data and control information with base station 104 via wireless interface device 120. However, electronic device 102 can communicate directly with other peer devices, alternative wireless networks, etc. Additionally, as described above, electronic device 102 can alternatively be implemented as base station 104 or another device as described herein.

[0041] As shown, the wireless interface device 120 may include at least one communication processor 124, at least one transceiver 126 (e.g., a wireless transceiver 126), and at least one radio frequency front-end 128 (RFFE 128). These components process data information, control information, and signals associated with transmitting information to the electronic device 102 via antenna 122. The communication processor 124 may be implemented as at least a part of a system-on-chip (SoC), a modem processor, or a baseband radio processor (BBP) that implements a digital communication interface for data, voice, message sending and receiving, or other applications of the electronic device 102. The communication processor 124 may include a digital signal processor (DSP) or one or more signal processing blocks (not shown) for encoding and modulating data for transmission and for demodulating and decoding received data. Additionally, the communication processor 124 may also manage (e.g., control or configure) aspects or operations of the transceiver 126, the RF front-end 128, and other components of the wireless interface device 120 to implement various communication protocols or communication technologies.

[0042] In some cases, application processor 108 and communication processor 124 may be combined into a single module or integrated circuit (IC), such as a SoC. Regardless, application processor 108, communication processor 124, or a processor may be substantially operatively coupled to one or more other components (such as CRM 110 or display 118) to enable control of various components of electronic device 102 or other interactions with those components. For example, at least one processor 108 or 124 may present one or more graphic images on a display screen embodiment of display 118 based on one or more wireless signals transmitted or received by a component of wireless interface device 120 via at least one antenna 122. Furthermore, application processor 108 or communication processor 124 (including combinations thereof) may be implemented using digital circuitry that implements the logic or functionality described herein. Additionally, communication processor 124 may also include memory (not depicted separately) for storing data and processor-executable instructions (e.g., code), such as the same or another CRM 110, or associated with it.

[0043] As shown, the wireless interface device 120 may include at least one amplifier circuit 130 (or amplifier circuit 130) described below. More specifically, transceiver 126 may include at least one amplifier circuit 130-2, or RF front end 128 may include at least one amplifier circuit 130-1 (including at least one amplifier circuit 130, both components of which may have optional but permissible inclusion or interpretation according to the word "or"). Transceiver 126 may also include circuitry and logic for filtering, switching, amplification, channelization, frequency conversion, etc. Frequency conversion functionality may include up-conversion or down-conversion of frequencies performed by a single conversion operation (e.g., using a direct conversion architecture) or by multiple conversion operations (e.g., using a superheterodyne architecture). Generally, transceiver 126 may include filters, switches, amplifiers, mixers, etc., for routing and conditioning signals transmitted or received via antenna 122.

[0044] In addition to amplifier circuitry 130-2, transceiver 126 may include an analog-to-digital converter (ADC) or a digital-to-analog converter (DAC). Figure 1 (Not shown in the figure). In operation, the ADC can convert analog signals into digital signals, and the DAC can convert digital signals into analog signals. Generally, the ADC or DAC may be implemented as part of the communication processor 124, as part of the transceiver 126, or separately from both (e.g., as another part of the SoC or as part of the application processor 108).

[0045] The components or circuitry of transceiver 126 can be implemented in any suitable manner, such as utilizing combined transceiver logic or individually as respective transmitter and receiver entities. In some cases, transceiver 126 is implemented using multiple or different parts to perform the corresponding transmit and receive operations (e.g., using...). Figure 2 (Implemented by separate send and receive chains as described in the text). Although in Figure 1 Although not shown, transceiver 126 may also include logic for performing in-phase / quadrature (I / Q) operations such as combining, phase correction, modulation, demodulation, etc.

[0046] RF front-end 128 may include one or more filters, multiple switches, or one or more amplifiers (such as amplifier circuit 130-1) for conditioning signals received via antenna 122 or for conditioning signals to be transmitted via antenna 122. RF front-end 128 may also include phase shifters (PS), peak detectors, power meters, gain control blocks, antenna tuning circuitry, n-way multiplexers, baluns, etc. Configurable components of RF front-end 128 (such as phase shifters, automatic gain controllers (AGC), or switches) may be controlled by communication processor 124 to enable communication in various modes, communication utilizing different frequency bands and / or carrier aggregation (CA), or communication using beamforming.

[0047] In some embodiments, antenna 122 is implemented as at least one antenna array comprising multiple antenna elements. Therefore, as used herein, “antenna” can refer to at least one discrete or separate antenna, at least one antenna array comprising multiple antenna elements, or a portion of an antenna array (e.g., an antenna element), depending on the context or specific implementation. At least one antenna 122 can also be part of a module comprising one or more other components of RF front-end 128 (e.g., amplifier circuitry 130-1 or a filter), or at least one antenna 122 can be a separate component.

[0048] exist Figure 1 In this document, example amplifier circuit 130 is depicted as part of transceiver 126 as amplifier circuit 130-2, as part of RF front-end 128 as amplifier circuit 130-1, etc. However, the specific implementations of amplifier circuit 130 described herein may typically be additionally or alternatively employed in other parts of wireless interface device 120 or other parts of electronic device 102. As illustrated above, amplifier circuit 130 may be included in electronic devices other than cellular phones, such as base station 104. For base stations (or mobile phones), by way of example only, the transmit or receive chain of wireless interface device 120 and / or RF front-end 128 may include amplifier circuit 130 as described herein. Other electronic devices that may employ amplifier circuit 130 include laptop computers, communication hardware for vehicles, wireless access points, etc., as described herein.

[0049] In an exemplary implementation, amplifier circuit 130 may include at least one port 132, such as input port 132-1 and output port 132-2 (or more generally, first port 132-1 and second port 132-2). As illustrated, amplifier circuit 130 may include at least one driver amplifier 134, at least one power amplifier 136, at least one Darlington circuit 138, and at least one interstage matching network 140. In some cases, driver amplifier 134 and power amplifier 136 are coupled in series between input port 132-1 and output port 132-2. As shown, driver amplifier 134 may be coupled closer to input port 132-1 than power amplifier 136, and power amplifier 136 may be coupled closer to output port 132-2 than driver amplifier 134. Therefore, driver amplifier 134 may be coupled between input port 132-1 and power amplifier 136, and power amplifier 136 may be coupled between driver amplifier 134 and output port 132-2.

[0050] Furthermore, the driver amplifier 134, the interstage matching network 140, and the power amplifier 136 may be coupled in series between the input port 132-1 and the output port 132-2. As shown, the interstage matching network 140 may be coupled between the driver amplifier 134 and the power amplifier 136 to facilitate signal propagation between them. The Darlington circuit 138 may be coupled to the interstage matching network 140 to provide power clamping functionality for one or more portions, units, or stages of the amplifier circuit 130, as described herein.

[0051] As depicted, the signal flow can travel from input port 132-1 to and through driver amplifier 134. A first amplified signal can propagate from driver amplifier 134 to and through interstage matching network 140 as an intermediate signal (e.g., an interstage signal). At power amplifier 136, the first amplified signal or intermediate signal is amplified to generate a second amplified signal. The second amplified signal is output from power amplifier 136 and can travel to output port 132-2. In conjunction with interstage matching network 140, Darlington circuit 138 can clamp the power level of the intermediate signal to generate a clamp signal for protection. In this case, power amplifier 136 can safely amplify the clamp signal.

[0052] This document primarily describes the two amplifiers of amplifier circuit 130 with regard to driver amplifier 134 and power amplifier 136. However, two or more amplifiers protected by Darlington circuit 138 may generally be referred to as the first amplifier and the second amplifier. Such other amplifiers can be or may include any type of amplifier for any purpose, such as low-noise amplifiers, operational amplifiers, amplifiers of any given class, combinations thereof, etc. The first amplifier and the second amplifier may be coupled together via interstage matching network 140.

[0053] Although Figure 1 China (and) Figures 2 to 8 The diagram explicitly depicts a specific number and arrangement of components, but the illustrated circuit (including amplifier circuit 130) may include more or fewer of any such components, as well as other components not shown. Furthermore, components may be arranged and interconnected in different ways. Reference is made below to several figures (from...). Figure 3 , Figure 4-1 and Figure 4-2 (Beginning) This document describes an example implementation of the Darlington circuit 138 and at least one node coupled thereto. However, the following sections refer to... Figure 2 Example implementations of the transceiver and RF front end are described.

[0054] Figure 2 Each example may include a Darlington circuit 138 ( Figure 2 A schematic diagram 200 of at least one amplifier circuit 130 (not shown) includes an example RF front end 128 and an example transceiver 126. Figure 2 Antenna 122 and communication processor 124 are also depicted. Communication processor 124 transmits one or more data signals to other components (such as...). Figure 1 The application processor 108 is used for further processing at 224 (e.g., for processing at the application level). As shown, circuit 200 may include a first amplifier circuit 130-1, a second amplifier circuit 130-2, a third amplifier circuit 130-3, or a fourth amplifier circuit 130-4, which includes one to four such amplifier circuits. However, circuit 200 may include different numbers of amplifiers (e.g., more or fewer amplifier circuits), may include amplifiers or other components coupled together in different ways, may include amplifiers located in different locations, may include amplifiers implemented using two or more amplifier stages, some combinations thereof, etc.

[0055] As illustrated from left to right, in the example implementation, antenna 122 is coupled to RF front-end 128, and RF front-end 128 is coupled to transceiver 126. Transceiver 126 is coupled to communication processor 124. The example RF front-end 128 includes at least one signal propagation path 222. The at least one signal propagation path 222 may include at least one amplifier circuit 130, such as amplifier circuit 130-1 and amplifier circuit 130-3. The example wireless transceiver 126 includes at least one receive chain 202 (or receive path 202) and at least one transmit chain 252 (or transmit path 252). Although only one RF front-end 128, one transceiver 126, and one communication processor 124 are shown at circuit 200, electronic device 102 or its wireless interface device 120 may include multiple instances of any or all of these components. Additionally, although... Figure 2 Only certain components are explicitly depicted and shown as coupled together in a particular manner, but transceiver 126 or RF front end 128 may include other components not illustrated (e.g., switches or buffers), more or fewer components, component arrangements coupled in different ways, etc.

[0056] In some implementations, the RF front-end 128 couples the antenna 122 to the transceiver 126 via a signal propagation path 222. In operation, the signal propagation path 222 carries a signal between the antenna 122 and the transceiver 126. During or as part of signal propagation, the signal propagation path 222 modulates the propagating signal, such as using amplifier circuit 130-1 or amplifier circuit 130-3. This enables the RF front-end 128 to couple the wireless signal 220 from the antenna 122 to the transceiver 126 as part of a receiving operation. The RF front-end 128 also enables a transmitting signal to be coupled from the transceiver 126 to the antenna 122 as part of a transmitting operation to transmit the wireless signal 220. Although Figure 2 Not explicitly shown, but the RF front end 128 or its signal propagation path 222 may include one or more other components, such as an amplifier or another amplifier circuit (e.g., a driver amplifier, power amplifier, or low-noise amplifier), a filter, a multiplier, a phase shifter, a duplexer, one or more switches, etc.

[0057] In some implementations, transceiver 126 may include at least one receive chain 202, at least one transmit chain 252, or at least one receive chain 202 and at least one transmit chain 252. From left to right, receive chain 202 may include a low-noise amplifier 204 (LNA 204), a filter 206, a mixer 208 for frequency down-conversion, and an ADC 210. Transmit chain 252 may include a power amplifier 254 (PA 254), a filter 256, a mixer 258 for frequency down-conversion, and a DAC 260. However, receive chain 202 or transmit chain 252 may include other components, such as additional amplifiers or filters (e.g., baseband frequency filters, intermediate frequency filters, or radio frequency filters), multiple mixers, one or more buffers, or at least one local oscillator, which may be electrically or electromagnetically positioned anywhere along the depicted receive and transmit chains.

[0058] The receive chain 202 is coupled between the signal propagation path 222 of the RF front-end 128 and the communication processor 124, for example, via a low-noise amplifier 204 and an ADC 210. The transmit chain 252 is coupled between the signal propagation path 222 and the communication processor 124, for example, via a power amplifier 254 and a DAC 260. The transceiver 126 may also include at least one phase-locked loop 232 (PLL 232) coupled to the mixer 208 or the mixer 258. For example, the transceiver 126 may include one PLL 232 for each transmit chain / receive chain pair, one PLL 232 for each transmit chain, one PLL 232 for each receive chain, multiple PLL 232 per chain, etc.

[0059] As shown in some example implementations of receive chain 202 along the signal propagation direction, antenna 122 is coupled to low-noise amplifier 204 via signal propagation path 222 and its amplifier circuitry 130-3. Low-noise amplifier 204 is coupled to filter 206. Filter 206 is coupled to mixer 208, and mixer 208 is coupled to ADC 210. ADC 210 is then coupled to communication processor 124. As shown in some example implementations of transmit chain 252 along the signal propagation direction, communication processor 124 is coupled to DAC 260, and DAC 260 is coupled to mixer 258. Mixer 258 is coupled to filter 256, and filter 256 is coupled to power amplifier 254. Power amplifier 254 is coupled to antenna 122 via signal propagation path 222 using its amplifier circuitry 130-1. Although only one receive chain 202 and one transmit chain 252 are explicitly shown, electronics 102 or its transceiver 126 may include multiple instances of any one or both components. Although ADC 210 and DAC 260 are illustrated as being individually coupled to communication processor 124, they may share a bus or other mechanism for communicating with processor 124. Furthermore, ADC 210 or DAC 260 may be part of communication processor 124, rather than part of transceiver 126 as illustrated, or separate from transceiver 126 and communication processor 124.

[0060] As part of the example signal reception operation, amplifier circuit 130-3 of signal propagation path 222 amplifies the received signal and forwards the amplified signal to low-noise amplifier 204. Low-noise amplifier 204 receives the amplified signal from RF front-end 128 and, based on the received signal, provides another amplified signal to filter 206. Filter 206 filters this other amplified signal and provides the filtered signal to mixer 208. Mixer 208 performs a frequency conversion operation on the filtered signal to down-convert from one frequency to a lower frequency (e.g., from radio frequency (RF) to intermediate frequency (IF), or from RF or IF to baseband frequency (BBF)). Mixer 208 may use at least one PLL 232 to perform frequency down-conversion in a single conversion step or through multiple conversion steps. Mixer 208 may provide the down-converted signal to ADC 210 for conversion and forward as a digital signal to communication processor 124.

[0061] As part of the example signal transmission operation, mixer 258 receives an analog signal at BBF from DAC 260 (or, if the signal has already been up-converted once by another mixer (not shown)). Mixer 258 upconverts the analog signal to a higher frequency (such as upconverting to an RF frequency) to generate an RF signal with a target synthesized frequency using the signal generated by PLL 232. Mixer 258 provides the RF or other upconverted signal to filter 256. Filter 256 filters the RF signal and provides the filtered signal to power amplifier 254. Thus, after being filtered by filter 256, power amplifier 254 amplifies the filtered signal and provides the amplified signal to signal propagation path 222 for signal conditioning. RF front-end 128 may use, for example, amplifier circuit 130-1 of signal propagation path 222 to provide the further amplified signal to antenna 122 for transmission as wireless signal 220.

[0062] As described herein, this signal amplification can be achieved at any one or more of the example amplifier circuits 130-1, 130-2, 130-3, or 130-4 in transceiver 126 or RF front end 128, or at other signal amplification locations in electronic device 102. Figure 2 An example implementation of amplifier circuit 130 (not shown) is employed. In some cases, if the first amplifier circuit 130-1 of the RF front end 128 includes (e.g., Figure 1 and Figure 3 If the transceiver 126 includes a driver amplifier 134, a power amplifier 136, an interstage matching network 140, and a Darlington circuit 138, then the transceiver 126 may omit the power amplifier 254 or the amplifier circuit 130-2, or may use a driver amplifier or a pre-drive amplifier to "replace" them. Additionally or alternatively, the second amplifier circuit 130-2 may include a driver amplifier, a Darlington circuit 138, and an interstage matching network 140 combined with the depicted power amplifier 254 (e.g., as part of the second amplifier circuit 130-2). Figure 2 They are not explicitly shown in the text.

[0063] In some cases, the third amplifier circuit 130-3 of the RF front end 128 includes two or more amplifiers combined with the interstage matching network 140 and the Darlington circuit 138 (e.g., as...). Figure 1 and Figure 3 (As shown). At least one of these two or more amplifiers may be implemented as a low-noise amplifier for receiving signal processing. Additionally or alternatively, the fourth amplifier circuit 130-4 may include a drive amplifier, an interstage matching network 140, and a Darlington circuit 138 combined with the depicted low-noise amplifier 204 (e.g., as part of the fourth amplifier circuit 130-4). Figure 2 (These are not explicitly shown). Further, the fourth amplifier circuitry 130-4 may alternatively include multiple low-noise amplifiers combined with the interstage matching network 140 and the Darlington circuitry 138 that provides clamping for the propagating signal. Generally, the amplifier circuitry 130 with the Darlington circuitry 138 can be deployed anywhere within the transceiver 126, the RF front-end 128, another part of the wireless interface device 120, or another part of the electronics 102.

[0064] However, circuit 200 only depicts some examples of transceiver 126 and RF front-end 128. In some cases, the various components illustrated using separate schematic boxes or circuit elements in the figures may be manufactured or packaged in different discrete ways. For example, one physical module may include components of RF front-end 128 and a portion of components of transceiver 126, and another physical module may combine communication processor 124 with the remaining components of transceiver 126. Further, in some cases, antenna 122 may be co-packaged with at least some components of RF front-end 128 (e.g., co-packaged with amplifier circuitry 130 and at least one filter) or co-packaged with those components of transceiver 126. Although Figure 2 Some amplifiers in the document are described as including Darlington circuits 138, which clamp power in conjunction with interstage matching network 140 as described herein. Figure 2 The amplifier circuit 130 (not shown) may be implemented in the absence of the Darlington circuit 138 or implemented as an amplifier circuit that clamps voltage or current in a different manner.

[0065] In additional or alternative implementations, one or more components may be physically or logically “displaced” relative to the illustrated circuitry 200 to different portions of the wireless interface device 120, and / or may be incorporated into different modules. For example, a low-noise amplifier 204 or a power amplifier 254 may be alternatively or additionally deployed in the RF front end 128, such as by being at least part of amplifier circuitry 130-3 or amplifier circuitry 130-1, respectively. Reference will be made to the following... Figure 3 Examples of amplifier circuits 130-1 or 130-2 with power amplifier 136 (or power amplifier 254) are described.

[0066] Figure 3This is a schematic diagram 300 illustrating an example amplifier die 304 including amplifier circuitry 130 and Darlington circuitry 138. The amplifier circuitry has an interstage matching network 140 coupled between the driver amplifier 134 and the power amplifier 136, and the Darlington circuitry is coupled to the interstage matching network 140. As illustrated, schematic diagram 300 includes a controller die 302 and an amplifier die 304. The controller die 302 and the amplifier die 304 can be (e.g., ...) Figure 1 and Figure 2 The communication processor 124 and (e.g., Figure 1 and Figure 2 The antennas 122 are coupled together in series. More generally, the two separate integrated circuit dies or chips may be referred to as the first die and the second die.

[0067] In the example operation, the input of the controller die 302 receives a signal from the communication processor 124. Although Figure 3 Other components (e.g., mixers, filters, or DACs) may be coupled between the communication processor 124 and the input of the controller die 302. The controller die 302 may generate a regulated signal 318 as part of a signal control process. The regulated signal 318 is provided at the output of the controller die 302 and coupled to the input of the amplifier die 304. Although not shown, one or more components may be present coupled between the output of the controller die 302 and the input of the amplifier die 304.

[0068] An amplifier die 304, including at least one amplifier, amplifies the modulated signal 318 to generate an amplified signal 328. After amplification, the amplifier die 304 provides the amplified signal 328 at its output. The amplified signal 328 can be relayed to the antenna 122. Although Figure 3 Not shown, but other components (e.g., mode switches, filters, another amplifier or front-end module (FEM)) may be coupled between the output of amplifier die 304 and antenna 122.

[0069] As shown in the figure, the controller die 302 includes at least one attenuator 312 (ATT 312), at least one pre-drive amplifier 314 (PDA 314), and at least one output matching network 316 (OMN 316). The attenuator 312, pre-drive amplifier 314, and output matching network 316 are coupled in series between the input and output terminals of the controller die 302. However, the controller die 302 may include more, fewer, or different components. Furthermore, the depicted components and other components may be arranged and coupled in a manner similar to or different from that of the depicted components.

[0070] In one approach (not shown), a power clamp may be coupled between attenuator 312 and pre-drive amplifier 314. Such a power clamp can limit the power input to downstream components, such as power amplifier 136. However, as described above, the relatively long signal path between the pre-drive amplifier 314 of controller die 302 and the power amplifier 136 of amplifier die 304 creates signaling problems. These problems include signal degradation and the inability to reach the target power clamp protection threshold at power amplifier 136.

[0071] In an example implementation, to at least partially mitigate such problems, this document describes incorporating at least one Darlington circuit 138 as at least a portion of at least one power clamp 310 at the interstage matching network 140 on amplifier die 304. The Darlington circuit 138 may provide power clamping to the integrated circuit die relative to, for example, the power of a signal supplied to the input of power amplifier 136. In addition to amplifier circuit 130, amplifier die 304 may include an input matching network 322 (IMN 322) and an output matching network 326 (OMN 326). The input matching network 322, amplifier circuit 130, and output matching network 326 may be coupled together in series between the input and output of amplifier die 304.

[0072] As shown, input matching network 322 may be coupled between the input of amplifier die 304 and amplifier circuit 130 (e.g., via input port 132-1 of amplifier circuit 130). Output matching network 326 may be coupled between amplifier circuit 130 (e.g., via output port 132-2 of amplifier circuit 130) and the output of amplifier die 304. Amplifier circuit 130 may be coupled between input matching network 322 and output matching network 326 via a series connection between the input and output of amplifier die 304. However, amplifier die 304 may include more, fewer, or different components. Furthermore, the depicted components and other components may be arranged and coupled in similar or different ways than the depicted components are arranged and coupled together.

[0073] As illustrated, amplifier circuit 130 includes at least one driver amplifier 134 (DA 134), at least one power amplifier 136 (PA 136), and at least one interstage matching network 140 (ISMN 140). Driver amplifier 134 includes a driver amplifier input and a driver amplifier output. Power amplifier 136 includes a power amplifier input and a power amplifier output. In some cases, driver amplifier 134, interstage matching network 140, and power amplifier 136 are coupled in series between input port 132-1 and output port 132-2 of amplifier circuit 130. As shown, driver amplifier 134 may be coupled closer to input port 132-1 than power amplifier 136, and power amplifier 136 may be coupled closer to output port 132-2 than driver amplifier 134. Therefore, driver amplifier 134 may be coupled between input port 132-1 and power amplifier 136, and power amplifier 136 may be coupled between driver amplifier 134 and output port 132-2.

[0074] Interstage matching network 140 can be coupled between two stages, for example, between the first stage corresponding to driver amplifier 134 and the second stage corresponding to power amplifier 136. Therefore, driver amplifier 134 can be coupled between the input port 132-1 of amplifier circuit 130 via the driver amplifier input and the interstage matching network 140 via the driver amplifier output. Power amplifier 136 can be coupled between the interstage matching network 140 via the power amplifier input and the output port 132-2 of amplifier circuit 130 via the power amplifier output.

[0075] Darlington circuit 138 may be coupled to interstage matching network 140 to provide power clamping functionality for one or more portions, units, stages, or components of amplifier die 304 (including amplifier circuit 130). For example, as at least part of power clamp 310, Darlington circuit 138 may provide power protection for downstream components, including power protection for the input of power amplifier 136. Darlington circuit 138 may be coupled, for example, to wires, traces, or other electrical paths between driver amplifier 134 and power amplifier 136; to nodes coupled between two or more components of interstage matching network 140 (e.g., between a capacitor and an inductor, or between two capacitors); to nodes or electrical paths that propagate signals from the output of driver amplifier 134 to the input of power amplifier 136; some combination thereof; and so on. References below Figures 4-1 to 8 This describes an example of the coupling between the Darlington circuit 138 and the interstage matching network 140.

[0076] As depicted, a signal flow can travel as signal 330 from input port 132-1 to driver amplifier 134. Signal 330 can be implemented as an input signal, a regulated signal, a pre-amplified signal, a combination thereof, etc. Driver amplifier 134 generates a first amplified signal 332-1 based on amplified signal 330. The first amplified signal 332-1 can propagate from driver amplifier 134 through interstage matching network 140 as an intermediate signal 334 (e.g., as an interstage signal 334). Interstage matching network 140 can couple the intermediate signal 334 to the input of power amplifier 136, which generates a second amplified signal 332-2 based on the intermediate signal 334. The second amplified signal 332-2 output from power amplifier 136 can travel to output port 132-2 of amplifier circuit 130, and then to output matching network 326. The output matching network 326 can couple the second amplified signal 332-2 to the output of the amplifier die 304 as the amplified signal 328.

[0077] Signals such as signal 330, first amplified signal 332-1, intermediate signal 334, second amplified signal 332-2, or amplified signal 328 may be different signals in terms of average power, frequency, phase, location or position in the circuit, single-ended differential, or combinations thereof. However, one or more of these signals may constitute the same signal in terms of being transmitted signals propagating towards the antenna along the transmission chain, having the same modulation, carrying the same information in the signal, or combinations thereof.

[0078] For clarity, Darlington circuit 138 in Figure 3 The middle is illustrated as being coupled to the left side of the inter-level matching network 140. For example... Figure 3 As depicted, the left side of the interstage matching network 140 is closer to its input than its output. However, the Darlington circuit 138 can be coupled to any portion of the interstage matching network 140, or any one or more of its nodes. Such portions or nodes may alternatively be closer to the power amplifier 136 or at least closer to the center portion of the interstage matching network 140, etc.

[0079] This document primarily describes the two amplifiers of amplifier circuit 130 with regard to driver amplifier 134 and power amplifier 136. However, two or more amplifiers, including at least one amplifier protected by Darlington circuit 138, may generally be referred to as the first amplifier and the second amplifier. Such other amplifiers may be or may include any type of amplifier for any purpose, such as low-noise amplifiers, operational amplifiers, amplifiers of any given class, combinations thereof, etc.

[0080] Figure 4-1This is circuit diagram 400-1 illustrating example Darlington circuit 138, which can be coupled to (e.g., Figure 1 and Figure 3 The amplifier circuit 130 includes an interstage matching network 140 to provide forward swing power clamping. The Darlington circuit 138 includes at least two nodes that can be used to couple the Darlington circuit 138 to larger circuits, such as via the interstage matching network 140. These at least two nodes include a first node 402-1 and a second node 402-2. The following references... Figure 4-1 and Figure 4-2 And further reference Figure 5 , Figure 6-1 and Figure 6-2 To describe the example circuit connection. The following is a reference. Figure 7 and Figure 8 To describe the example, we can choose the Darlington circuit.

[0081] In an example implementation, the Darlington circuit 138 includes two or more transistors 404 coupled together in a Darlington transistor arrangement or Darlington configuration 408. For example, a channel terminal of a first transistor (e.g., the transistor on the left, depicted in FIG. 4) may be coupled to a control terminal of a second transistor (e.g., the transistor on the right, depicted in FIG. 4). Further, another channel terminal of the first transistor may be coupled to a channel terminal of the second transistor. A group of transistors coupled together in a Darlington transistor arrangement may have two transistors (e.g., a Darlington pair) as shown, or may have more than two transistors. Generally, the Darlington configuration 408 for multiple transistors allows a first current amplified by the first transistor to be amplified again by the second transistor into a second current. Therefore, the total current gain may be greater than the current gain of the individual transistors.

[0082] This document describes several transistors and depicts several transistors in associated figures, which are incorporated herein by reference. Such transistors can be implemented in different ways or as different transistor types. Example transistor types include field-effect transistors (FETs), junction FETs (JFETs), metal-oxide-semiconductor FETs (MOSFETs), bipolar junction transistors (BJTs), insulated-gate bipolar transistors (IGBTs), heterojunction bipolar transistors (HBTs), combinations thereof, etc. Manufacturers can fabricate FETs as n-channel or p-channel transistor types and BJTs as NPN or PNP transistor types. For example, a heterojunction bipolar transistor (HBT) type can be considered as a form or subset of the bipolar junction transistor (BJT) type. While some transistors are depicted as HBTs in the figures, one or more of these transistors can be implemented as different transistor types, such as another type of BJT, FET, etc.

[0083] Each transistor may include at least one control terminal and one or more channel terminals. For a FET, the control terminal may correspond to the gate terminal, and the channel terminal may correspond to either the source or drain terminal. For a BJT (including HBT), the control terminal may correspond to the base terminal, and the channel terminal may correspond to either the emitter or collector terminal. In some circuit configurations, the source terminal of an FET may resemble the emitter terminal of a BJT. Similarly, the drain terminal of an FET may resemble the collector terminal of a BJT.

[0084] In the example Darlington configuration 408, the emitter (or source) terminal of the first transistor is coupled to the base (or gate) terminal of the second transistor. The base (or gate) terminal of the first transistor serves as the base (or gate) terminal of the Darlington transistor arrangement and can be used as its input terminal. The emitter (or source) terminal of the second transistor serves as the emitter (or source) terminal of the Darlington transistor arrangement and can provide output current for the Darlington configuration 408.

[0085] Continue to refer to Figure 4-1 Two or more diodes 406 may be coupled in series between a first node 402-1 and the base terminal (or gate terminal) of a Darlington configuration 408 of two or more transistors 404. The number of diodes in these two or more diodes 406 may at least partially set the voltage level that triggers the protection through the Darlington circuit 138. For example, the voltage drop across each diode (which may depend on the material or process technology) multiplied by the number of diodes may establish the voltage level for turning on the two or more transistors 404 of the Darlington configuration 408. Thus, the Darlington circuit 138 implemented as described herein (e.g., Figure 3 The power clamp 310 can be designed to provide protection at different power level thresholds. This can be achieved, at least in part, by deploying different numbers of trigger diodes for two or more diodes 406 to establish the clamp voltage implemented by the Darlington circuit 138.

[0086] At least one diode 412 and at least one resistor 414 are shown in series coupled between the base terminal (or gate terminal) of the Darlington configuration 408 and the second node 402-2. The resistance value of resistor 414 also at least partially sets the trigger voltage for clamp protection initiation. Generally, as the resistance value of resistor 414 increases, the trigger voltage for initiating clamping decreases. Another diode 416 is shown coupled between the first node 402-1 of the Darlington circuit 138 and the terminals of the Darlington configuration 408 (such as the collector terminal (or drain terminal) of the Darlington configuration 408). For example, diode 416 can be omitted while maintaining satisfactory transient performance through the Darlington circuit 138. However, in at least some circuit configurations, the presence of diode 416 can keep the voltage swing low on the Darlington transistor arrangement, which protects the Darlington configuration 408 and extends its operating life.

[0087] exist Figure 4-1 and Figure 4-2 Components depicted as part of Darlington circuit 138 (other than at least two transistors 404) may be omitted from Darlington circuit 138, or may be coupled to Darlington configuration 408 and simultaneously separate from Darlington circuit 138. Furthermore, certain components are depicted or described as having a specific number, such as singular, plural, multiple, one, two, three, etc. However, each of such components may have a different number. By way of example only, the series-connected diode string 406 can alternatively be implemented using a single diode.

[0088] In a specific implementation of the example, the Darlington circuit 138 may be coupled to or in parallel with the amplifier circuit 130 in different ways and coupled to different nodes of the circuit, as described herein. To couple the Darlington circuit 138 to the circuit, a first node 402-1 may be connected to a node of the circuit, and a second node 402-2 may be connected to another node of the circuit.

[0089] To clamp the signal from the forward swing angle, the first node 402-1 may be coupled to the inter-stage matching network node 430 (ISMN node 430). The inter-stage matching network node 430 may be (e.g., Figure 1 , Figure 3 , Figure 5 , Figure 6-1 and Figure 6-2 This is part of the inter-stage matching network 140. The second node 402-2 can be coupled to the power distribution node 432. The power distribution node 432 can be implemented using, for example, a supply voltage node (e.g., a power rail) or a ground node (e.g., a ground plane). For NPNBJTs (or n-channel FETs), the power distribution node 432 can utilize a ground node (…). Figure 4-1(not shown in the figure) to achieve this. However, the two example power distribution node types (e.g., supply voltage node to ground node) are interchangeable, such as when the transistor or diode doping is interchanged or when the direction of coupling of the depicted components is interchanged relative to the voltage potential.

[0090] The following is for reference Figure 5 , Figure 6-1 and Figure 6-2 Example instances of amplifier circuits are described below, including example inter-stage matching network node 430. However, the following references... Figure 4-2 To describe the different power clamping configurations of the Darlington circuit 138.

[0091] Figure 4-2 This is circuit diagram 400-2 illustrating example Darlington circuit 138, which can be coupled to (e.g., Figure 1 and Figure 3 The interstage matching network 140 of the amplifier circuit 130 provides reverse swing power clamping. In an example specific implementation, the Darlington circuit 138 may be coupled to or in parallel with the amplifier circuit 130 in different ways and coupled to different nodes of the circuit, as described herein. To couple the Darlington circuit 138 to the circuit, a first node 402-1 may be connected to a node of the circuit, and a second node 402-2 may be connected to another node of the circuit.

[0092] To clamp the signal from the reverse swing angle, the first node 402-1 can be coupled to the power distribution node 432. The second node 402-2 can be coupled to the inter-stage matching network node 430, which can be (e.g., ...) Figure 1 , Figure 3 , Figure 5 , Figure 6-1 and Figure 6-2 This is part of the inter-stage matching network 140. Power distribution node 432 can be implemented using, for example, a supply voltage node (e.g., a power rail) or a ground node (e.g., a ground plane). For an NPN BJT (or n-channel FET), power distribution node 432 can be implemented using a ground node. However, the two example power distribution node types (e.g., supply voltage node to ground node) are interchangeable, such as when the transistor or diode doping is interchanged or when the direction of component coupling depicted is interchanged relative to the voltage potential.

[0093] Figure 5This is a circuit diagram 500 illustrating an example single-ended amplifier circuit 130, which includes a driver amplifier 134, an interstage matching network 140, and a power amplifier 136. The single-ended amplifier circuit 130 has multiple example nodes at which a Darlington circuit 138 can be coupled to provide power clamping. Figure 5 An integrated circuit die 502 is depicted, which includes a plurality of input or output terminals that can be implemented using pins, pads or other electrical contact nodes to couple signaling to or from the integrated circuit die 502. Figure 5 Examples of such input and output terminals described include Rf.in, Rf.out, Vcc1, Vcc2, etc.

[0094] In an example implementation, the interstage matching network 140 can be implemented using a T-shaped network. As shown, the T-shaped network of the interstage matching network 140 includes a first capacitor coupled between the output of the driver amplifier and the input of the power amplifier, and a second capacitor coupled between the output of the driver amplifier and the input of the power amplifier. Along an electrical path, the first and second capacitors are coupled in series between the output of the driver amplifier 134 and the input of the power amplifier 136. The T-shaped network also includes an inductor coupled between interstage matching network node 430 and power distribution node 432 (such as a ground node). Interstage matching network node 430 may, for example, be coupled between the first and second capacitors.

[0095] However, the T-network can be implemented in different ways. For example, two capacitors can be interchanged with two inductors along the "top" of the T-network, and inductors can be interchanged with capacitors along the "columns" of the T-network. Furthermore, more or different components can be incorporated into the T-network. Additionally or alternatively, the interstage matching network 140 can be implemented using a π-network. The π-network can include any number of components, including reactive components such as inductors and capacitors. The interstage matching network 140 can also be implemented using different networks, more than one network, different components, different couplings between components, some combination thereof, etc.

[0096] As illustrated, by way of example only, the forward-swinging Darlington circuit configuration 138-F and the reverse-swinging Darlington circuit configuration 138-R are coupled to the same node, which is the interstage matching network node 430. However, these two Darlington circuits may be coupled to different nodes of the interstage matching network 140. The forward-swinging Darlington circuit configuration 138-F is coupled to the interstage matching network node 430 via the first node 402-1 of the Darlington circuit. The forward-swinging Darlington circuit configuration 138-F is coupled to the power distribution node 432 via the second node 402-2 of the Darlington circuit. Therefore, the forward-swinging Darlington circuit configuration 138-F corresponds to Figure 4-1 Example Darlington circuit 138.

[0097] The reverse-swinging Darlington circuit configuration 138-R is coupled to the inter-stage matching network node 430 via the second node 402-2 of the Darlington circuit. The reverse-swinging Darlington circuit configuration 138-R is coupled to the power distribution node 432 via the first node 402-1 of the Darlington circuit. Therefore, the reverse-swinging Darlington circuit configuration 138-R corresponds to... Figure 4-2 Example Darlington circuit 138. Although two Darlington circuits are coupled to an interstage matching network node 430 between two components located at the "top" of the T-shaped network, the interstage matching network node 430 coupled to the Darlington circuits can be located at different circuit locations. The two Darlington circuits can also be coupled to different interstage matching network nodes.

[0098] In example operation, the forward-swung Darlington circuit configuration 138-F clamps the "positive" voltage level of the intermediate signal 334 at the interstage matching network node 430. The reverse-swung Darlington circuit configuration 138-R clamps the "negative" voltage level of the intermediate signal 334 at the interstage matching network node 430. Therefore, the input of the power amplifier 136 is protected from voltage or current levels that could damage circuit components, such as one or more portions of the transistors in the power amplifier 136. The Darlington circuit can clamp the forward or reverse voltage swing at the interstage matching network node 430 in response to the voltage level of the number of diodes 406 in the respective Darlington circuit 138 (e.g., as...). Figure 4-1 and Figure 4-2 (As shown). Alternatively, as the voltage at the node increases, the Darlington circuit 138 can increase the voltage clamping action at the interstage matching network node 430.

[0099] Figure 6-1 and Figure 6-2Figure 600 is depicted together, illustrating an example differential amplifier circuit 130 having a driver amplifier 134, an interstage matching network 140, and a power amplifier 136. The example differential amplifier circuit 130 also includes multiple example nodes at which a Darlington circuit 138 can be coupled to provide power clamping. (As shown in block diagram 600...) Figure 6-1 As indicated in the upper left corner, Figure 6-1 The "left" part of the circuit is depicted as circuit 600-1, and Figure 6-2 The "right" part of the circuit is depicted as circuit 600-2. The circled letters "A", "B", "C", and "D" indicate... Figure 6-1 and Figure 6-2 The four electrical connection points between the circuit sections. Figure 6-1 and Figure 6-2 A common description is provided of an integrated circuit die 602, which includes a plurality of input or output terminals that can be implemented using pins, pads or other electrical contact nodes to couple signaling to or from the integrated circuit die 602. Figure 6-1 and Figure 6-2 Examples of such input and output terminals described include Rf.in, Int_P, Int_M, Rf.out_P, RF.out_M, Vcc1, Vcc2, etc.

[0100] In the illustrated implementation, the drive amplifier 134 may be single-ended and generate a first amplified single-ended signal 332-1. An interstage matching network 140 converts the single-ended amplified signal 332-1 into a differential intermediate signal 334. The differential intermediate signal 334 includes a positive intermediate signal 334P and a negative intermediate signal 334M. The interstage matching network 140 may include a balun (e.g., a transformer) to perform the signal conversion from single-ended to differential. In the illustrated example, the interstage matching network 140 is implemented using a T-shaped network, which includes two capacitors along the “top” of the T-shaped network for each of the positive and negative signal paths, and inductors along the “columns” of the T-shaped network. Figure 6-1 The capacitors in a portion of the interstage matching network 140 shown are operable as capacitors for both the positive and negative signal paths, assuming the intermediate signal 334 is single-ended on this side of the transformer. At least one inductor of the transformer can be used as part of a T-shaped network for interstage matching.

[0101] The positive intermediate signal 334P is coupled to the input of the positive transistor T_P of the differential power amplifier 136. The positive transistor T_P amplifies the positive intermediate signal 334P to generate a positive second amplified signal 332-2P. The positive second amplified signal 332-2P can be forwarded to the positive output terminal (Rf.out_P). The negative intermediate signal 334M is coupled to the input of the negative transistor T_M of the differential power amplifier 136. The negative transistor T_M amplifies the negative intermediate signal 334M to generate a negative second amplified signal 332-2M. The negative second amplified signal 332-2M can be forwarded to the negative output terminal (Rf.out_M).

[0102] like Figure 6-1 and Figure 6-2 As shown, connection points “B” and “C” can correspond to positive inter-stage nodes (Int_P) and negative inter-stage nodes (Int_M), respectively. These nodes can correspond to positive inter-stage matching network node 430P and negative inter-stage matching network node 430M, respectively. In some aspects, each of the positive inter-stage matching network node 430P and the negative inter-stage matching network node 430M can be coupled to two different Darlington circuits, for a total of four Darlington circuits spanning two inter-stage matching network nodes. Similarly... Figure 5 For example, each pair of Darlington circuits can be coupled to interstage matching network node 430. Therefore, each interstage matching network node 430 can be coupled to a forward-swinging Darlington circuit configuration (e.g., like...). Figure 5 Previously configured 138-F for a swinging Darlington circuit and a reverse swinging Darlington circuit configuration (e.g., like...) Figure 5 The reverse swing Darlington circuit configuration 138-R).

[0103] However, in other respects, the number of Darlington circuits can be reduced by fifty percent (50%) by coupling each of the two Darlington circuits to each of the positive-stage matching network node 430P and the negative-stage matching network node 430M. (Continued below) Figure 6-2 These aspects are described below. Each inter-level matching network node 430 is coupled to two Darlington circuits in a different (e.g., opposite) manner relative to the first node 402-1 and the second node 402-2. For example, each differential inter-level matching network node 430P or 430M may be coupled to one Darlington circuit 138 via its first node 402-1 and to another Darlington circuit 138 via its second node 402-2.

[0104] Also refer to Figure 4-1 and Figure 4-2In some cases, one node of the Darlington circuit 138 (e.g., the first node 402-1) is coupled to the collector terminal of the Darlington configuration 408 (or the drain terminal of the FET). Another node of the Darlington circuit 138 (e.g., the second node 402-2) is coupled to the emitter terminal of the Darlington configuration 408 (or the source terminal of the FET).

[0105] Regarding the inter-level matching network node 430P, ( Figure 6-2 The positive Darlington circuit 138P is coupled to the positive inter-pole matching network node via its first node 402-1. On the other hand, ( Figure 6-2 The negative Darlington circuit 138M is coupled to the positive inter-stage matching network node 430P via its second node 402-2. Therefore, the positive Darlington circuit 138P prevents the forward signal from swaying at the positive intermediate node Int_P, and the negative Darlington circuit 138M prevents the reverse signal from swaying at the positive intermediate node Int_P.

[0106] Regarding the negative interstage matching network node 430M, the positive Darlington circuit 138P is coupled to this negative interstage matching network node via its second node 402-2. Conversely, the negative Darlington circuit 138M is coupled to the negative interstage matching network node 430M via its first node 402-1. Therefore, the positive Darlington circuit 138P prevents reverse signal oscillation at the negative intermediate node Int_M, and the negative Darlington circuit 138M prevents forward signal oscillation at the negative intermediate node Int_M.

[0107] In these ways, two Darlington circuits, instead of four, can be used to protect the two differential intermediate nodes Int_P and Int_M from forward and reverse signal swaying. As shown, each Darlington circuit 138 of the differential implementation with interstage matching network 140 can be coupled to two interstage matching network nodes 430P and 430M, instead of being coupled to interstage matching network node 430 and power distribution node 432 (e.g., as shown). Figure 5 (A specific implementation of the interstage matching network 140 is shown for a single end). The positive Darlington circuit 138P is coupled to the positive interstage matching network node 430P via its first node 402-1, and to the negative interstage matching network node 430M via its second node 402-2. The negative Darlington circuit 138M is coupled to both interstage matching network nodes in the opposite manner. Therefore, the negative Darlington circuit 138M is coupled to the positive interstage matching network node 430P via its second node 402-2, and to the negative interstage matching network node 430M via its first node 402-1.

[0108] Although the two Darlington circuits are considered to be coupled to Figure 6-1 and Figure 6-2 The example describes a specific node of the differential inter-matching network 140, but each Darlington circuit 138 can be coupled to different nodes of the differential amplifier circuit 130, including different nodes coupled to the differential inter-matching network 140. Further, as described above relative to... Figure 5 The single-ended implementation of the inter-level matching network 140 described herein can be implemented using a π-shaped network, different components, or more or fewer elements.

[0109] Darlington circuit 138 (including Darlington circuits for different environments) can be implemented in different ways, such as compared to Figure 4-1 and Figure 4-2 The example circuit is shown below. Refer to the following for further details. Figure 7 and Figure 8 Two example differential Darlington circuit implementations are described below. Employing these two different differential Darlington circuit implementations allows for finer voltage steps to be selected for a range of available trigger voltages to enable power clamping. For example, the first and second differential Darlington circuit implementations described below have a voltage offset of 0.6 volts (V) between them (e.g., for example gallium arsenide (GaAs) HBT technology). Therefore, a relatively finer clamping voltage step of 0.3 volts can be achieved to support a given product or design specification.

[0110] Figure 7 The circuit diagram 700 illustrates at least one example differential Darlington circuit 138D-1 according to the first aspect. Figure 8 This is a circuit diagram 800 illustrating at least one example differential Darlington circuit 138D-2 according to the second aspect. In an example embodiment, each differential Darlington circuit 138D includes a positive transistor group 404P coupled to a Darlington transistor arrangement and a negative transistor group 404M coupled to another Darlington transistor arrangement. Each differential Darlington circuit 138D also includes a positive diode group 406P and a negative diode group 406M. Each differential Darlington circuit 138D further includes a positive series connection of a positive diode 412P and a positive resistor 414P, and a negative series connection of a negative diode 412M and a negative resistor 414M.

[0111] like Figure 7 and Figure 8 As shown, each differential Darlington circuit 138D can be coupled to the central node Int_P, such as (e.g., Figure 6-1 and Figure 6-2 The positive inter-inter-matching network node 430P of the differential inter-matching network 140. Similarly, each differential Darlington circuit 138D can be coupled to a negative intermediate node Int_M, such as (e.g., Figure 6-1 and Figure 6-2The negative inter-stage matching network node 430M of the differential inter-stage matching network 140. Positive transistor groups 404P coupled to a positive Darlington transistor arrangement and negative transistor groups 404M coupled to a negative Darlington transistor arrangement may be cross-coupled to each other, as indicated at 702. For example, the emitter (or source) terminal of the first or positive Darlington configured positive transistor group 404P may be coupled at the negative inter-stage matching network node 430M to the collector (or drain) terminal of the second or negative Darlington configured negative transistor group 404M. Similarly, the emitter (or source) terminal of the negative Darlington configured negative transistor group 404M may be coupled at the positive inter-stage matching network node 430P to the collector (or drain) terminal of the positive Darlington configured positive transistor group 404P.

[0112] The differential Darlington circuits 138D-1 and 138D-2 differ from each other in at least one respect. Figure 7 The first differential Darlington circuit 138D-1 couples the series connection of diode 412 and resistor 414 to a ground node, which is a power distribution node of the type described above. However, the emitter (or source) terminals of the positive and negative Darlington configurations are not coupled to the ground node, as indicated at 704. Figure 8 The second differential Darlington circuit 138D-2 does not couple the series connection of diode 412 and resistor 414 to the ground node. Instead, the emitter (or source) terminals of the positive and negative Darlington configurations are coupled to the series connection of diode 412 and resistor 414, as indicated at 804.

[0113] This distinct coupling at least partially results in a 0.6V phase difference in trigger voltage between the first differential Darlington circuit 138D-1 and the second differential Darlington circuit 138D-2. For example, in one example circuit design, using three diodes in diode group 406, the first differential Darlington circuit 138D-1 triggers at 2.4 volts, but the second differential Darlington circuit 138D-2 triggers at 3.0 volts. By selecting from the example first differential Darlington circuit 138D-1 and the second differential Darlington circuit 138D-2 with a 0.6V phase difference in trigger voltage, a 0.3V step size can be achieved for power clamp triggering. This allows for finer control of the trigger voltage to meet given design specifications.

[0114] Figure 9This is a flowchart illustrating an example process 900 for clamping power relative to an amplifier circuit via a Darlington circuit or for operating a power clamp having a Darlington circuit. Process 900 includes four blocks 902 to 908 specifying operations that can be performed for the method. However, the operations are not necessarily limited to the order shown in the figures or described herein, as these operations may be performed in an alternative order or in a fully or partially overlapping manner. Additionally, more, fewer, and / or different operations may be performed to perform the corresponding or alternative processes.

[0115] In the specific implementation of the example, the operation represented by the illustrated box for each process can be performed by an electronic device (such as...). Figure 1 The operation of the corresponding process can be performed by an electronic device 102 or its wireless interface device 120. More specifically, the operation of the corresponding process can be performed by an integrated circuit die (e.g., Figure 3 Amplifier die 304, Figure 5 nude film 502, or Figure 6-1 and Figure 6-2 The bare die 602) performs the operation, or it is performed by amplifier circuit 130 including a first amplifier and a second amplifier. While some descriptions herein focus specifically on amplifiers and power clamps operating on single-ended or differential signaling, the principles described with respect to one (e.g., corresponding to devices, circuits, techniques, and processes) may also apply to the other. In other words, the principles described are generally applicable to both differential and single-ended signaling environments.

[0116] At block 902, a drive amplifier is used to amplify the signal to generate a first amplified signal. For example, amplifier circuit 130 may use drive amplifier 134 to amplify signal 330 to generate a first amplified signal 332-1. For example, the transistors in the common-emitter configuration (or common-source configuration of the FET) of drive amplifier 134 amplify the signal to be transmitted.

[0117] At block 904, the first amplified signal is propagated via an interstage matching network. For example, amplifier circuit 130 can propagate the first amplified signal 332-1 via interstage matching network 140. In some cases, interstage matching network 140 may include a T-shaped network or a π-shaped network and may operate for single-ended signaling or differential signaling.

[0118] At block 906, in conjunction with this propagation, two or more transistors coupled together in a Darlington transistor arrangement are used to clamp the first amplified signal to generate an intermediate signal. For example, amplifier circuit 130 may clamp the first amplified signal 332-1 in conjunction with signal propagation to generate an intermediate signal 334 using two or more transistors 404 coupled together in a Darlington transistor arrangement (e.g., Darlington configuration 408). For this purpose, one or more of the following may clamp the intermediate signal 334 to generate a clamped signal with reduced voltage or current: forward-swung Darlington circuit configuration 138-F, reverse-swung Darlington circuit configuration 138-R, positive Darlington circuit 138P, negative Darlington circuit 138M, first differential Darlington circuit 138D-1, or second differential Darlington circuit 138D-2.

[0119] At block 908, a power amplifier is used to amplify the intermediate signal to generate a second amplified signal. For example, amplifier circuit 130 may use power amplifier 136 to amplify intermediate signal 334 to generate a second amplified signal 332-2. Thus, utilizing the power of the intermediate signal 334 clamped by at least one Darlington circuit 138, power amplifier 136 may safely amplify the clamped intermediate signal 334 using at least one transistor without damaging the at least one transistor.

[0120] Specific implementation examples

[0121] This section describes some aspects of example implementations and / or example configurations relating to the apparatus and / or processes presented above.

[0122] Example aspect 1: An apparatus comprising:

[0123] An amplifier circuit, comprising an input port and an output port, includes:

[0124] A driver amplifier, the driver amplifier including a driver amplifier output terminal, the driver amplifier being coupled between the input port and the output port;

[0125] A power amplifier, the power amplifier including a power amplifier input terminal, the power amplifier being coupled between the output terminal of the driver amplifier and the output port;

[0126] Interstage matching network, the interstage matching network being coupled between the output of the driver amplifier and the input of the power amplifier; and

[0127] A Darlington circuit, which is coupled to the interstage matching network via a node, the node being coupled between the output of the driver amplifier and the input of the power amplifier.

[0128] Example aspect 2: The apparatus according to example aspect 1, the apparatus further includes:

[0129] An integrated circuit die, the integrated circuit die including the amplifier circuit,

[0130] The Darlington circuit is configured to provide power clamping for the signal propagating from the output of the driver amplifier to the input of the power amplifier.

[0131] Example aspect 3: The apparatus according to example aspect 1 or 2, wherein the node is coupled between the channel terminal of the transistor of the drive amplifier and the control terminal of the transistor of the power amplifier.

[0132] Example aspect 4: The apparatus according to any one of the foregoing example aspects, wherein the inter-level matching network comprises a T-shaped network.

[0133] Example aspect 5: The apparatus according to example aspect 4, wherein the T-shaped network comprises:

[0134] A first capacitor is coupled between the output terminal of the drive amplifier and the input terminal of the power amplifier.

[0135] A second capacitor is coupled between the output of the drive amplifier and the input of the power amplifier; and

[0136] An inductor coupled between an interstage matching network node and a power distribution node, wherein the interstage matching network node is coupled between a first capacitor and a second capacitor.

[0137] Example aspect 6: The apparatus according to any one of Example aspects 1 to 3, wherein the inter-level matching network comprises a π-shaped network.

[0138] Example aspect 7: The apparatus according to any one of the foregoing example aspects, wherein the Darlington circuit is coupled between the node and the power distribution node.

[0139] Example aspect 8: The apparatus according to example aspect 7, wherein the power distribution node includes a ground node.

[0140] Example aspect 9: The apparatus according to any one of the foregoing example aspects, wherein:

[0141] The Darlington circuit includes:

[0142] Two or more transistors coupled together in a Darlington transistor arrangement, the Darlington transistor arrangement including a control terminal and a first channel terminal; and

[0143] One or more diodes, said one or more diodes being coupled between the control terminal and the first channel terminal; and

[0144] The first channel terminal is coupled to the node.

[0145] Example aspect 10: The apparatus according to example aspect 9, wherein:

[0146] The two or more transistors include a first transistor and a second transistor;

[0147] The channel terminal of the first transistor is coupled to the control terminal of the second transistor;

[0148] The control terminal of the first transistor corresponds to the control terminal arranged in the Darlington transistor;

[0149] The first channel terminal of the second transistor corresponds to the first channel terminal of the Darlington transistor arrangement; and

[0150] The second channel terminal of the second transistor corresponds to the second channel terminal of the Darlington transistor arrangement.

[0151] Example aspect 11: The apparatus according to example aspect 9 or 10, wherein:

[0152] The one or more diodes include a plurality of diodes coupled in series between the control terminal and the first channel terminal; and

[0153] The Darlington circuit is configured to clamp the voltage at the node in response to a voltage level based at least in part on the number of diodes among the plurality of diodes.

[0154] Example aspect 12: The apparatus according to example aspect 11, wherein the Darlington circuit is configured to increase the clamping action on the voltage at the node as the voltage at the node increases.

[0155] Example aspect 13: The apparatus according to any one of example aspects 9 to 12, wherein:

[0156] The Darlington circuit includes a first Darlington circuit of the amplifier circuit, and the Darlington transistor arrangement includes a first Darlington transistor arrangement.

[0157] The amplifier circuit includes a second Darlington circuit;

[0158] The second Darlington circuit includes:

[0159] Two or more transistors coupled together in a second Darlington transistor arrangement, the second Darlington transistor arrangement including a control terminal, a first channel terminal, and a second channel terminal; and

[0160] One or more diodes, said one or more diodes being coupled between the control terminal of the second Darlington transistor arrangement and the first channel terminal of the second Darlington transistor arrangement; and

[0161] The second channel terminal of the second Darlington transistor arrangement is coupled to the node.

[0162] Example aspect 14: The apparatus according to example aspect 13, wherein:

[0163] The first Darlington transistor arrangement includes a second channel terminal;

[0164] The second channel terminal of the first Darlington transistor arrangement is coupled to the power distribution node; and

[0165] The first channel terminal of the second Darlington transistor arrangement is coupled to the power distribution node.

[0166] Example aspect 15: The apparatus according to example aspect 14, wherein the power distribution node includes a ground node.

[0167] Example aspect 16: The apparatus according to example aspect 13, wherein:

[0168] The first Darlington transistor arrangement includes a second channel terminal;

[0169] The second channel terminal of the first Darlington transistor arrangement is coupled to the first channel terminal of the second Darlington transistor arrangement; and

[0170] The first channel terminal of the first Darlington transistor arrangement is coupled to the second channel terminal of the second Darlington transistor arrangement.

[0171] Example aspect 17: The apparatus according to example aspect 16, wherein:

[0172] The power amplifier includes a differential power amplifier, which includes a positive transistor and a negative transistor;

[0173] The first channel terminal of the first Darlington transistor and the second channel terminal of the second Darlington transistor correspond to the positive inter-stage matching network nodes coupled to the positive transistor; and

[0174] The second channel terminal of the first Darlington transistor and the first channel terminal of the second Darlington transistor correspond to the negative interstage matching network node coupled to the negative transistor.

[0175] Example aspect 18: The apparatus according to example aspect 16 or 17, wherein:

[0176] The control terminal of the first Darlington transistor is coupled to the power distribution node; and

[0177] The control terminal of the second Darlington transistor arrangement is coupled to the power distribution node.

[0178] Example aspect 19: The apparatus according to example aspect 16 or 17, wherein:

[0179] The control terminal of the first Darlington transistor arrangement is coupled to the second channel terminal of the first Darlington transistor arrangement; and

[0180] The control terminal of the second Darlington transistor arrangement is coupled to the second channel terminal of the second Darlington transistor arrangement.

[0181] Example aspect 20: The apparatus according to any one of the foregoing example aspects, the apparatus further comprises:

[0182] The radio frequency front end includes the amplifier circuit.

[0183] Example aspect 21: An apparatus comprising:

[0184] An amplifier circuit, comprising an input port and an output port, includes:

[0185] A driver amplifier, the driver amplifier including a driver amplifier input terminal and a driver amplifier output terminal, wherein the driver amplifier input terminal is coupled to the input port;

[0186] A power amplifier, the power amplifier including a power amplifier input terminal and a power amplifier output terminal, the power amplifier output terminal being coupled to the output port;

[0187] Interstage matching network, the interstage matching network being coupled between the output of the driver amplifier and the input of the power amplifier; and

[0188] A component for clamping the power of the signal flowing through the interstage matching network between the drive amplifier and the power amplifier.

[0189] Example aspect 22: A method comprising:

[0190] Use a driver amplifier to amplify the signal to generate a first amplified signal;

[0191] The first amplified signal is propagated through an inter-stage matching network;

[0192] In conjunction with the propagation, two or more transistors coupled together in a Darlington transistor arrangement are used to clamp the first amplified signal to generate an intermediate signal; and

[0193] A power amplifier is used to amplify the intermediate signal to generate a second amplified signal.

[0194] Example aspect 23: The method according to example aspect 22, wherein the clamping includes:

[0195] Multiple diodes are used to clamp the power of the first amplified signal to generate the intermediate signal. The clamping voltage is established based on the number of diodes. The multiple diodes are coupled together in series between the channel terminals and control terminals of the Darlington transistor arrangement.

[0196] Example aspect 24: The method described according to example aspect 22 or 23, wherein:

[0197] The Darlington transistor arrangement includes a first Darlington transistor arrangement; and

[0198] The clamping position includes:

[0199] The first Darlington transistor arrangement is used to clamp the first amplified signal to generate the intermediate signal, thereby preventing forward signal sway; and

[0200] A second Darlington transistor arrangement is used to clamp the first amplified signal to generate the intermediate signal, thereby preventing reverse signal oscillation.

[0201] in conclusion

[0202] As used herein, the term "coupling" refers to a relationship between two or more components that are operatively communicable to each other to implement a feature or capability described herein. For example, coupling can be achieved using physical lines such as metallic traces or wires, or electromagnetic coupling such as transducers. Coupling can include direct coupling or indirect coupling. Direct coupling refers to connecting discrete circuit elements via the same node without intermediate components. Indirect coupling refers to connecting discrete circuit elements via one or more other devices or other discrete circuit elements, including two or more different nodes.

[0203] The term "port" (e.g., including "first port" or "amplifier port") at least indicates a point of electrical connection at or near the input or output of a component, or between two or more components (e.g., active or passive circuit elements or parts). Although a port may sometimes be visually depicted as a single point (or circle) in a drawing, a port may represent an interconnecting portion of a physical circuit or network having at least approximately the same voltage potential at or along that portion. In other words, a single-ended port may represent at least one point (e.g., a node) among a plurality of points along a conductive medium (e.g., a wire or trace) present between the electrically connected components. In some cases, "port" may represent at least one node that represents or corresponds to an input or output of a component (such as a matching network, amplifier circuit, or a portion thereof). Similarly, "terminal" or "node" may represent one or more points having at least approximately the same voltage potential, wherein a terminal is relative to an input or output of a component.

[0204] The terms “first,” “second,” “third,” and other numerically related indicators are used herein to identify or distinguish items that are similar or analogous to each other in a given context (such as a particular embodiment, a single diagram, a given component, or a claim). Thus, a first item in one context may differ from a first item in another. For example, an item identified as a “first signal” in one context may be identified as a “second signal” in another. Similarly, a “first port” or “first transistor” in one claim may be referred to as a “second port” or a “third transistor” in different claims, respectively.

[0205] Unless the context otherwise requires, the use of the word “or” in this document is to be interpreted as “inclusive or” or the use of a term that allows the inclusion or application of one or more items linked by the word “or” (e.g., the phrase “A or B” can be interpreted as allowing only “A”, only “B”, or both “A” and “B”). Additionally, as used herein, the phrase “at least one of” in a list of items refers to any combination of those items (including single members). For example, “at least one of a, b, or c” can cover a, b, c, ab, ac, bc, and abc, as well as any combination having multiple identical elements (e.g., aa, aaa, aab, aac, abb, acc, bb, bbb, bbc, cc, and ccc, or any other ordering of a, b, and c). Furthermore, the items represented in the figures and the terms discussed herein can indicate one or more items or terms, and therefore, the singular or plural forms of these items and terms can be referred to interchangeably in this written description.

[0206] Although specific implementations of interstage Darlington circuits have been described in language specific to certain features and / or methods, the subject matter of the appended claims is not necessarily limited to the specific features or methods described. Rather, the specific features and methods are disclosed as exemplary implementations of interstage Darlington circuits.

Claims

1. An apparatus, the apparatus comprising: An amplifier circuit, comprising an input port and an output port, includes: A driver amplifier, the driver amplifier including a driver amplifier output terminal, the driver amplifier being coupled between the input port and the output port; A power amplifier, the power amplifier including a power amplifier input terminal, the power amplifier being coupled between the output terminal of the driver amplifier and the output port; Interstage matching network, the interstage matching network being coupled between the output of the driver amplifier and the input of the power amplifier; and A Darlington circuit, which is coupled to the interstage matching network via a node, the node being coupled between the output of the driver amplifier and the input of the power amplifier.

2. The apparatus according to claim 1, wherein the apparatus further comprises: An integrated circuit die, the integrated circuit die including the amplifier circuit, The Darlington circuit is configured to provide power clamping for signals propagating from the output of the driver amplifier to the input of the power amplifier.

3. The apparatus of claim 1, wherein the node is coupled between the channel terminal of the transistor of the drive amplifier and the control terminal of the transistor of the power amplifier.

4. The apparatus of claim 1, wherein the inter-stage matching network comprises a T-shaped network.

5. The apparatus of claim 4, wherein the T-shaped network comprises: A first capacitor is coupled between the output terminal of the drive amplifier and the input terminal of the power amplifier. A second capacitor is coupled between the output of the driver amplifier and the input of the power amplifier. and An inductor coupled between an interstage matching network node and a power distribution node, wherein the interstage matching network node is coupled between a first capacitor and a second capacitor.

6. The apparatus of claim 1, wherein the inter-stage matching network comprises a π-shaped network.

7. The apparatus of claim 1, wherein the Darlington circuit is coupled between the node and the power distribution node.

8. The apparatus of claim 7, wherein the power distribution node includes a grounding node.

9. The apparatus according to claim 1, wherein: The Darlington circuit includes: Two or more transistors coupled together in a Darlington transistor arrangement, the Darlington transistor arrangement including a control terminal and a first channel terminal; and One or more diodes, said one or more diodes being coupled between the control terminal and the first channel terminal; and The first channel terminal is coupled to the node.

10. The apparatus according to claim 9, wherein: The two or more transistors include a first transistor and a second transistor; The channel terminal of the first transistor is coupled to the control terminal of the second transistor; The control terminal of the first transistor corresponds to the control terminal arranged in the Darlington transistor; The first channel terminal of the second transistor corresponds to the first channel terminal of the Darlington transistor arrangement; and The second channel terminal of the second transistor corresponds to the second channel terminal of the Darlington transistor arrangement.

11. The apparatus according to claim 9, wherein: The one or more diodes include a plurality of diodes coupled in series between the control terminal and the first channel terminal; and The Darlington circuit is configured to clamp the voltage at the node in response to a voltage level based at least in part on the number of diodes among the plurality of diodes.

12. The apparatus of claim 11, wherein the Darlington circuit is configured to increase the clamping action on the voltage at the node as the voltage at the node increases.

13. The apparatus according to claim 9, wherein: The Darlington circuit includes a first Darlington circuit of the amplifier circuit, and the Darlington transistor arrangement includes a first Darlington transistor arrangement. The amplifier circuit includes a second Darlington circuit; The second Darlington circuit includes: Two or more transistors coupled together in a second Darlington transistor arrangement, the second Darlington transistor arrangement including a control terminal, a first channel terminal and a second channel terminal; and One or more diodes, said one or more diodes being coupled between the control terminal of the second Darlington transistor arrangement and the first channel terminal of the second Darlington transistor arrangement; and The second channel terminal of the second Darlington transistor arrangement is coupled to the node.

14. The apparatus according to claim 13, wherein: The first Darlington transistor arrangement includes a second channel terminal; The second channel terminal of the first Darlington transistor arrangement is coupled to the power distribution node; and The first channel terminal of the second Darlington transistor arrangement is coupled to the power distribution node.

15. The apparatus of claim 14, wherein the power distribution node includes a ground node.

16. The apparatus according to claim 13, wherein: The first Darlington transistor arrangement includes a second channel terminal; The second channel terminal of the first Darlington transistor arrangement is coupled to the first channel terminal of the second Darlington transistor arrangement; and The first channel terminal of the first Darlington transistor arrangement is coupled to the second channel terminal of the second Darlington transistor arrangement.

17. The apparatus according to claim 16, wherein: The power amplifier includes a differential power amplifier, which includes a positive transistor and a negative transistor; The first channel terminal of the first Darlington transistor and the second channel terminal of the second Darlington transistor correspond to the positive inter-stage matching network nodes coupled to the positive transistor; and The second channel terminal of the first Darlington transistor and the first channel terminal of the second Darlington transistor correspond to the negative interstage matching network node coupled to the negative transistor.

18. The apparatus according to claim 16, wherein: The control terminal of the first Darlington transistor is coupled to the power distribution node; and The control terminal of the second Darlington transistor arrangement is coupled to the power distribution node.

19. The apparatus according to claim 16, wherein: The control terminal of the first Darlington transistor arrangement is coupled to the second channel terminal of the first Darlington transistor arrangement; and The control terminal of the second Darlington transistor arrangement is coupled to the second channel terminal of the second Darlington transistor arrangement.

20. The apparatus of claim 1, further comprising: The radio frequency front end includes the amplifier circuit.

21. An apparatus comprising: An amplifier circuit, comprising an input port and an output port, includes: A driver amplifier, the driver amplifier including a driver amplifier input terminal and a driver amplifier output terminal, wherein the driver amplifier input terminal is coupled to the input port; A power amplifier, the power amplifier including a power amplifier input terminal and a power amplifier output terminal, the power amplifier output terminal being coupled to the output port; Interstage matching network, the interstage matching network being coupled between the output of the driver amplifier and the input of the power amplifier; and A component for clamping the power of the signal flowing through the interstage matching network between the drive amplifier and the power amplifier.

22. A method, the method comprising: Use a driver amplifier to amplify the signal to generate a first amplified signal; The first amplified signal is propagated through an inter-stage matching network; In conjunction with the propagation, two or more transistors coupled together in a Darlington transistor arrangement are used to clamp the first amplified signal to generate an intermediate signal; as well as A power amplifier is used to amplify the intermediate signal to generate a second amplified signal.

23. The method of claim 22, wherein the clamping comprises: Multiple diodes are used to clamp the power of the first amplified signal to generate the intermediate signal. The clamping voltage is established based on the number of diodes. The multiple diodes are coupled together in series between the channel terminals and control terminals of the Darlington transistor arrangement.

24. The method of claim 22, wherein: The Darlington transistor arrangement includes a first Darlington transistor arrangement; and The clamping position includes: The first Darlington transistor arrangement is used to clamp the first amplified signal to generate the intermediate signal, thereby preventing forward signal sway; and A second Darlington transistor arrangement is used to clamp the first amplified signal to generate the intermediate signal, thereby preventing reverse signal oscillation.

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