Staged mitigation of localized interference for wireless communications
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- ZEBRA TECHNOLOGIES CORP
- Filing Date
- 2024-11-01
- Publication Date
- 2026-08-07
Smart Images

Figure CN122536239A_ABST
Abstract
Description
Background Technology
[0001] Some wireless communication technologies may utilize adjacent or overlapping frequency bands. Therefore, implementing more than one of these wireless communication technologies on a given computing device can lead to performance degradation when both technologies are active. Attached Figure Description
[0002] The accompanying drawings (in which the same reference numerals denote the same or functionally similar elements throughout the different views) together with the following detailed description are incorporated into and form part of the specification, and serve to further illustrate embodiments including the concepts of the claimed invention, and to explain the various principles and advantages of those embodiments.
[0003] Figure 1 This is a schematic diagram of a computing device.
[0004] Figure 2 This is a flowchart of a method for mitigating localized interference with wireless communication.
[0005] Figure 3 It is shown Figure 2 The diagram illustrates the example execution of the methods in boxes 205 and 210.
[0006] Figure 4 It is shown Figure 2 The diagram illustrates the example execution of the methods in boxes 215, 220, and 225.
[0007] Figure 5 It is shown Figure 2 A schematic diagram illustrating another example of the execution of the methods in boxes 215, 220, and 225.
[0008] Those skilled in the art will understand that the elements in the accompanying drawings are shown for simplicity and clarity and are not necessarily drawn to scale. For example, the dimensions of some elements in the drawings may be exaggerated relative to other elements to aid in understanding embodiments of the invention.
[0009] The apparatus and method configurations have been indicated in appropriate places in the accompanying drawings by conventional symbols, which show only those specific details relevant to understanding embodiments of the invention, so as not to obscure this disclosure with details that would be obvious to those skilled in the art who benefit from the description herein. Detailed Implementation
[0010] The examples disclosed herein relate to a method comprising: at a processor of a computing device having a first communication interface and a second communication interface, controlling the first communication interface to transmit data; at the processor, determining that the second communication interface is active while the first communication interface is transmitting data; at the processor, obtaining a performance metric corresponding to the second communication interface; in response to determining that the performance metric is below a threshold, selecting a mitigation action at the processor; and controlling the first communication interface according to the selected mitigation action.
[0011] Additional examples disclosed herein relate to a computing device including: a first communication interface; a second communication interface; and a processor connected to the first and second communication interfaces, wherein a controller is configured to: control the first communication interface to transmit data; determine that the second communication interface is active while the first communication interface is transmitting data; obtain a performance metric corresponding to the second communication interface; select a mitigation action at the processor in response to determining that the performance metric is below a threshold; and control the first communication interface according to the selected mitigation action.
[0012] Further examples disclosed herein relate to a method in a computing device having a processor, a first communication interface, and a second communication interface, the method comprising: storing a priority sequence of mitigation actions; determining, in response to initiating data transmission from the first communication interface, that the second communication interface is receiving data using a frequency band susceptible to interference from the first communication interface; and applying at least one mitigation action from the priority sequence of mitigation actions until a performance metric associated with the second communication interface satisfies a threshold.
[0013] Figure 1 This is a schematic diagram of a computing device 100 (also referred to herein as device 100) (such as a handheld computer or smartphone, barcode scanner, tablet computer, etc.). Device 100 can be implemented in a variety of form factors other than those described above. For example, in some embodiments, device 100 may be deployed in a fixed location within a facility rather than as a mobile device.
[0014] Device 100 includes a processor 104 (e.g., a central processing unit (CPU), graphics processing unit (GPU), and / or other suitable control circuitry, microcontroller, etc.) interconnected with a non-transitory computer-readable storage medium (such as memory 108). Memory 108 includes suitable combinations of volatile memory (e.g., random access memory, i.e., RAM) and non-volatile memory (e.g., read-only memory, i.e., ROM, electrically erasable programmable read-only memory, i.e., EEPROM, flash memory). Memory 108 may store computer-readable instructions, which, by being executed by processor 104, configure processor 104 to perform various functions in conjunction with certain other components of computing device 100.
[0015] Device 100 may also include a display 112 and / or other suitable output devices, such as speakers. Device 100 may further include input devices 116, such as a touch panel integrated with display 112, a keypad, a microphone, and / or other suitable inputs. In some examples, device 100 may also include one or more sensors, such as image sensors (e.g., a camera implemented via a metal-oxide-semiconductor-based sensor panel and optical components).
[0016] The computing device 100 also includes a first communication interface 120 and a second communication interface 124. Communication interfaces 120 and 124 enable the device 100 to exchange data with other devices. In some embodiments, communication interfaces 120 and 124 implement different radio access technologies and / or communication standards. For example, in this example, the first communication interface 120 includes a short-range interface, such as a radio frequency identification (RFID) interface. Therefore, interface 120 can capture data from RFID tags, etc., by transmitting an interrogation signal to the RFID tag. In some examples, interface 120 can also write data to RFID tags or otherwise transmit data to another device. As will be apparent to those skilled in the art, interface 120 therefore includes one or more antennas, and a microcontroller or other circuitry configured to receive data from processor 104 and transmit data via one or more antennas, and / or receive data via one or more antennas and provide the received data to processor 104.
[0017] In this example, interface 124 is a wireless wide area network (WWAN) communication interface, for example, to implement communication standards such as 4G / Long Term Evolution (LTE), 5G, etc. Interface 124 therefore includes one or more antennas, as well as a microcontroller or other circuitry configured to receive data from processor 104 and transmit data via one or more antennas, and / or receive data via one or more antennas and provide the received data to processor 104.
[0018] Device 100 can perform various functions involving interfaces 120 and 124. For example, device 100 can be configured to operate as an RFID reader via interface 120 to capture product identifiers or other data from objects such as packages. Data captured via interface 120 can be transmitted to other computing devices via interface 124.
[0019] Components of device 100 can be supported within a housing, which can also support a power source (not shown) (in some examples, such as a battery). In some examples, communication interface 120 can be included in an accessory housing that can be removably coupled to a component containing... Figure 1 The main housing of the remaining components shown. In such examples, the accessory housing and the main housing may include corresponding physical interfaces (e.g., electrical contacts such as pogo pins) configured to engage with each other to enable interface 120 to communicate with processor 104.
[0020] Depending on the communication standard implemented by each of interfaces 120 and 124, communication interfaces 120 and 124 can be configured to transmit and receive data in various frequency bands. In this example, interface 120 is an ultra-high frequency (UHF) RFID interface and can use a first frequency band 128 (e.g., 865-868 MHz) and a second frequency band 132 (e.g., 902-928 MHz) to transmit and receive data. As will be apparent to those skilled in the art, frequency band 128 is the European UHF RFID band, and frequency band 132 is the North American UHF RFID band. Interface 120 can also use other frequency bands besides... Figure 1 They communicate using frequency bands other than those shown in the diagram.
[0021] Interface 124 is a cellular interface (e.g., for 4G and / or 5G communication) and can receive data using a first frequency band 136 (e.g., 869-894 MHz) and a second frequency band 140 (e.g., 925-960 MHz). As will be apparent to those skilled in the art, frequency band 136 corresponds to the downlink portion of frequency band 5 for 4G and 5G communication, and frequency band 140 corresponds to the downlink portion of frequency band 8 for 4G and 5G communication.
[0022] like Figure 1 As shown, frequency bands 132 and 140 overlap, while frequency bands 128 and 132 are adjacent to frequency band 136. The lower end of frequency band 132 is spaced approximately 8 MHz from the higher end of frequency band 136, and the higher end of frequency band 128 is spaced approximately 1 MHz from the lower end of frequency band 136. Therefore, simultaneous data transmission at interface 120 and data reception at interface 124 can lead to reduced sensitivity at interface 124 (also known as de-sensitization). For example, if interface 120 is using frequency band 132 for transmission while interface 124 is using frequency band 140 for reception, data reception at interface 124 can be negatively affected by interference from the transmission generated by interface 120. Interfaces 120 and 124 can also employ various other frequency bands, and it will be understood that... Figure 1 The frequency bands shown are provided for illustrative purposes.
[0023] Localized interference at a given device (such as interference at interface 124 originating from interface 120) can be mitigated to some extent through device design (e.g., by physically arranging interfaces 120 and 124 within device 100 to increase the distance between them, by providing shielding between interfaces 120 and 124, etc.). However, such mitigation may only partially resolve the interference. Interface 124 can also be configured to implement various responses to signal quality degradation, such as changing the transmit and receive channels within a frequency band, changing the frequency band, roaming between base stations, etc. However, for interference originating from the same device (such as interference generated by interface 120), those responses may be insufficient to restore adequate sensitivity at interface 124.
[0024] Therefore, device 100 is configured to implement additional functionality to mitigate the impact of transmissions from interface 120 on data reception at interface 124. Memory 108 stores application 144, which, when executed by processor 104, configures device 100 to modify the operation of interface 120 under certain conditions to mitigate the performance impact on interface 124. Memory 108 may also store configuration data 148 for use during the execution of application 144. Configuration data 148 may include, for example, a mitigation action sequence that processor 104 can apply at interface 120 in response to a detected performance degradation at interface 124 (which may be associated with concurrent operation of interface 120). In other examples, the functionality implemented via application 144 and configuration data 148 may be implemented via dedicated control hardware, such as application-specific integrated circuits (ASICs).
[0025] Return to Figure 2This paper describes a method 200 for mitigating locally originating wireless interference (e.g., interference affecting one wireless communication interface of a device originating from another wireless communication interface of the same device). The method 200 is described below in conjunction with the execution of method 200 by device 100 via application 144 executed by processor 104. As will be understood in the discussion below, method 200 can also be performed by an application having a processor 104 with a processor 104. Figure 1 Other computing devices can implement the communication interfaces mentioned above in different combinations.
[0026] At block 205, processor 104 is configured to control first interface 120 to transmit data and / or detect that interface 120 has started transmitting. For example, in some examples, processor 104 may send a command to interface 120 to write certain data to an RFID tag. In other examples, processor 104 may control interface 120 to send a tag interrogation signal, or interface 120 may be configured to periodically and automatically send a tag interrogation signal. As will be apparent from the discussion above, if the frequency band currently used by interface 120 is adjacent to or overlaps with the frequency band currently used by interface 124, the transmission of signals from interface 120 may cause a decrease in sensitivity at interface 124.
[0027] At block 210, in response to the control interface 120 initiating a transmission operation, the processor 104 is configured to determine whether the second communication interface 124 is active simultaneously with the data transmission of the first communication interface 120. For example, the processor 104 may be configured to determine whether the second interface 124 is receiving data substantially at the same time as the first interface 120 is transmitting data.
[0028] In some examples, the determination at block 210 includes determining whether interface 124 (simultaneously with the transmission initiated by interface 120 at block 205) uses certain predetermined frequency bands to receive data. Interface 124 may support, in addition to Figure 1 The frequency bands shown are outside of frequency bands 136 and 140, so some frequency bands may be less susceptible to interference from interface 120. Furthermore, in some examples, the activity of which predetermined frequency bands can be checked at box 210 based on which frequency band interface 120 is currently using.
[0029] Go to Figure 3Processor 104 is shown in execution blocks 205 and 210. For example, at block 205, processor 104 may send command 300 to interface 120 to initiate transmission (e.g., interrogation signal, etc.). At block 210, for example, substantially simultaneously with block 205, processor 104 may obtain indication 304 as to whether interface 124 is currently receiving data. Indication 304 may also identify the frequency band used for such data reception. Configuration data 148 may include indications of whether interference mitigation is implemented, corresponding to each frequency band supported by interface 124. For example, as... Figure 3 As shown, interface 124 supports four frequency bands (e.g., 4G / 5G bands 5, 7, 8, and 66), and configuration data 148 indicates at block 210 that the determination result for bands 5 and 8 is positive, while that for bands 7 and 66 (which have downlink portions at approximately 2600 MHz and approximately 2100 MHz, respectively) is negative. In other words, processor 104 can compare the active frequency band from indication 304 with configuration data 148 to determine whether the second communication interface 124 is using a predetermined frequency band susceptible to interference from the first communication interface 120 to receive data.
[0030] Return to Figure 2 When the determination result at box 210 is negative, processor 104 may terminate the execution of method 200, or continue to evaluate the activity of second interface 124 as long as first interface 120 is active. The negative determination result at box 210 indicates that the current activity of second interface 124 is not easily affected by transmissions from first interface 120.
[0031] If the determination at block 210 is positive, processor 104 proceeds to block 215. At block 215, processor 104 can be configured to determine whether a performance metric corresponding to the second communication interface 124 meets a threshold. The determination at block 215 assesses whether interference from interface 120 is likely currently affecting the reception performance of interface 124. The determination at block 215 can be made by obtaining one or more performance metrics from interface 124. Example performance metrics include Reference Signal Received Power (RSRP), which indicates the signal strength received from the base station at interface 124 (e.g., in dB). Other example performance metrics that can be used at block 215 include Received Signal Strength Indication (RSSI), Reference Signal Received Quality (RSRQ), and / or Channel Quality Indication (CQI). Configuration data 148 can include a threshold for each performance metric employed in a given implementation. For example, configuration data 148 can define a threshold of -110 dB for RSRP, such that an RSRP of -112 dB results in a negative determination at block 215. When multiple performance metrics are used at box 215, for example, the determination at box 215 can be negative if any of the metrics does not meet the corresponding threshold.
[0032] When the determination result at box 215 is positive, indicating that the performance metric associated with the second interface 124 meets the threshold, no mitigation action is required, and the processor 104 can terminate the execution of method 200, or return to box 205 and continue to evaluate the activity and performance of interface 124 as long as interface 120 is actively transmitting data.
[0033] When the determination at box 215 is negative, processor 104 proceeds to box 220. At box 220, processor 104 is configured to select a mitigation action, and at box 225, processor 104 is configured to apply the mitigation action selected at box 225 to the first interface 120. Configuration data 148 may define a priority sequence of mitigation actions, and processor 104 may be configured to select a mitigation action from the sequence and apply it to interface 120 (e.g., by repeating boxes 220 and 225) until one or more performance metrics associated with the second interface 124 satisfy a threshold from box 215. For example, mitigation actions may be prioritized in ascending order of their performance impact on the first interface 120. Mitigation actions may negatively impact the performance of interface 120 (e.g., range, data throughput, etc.). The priority order may be arranged such that actions with the highest priority (e.g., selected first) result in a smaller performance degradation at interface 120, while actions with the lowest priority (e.g., selected last) result in a larger performance degradation.
[0034] Go to Figure 4As defined in configuration data 148, an example sequence 400 of mitigation actions is shown. Mitigation actions can exceed... Figure 4 Various other formats are stored in the table format shown. Each mitigation action corresponds to a priority, and in this example, the highest priority "1" is selected at the first instance of block 220 in a given execution of method 200. Therefore, in this example, processor 104 is configured to obtain performance metric 404 (e.g., RSRP) from interface 124. When performance metric 404 falls below a predetermined threshold, processor 104 is configured to select the next highest priority action from sequence 400. In this case, at the first execution of block 220, processor 104 is configured to select the highest priority mitigation action.
[0035] In this example execution of block 220, the selected action is to enable the bandpass filter 408 of interface 120 (e.g., the cutoff frequency of the bandpass filter 408 corresponds to the currently active frequency band being used by interface 120). For example, the cutoff frequency could be 902 MHz and 928 MHz corresponding to frequency band 132. At block 225, processor 104 can send command 412 to interface 120 to enable filter 408. In some examples, command 412 may include the cutoff frequency. The filter enabled at block 225 can reduce out-of-band noise generated by interface 120, which can affect the performance of interface 124.
[0036] Return to Figure 2 At box 230, processor 104 is configured to determine whether the transfer initiated at box 205 from interface 120 has completed. When the determination at box 230 is positive, indicating that interface 120 is no longer active, then at box 235, processor 104 can be configured to disable any previously applied mitigation at interface 120 and terminate the execution of method 200.
[0037] When the determination at box 230 is negative, interface 120 is instructed to remain active, and processor 104 is configured to return to box 210 to determine whether interface 124 remains active (e.g., using a vulnerable frequency band as defined in configuration data 148). When the determination at box 210 is positive (e.g., after a first mitigation action has been applied in a previous execution of box 225), processor 104 is configured as previously discussed to evaluate the performance of interface 124 at box 215 (e.g., by obtaining one or more updated performance metrics from interface 124 and comparing the performance metrics with corresponding thresholds).
[0038] When the determination at this instance of box 215 is positive, processor 104 returns to box 210, thus maintaining the previously applied mitigation (e.g., the bandpass filter mentioned above). When the determination at this instance of box 215 is negative, processor 104 proceeds to box 220 to select the next mitigation action according to priority sequence 400. In this example, as... Figure 5 As shown, the updated performance metric 500 does not meet the threshold, therefore the determination at box 215 is negative. At box 220, the processor 104 therefore selects a second mitigation action from sequence 400.
[0039] In this example, the next mitigation action is to reduce the power delivery to one or more frequency synthesizers 504 at interface 120. For example, processor 104 may reduce the charge pump current of the frequency synthesizer. This reduction in power delivery to frequency synthesizer 504 can reduce phase noise generated by the synthesizer, which in turn can reduce out-of-band emissions at one or more antennas at interface 120. Configuration data 148 may specify current delivery settings corresponding to the mitigation action, for example, as an absolute value or as a relative value representing a reduction from the nominal current level supplied to the frequency synthesizer. At block 225, processor 104 may, for example, send command 508 to interface 120, command 508 containing an adjusted power delivery to frequency synthesizer 504.
[0040] Therefore, the execution of blocks 215, 220, and 225 can be repeated until interface 120 ceases transmission (e.g., a definitive determination at block 230), or until interface 124 no longer uses a frequency band susceptible to interference from interface 120 to receive data. Thus, additional mitigation actions can be applied to interface 120 until all actions in sequence 400 have been applied, and / or until the performance of interface 124 meets a performance threshold at block 215.
[0041] Additional example mitigation actions shown in sequence 400 include reducing the bandwidth available to interface 120. For example, as... Figure 4 and Figure 5 As shown, for each frequency band used by interface 124 that is susceptible to interference from interface 120, sequence 400 can specify a narrowed frequency band for the frequency band that interface 120 is to use for transmission. Therefore, when interface 124 is using frequency band 136 for reception, the mitigation action can limit the frequency band used by interface 124 to a lower limit of 918 MHz instead of a lower limit of 902 MHz. On the other hand, when interface 124 is using frequency band 140 for reception, the mitigation action can limit the frequency band used by interface 120 to an upper limit of 917 MHz instead of an upper limit of 928 MHz.
[0042] As will be apparent to those skilled in the art, reducing the available bandwidth of interface 120 can have a greater impact on the performance of interface 124 than reducing the power delivery to frequency synthesizer (one or more) 504 and using filter 408, but mitigating interference at interface 124 may also have a greater effect.
[0043] In this example, sequence 400 further includes a mitigation action specifying a reduction in transmission power for interface 120. The reduction can be specified as an absolute value or a fraction (e.g., a percentage) of the maximum transmission power of interface 120. Reducing the transmission power at interface 120 can have a greater impact on the performance of interface 120 than previous mitigation actions, so the power reduction can be prioritized after those actions. In some examples, the power reduction action can be defined in sequence 400 by multiple stages. For example, the mitigation action can define a fractional reduction in transmission power (e.g., 10%, etc.) and a lower performance threshold (such as data throughput) for interface 120. Therefore, processor 104 can repeatedly reduce the transmission power in 10% (or any other suitable step size) when the power reduction action is applied at block 225 until the performance of interface 120 drops to a lower performance threshold.
[0044] In this example, sequence 400 further includes a mitigation action that instructs time-division multiplexing (TDM) to be enabled between interface 120 and interface 124. Processor 104 can be configured to transmit commands to both interface 120 and interface 124 to enable TDM. Thereafter, interface 120 and interface 124 can communicate directly (although in some examples such communication may be mediated by processor 104) to alternate in time data transmission at interface 120 and data reception at interface 124. As will be apparent to those skilled in the art, the implementation of TDM can effectively mitigate or eliminate interference from interface 120 at interface 124, but can also have a significant performance impact on one or both of interface 120 and interface 124.
[0045] As will be apparent, method 200 can also be executed to mitigate the reduction in receiver sensitivity at interface 120 caused by transmissions at interface 124. For example, the uplink band (832-862 MHz) of 4G / 5G band 20 is adjacent to band 128. Therefore, when interface 124 uses band 20 for transmission and interface 120 uses band 128 for data reception, processor 104 can execute method 200 to mitigate interference caused by interface 124. Configuration data 148 can define a sequence of actions separate from sequence 400, for example, because the available mitigation actions can be different between different interfaces. For example, using a narrowed band for interface 124 may be impractical, for example, due to compatibility requirements between interface 124 and the network infrastructure. Such mitigation actions (e.g., in Figure 4 and Figure 5 Actions with priority "3" in the code can therefore be omitted. In some examples, mitigation actions may include, for example, switching interface 120 to a higher frequency band (e.g., 915 MHz-921 MHz in the case of European UHF RFID, compared to the main European UHF RFID band of 865 MHz-868 MHz) when interface 124 is actively transmitting data using 4G / 5G frequency band 20.
[0046] Specific embodiments have been described in the foregoing specification. However, those skilled in the art will understand that various modifications and changes can be made without departing from the scope of the invention as set forth in the appended claims. Therefore, the specification and drawings are to be considered illustrative rather than restrictive, and all such modifications are intended to be included within the scope of this teaching.
[0047] These benefits, advantages, solutions to problems, and any one or more elements that may make any benefit, advantage, or solution occur or become more prominent are not to be construed as key, essential, or necessary features or elements of any or all claims. The invention is defined solely by the appended claims, including any amendments made during the pending period of this application and all equivalents of these claims in the patent announcement.
[0048] Furthermore, in this document, relational terms such as first and second, top and bottom, etc., may be used individually to distinguish one entity or action from another entity or action, without necessarily requiring or implying any actual such relationship or order between such entities or actions. The terms “comprises,” “comprising,” “has,” “having,” “includes,” “including,” “contains,” “containing,” or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that includes, has, includes, or contains a list of elements includes not only those elements but may also include other elements not expressly listed or inherent to such process, method, article, or apparatus. Elements beginning with "comprises," "has," "includes," or "contains" do not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes, has, includes, or contains that element, unless otherwise expressly stated herein. The term "a / an" is defined as one or more unless otherwise expressly stated herein. The terms "substantially," "essentially," "approximately," "about," or any other version of these terms are defined as being as close as understood by one of ordinary skill in the art, and in one non-limiting embodiment, these terms are defined as within 10%, in another within 5%, in yet another within 1%, and in yet another within 0.5%. The term "coupled" as used herein is defined as connected, although not necessarily directly connected or mechanically connected. A device or structure that is “configured” in a certain way is configured at least in that way, but may also be configured in ways not listed.
[0049] Certain expressions may be used in this document to list combinations of elements. Examples of such expressions include: “at least one of A, B, and C”; “one or more of A, B, and C”; “at least one of A, B, or C”; “one or more of A, B, or C”. Unless otherwise expressly stated, the above expressions cover any combination of A and / or B and / or C.
[0050] It will be understood that some embodiments may include one or more dedicated processors (or processing devices), such as microprocessors, digital signal processors, custom processors, and field-programmable gate arrays (FPGAs), and uniquely stored program instructions (including both software and firmware) that control one or more processors to implement some, most, or all of the functions of the methods and / or apparatuses described herein, in conjunction with some non-processor circuitry. Alternatively, some or all of the functions may be implemented by a state machine without stored program instructions, or in one or more application-specific integrated circuits (ASICs), wherein each function or some combination of certain functions is implemented as custom logic. Of course, a combination of these two approaches may also be used.
[0051] Furthermore, embodiments can be implemented as computer-readable storage media having computer-readable code stored thereon for programming a computer (e.g., including a processor) to perform the methods described and claimed herein. Examples of such computer-readable storage media include, but are not limited to, hard disks, CD-ROMs, optical storage devices, magnetic storage devices, ROMs (read-only memories), PROMs (programmable read-only memories), EPROMs (erasable programmable read-only memories), EEPROMs (electrically erasable programmable read-only memories), and flash memory. Moreover, it is anticipated that those skilled in the art, while making potentially significant efforts driven by, for example, available time, current technology, and economic considerations, and numerous design choices, will be able to readily generate such software instructions and programs, as well as ICs, with minimal experimentation when guided by the concepts and principles disclosed herein.
[0052] This abstract is provided to allow the reader to quickly determine the nature of the disclosure. This abstract is submitted with the understanding that it is not intended to interpret or limit the scope or meaning of the claims. Furthermore, in the above detailed description, it can be seen that various features are grouped together in various embodiments for the purpose of making the disclosure coherent. This method of disclosure should not be construed as reflecting an intention to require more features than are expressly recited in the claims. Rather, as reflected in the appended claims, the inventive subject matter lies in fewer than all the features of a single disclosed embodiment. Therefore, the appended claims are thus incorporated into the detailed description, wherein each claim represents itself as a separately claimed subject matter.
Claims
1. A method comprising: At the processor of a computing device having a first communication interface and a second communication interface, the first communication interface is controlled to transmit data; At the processor, it is determined that the second communication interface is active while the first communication interface is transmitting data; At the processor, a performance metric corresponding to the second communication interface is obtained; In response to determining that the performance metric is below a threshold, a mitigation action is selected at the processor; as well as At the processor, the first communication interface is controlled according to the selected mitigation action.
2. The method of claim 1, wherein determining that the second communication interface is active includes: It is determined that the second communication interface is receiving data using a predetermined frequency band that is susceptible to interference from the first communication interface.
3. The method of claim 1, wherein the mitigation action is a first mitigation action selected from a stored sequence of mitigation actions; the method further comprises: In response to controlling the first communication interface according to the first mitigation action, further performance metrics corresponding to the second communication interface are obtained; as well as When the further performance metric falls below the threshold, a subsequent mitigation action is selected from the sequence.
4. The method of claim 3, further comprising: The first communication interface is controlled according to the first mitigation action and the second mitigation action.
5. The method of claim 1, wherein the selected mitigation action is selected from the group consisting of: Enable the bandpass filter at the first communication interface; Reduce the power supply to the frequency synthesizer of the first communication interface; Reduce the frequency band used by the first communication interface; Reduce the transmission power of the first communication interface; and Time-division multiplexing is performed between the first communication interface and the second communication interface.
6. The method of claim 1, wherein the performance metric is selected from the group consisting of: Reference signal received power (RSRP); Reference signal reception quality (RSRQ); and Channel Quality Indicator (CQI).
7. A computing device, the computing device comprising: First communication interface; Second communication interface; as well as A processor, connected to the first communication interface and the second communication interface, is configured to: Control the first communication interface to transmit data; It is determined that the second communication interface is active while the first communication interface is transmitting data; Obtain the performance metric corresponding to the second communication interface; In response to determining that the performance metric is below a threshold, a mitigation action is selected at the processor; as well as The first communication interface is controlled according to the selected mitigation action.
8. The computing device of claim 7, wherein the processor is configured to determine that the second communication interface is active by: It is determined that the second communication interface is receiving data using a predetermined frequency band that is susceptible to interference from the first communication interface.
9. The computing device of claim 7, wherein the mitigation action is a first mitigation action selected from a stored sequence of mitigation actions; and wherein the processor is further configured to: In response to controlling the first communication interface according to the first mitigation action, further performance metrics corresponding to the second communication interface are obtained; and When the further performance metric falls below the threshold, a subsequent mitigation action is selected from the sequence.
10. The computing device of claim 9, wherein the processor is further configured to: The first communication interface is controlled according to the first mitigation action and the second mitigation action.
11. The computing device of claim 7, wherein the selected mitigation action is selected from the group consisting of: Enable the bandpass filter at the first communication interface; Reduce the power supply to the frequency synthesizer of the first communication interface; Reduce the frequency band used by the first communication interface; Reduce the transmission power of the first communication interface; and Time-division multiplexing is performed between the first communication interface and the second communication interface.
12. The computing device of claim 7, wherein the performance metric is selected from the group consisting of: Reference signal received power (RSRP); Reference signal reception quality (RSRQ); and Channel Quality Indicator (CQI).
13. The computing device of claim 7, wherein the first communication interface includes a radio frequency identification (RFID) interface, and wherein the second communication interface includes a cellular interface.
14. A method in a computing device having a processor, a first communication interface, and a second communication interface, the method comprising: Store the priority sequence of mitigation actions; In response to initiating data transmission from the first communication interface, it is determined that the second communication interface is receiving data using a frequency band susceptible to interference from the first communication interface; as well as Successive mitigation actions are applied from the priority sequence of the mitigation actions until the performance metric associated with the second communication interface meets a threshold.
15. The method of claim 14, further comprising: In response to applying each of the successive mitigation actions from the priority sequence of the mitigation actions, the performance metric is obtained from the second communication interface.