Method for chemical mechanical polishing of gold on a device conductive line surface

Abstract

The application relates to the technical field of semiconductor manufacturing, in particular to a chemical mechanical polishing method for the gold on the surface of a device conductive circuit. The method comprises the following steps: providing a polishing base; moving the polishing base to a first polishing pad to perform a first polishing step, so that the surface roughness Ra of the conductive circuit reaches 15 nm-30 nm; moving the polishing base to a second polishing pad to perform a second polishing step, and the removal amount is 10 nm-30 nm; so that the surface roughness Ra of the conductive circuit is less than or equal to 5 nm; moving the polishing base to a third polishing pad to perform a third polishing step, and further removing the polishing liquid and impurity residues remaining on the surface of the conductive circuit. The first polishing pad is a hard pad, and the second polishing pad and the third polishing pad are soft pads; the hardness of the first polishing pad is at least greater than the hardness of the second polishing pad, and the hardness of the first polishing pad is at least greater than the hardness of the third polishing pad, and the hardness of the first polishing pad is at least greater than the hardness of the third polishing pad, and the hardness of the first polishing pad is at least greater than the hardness of the third polishing pad.

Description

Technical Field

[0001] This application relates to the field of semiconductor manufacturing technology. Specifically, it relates to a chemical mechanical polishing method for the surface of gold on the conductive lines of a device. Background Technology

[0002] With the continuous development of integrated circuit technology, the requirements for the precision and performance of wafer devices are becoming increasingly stringent. Gold plating is used in the conductive circuitry of these devices. Due to gold's excellent conductivity and stability, it enables high-precision impedance control, ensuring the integrity and reliability of high-speed signals during transmission. This meets the demands of high-speed data transmission applications, making it a primary choice for interconnects. In some high-end chip designs, gold interconnects are used in critical signal transmission paths within the chip. For example, in high-performance processors and radio frequency chips, where signal transmission quality is extremely critical, gold interconnects can provide lower resistance and inductance, reducing signal delay and attenuation. Gold interconnects also offer better electromagnetic interference immunity, improving chip stability and reliability.

[0003] In practical applications, a device substrate of a certain thickness needs to be formed first. The patterned substrate is then used to create conductive trenches. Gold is used to fill these trenches, forming gold conductive lines. A subsequent layer of the substrate is then formed, embedding the gold conductive lines within the substrate. To avoid affecting subsequent processes, the surface of the gold conductive lines needs to be flush with the surrounding device surface. However, during the formation process, it is common to first fill the patterned trenches with gold. In this process, to ensure full filling, excessive gold is used, overflowing the trenches and forming an overflow layer on the substrate surface. Subsequent steps thin and remove this overflow layer, ensuring the conductive lines formed in the filled trenches are flush with the substrate surface. One method is to remove the overflow through anodic dissolution in an electrolyte, achieving a smoothing effect. Using an electrolyte containing phosphoric acid, sulfuric acid, etc., with a specific current density, can reduce surface roughness to Ra 100nm~500nm, but global planarization is difficult to achieve. Furthermore, the surface roughness remains relatively high, making it difficult to meet the surface roughness requirements of higher-precision devices (requiring extremely low surface roughness). In addition, this method is prone to hydrogen embrittlement or residual electrolyte contamination.

[0004] Therefore, a solution is needed to address the problem that the thinning process of the portion of the gold conductive circuit that overflows the device surface during the processing of existing technologies is difficult to meet the surface roughness requirements of high-precision devices and is prone to residual contamination. Summary of the Invention

[0005] Therefore, this application provides a chemical mechanical polishing method for gold on the surface of conductive lines of a device, in order to solve the problems that the thinning process of the portion overflowing from the device surface during the processing of gold conductive lines in the prior art is difficult to meet the surface roughness requirements of high-precision devices and is prone to residual contamination.

[0006] In one aspect of this application, a chemical mechanical polishing method for gold on the surface of conductive lines of a device is provided, comprising the following steps: providing a polishing substrate, the polishing substrate including a device substrate with patterned circuit trenches, the circuit trenches being filled with conductive lines; covering the surface of the device substrate with a metal layer to be removed, covering the front side of the device substrate and integrally connected with the conductive lines; the conductive lines are gold conductive lines, and the metal layer to be removed is a gold layer; the thickness of the metal layer to be removed is 80nm~120nm; moving the polishing substrate to a first polishing pad, performing a first polishing step, rotating the first polishing pad in conjunction with a first polishing liquid to polish, removing a portion of the thickness of the metal layer to be removed, the thickness being 70nm~90nm; and achieving a surface roughness Ra of 1 for the metal layer to be removed. The polishing substrate is moved to the second polishing pad for a second polishing step. The second polishing pad is rotated and polished with the second polishing slurry to further remove a portion of the metal layer to be removed, as well as a portion of the conductive lines and device substrate. A total of 10nm to 30nm of the thickness of the metal layer and conductive lines, or the thickness of the metal layer and device substrate to be removed, is removed. This exposes and flushes the surfaces of the conductive lines and the device substrate, ensuring the surface roughness Ra of the exposed conductive lines is less than or equal to 5nm. The polishing substrate is then moved to the third polishing pad for a third polishing step. The third polishing pad is rotated and polished with deionized water to further remove residual polishing slurry and impurities from the conductive lines. The first polishing pad is a hard pad, while the second and third polishing pads are soft pads. The hardness of the first polishing pad is at least greater than the Shore D40 hardness of the second polishing pad.

[0007] The chemical mechanical polishing (CMP) method for gold on the surface of conductive circuits in this application first performs rough polishing at a high speed and with a large removal volume, followed by fine polishing to obtain extremely low surface roughness, and finally removing residue. This results in a final polished substrate with a surface roughness Ra of less than or equal to 5 nm for the gold conductive circuits, meeting the roughness requirements of complex structures. Furthermore, no special electrolyte is used in the process, eliminating electrolyte residue. It also reduces the cost associated with thick Au plating with minimal Au loss.

[0008] In some embodiments of this application, The first polishing pad is a polishing pad with a Shore hardness of D60~D80; The second polishing pad is a polishing pad with a Shore hardness of D10~D20; The third polishing pad is a polishing pad with a Shore hardness of D10~D20.

[0009] Polishing pads of varying hardness are used for grinding at different rates to meet the surface roughness requirements of different grinding stages. The first polishing step requires a large removal of the metal layer while having relatively low surface roughness requirements; therefore, polishing pads with higher hardness (D60-D80) are used. The second and third polishing steps require a smaller removal of the metal layer while having relatively high surface roughness requirements; therefore, polishing pads with lower hardness (D10-D20) are used.

[0010] In some embodiments of this application, The second polishing pad is a non-woven polishing pad; The third polishing pad is a non-woven polishing pad.

[0011] Non-woven polishing pads cause less damage to wafers and are suitable for second and third polishing steps that require higher precision and lower target surface roughness.

[0012] In some embodiments of this application, In the first polishing step, the first polishing pad is also used in conjunction with the first abrasive particles for grinding; the first abrasive particles are silicon oxide abrasive particles with a particle size of 80nm~150nm; In the second polishing step, the second polishing pad is also used in conjunction with the second abrasive particles for grinding; the second abrasive particles are silicon oxide abrasive particles with a particle size of 50nm~100nm.

[0013] The first polishing step requires a large amount of metal layer to be removed, while the roughness requirement is relatively low. Therefore, a larger particle size of 80nm~150nm is used. The second polishing step requires a smaller amount of metal layer to be removed, while the roughness requirement is relatively high. Therefore, a smaller particle size of 50nm~100nm is used.

[0014] In some embodiments of this application, The first polishing solution is a hydrogen peroxide aqueous solution with a mass ratio of 0.5-5% and a pH value of 2-5; The second polishing solution is a hydrogen peroxide aqueous solution with a mass ratio of 0.5-5% and a pH value of 3-6.

[0015] The first polishing step requires a large amount of metal layer to be removed, while the roughness requirement is relatively low. Therefore, a pH value of 2-5 with strong acidity is used. The second polishing step requires a small amount of metal layer to be removed, while the roughness requirement is relatively high. Therefore, a pH value of 3-6 with weak acidity is used.

[0016] In some embodiments of this application, In the first polishing step, the polishing pressure is 0.5psi to 2psi; In the second polishing step, the polishing pressure is 0.5psi to 2psi; In the third polishing step, the polishing pressure is 0.5psi to 2psi.

[0017] If the polishing pressure is too high, the removal will be too fast, making it difficult to achieve the required roughness; if the polishing pressure is too low, the removal will be slow, increasing the wear of the polishing pad and resulting in unsatisfactory efficiency.

[0018] In some embodiments of this application, In the first polishing step, the polishing pad rotation speed is 90RPM~100RPM; In the second polishing step, the polishing pad rotation speed is 90RPM~100RPM; In the third polishing step, the polishing pad rotation speed is 90RPM~100RPM.

[0019] If the polishing pad rotates too fast, the removal will be too rapid, making it difficult to achieve the required roughness; if the polishing pad rotates too slowly, the removal will be slow, increasing the wear on the polishing pad and resulting in unsatisfactory efficiency.

[0020] In some embodiments of this application, In the third polishing step, while the third polishing pad rotates, deionized water simultaneously rinses the surface of the grinding substrate; during the rinsing process, the flow rate of deionized water is 3L / min~7L / min. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0022] Figure 1 This is a schematic flowchart of the chemical mechanical polishing method for the conductive circuit surface of the device according to this application; Figure 2 This is the state of the grinding substrate before the start of grinding in the chemical mechanical polishing method for gold on the surface of conductive lines of a device according to an embodiment of this application. Figure 3 This is the state of the grinding substrate after the first polishing step in the chemical mechanical polishing method for gold on the surface of the conductive circuit of the device according to an embodiment of this application. Figure 4This is the state of the grinding substrate after the second polishing step in the chemical mechanical polishing method for gold on the surface of the conductive circuit of the device according to an embodiment of this application. Figure 5 This is a schematic diagram of the chemical mechanical polishing method for the surface of gold on the conductive lines of a device according to an embodiment of this application, performed on a CMP machine. Detailed Implementation

[0023] To address the challenges of thinning the portion of gold conductive lines protruding from the device surface, which makes it difficult to meet the roughness requirements of complex structures and easily leads to residual contamination, the inventors of this application, after careful research, propose a chemical mechanical polishing method for the surface of gold conductive lines in devices.

[0024] This application provides a chemical mechanical polishing method for removing gold from the surface of conductive lines in a device, comprising the following steps: providing a polishing substrate, the polishing substrate including a device substrate with patterned circuit trenches, the circuit trenches being filled with conductive lines; covering the surface of the device substrate with a metal layer to be removed, covering the front side of the device substrate and integrally connected with the conductive lines; the conductive lines are gold conductive lines, and the metal layer to be removed is a gold layer; the thickness of the metal layer to be removed is 80nm~120nm; moving the polishing substrate to a first polishing pad, performing a first polishing step, rotating the first polishing pad in conjunction with a first polishing liquid to polish, removing a portion of the thickness of the metal layer to be removed, the thickness being 70nm~90nm; and achieving a surface roughness Ra of 15nm~30nm for the metal layer to be removed. m; The grinding substrate is moved to the second polishing pad for the second polishing step. The second polishing pad is rotated and polished with the second polishing slurry to further remove a portion of the conductive circuit metal layer to be removed, and further remove a portion of the conductive circuit and a portion of the device substrate. The thickness of the metal layer to be removed and the conductive circuit, or the thickness of the metal layer to be removed and the device substrate, is reduced by a total of 10nm~30nm. The surfaces of the conductive circuit and the device substrate are exposed and flush, and the surface roughness Ra of the exposed conductive circuit surface reaches less than or equal to 5nm. The grinding substrate is moved to the third polishing pad for the third polishing step. The third polishing pad is rotated and polished with deionized water to further remove the residual polishing slurry and impurities on the surface of the conductive circuit. The first polishing pad is a hard pad, and the second and third polishing pads are soft pads. The hardness of the first polishing pad is at least greater than the Shore D40 hardness of the second polishing pad. The hardness of the first polishing pad is at least greater than the Shore D40 hardness of the third polishing pad.

[0025] The chemical mechanical polishing method for gold on the conductive circuit surface of the device provided in this application can meet the roughness requirements of complex structures, and no special electrolyte is used in the process, so no electrolyte residue will be caused.

[0026] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. In the description of this application, it should be noted that the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0027] Example 1 refer to Figure 1 This embodiment provides a chemical mechanical polishing method for gold on the surface of conductive lines of a device, including the following steps: refer to Figure 2 A grinding substrate is provided, which includes a device substrate 100 with patterned line trenches filled with conductive lines 111; a metal layer 112 to be removed is covered on the surface of the device substrate 100, covering the front side of the device substrate 100 and connected to the conductive lines 111; the conductive lines 111 are gold conductive lines and the metal layer 112 to be removed is a gold layer. refer to Figure 3 and Figure 5 The grinding substrate is moved to the first polishing pad a and the first polishing step P1 is performed. The first polishing pad a is rotated and polished with the first polishing liquid to remove a portion of the thickness of the metal layer 112 to be removed, with a thickness removal of 70nm~90nm. The surface roughness Ra of the remaining structure, i.e. the surface of the metal layer 112 to be removed, reaches 15nm~30nm. refer to Figure 4 and Figure 5 The grinding substrate is moved to the second polishing pad b, and the second polishing step P2 is performed. The second polishing pad is rotated and polished with the second polishing liquid to further remove a portion of the thickness of the metal layer 112 to be removed, and a portion of the thickness of the conductive line 111 and the device substrate 100 to be removed. A total of 10nm to 30nm of the thickness of the metal layer 112 and the conductive line 111 or the thickness of the metal layer 112 and the device substrate 100 to be removed is removed; so that the surface roughness Ra of the conductive line reaches less than or equal to 5nm. refer to Figure 4 and Figure 5 The grinding substrate is moved to the third polishing pad c for the third polishing step P3. The third polishing pad is rotated and polished with deionized water to further remove the residual polishing liquid and impurities on the surface of the conductive line 111 and the device substrate 100.

[0028] The first polishing pad is a hard pad, while the second and third polishing pads are soft pads; the hardness of the first polishing pad is at least greater than the Shore D40 of the second polishing pad; the hardness of the first polishing pad is at least greater than the Shore D40 of the third polishing pad.

[0029] It should be noted that when the surface roughness Ra mentioned in this article reaches a certain range or is within a certain range, it means that the surface roughness can be any value within the range of the grinding substrate surface, and the surface roughness Ra falls within this range.

[0030] The chemical mechanical polishing (CMP) method for gold on the surface of conductive circuits in this embodiment first performs rough polishing at a high speed and with a large removal volume, followed by fine polishing to achieve extremely low surface roughness, and finally removing any residue. This results in a final polished substrate with a gold conductive circuit surface roughness Ra of less than or equal to 5 nm, meeting the roughness requirements of complex structures. Furthermore, no special electrolyte is used in the process, eliminating electrolyte residue. It also reduces the cost associated with thick Au plating with minimal Au loss.

[0031] In some embodiments of this application, The first polishing pad is a polishing pad with a Shore hardness of D60~D80; The second polishing pad is a polishing pad with a Shore hardness of D10~D20; The third polishing pad is a polishing pad with a Shore hardness of D10~D20.

[0032] Polishing pads of varying hardness are used for grinding at different rates to meet the surface roughness requirements of different grinding stages. The first polishing step requires a large removal of the metal layer while having relatively low surface roughness requirements; therefore, polishing pads with higher hardness (D60-D80) are used. The second and third polishing steps require a smaller removal of the metal layer while having relatively high surface roughness requirements; therefore, polishing pads with lower hardness (D10-D20) are used.

[0033] In some embodiments of this application, The second polishing pad is a non-woven polishing pad; The third polishing pad is a non-woven polishing pad.

[0034] Non-woven polishing pads cause less damage to wafers and are suitable for second and third polishing steps that require higher precision and lower target surface roughness.

[0035] In some embodiments of this application, In the first polishing step, the first polishing pad is also used in conjunction with the first abrasive particles for grinding; the first abrasive particles are silicon oxide abrasive particles with a particle size of 80nm~150nm; In the second polishing step, the second polishing pad is also used in conjunction with the second abrasive particles for grinding; the second abrasive particles are silicon oxide abrasive particles with a particle size of 50nm~100nm.

[0036] The first polishing step requires a large amount of metal layer to be removed, while the roughness requirement is relatively low. Therefore, a larger particle size of 80nm~150nm is used. The second polishing step requires a smaller amount of metal layer to be removed, while the roughness requirement is relatively high. Therefore, a smaller particle size of 50nm~100nm is used.

[0037] In some embodiments of this application, The first polishing solution is a hydrogen peroxide aqueous solution with a mass ratio of 0.5-5% and a pH value of 2-5; The second polishing solution is a hydrogen peroxide aqueous solution with a mass ratio of 0.5-5% and a pH value of 3-6.

[0038] The first polishing step requires a large amount of metal layer to be removed, while the roughness requirement is relatively low. Therefore, a pH value of 2-5 with strong acidity is used. The second polishing step requires a small amount of metal layer to be removed, while the roughness requirement is relatively high. Therefore, a pH value of 3-6 with weak acidity is used.

[0039] In some embodiments of this application, In the first polishing step, the polishing pressure is 0.5psi to 2psi; In the second polishing step, the polishing pressure is 0.5psi to 2psi; In the third polishing step, the polishing pressure is 0.5psi to 2psi.

[0040] If the polishing pressure is too high, the removal will be too fast, making it difficult to achieve the required roughness; if the polishing pressure is too low, the removal will be slow, increasing the wear of the polishing pad and resulting in unsatisfactory efficiency.

[0041] In some embodiments of this application, In the first polishing step, the polishing pad rotation speed is 90RPM~100RPM; In the second polishing step, the polishing pad rotation speed is 90RPM~100RPM; In the third polishing step, the polishing pad rotation speed is 90RPM~100RPM.

[0042] If the polishing pad rotates too fast, the removal will be too rapid, making it difficult to achieve the required roughness; if the polishing pad rotates too slowly, the removal will be slow, increasing the wear on the polishing pad and resulting in unsatisfactory efficiency.

[0043] In some embodiments of this application, In the third polishing step, while the third polishing pad rotates, deionized water simultaneously rinses the surface of the grinding substrate; during the rinsing process, the flow rate of deionized water is 3L / min~7L / min.

[0044] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this application.

Claims

1. A method of chemical mechanical polishing of gold on a device conductive line surface, characterized by, Includes the following steps: A polishing substrate is provided, the polishing substrate comprising a device substrate having patterned wiring trenches filled with conductive lines; The device substrate is covered with a metal layer to be removed, covering the front side of the device substrate and integrated with the conductive circuit; the conductive circuit is a gold conductive circuit, and the metal layer to be removed is a gold layer; the thickness of the metal layer to be removed is 80nm~120nm. The grinding substrate is moved to the first polishing pad and the first polishing step is performed. The first polishing pad is rotated and polished with the first polishing liquid to remove a portion of the thickness of the metal layer to be removed, with a thickness removal of 70nm~90nm; so that the surface roughness Ra of the metal layer to be removed reaches 15nm~30nm. The grinding substrate is moved to the second polishing pad for a second polishing step. The second polishing pad is rotated and polished with the second polishing liquid to further remove a portion of the thickness of the metal layer to be removed, and to further remove a portion of the thickness of the conductive lines and the device substrate. The thickness of the metal layer to be removed and the conductive lines or the thickness of the metal layer to be removed and the device substrate is reduced by a total of 10nm to 30nm. The surfaces of the conductive lines and the device substrate are exposed and flush, and the surface roughness Ra of the exposed conductive lines reaches less than or equal to 5nm. The grinding substrate is moved to the third polishing pad for the third polishing step. The third polishing pad is rotated and polished with deionized water to further remove the residual polishing liquid and impurities on the surface of the conductive circuit. The first polishing pad is a hard pad, and the second and third polishing pads are soft pads; the hardness of the first polishing pad is at least greater than the Shore D40 hardness of the second polishing pad; the hardness of the first polishing pad is at least greater than the Shore D40 hardness of the third polishing pad.

2. The chemical mechanical polishing method for the surface of gold on the conductive lines of a device according to claim 1, characterized in that, The first polishing pad is a polishing pad with a Shore hardness of D60~D80; The second polishing pad is a polishing pad with a Shore hardness of D10~D20; The third polishing pad is a polishing pad with a Shore hardness of D10~D20.

3. The chemical mechanical polishing method for the surface of gold on the conductive lines of a device according to claim 2, characterized in that, The second polishing pad is a non-woven polishing pad; The third polishing pad is a non-woven polishing pad.

4. The chemical mechanical polishing method for the surface of gold on the conductive lines of a device according to claim 1, characterized in that, In the first polishing step, the first polishing pad is also used in conjunction with the first abrasive particles for grinding; the first abrasive particles are silicon oxide abrasive particles with a particle size of 80nm~150nm; In the second polishing step, the second polishing pad is also used in conjunction with the second abrasive particles for grinding; the second abrasive particles are silicon oxide abrasive particles with a particle size of 50nm~100nm.

5. The chemical mechanical polishing method for the surface of gold on the conductive lines of a device according to claim 1, characterized in that, The first polishing solution is a hydrogen peroxide aqueous solution with a mass ratio of 0.5-5% and a pH value of 2-5; The second polishing solution is a hydrogen peroxide aqueous solution with a mass ratio of 0.5-5% and a pH value of 3-6.

6. The chemical mechanical polishing method for the surface of gold on the conductive lines of a device according to claim 1, characterized in that, In the first polishing step, the polishing pressure is 0.5 psi to 2 psi; In the second polishing step, the polishing pressure is 0.5 psi to 2 psi; In the third polishing step, the polishing pressure is 0.5 psi to 2 psi.

7. The chemical mechanical polishing method for the surface of gold on the conductive lines of a device according to claim 1, characterized in that, In the first polishing step, the polishing pad rotation speed is 90 RPM to 100 RPM; In the second polishing step, the polishing pad rotation speed is 90 RPM to 100 RPM; In the third polishing step, the polishing pad rotation speed is 90 RPM to 100 RPM.

8. The chemical mechanical polishing method for the surface of gold on the conductive lines of a device according to claim 1, characterized in that, In the third polishing step, while the third polishing pad rotates, the deionized water simultaneously rinses the surface of the grinding substrate; during the rinsing process, the flow rate of the deionized water is 3L / min to 7L / min.

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