A piezoelectric inkjet printed chip structure
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-24
- Publication Date
- 2026-08-11
AI Technical Summary
然而,薄膜压电打印芯片在流体通路的构建中会大量采用有机聚合物材料,这类材料同样也不耐受强酸、强碱或强溶剂环境
在以上方案中,通过电压信号使压电层发生形变,进而改变流道的容积以挤压墨水从通孔喷出实现喷墨打印。进一步地,连接层为硅层并通过键合工艺与绝缘衬底连接。具体地,本打印芯片采用全硅基流道,硅材料具有优异的化学惰性,在酸碱和强溶剂条件下能够抵抗腐蚀,即便在特定溶液中,也可通过在硅表面沉积氮化硅钝化层规避腐蚀风险。相比传统打印芯片中在流体腔室结构形成中,采用不锈钢,本方案中,硅基流道将不存在金属腐蚀问题,不会污染功能性墨水,保证了打印器件电学性能或生物相容性。同时通过全硅基流道也规避了薄膜压电打印芯片中有机聚合物不耐受酸碱和强溶剂的问题,确保了流道的长期稳定。另外,本打印芯片可通过一次性刻蚀完成通孔和流道的加工,工艺步骤缩减,基于键合工艺,硅片级键合的良率高且可控,本打印芯片的制造过程中,流体结构-绝缘衬底与压电结构-压电体分开制备,各自独立优化后完成键合组装,可使复杂的工艺解耦并简化,降低制备成本。
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Figure CN122539769A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the technical field of piezoelectric inkjet printing, and more particularly to a piezoelectric inkjet printed chip structure. Background Technology
[0002] Inkjet printing, as a non-contact patterning and material deposition technology, has been widely used in various industrial and scientific research fields due to its advantages such as high precision and customizable patterns. Inkjet printing technology offers advantages such as color printing, no ink waste, and precise positioning. It is widely used in printed circuits, bioprinting, digital printing, and 3D printing.
[0003] Piezoelectric inkjet printing technology is widely used in inkjet digital manufacturing and 3D printing due to its long lifespan and compatibility with various types of inks. Piezoelectric inkjet printing is independent of ink thermal stability, has good compatibility with high-viscosity and functional inks, and boasts a long lifespan and high drive frequency, making it the mainstream choice for industrial-grade digital manufacturing.
[0004] Piezoelectric inkjet printing chips deform piezoelectric materials by applying a voltage signal inside the cavity, thereby changing the flow channel volume to squeeze ink out. Their performance directly determines printing resolution, droplet consistency, and system reliability.
[0005] Existing piezoelectric inkjet printing chips are classified into two categories based on their fabrication processes: bulk piezoelectric and thin-film piezoelectric. Bulk piezoelectric chips typically use pre-sintered bulk piezoelectric ceramic materials (such as PZT ceramic), which are then integrated with a stainless steel flow channel substrate through machining, bonding, or welding. These chips offer high structural strength and high single-nozzle flow rate, making them suitable for large-format, high-speed printing applications. However, their stainless steel flow channel substrates cannot withstand acidic, alkaline, or strongly polar organic solvents, resulting in reduced lifespan. Thin-film piezoelectric chips, on the other hand, are based on microelectromechanical systems (MEMS) technology and are fabricated on silicon wafers using physical vapor deposition (PVD), chemical vapor deposition (CVD), photolithography, and dry / wet etching processes. They can meet high-resolution printing requirements, and the piezoelectric thin films offer fast response speeds and low drive power consumption. However, thin-film piezoelectric chips heavily utilize organic polymer materials in the construction of fluid pathways, and these materials are also intolerant of strong acid, strong alkali, or strong solvent environments. Furthermore, the fabrication process for thin-film piezoelectric chips is complex, and their manufacturing costs are high. Summary of the Invention
[0006] The purpose of this invention is to provide a piezoelectric inkjet printed chip structure that avoids the problems of metal materials and organic polymers used in the fluid structure of thin-film piezoelectric printed chips being intolerant to acids, alkalis and strong solvents during the manufacturing process, thereby simplifying the preparation process and reducing the preparation cost.
[0007] To achieve this objective, the present invention adopts the following technical solution: A piezoelectric inkjet printed chip structure, comprising: An insulating substrate, wherein the insulating substrate is a sheet structure formed of silicon material, and the insulating substrate has a plurality of through holes and flow channels corresponding to the through holes, the flow channels being used for the passage of liquid medium, and the flow channels being connected to the through holes one by one; A piezoelectric material includes a piezoelectric layer and a connecting layer. The connecting layer is a sheet-like structure formed of silicon material. The connecting layer has a first surface and a second surface opposite to each other. The first surface is connected to the surface of the insulating substrate by a bonding process, and the second surface is connected to the piezoelectric layer. A liquid medium can be ejected through the flow channel and the through hole by the action of the piezoelectric layer.
[0008] As an alternative solution for piezoelectric inkjet printing chip structure, the insulating substrate is connected to the first surface via an anodic bonding process.
[0009] As an alternative solution for a piezoelectric inkjet printed chip structure, the insulating substrate and the first surface are connected by a bonding layer, which is formed by a metal layer formed on the surface of the insulating substrate and a metal layer formed on the first surface through a metal-to-metal bonding process.
[0010] As an alternative solution for a piezoelectric inkjet printed chip structure, the insulating substrate is connected to the first surface through a bonding layer, and an insulating layer is provided between the bonding layer and the connection layer, the thickness of which is 0.5μm~2μm.
[0011] As an alternative solution for a piezoelectric inkjet printed chip structure, an inlet is formed on the connecting layer for the passage of a fluid medium, and the inlet is connected to the flow channel.
[0012] As an alternative solution for a piezoelectric inkjet printed chip structure, the flow channel includes a first end and a second end opposite to each other, the through hole is close to the first end, and the inlet is close to the second end.
[0013] As an alternative solution for a piezoelectric inkjet printed chip structure, the flow area of the channel near the first end is larger than the flow area of the channel near the second end.
[0014] As an alternative solution for a piezoelectric inkjet printed chip structure, the piezoelectric body includes multiple driving electrodes and a common electrode. The common electrode is attached and connected to the side of the connection layer away from the insulating substrate. The driving electrodes are arranged in a one-to-one correspondence with the through holes. A piezoelectric layer is provided between the common electrode and the driving electrode.
[0015] As an alternative to a piezoelectric inkjet printed chip structure, the piezoelectric layer is formed by bonding sintered piezoelectric ceramic to the surface of the common electrode away from the bonding layer via a bonding process, or the piezoelectric layer is formed on the surface of the common electrode away from the bonding layer via a sputtering deposition process.
[0016] As an alternative solution for piezoelectric inkjet printing chip structure, the multiple flow channels are arranged in a grid pattern.
[0017] The beneficial effects of the above scheme are: In the above scheme, a voltage signal deforms the piezoelectric layer, thereby changing the volume of the flow channel to squeeze ink out of the through-hole, achieving inkjet printing. Further, the connecting layer is a silicon layer connected to an insulating substrate via a bonding process. Specifically, this printed chip uses an all-silicon-based flow channel. Silicon material has excellent chemical inertness, resisting corrosion under acidic, alkaline, and strong solvent conditions. Even in specific solutions, corrosion risks can be mitigated by depositing a silicon nitride passivation layer on the silicon surface. Compared to traditional printed chips that use stainless steel in the fluid chamber structure formation, this scheme eliminates metal corrosion issues with the silicon-based flow channel, preventing contamination of functional inks and ensuring the electrical performance and biocompatibility of the printed device. Simultaneously, the all-silicon-based flow channel avoids the problem of organic polymers in thin-film piezoelectric printed chips being intolerant to acids, alkalis, and strong solvents, ensuring the long-term stability of the flow channel. In addition, the through-hole and flow channel processing of this printed chip can be completed in one etching, reducing the number of process steps. Based on the bonding process, the yield of silicon wafer-level bonding is high and controllable. In the manufacturing process of this printed chip, the fluid structure-insulating substrate and the piezoelectric structure-piezoelectric body are prepared separately and bonded and assembled independently after optimization. This can decouple and simplify the complex process and reduce the manufacturing cost. Attached Figure Description
[0018] Figure 1 This is a first-view structural schematic diagram of the piezoelectric inkjet printing chip structure provided in an embodiment of the present invention; Figure 2 This is a second-view structural schematic diagram of the piezoelectric inkjet printing chip structure provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of the structure of the insulating substrate provided in an embodiment of the present invention; Figure 4 This is a first-view structural schematic diagram of the piezoelectric element provided in an embodiment of the present invention; Figure 5 This is a second-view structural schematic diagram of the piezoelectric material provided in an embodiment of the present invention.
[0019] In the picture: 1. Insulating substrate; 11. Through-hole; 12. Flow channel; 121. First end; 122. Second end; 2. Piezoelectric material; 21. Piezoelectric layer; 211. Driving electrode; 212. Common electrode; 22. Connecting layer; 221. First surface; 222. Second surface; 223. Entrance. Detailed Implementation
[0020] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.
[0021] In the description of this invention, unless otherwise explicitly specified and limited, the terms "connected," "linked," and "fixed" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.
[0022] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.
[0023] In the description of this embodiment, the terms "upper," "lower," "right," etc., refer to the orientation or positional relationship shown in the accompanying drawings. They are used only for ease of description and simplification of operation, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the present invention. In addition, the terms "first" and "second" are used only for distinction in description and have no special meaning.
[0024] Please see the appendix Figure 1 - Appendix Figure 5This embodiment relates to a piezoelectric inkjet printed chip structure (hereinafter referred to as "printed chip"), which includes an insulating substrate 1 and a piezoelectric element 2. The insulating substrate 1 is a sheet-like structure formed of silicon material, and has a plurality of through holes 11 and corresponding flow channels 12. The flow channels 12 are used for the passage of liquid media, and each flow channel 12 is connected to one of the through holes 11. The piezoelectric element 2 includes a piezoelectric layer 21 and a connecting layer 22. The connecting layer 22 is a sheet-like structure formed of silicon material, and has a first surface 221 and a second surface 222. The first surface 221 is connected to the surface of the insulating substrate 1 by a bonding process, and the second surface 222 is connected to the piezoelectric layer 21. The liquid media can be ejected through the flow channels 12 and the through holes 11 by the action of the piezoelectric layer 21.
[0025] Specifically, the insulating substrate 1 can be a standard SOI silicon wafer. The insulating substrate 1 includes a top silicon layer and a bottom silicon layer, wherein the thickness of the top silicon layer is 20-80 μm and the thickness of the bottom silicon layer is 100-500 μm. Through-holes 11 are formed in the top silicon layer, and the aperture of the through-holes 11 is 15-30 μm. To achieve high-resolution printing, a single or multiple rows of through-holes 11 arrays can be set on the insulating substrate 1, with high precision maintained between adjacent through-holes 11, and a jetting unit with tens to thousands of through-holes 11 integrated on a single wafer. Multiple flow channels 12 are independently set on the bottom silicon layer and arranged in a grid pattern, with each flow channel 12 corresponding to a through-hole 11, and the flow channels 12 can allow liquid media to flow.
[0026] The through-hole 11 is a through-hole etched on the silicon wafer using ion etching. Its sidewall perpendicularity is approximately 90°, and the hole wall roughness Ra < 0.5 μm, meeting the requirements for high-precision nozzles. After etching, a passivation layer can be formed on the inner wall of the hole to improve corrosion resistance. The flow channel 12 can be etched on the side of the insulating substrate 1 opposite to the through-hole 11. The cross-sectional shape of the flow channel 12 can be rectangular or trapezoidal, adjusted according to the actual flow resistance requirements.
[0027] The thickness of the connecting layer 22 in the piezoelectric body 2 is 100μm~500μm. The connecting layer 22 is plate-shaped and has a first surface 221 and a second surface 222. The first surface 221 is connected to the surface of the insulating substrate 1 by a bonding process, and the second surface 222 is connected to the piezoelectric layer 21. The thickness of the piezoelectric layer 21 is 10μm~50μm. Lead zirconate titanate (PZT) can be used in the piezoelectric layer 21. Among them, the PZT piezoelectric layer 21 has a high piezoelectric coefficient and a large driving displacement, which is suitable for high viscosity ink jetting.
[0028] In this embodiment, the liquid medium is ink. A voltage signal causes deformation of the piezoelectric layer 21, thereby changing the volume of the flow channel 12 to force ink out of the through-hole 11, achieving inkjet printing. Further, the connecting layer 22 is a silicon wafer, and it is connected to the insulating substrate 1 via a bonding process. Specifically, before bonding the insulating substrate 1 and the connecting layer 22, both bonding surfaces are chemically mechanically polished to meet surface roughness and flatness requirements. The insulating substrate 1 and the connecting layer 22 of the piezoelectric element 2 are aligned and bonded using an optical alignment process, with the bonding temperature controlled within the range of 150℃ to 200℃ and the pressure controlled within the range of 10 MPa to 30 MPa.
[0029] In this embodiment, a fully silicon-based flow channel 12 is employed. Silicon material exhibits excellent chemical inertness within a pH range of 1 to 14, preventing corrosion under acidic, alkaline, and strong solvent conditions. Even in specific corrosive solutions, the risk of corrosion can be mitigated by depositing a silicon nitride passivation layer on the silicon surface. Compared to traditional printed chips that use stainless steel in the formation of the fluid chamber structure, the silicon-based flow channel 12 eliminates the problem of metal ion leaching, preventing contamination of functional inks and ensuring the electrical performance and biocompatibility of the printed chip. Furthermore, the fully silicon-based flow channel 12 avoids the problem of organic polymers in thin-film piezoelectric printed chips being intolerant to acids, alkalis, and strong solvents, ensuring the long-term stability of the flow channel 12.
[0030] Furthermore, the manufacturing process of the flow channel 12 in traditional thin-film piezoelectric chips involves numerous steps. In this embodiment, the through-hole 11 and flow channel 12 can be processed in a single etching step, reducing the number of process steps. At the same time, the bonding process is mature and reliable, and the yield of silicon wafer-level bonding is high and controllable. In the manufacturing process of this printed chip, the fluid structure - insulating substrate 1 and the piezoelectric structure - piezoelectric body 2 are prepared separately and independently optimized before bonding and assembly. This can decouple and simplify the complex process, reduce the manufacturing cost, and suppress crosstalk.
[0031] Optionally, the insulating substrate 1 and the first surface 221 are connected by an anodic bonding process.
[0032] Specifically, a silicon dioxide (SiO2) layer is pre-grown on the surface of the insulating substrate 1 by thermal oxidation, and the connecting layer 22 is a silicon wafer. The two are fused together under anodic bonding conditions. After bonding, the insulating substrate 1 and the connecting layer 22 are not only mechanically fixed, but also form an airtight seal to ensure that the liquid medium in the flow channel 12 will not leak from the bonding interface.
[0033] In this embodiment, the seal between the insulating substrate 1 and the connecting layer 22 is achieved entirely by covalent bonds. The interface can be free of any organic adhesives, epoxy resins, or polymer sealing layers, thus ensuring that the flow channel 12, through-hole 11, and bonding cross-section are all made of silicon material. This prevents swelling, dissolution, or aging in strong acids, strong alkalis, and strong solvents. The sealing performance of the bonding interface is unaffected by the chemical environment, and no failure modes such as delamination or leakage will occur after long-term immersion. Furthermore, the anodic bonding process is low-cost and offers significant economic advantages.
[0034] Optionally, the insulating substrate 1 and the first surface 221 are connected by a bonding layer, which is formed by a metal layer formed on the surface of the insulating substrate 1 and a metal layer formed on the first surface 221 through a metal-to-metal bonding process.
[0035] Specifically, the insulating substrate 1 and the first surface 221 are connected by a gold-to-gold bonding layer. The insulating substrate 1 side adopts a titanium (Ti) / copper (Cu) double-layer structure, and the bonding layer 22 side also adopts a titanium (Ti) / copper (Cu) double-layer structure, with the two copper (Cu) layers bonded face-to-face. The titanium (Ti) layer is used to improve the adhesion between the metal layer and the silicon layer, and the copper (Cu) layer serves as the bonding host.
[0036] The gold-to-gold bonding layer can be a ring structure, forming a closed loop around each flow channel 12. After bonding, it creates a seal, preventing adjacent flow channels 12 from communicating with each other and thus preventing fluid crosstalk. This also saves material and reduces stress. Alternatively, the gold-to-gold bonding layer can completely cover the bonding surface, forming an integral seal after bonding, which is suitable for high-pressure jetting scenarios.
[0037] In this embodiment, a gold-to-metal bonding layer is used to ensure that the bonding interface is free of any organic adhesives, epoxy resins, or polymer interlayers. The metal bonding layer itself is chemically stable in most organic solvents. For example, copper (Cu) is stable in neutral and weakly acidic / weakly alkaline environments, and its surface can naturally oxidize to form a passivation layer. Furthermore, the temperature window for metal-to-metal bonding (150°C to 450°C) is much lower than the phase transition temperature and electrode diffusion temperature of piezoelectric materials. Therefore, during the preparation of piezoelectric layer 21, piezoelectric layer 21 can be completely prepared before bonding, and the bonding process will not damage the piezoelectric properties. Although the temperature range is comparable to that of anodic bonding, metal bonding has lower requirements for surface condition and a wider process window. The interfacial strength of the gold-to-metal bonding layer can typically reach 20 MPa to 80 MPa, which is superior to the 10 MPa to 40 MPa of anodic bonding. Under the high-frequency pressure pulse action of inkjet printing, the gold-to-metal bonding layer interface can withstand alternating stress for a long time without fatigue cracking.
[0038] Optionally, the insulating substrate 1 is connected to the first surface 221 by a bonding layer, and an insulating layer is provided between the bonding layer and the connecting layer 22, the thickness of which is 0.5-2μm.
[0039] Specifically, after bonding is completed, a 1μm thick insulating layer of silicon oxide can be coated between the bonding layer and the connecting layer 22. The insulating layer can completely cover the first surface 221 of the connecting layer 22, completely isolating the bonding layer and the connecting layer 22, allowing each jetting unit to be controlled independently with minimal crosstalk. In this embodiment, the silicon-based insulating substrate 1 can form good electrical isolation. Even after the introduction of the gold-to-gold bonding layer, the insulating layer can be used to avoid crosstalk problems and ensure independent control of each jetting unit. The thickness of the insulating layer, 0.5μm to 2μm, ensures insulation performance while taking into account process efficiency, cost control, and reliability. The insulating layer materials (SiO2, Si3N4, Al2O3) are all inorganic materials with extremely stable chemical properties. The introduction of the insulating layer does not change the core process of gold-to-gold bonding; it only adds a deposition step to the preparation process of the connecting layer 22, with minimal impact on the overall process flow.
[0040] Optionally, an inlet 223 is formed on the connecting layer 22 for the passage of fluid medium, and the inlet 223 is connected to the flow channel 12.
[0041] Specifically, inlet 223 is a through-hole processed on the interconnect layer 22, serving as a channel for external ink supply to enter the chip. Inlet 223 communicates with each flow channel 12 on the insulating substrate 1. After entering through inlet 223, the ink is distributed to the chambers of each flow channel 12 and finally ejected from through-hole 11. Inlet 223 needs to be connected to an external ink supply system, which can adopt the following interface form: silicon-glass anodic bonding interface, where a glass cover plate with liquid supply holes is bonded to the second surface 222 of the interconnect layer 22, and the glass holes are connected to the external pipeline, ensuring a reliable seal at the silicon-glass interface.
[0042] In one implementation of this embodiment, a single through-hole is etched into the connecting layer 22. An inlet 223 extends from the second surface 222 of the connecting layer 22 to the first surface 221, and fluid is injected directly into the flow channel 12 from the second surface 222. This processing method is simple and can be formed simultaneously with the etching of the flow channel 12 and the through-hole 11.
[0043] In another implementation of this embodiment, multiple small inlets 223 are arranged in an array on the connection layer 22, with each inlet 223 corresponding to a set of flow channels 12 or a single flow channel 12. This is suitable for large-area multi-channel chips to reduce the flow load of a single inlet 223.
[0044] In this embodiment, the inlet 223 is also etched from silicon material. From the inlet 223 to the independent flow channel 12 and then to the through hole 11, the entire process is made of inorganic materials (Si, SiO2, Si3N4). This effectively resists acids, alkalis, and strong solvents, maintaining the integrity and continuity of the fluid channel. Compared to traditional thin-film piezoelectric printed chips, where the liquid supply interface often relies on organic components such as polymer seals, which harden, crack, and leak after long-term immersion in strong solvents, this invention completely eliminates this failure mode through the all-silicon-based inlet 223 structure. Furthermore, the inlet 223 is directly etched onto the connection layer 22, eliminating the need for additional parts and connection processes, thus reducing costs.
[0045] Optionally, the flow channel 12 includes a first end 121 and a second end 122 opposite to each other, with a through hole 11 near the first end 121 and an inlet 223 near the second end 122.
[0046] Specifically, ink enters the second end 122 of the flow channel 12 through inlet 223. Within the flow channel 12, the ink flows from the second end 122 to the first end 121, and then enters the through-hole 11 from the first end 121 before being ejected. The flow channel 12 forms a variable-volume compressible chamber. The flow area of the flow channel 12 near the first end 121 is larger than the flow area near the second end 122. The flow area is the effective flow area of the cross-section of the flow channel 12 perpendicular to the flow direction. The first end 121 of the flow channel 12 has a larger width and a larger flow area, while the second end 122 of the flow channel 12 has a smaller width and a smaller flow area. Furthermore, the width of the first end 121 is approximately equal to the diameter of the through-hole 11.
[0047] In this embodiment, due to the narrow width and high flow resistance of the second end 122, most of the fluid cannot flow back to the inlet 223; the fluid is forced to flow towards the first end 121 and enter the expanding energy storage cavity. After approaching the first end 121, the fluid velocity in the flow channel 12 decreases and the pressure increases, forming pressure accumulation to improve the concentration of the fluid passing through the through hole 11.
[0048] Optionally, the piezoelectric body 2 includes a plurality of driving electrodes 211 and a common electrode 212. The common electrode 212 is attached and connected to the side of the connecting layer 22 away from the insulating substrate 1. The driving electrodes 211 are arranged in a one-to-one correspondence with the through holes 11. A piezoelectric layer 21 is provided between the common electrode 212 and the driving electrodes 211.
[0049] The common electrode 212 can be a monolithic large-area metal layer, while the driving electrodes 211 are fabricated using a metallographic patterning process. Multiple driving electrodes 211 are fabricated one-to-one with the grid-like flow channels 12. Applying a voltage between the driving electrodes 211 and the common electrode 212 causes the piezoelectric layer 21 to bend and deform, thereby pushing the ink inside the flow channel 12 and ejecting it from the through-hole 11. Each driving electrode 211 corresponds to one flow channel 12, and each flow channel 12 corresponds to one through-hole 11, enabling independent switching and waveform control of the jetting at any through-hole 11, thus preventing ink cross-flow. By adjusting the driving voltage amplitude, pulse width, and waveform shape, the volume of each droplet can be precisely controlled, significantly reducing power consumption and heat generation, and expanding the application range.
[0050] In one implementation of this embodiment, the piezoelectric layer 21 is formed by bonding sintered piezoelectric ceramic to the surface of the common electrode 212 away from the connecting layer 22 via a bonding process. Exemplarily, a pre-sintered bulk piezoelectric ceramic (such as a PZT ceramic sheet) is used and fixed to the common electrode 212 via a bonding process, forming a stacked structure of "connecting layer 22—common electrode 212—piezoelectric layer 21—driving electrode 211". After the piezoelectric layer 21 is bonded, a driving electrode 211 is formed on its upper surface (the side away from the connecting layer 22), and multiple driving electrodes 211 are also formed independently via a vapor deposition process.
[0051] Traditional bulk piezoelectric printed chips use stainless steel fluid chambers that are susceptible to acids and alkalis. This printed chip, while retaining the driving performance of bulk piezoelectricity, eliminates the fundamental corrosion resistance inherent in its traditional architecture. Furthermore, the process is simple and the manufacturing cost is low.
[0052] In another implementation of this embodiment, the piezoelectric layer 21 is formed on the surface of the common electrode 212 away from the connecting layer 22 by a sputtering deposition process. Exemplarily, a piezoelectric thin film (such as a PZT thin film) is directly grown on the surface of the common electrode 212 by a vapor deposition method such as sputtering, and an integrated structure is formed.
[0053] The piezoelectric layer 21 formed by sputtering deposition supports a high-density nozzle array, has high resolution, and the overall chip is thin, light, and adaptable.
[0054] It should be noted that the printed chip architecture provided by this invention has significant modularity and process decoupling characteristics in the manufacturing process route, supporting the flexible selection of multiple process sequences without affecting the structural integrity and performance consistency of the final printed chip. This is an important advantage that distinguishes this printed chip from the traditional inkjet printed chip manufacturing process.
[0055] Specifically, in process route one, the piezoelectric element 2 and the insulating substrate 1 are independently fabricated and then bonded (separate process). In this process route, the insulating substrate 1 and the piezoelectric element 2 are fabricated as two functionally decoupled independent modules. After each module completes its structural processing, they are integrated into a complete printed chip through bonding. In the fabrication process of the insulating substrate 1, a trench structure of vias 11 and channels 12 is sequentially formed on the silicon-based insulating substrate 1 through deep reactive ion etching. The fabrication of the insulating substrate 1 does not involve any piezoelectric materials or electrode processes, making process yield control easy. In the fabrication process of the piezoelectric element 2, the piezoelectric element 2 uses the connecting layer 22 (silicon-based sheet structure) as a mechanical support substrate and sequentially completes the following steps: a piezoelectric layer 21 is formed on the surface of the common electrode 212, and an array of driving electrodes 211 is patterned on the surface of the piezoelectric layer 21, with each driving electrode 211 corresponding to a subsequent via 11. The tested and qualified insulating substrate 1 and piezoelectric element 2 are then connected at the interface through anodic bonding, metal-to-metal bonding, and other fabrication methods.
[0056] Specifically, in process route two, the connecting layer 22 of the piezoelectric body 2 and the insulating substrate 1 are first bonded together to form a stable mechanical carrier. Then, based on the bonded connecting layer 22, the common electrode 212, the piezoelectric layer 21, and the driving electrode 211 are formed. The insulating substrate 1 and the connecting layer 22 are connected at the interface through anodic bonding or gold-to-gold bonding. At this time, the piezoelectric body 2 has not yet been formed, and the connecting layer 22 only exists as a silicon-based support structure. After bonding, the common electrode 212 is deposited on the side of the connecting layer 22 away from the insulating substrate 1 (i.e., the exposed surface), and the piezoelectric layer 21 is formed on the surface of the common electrode 212. If a sputtering deposition process is used, a PZT thin film can be directly deposited on the entire surface of the bonded wafer, and the process conditions are compatible with conventional magnetron sputtering processes. If a bonding scheme is used, a pre-sintered piezoelectric ceramic sheet can be bonded to the surface of the common electrode 212. The driving electrode 211 array is patterned on the surface of the piezoelectric layer 21 through a vapor deposition process.
[0057] The coexistence of the two process routes mentioned above makes this printed chip highly adaptable to practical applications.
[0058] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the implementation of the present invention. Those skilled in the art can make other variations or modifications based on the above description. It is neither necessary nor possible to exhaustively describe all embodiments here. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the claims of the present invention.
Claims
1. A piezoelectric inkjet printhead chip structure, characterized by, include: An insulating substrate (1) is a sheet structure formed of silicon material. The insulating substrate (1) has a plurality of through holes (11) and flow channels (12) corresponding to the through holes (11). The flow channels (12) are used for the passage of liquid medium, and the flow channels (12) are connected to the through holes (11) one by one. The piezoelectric material (2) includes a piezoelectric layer (21) and a connecting layer (22). The connecting layer (22) is a sheet structure formed of silicon material. The connecting layer (22) has a first surface (221) and a second surface (222) opposite to each other. The first surface (221) is connected to the surface of the insulating substrate (1) by a bonding process, and the second surface (222) is connected to the piezoelectric layer (21). The liquid medium can be ejected through the flow channel (12) and the through hole (11) by the squeezing action of the piezoelectric layer (21).
2. The piezoelectric inkjet printhead chip structure of claim 1, wherein, The insulating substrate (1) is connected to the first surface (221) by an anodic bonding process.
3. The piezoelectric inkjet printing chip structure according to claim 1, characterized in that, The insulating substrate (1) is connected to the first surface (221) by a bonding layer, which is formed by a metal layer formed on the surface of the insulating substrate (1) and a metal layer formed on the first surface (221) through a metal-to-metal bonding process.
4. The piezoelectric inkjet printing chip structure according to claim 3, characterized in that, An insulating layer is provided between the bonding layer and the connecting layer (22), and the thickness of the insulating layer is 0.5μm~2μm.
5. The piezoelectric inkjet printing chip structure according to claim 1, characterized in that, An inlet (223) is formed on the connecting layer (22) for the passage of fluid medium, and the inlet (223) is connected to the flow channel (12).
6. The piezoelectric inkjet printing chip structure according to claim 5, characterized in that, The flow channel (12) includes a first end (121) and a second end (122) opposite to each other, the through hole (11) is close to the first end (121) and the inlet (223) is close to the second end (122).
7. The piezoelectric inkjet printing chip structure according to claim 6, characterized in that, The flow area of the flow channel (12) near the first end (121) is greater than the flow area of the flow channel (12) near the second end (122).
8. The piezoelectric inkjet printing chip structure according to claim 1, characterized in that, The piezoelectric material (2) includes a plurality of driving electrodes (211) and a common electrode (212). The common electrode (212) is attached to and connected to the side of the connecting layer (22) away from the insulating substrate (1). The driving electrodes (211) are arranged in a one-to-one correspondence with the through holes (11). The piezoelectric layer (21) is located between the common electrode (212) and the driving electrodes (211).
9. The piezoelectric inkjet printing chip structure according to claim 8, characterized in that, The piezoelectric layer (21) is formed by bonding sintered piezoelectric ceramic to the surface of the common electrode (212) away from the connecting layer (22) through a bonding process, or the piezoelectric layer (21) is formed on the surface of the common electrode (212) away from the connecting layer (22) by a sputtering deposition process.
10. The piezoelectric inkjet printed chip structure according to any one of claims 1-9, characterized in that, The multiple flow channels (12) are arranged in a grid pattern.