Semiconductor device and method of cavity maintenance thereof

Abstract

This disclosure provides a semiconductor device and a method for maintaining its cavity, relating to the field of semiconductor device technology. The method includes: S1: providing a reaction cavity, wherein the initial TEOS film deposition thickness on the inner wall of the reaction cavity and the crystal boat reaches a preset threshold, placing the crystal boat unloaded in the reaction cavity, and introducing TEOS gas into the reaction cavity to passivate the initial TEOS film; S2: heating the reaction cavity to a preset purging temperature and introducing oxygen-containing gas, while increasing the reaction cavity pressure for a first purging, followed by cooling to the temperature of step S1; S3: repeating steps S1 and S2 several times; S4: keeping the crystal boat unloaded in the reaction cavity, and introducing TEOS gas into the reaction cavity under the process temperature and pressure conditions of the TEOS film; S5: introducing an inert gas into the reaction cavity at the same temperature as in step S4 for a second purging. This disclosure can improve equipment uptime and output, and increase production yield.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor equipment technology, and in particular to semiconductor equipment and methods for maintaining its cavities. Background Technology

[0002] LPCVD TEOS (Low Pressure Chemical Vapor Deposition with Tetraethyl Orthosilicate as a Precursor) is a core process for fabricating thick silicon oxide films in the semiconductor field. In practice, it has been found that the 6–9 μm thickness range is a critical process range limiting the efficiency of thick film growth and gap filling. Currently, mass production processes for this thickness range suffer from serious efficiency bottlenecks and derivative defects.

[0003] The reason for this is that in conventional production methods, when the TEOS film layer grown simultaneously on the surfaces of the reaction chamber and the tube & boat reaches a thickness of 6-9 μm, specific ring map particles and boat rod particles defects are generated. This is because the particles burst due to stress release in the TEOS film layer deposited on the quartz surface of the reaction chamber and the tube & boat. After overcoming this stage, the film layer gradually stabilizes, so the reaction chamber and the tube & boat can maintain the film layer without peeling off for a relatively long time. Therefore, the 6-9 μm thickness range of the TEOS film layer on the surface of the reaction chamber and the tube & boat becomes a problem that must be considered in the fabrication of TEOS insulating protective layers, such as those used in semiconductor power devices.

[0004] Traditional solutions rely entirely on a long-term pure film growth and break-in process. This involves multiple furnace cycles and long-term continuous deposition of TEOS films, allowing a matching film to gradually accumulate on the inner wall of the reaction chamber and the surface of the crystal boat rod. This weakens the film stress in the new furnace or the furnace body after maintenance, eliminates loose powder buildup, and thus reduces particle defects.

[0005] This traditional break-in method has two major drawbacks: First, the process is extremely time-consuming. Relying solely on film growth to adapt the furnace body and boat body to their respective states requires a significant amount of machine time, increasing the break-in time per batch by several times, severely reducing machine uptime and mass production capacity. Second, the improvement effect is passive and unstable. The initial film layer grown over a long period is highly porous and has uneven stress, and during the break-in process, it will continue to produce annular powder shedding and powder accumulation and shedding on the boat rod. Multiple process tests will also continuously pollute the internal environment of the cavity, causing the particle count to remain at a high level for a period of time even after exceeding 9μm.

[0006] Currently, there is no solution in the industry to accelerate the growth of TEOS thick films in the 6~9μm range. Conventional purging and short-process optimization cannot replace the long film growth and break-in process, and the capacity bottleneck and particle defect problem cannot be solved at the same time in the long term.

[0007] Based on the above-mentioned shortcomings of existing technologies, a process optimization solution that is efficient, fast, and mass-producible is needed.

[0008] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this application. Summary of the Invention

[0009] In view of the shortcomings of the prior art described above, the purpose of this disclosure is to provide a semiconductor device and a method for maintaining its cavity, so as to solve the problems in the related art.

[0010] This disclosure provides a method for maintaining a semiconductor device cavity, the semiconductor device including a reaction chamber and a crystal boat, the method comprising:

[0011] S1: Provide a reaction chamber, wherein the deposition thickness of the initial TEOS film on the reaction chamber and the inner wall of the crystal boat reaches a preset threshold, the crystal boat is placed in the reaction chamber in an unloaded state, and TEOS gas is introduced into the reaction chamber under the process temperature and pressure conditions of the TEOS film to passivate the initial TEOS film.

[0012] S2: Heat the reaction chamber to a preset purging temperature and introduce oxygen-containing gas, and increase the pressure in the reaction chamber to perform the first purging, and then cool it down to the temperature of step S1;

[0013] S3: Repeat steps S1 and S2 several times;

[0014] S4: The crystal boat is placed in the reaction chamber with no load, and TEOS gas is introduced into the reaction chamber under the process temperature and pressure conditions of the TEOS film layer;

[0015] S5: When the temperature of the reaction chamber is the same as in step S4, an inert gas is introduced into the reaction chamber to perform a second purging.

[0016] In one optional scheme, the preset threshold does not exceed 6 μm.

[0017] In one optional scheme, the temperature in step S1 is 620℃~740℃, the pressure is 180mTorr~220mTorr, the TEOS gas flow rate is 135sccm~165sccm, and the passivation treatment duration is 60 minutes~120 minutes.

[0018] In one optional embodiment, in step S2, the reaction chamber is heated to a second temperature and a second chamber pressure, and the oxygen-containing gas is introduced into the reaction chamber at a second gas flow rate; wherein, the second temperature is 650℃~800℃, the second chamber pressure is 360mTorr~440mTorr, the second gas flow rate is 0.5slm~1.5slm, and the duration of the first purging is 30 minutes~90 minutes.

[0019] In one optional scheme, the heating rate in step S2 is 5℃ / min-10℃ / min, and after heating to the preset purging temperature, oxygen-containing gas is continuously introduced under the heat preservation state.

[0020] In one optional scheme, in step S4, the temperature is 620℃~740℃, the pressure is 180mTorr~220mTorr, the TEOS gas flow rate is 135sccm~165sccm, and the processing time is 60 minutes~120 minutes.

[0021] In one alternative, in step S5, the inert gas includes nitrogen, with a flow rate of 1 slm-2.5 slm.

[0022] In one alternative, step S3 repeats steps S1 and S2 once.

[0023] In one alternative, after completing step S2, the crystal boat is removed from the reaction chamber, and in the subsequent cycle of step S1, the crystal boat is moved into the reaction chamber.

[0024] In one alternative, the semiconductor device is a vertical furnace.

[0025] In one alternative embodiment, the reaction chamber and the crystal boat are made of quartz.

[0026] A second aspect of this disclosure provides a semiconductor device that is maintained using the semiconductor device cavity maintenance method described in any of the above embodiments.

[0027] As described above, the semiconductor device and cavity maintenance method provided in this disclosure have the following beneficial effects:

[0028] 1. This disclosure can significantly reduce process time and greatly increase production capacity: This disclosure abandons the long pure thin film growth and break-in process required by the traditional 6-9μm thick film process. Through the coupling process of rapid passivation + heated oxygen purging, the original pre-break-in time of tens of hours is reduced by more than half, the efficiency of the pre-process is increased by more than 60%, the machine uptime and mass production capacity are greatly improved, and the long-standing pain point of inefficiency in thick film process in the industry is effectively solved.

[0029] 2. This disclosure can effectively and simultaneously eliminate specific particle defects: rapid passivation can form a dense passivation layer, eliminate the stress mismatch problem of the furnace wall and boat body film layer, and prevent annular powder drop particles in the middle and late stages of thick film deposition; dynamic oxygen-containing purging with temperature rise can quickly remove the precursors and loose powder accumulated on the crystal boat rod, completely solve the strip-shaped particle contamination on the crystal boat rod, and reduce the particle defect rate by more than 80%.

[0030] 3. This disclosure can effectively extend the equipment maintenance cycle and reduce production costs: the furnace body and crystal boat have stable film accumulation status, without frequent loosening and powder shedding problems, and the furnace tube maintenance cycle is extended by 40% to 60%, reducing equipment downtime and consumable consumption, and further reducing mass production costs;

[0031] 4. This method utilizes the existing structure of the equipment without requiring additional equipment modifications (such as adding other pipelines), which helps reduce production costs. Attached Figure Description

[0032] Figure 1 A schematic flowchart illustrating a semiconductor device cavity maintenance method according to an embodiment of this disclosure is shown.

[0033] Figure 2 A schematic diagram showing the stress release process of the film layer on the oxide surface of a conventional reaction chamber and a crystal boat.

[0034] Figure 3 A schematic diagram illustrating the relationship between the oxide film thickness of a traditional reaction chamber and a crystal boat and the number of particles on the surface of a semiconductor wafer batch.

[0035] Figure 4 This diagram illustrates the relationship between the oxide film thickness of the reaction chamber and the crystal boat and the number of surface particles on a batch of semiconductor wafers after cavity maintenance using the method described in one embodiment of this disclosure.

[0036] Figure 5 A schematic diagram of the structure of a computer device according to an embodiment of the present disclosure is shown. Detailed Implementation

[0037] The following specific examples illustrate the implementation of this disclosure. Those skilled in the art can easily understand other advantages and effects of this disclosure from the information disclosed herein. This disclosure can also be implemented or applied through other different specific embodiments, and various details in this disclosure can be modified or changed according to different viewpoints and application modules without departing from the spirit of this disclosure. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this disclosure can be combined with each other.

[0038] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings, so that those skilled in the art to which this disclosure pertains can readily implement it. This disclosure may be embodied in many different forms and is not limited to the embodiments described herein.

[0039] In this disclosure, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic represented in connection with that embodiment or example is included in at least one embodiment or example of this disclosure. Furthermore, the specific features, structures, materials, or characteristics represented may be combined in any suitable manner in any one or a group of embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples represented in this disclosure, as well as the features of those different embodiments or examples.

[0040] Furthermore, the terms "first" and "second" are used for illustrative purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the representation of this disclosure, "a set" means two or more, unless otherwise explicitly specified.

[0041] For the purpose of clarity, devices unrelated to the description are omitted, and the same or similar components throughout the specification are given the same reference numerals.

[0042] Throughout this specification, when it is said that a device is "connected" to another device, this includes not only "direct connection" but also "indirect connection" by placing other components in between. Furthermore, when it is said that a device "comprises" a certain constituent element, unless otherwise stated otherwise, this does not exclude other constituent elements, but rather implies that other constituent elements may be included.

[0043] While the terms first, second, etc., are used in some examples herein to refer to various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, first interface and second interface, etc., are used. Furthermore, as used herein, the singular forms “a,” “an,” and “the” are intended to also include the plural forms unless the context indicates otherwise. It should be further understood that the terms “comprising,” “including,” indicate the presence of the stated feature, step, operation, element, module, item, kind, and / or group, but do not exclude the presence, occurrence, or addition of one or more other features, steps, operations, elements, modules, items, kinds, and / or groups. The terms “or” and “and / or” as used herein are interpreted as inclusive, or mean any one or any combination thereof. Thus, “A, B, or C” or “A, B, and / or C” means “any one of: A; B; C; A and B; A and C; B and C; A, B, and C.” Exceptions to this definition will only occur if the combination of elements, functions, steps, or operations is inherently mutually exclusive in some way.

[0044] The technical terms used herein are for reference only to specific embodiments and are not intended to limit the scope of this disclosure. The singular form used herein includes the plural form unless the statement explicitly indicates otherwise. The word "comprising" as used in this specification means to specify a particular characteristic, region, integer, step, operation, element, and / or component, and does not exclude the presence or addition of other characteristics, regions, integers, steps, operations, elements, and / or components.

[0045] Although not explicitly defined, all terms, including technical and scientific terms used herein, shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. Terms defined in commonly used dictionaries shall be further interpreted as having a meaning consistent with the relevant technical literature and the message of the present disclosure, and shall not be over-interpreted as having an ideal or overly formulaic meaning unless otherwise defined.

[0046] Currently, in semiconductor chip manufacturing and other processes, semiconductor deposition equipment is typically used to form films such as silicon oxide, silicon nitride, and polycrystalline silicon on the substrate surface. For example, in the process of thin film deposition on a substrate in a reaction chamber, a crystal boat carries multiple substrates into the reaction chamber, deposition process gases are introduced into the reaction chamber, and the target film is deposited on the substrate surface under preset process conditions such as temperature and pressure.

[0047] However, in the aforementioned deposition process, the deposition process gas not only forms the target film on the substrate surface but also deposits on the inner wall of the reaction chamber and the surface of the wafer boat. As the number of batches increases, the deposits on the reaction chamber and wafer boat surfaces gradually accumulate, forming an oxide film. When the oxide film reaches a certain thickness, stress and other factors cause particle defects that detach from the inner wall of the reaction chamber and the wafer boat, detaching them onto the substrate surface. These particles detaching from the wafer surface affect the uniformity of the film layer and the reliability of the device, severely impacting production yield and even leading to device failure.

[0048] In existing technologies, to reduce particle defects, a thin film of a certain thickness is typically accumulated on the inner wall surface of the cavity. Once the particle count increases, preventative maintenance of the semiconductor equipment cavity is performed, such as shutdown for cleaning, replacement of reaction cavity components, or replacement of the crystal boat. Some solutions also use methods like idle running or dummy wafer film running to gradually release and remove particles from inside the reaction cavity. However, these methods usually require long equipment downtime, affecting equipment yield, and are difficult to proactively improve the surface condition of the reaction cavity and crystal boat before particle defects significantly increase, resulting in inconsistent improvement effects.

[0049] In view of this, this disclosure effectively addresses the operating conditions and shortcomings of existing processes in 6-9μm TEOS thick film fabrication, proposing a novel method for maintaining semiconductor device cavities, which has the following characteristics:

[0050] 1. In view of the problems of long time consumption and unstable improvement effect caused by the traditional process of relying on long-term continuous thin film growth to slowly form an adaptation film layer on the surface of the reaction chamber and the crystal boat rod, this disclosure first performs rapid and precise passivation deposition, without the need to place a dummy wafer, and can form a dense, low-stress, and high-adhesion passivation adaptation layer on the inner wall of the reaction chamber and the entire area of ​​the crystal boat rod in a short time, directly replacing the traditional time-consuming pure thin film growth and break-in process, and significantly reducing the pre-preparation time;

[0051] 2. Through the oxygen-containing gas purging and cleaning step of heating, the TEOS precursor, loose micro powder and unstable film remaining in the reaction chamber and the gap of the crystal boat are simultaneously oxidized and removed after the process heating, which quickly optimizes the furnace environment and balances the temperature field and airflow state.

[0052] 3. With the dual process of passivation and oxygen-containing gas heating and purging, the process state of the reaction chamber and the crystal boat can be adapted quickly, replacing the inefficient pure thin film growth break-in process and achieving a significant speed-up of the process. At the same time, it can eliminate the core causes of annular powder shedding and powder accumulation and shedding of the boat rod during the thick film deposition process, and solve the two types of key particle defects simultaneously.

[0053] The present invention will now be described in more detail with reference to the accompanying drawings.

[0054] This disclosure provides a method for maintaining a semiconductor device cavity, the semiconductor device including a reaction chamber and a crystal boat.

[0055] This disclosure pertains to an apparatus for TEOS thin film deposition, and therefore the reaction chamber and the crystal boat are preferably made of quartz, but are not limited thereto; for example, other materials such as silicon carbide may also be used.

[0056] like Figure 1 As shown, the semiconductor device cavity maintenance method disclosed herein includes the following steps.

[0057] First, the rapid coating passivation process in step S1 is performed: a reaction chamber is provided, and the deposition thickness of the initial TEOS film on the inner wall of the reaction chamber and the crystal boat reaches a preset threshold. The crystal boat is placed in the reaction chamber with no load, and TEOS gas is introduced into the reaction chamber under the process temperature and pressure conditions of the TEOS film to passivate the initial TEOS film.

[0058] The reaction chamber can be a single-piece or batch-type process chamber for depositing TEOS films. In this embodiment, a batch-type process chamber is preferred, especially a vertical reaction chamber of a vertical furnace. However, it is not limited to this; for example, this disclosure is also applicable to horizontal furnaces.

[0059] During TEOS thin film deposition using a vertical furnace, a wafer boat carrying several batches of wafers is placed upright in the reaction chamber and immersed in the deposition gas atmosphere. Inevitably, a film layer of a corresponding thickness is deposited simultaneously on the inner wall of the reaction chamber and the surface of the wafer boat. When this film layer accumulates to a certain thickness, it is susceptible to cracking and detachment due to multiple factors, including stress release within the film layer itself, differences in thermal expansion coefficients between different materials, and vibrations caused by repeated raising and lowering of the wafer boat, leading to severe particulate contamination. Therefore, when the initial TEOS film layer deposition thickness on the inner wall of the reaction chamber and the wafer boat reaches a preset control threshold, treatment is required. The specific value of this preset threshold can be determined according to the process requirements of the fab plant, but it typically does not exceed 6 μm. For example, preventative treatment should begin when the thickness reaches approximately 5.x μm.

[0060] There are various methods for monitoring the initial TEOS film deposition thickness on the inner wall of the reaction chamber and the crystal boat. For example, it can be based on the batches of wafers already run in the reaction chamber and the cumulative film thickness of each batch, or it can be based on the equipment running time. Alternatively, a monitor wafer can be placed in the reaction chamber, and the film deposition condition on the reaction chamber surface can be inferred from the particle characteristics on the monitor wafer surface. This disclosure does not impose strict limitations on these methods.

[0061] When the control threshold is reached, the reaction chamber and the crystal boat are kept in an unloaded state. The unloaded crystal boat (i.e., the crystal boat does not carry any wafers) is raised into the reaction chamber and the chamber is closed. The temperature of this step is set to be consistent with the TEOS thin film preparation process temperature (i.e., the process temperature). After the temperature stabilizes, the thick film process reference temperature and pressure parameters are matched, and the TEOS gas source is introduced. A thin and dense low-stress passivation coating is quickly deposited in the entire area of ​​the reaction chamber, including the inner wall of the quartz tube, and the crystal boat, including the support rod, the slot, and the side wall (all areas exposed to the deposition gas atmosphere) for preliminary passivation treatment. For example, the thickness of this coating is approximately 5000 angstroms.

[0062] Next, the simultaneous heating and O2 purging process in step S2 is performed: the reaction chamber is heated to the preset purging temperature and oxygen-containing gas is introduced, and the pressure in the reaction chamber is increased to perform the first purging, and then the temperature is reduced to the temperature in step S1.

[0063] Specifically, after the passivation coating in step S1 is completed, the process enters the heating stage. High-purity oxygen and / or ozone are continuously introduced throughout the process for dynamic purging. During the heating process, the residual TEOS precursor and uncured loose silica powder in the reaction chamber are simultaneously oxidized and decomposed, and the easily detachable powder accumulated in the dead corners of the crystal boat is cleaned. The process environment in the reaction chamber is quickly stabilized, avoiding the drawback of traditional processes that require a long time of N2 purging to consume impurities. After the O2 purging is completed, the temperature is reduced to the TEOS process temperature, and the crystal boat can then be removed from the reaction chamber.

[0064] Next, execute step S3: repeat steps S1 and S2 several times.

[0065] By cyclically executing steps S1 and S2, the deposited TEOS film can be made denser and its bonding with the inner wall of the reaction chamber and the surface of the crystal boat can be more stable, further reducing the risk of film detachment and cracking.

[0066] Preferably, the number of cycles does not exceed three. From the perspective of improving equipment capacity, in this embodiment, it is preferable to repeat steps S1 and S2 once.

[0067] Next, the rapid coating passivation process in step S4 is performed: the crystal boat is placed in the reaction chamber with no load, and TEOS gas is introduced into the reaction chamber under the process temperature and pressure conditions of the TEOS film layer.

[0068] The specific execution process of this step is similar to step S1. The reaction tube and crystal boat are kept unloaded. The unloaded crystal boat is moved into the reaction chamber, ensuring the temperature setting within the reaction chamber matches the TEOS process temperature. After temperature stabilization, the reference temperature and pressure parameters for the thick film process are matched, and a TEOS gas source is introduced. A thin and dense low-stress passivation coating is rapidly deposited on the inner wall of the reaction tube, the crystal boat support rod, the slot, and the entire sidewall. However, instead of high-temperature oxygen-containing gas purging, this step involves purging with inert gas at the same temperature. This step achieves an effect similar to chamber conditioning, bringing the surface condition of the TEOS film on the reaction chamber and crystal boat surface close to that of actual production, thus helping to further improve production yield.

[0069] Then, the Cycle Purge process in step S5 is performed: with the temperature of the reaction chamber being the same as in step S4, inert gas is introduced into the reaction chamber to perform a second purging.

[0070] The inert purging gas used in this step preferably includes nitrogen, such as pure nitrogen or a mixture of nitrogen and other gases. The temperature in this step is the same as that in step S4, and also the same as the process temperature in subsequent steps. By keeping the temperature constant, not only are defects such as equipment damage caused by temperature adjustments reduced, but more importantly, the film stress is kept constant, avoiding film damage caused by temperature fluctuations.

[0071] The steps in the above scheme are closely linked and work together to achieve the following beneficial effects:

[0072] 1. This disclosure can significantly reduce process time and greatly increase production capacity: This disclosure abandons the long pure thin film growth and break-in process required by the traditional 6-9μm thick film process. Through the coupling process of rapid passivation + heated oxygen purging, the original pre-break-in time of tens of hours is reduced by more than half, the efficiency of the pre-process is increased by more than 60%, the machine uptime and mass production capacity are greatly improved, and the long-standing pain point of inefficiency in thick film process in the industry is effectively solved.

[0073] 2. This disclosure can effectively and simultaneously eliminate specific particle defects: rapid passivation can form a dense passivation layer, eliminate the stress mismatch problem of the furnace wall and boat body film layer, and prevent annular powder drop particles in the middle and late stages of thick film deposition; dynamic oxygen-containing purging with temperature rise can quickly remove the precursors and loose powder accumulated on the crystal boat rod, completely solve the strip-shaped particle contamination on the crystal boat rod, and reduce the particle defect rate by more than 80%.

[0074] 3. This disclosure can effectively extend the equipment maintenance cycle and reduce production costs: the furnace body and crystal boat have stable film accumulation status, without frequent loosening and powder shedding problems, and the furnace tube maintenance cycle is extended by 40% to 60%, reducing equipment downtime and consumable consumption, and further reducing mass production costs;

[0075] 4. This method utilizes the existing structure of the equipment without requiring additional equipment modifications (such as adding other pipelines), which helps reduce production costs.

[0076] In a preferred example, the temperature in step S1 is 620°C to 740°C, for example, 620, 630, 640, 650…730, 740 or any value within this range, particularly 680°C; the pressure is preferably 180 mTorr to 220 mTorr, for example, 180, 190, 200, 210, 220 or any value within this range, particularly 200; the TEOS gas flow rate is preferably 135 sccm to 165 sccm, for example, 135, 140, 145…160, 165 or any value within this range, particularly 150; the passivation treatment duration is preferably 60 minutes to 120 minutes, for example, 60, 70, 80, 90, 100, 110, 120 or any value within this range, particularly 90 minutes.

[0077] Preferably, in step S2, the reaction chamber is heated to a second temperature and a second chamber pressure, and the oxygen-containing gas is introduced into the reaction chamber at a second gas flow rate.

[0078] The second temperature, i.e. the preset purging temperature, is preferably 650℃~800℃, for example, 650, 660...800 or any value within this range, and the temperature difference between it and step S1 is preferably controlled within the range of 30-50℃. For example, if the optimal temperature of step S1 is 680℃, then the optimal temperature of this step is 730℃; the second chamber pressure is preferably 360mTorr~440mTorr, for example, 360, 370...440 or any value within this range.

[0079] By increasing the temperature and pressure, dynamic oxygen purging caused by temperature and pressure changes can be used to quickly remove the precursors and loose powder deposits accumulated on the crystal boat rod. Controlling the temperature and pressure within a reasonable range can avoid excessive temperature and pressure fluctuations from adversely affecting the film and equipment components.

[0080] Furthermore, in this step, the heating process can be carried out at a constant rate or at a variable rate, and the pressure inside the reaction chamber can change regularly or randomly, or the temperature and pressure can be repeatedly varied within a preset range, without strict limitations. However, in a preferred example, a constant rate of heating is adopted in step S2, preferably 5℃ / min-10℃ / min, especially 5℃ / min. After heating to the preset purging temperature, oxygen-containing gas is continuously introduced while maintaining the temperature. For example, in a preferred example, the temperature is raised to 730℃ and held for 60 min, during which oxygen is continuously introduced, and then the temperature is lowered to the film-forming temperature of TEOS, for example, to 680℃.

[0081] The second gas flow rate, i.e. the oxygen-containing gas flow rate, is preferably 0.5 slm to 1.5 slm, for example, 0.5, 1, 1.5 or any value in this range, especially 1 slm; the first purging execution duration is preferably 30 minutes to 90 minutes, for example, 30, 40...90 or any value in this range, especially 60 minutes.

[0082] The conditions for step S4 are preferably the same as those for step S1. For example, the temperature is preferably 620°C to 740°C, especially 680°C; the pressure is preferably 180 mTorr to 220 mTorr, especially 200 mTorr; the TEOS gas flow rate is preferably 135 sccm to 165 sccm, especially 150 sccm; and the processing time is preferably 60 minutes to 120 minutes, especially 90 minutes.

[0083] In a preferred example, the inert gas in step S5 contains nitrogen, such as pure nitrogen or a mixture of nitrogen and other gases, whichever is more specific, but pure nitrogen is preferred; the flow rate is preferably 1 slm-2.5 slm, for example 1, 1.5, 2, 2.5 or any value in this range, especially 2 slm.

[0084] All the above steps are completed while the crystal boat is inside the reaction chamber, to perform synchronous processing on the reaction chamber and the crystal boat. In some examples, the crystal boat can remain continuously in the reaction chamber; that is, after the crystal boat is moved into the reaction chamber in step S1, it remains in the reaction chamber until step S5 is completed, at which point it is moved out to the loading area for wafer loading. However, in a preferred example, after completing step S2, the crystal boat is moved out of the reaction chamber, and in subsequent cycles of step S1, the crystal boat is moved into the reaction chamber. Furthermore, in steps S4 and S5, the crystal boat remains in the reaction chamber. The dynamic raising and lowering of the crystal boat further promotes the shedding of uncured, loose silica powder, ensuring that easily detachable powder accumulated in the dead corners of the crystal boat is completely removed, effectively improving the cleaning effect.

[0085] After completing step S5, you can run the TEOS thin film deposition process once or twice on a dummy wafer and judge the improvement effect by checking the particle condition on the surface of the dummy wafer. Alternatively, you can test with a small number of product wafers first, or test with dummy wafers and a small number of product wafers simultaneously or sequentially, without strict restrictions.

[0086] After the reaction chamber is maintained using the above method, the subsequent TEOS thin film deposition process can be carried out without waiting for the TEOS film layer on the surface of the reaction chamber and the crystal boat to accumulate to more than 9μm. This greatly shortens the equipment break-in time and significantly improves the machine uptime.

[0087] It should be noted that the above method can greatly improve the problems of annular particle contamination that are easy to occur when the TEOS film layer on the surface of the reaction chamber and crystal boat reaches the 6-9μm range. However, when the TEOS film layer on the reaction chamber and crystal boat increases to a certain thickness, such as more than 25μm, more in-depth maintenance is usually required, such as disassembling the crystal boat and other components and sending them to the outside for cleaning.

[0088] Figure 2 This diagram illustrates the process by which the existing film layer of oxides on the surface of the reaction chamber and crystal boat cracks due to stress release and other reasons, causing particulate contamination in the prior art. Figure 2 The arrows in the diagram indicate the direction of accumulated stress within the TEOS film.

[0089] Depend on Figure 2 As can be seen, during the TEOS thin film process, TEOS gas continuously deposits on the inner wall surface of the reaction chamber and / or the surface of the wafer boat to form a TEOS oxide film. When the thickness of the oxide film is small, below the lower limit of the particle-sensitive film thickness range (example thickness less than 6 μm), although the internal stress gradually accumulates during the film growth process, the generated particles are still within the process allowable range. When the thickness of the oxide film increases to the particle-sensitive film thickness range, the accumulated stress in the unstable film layer is prone to local release, causing phenomena such as cracking, peeling, pulverization, or particle explosion in the oxide film layer, which in turn leads to the shedding and transfer of particles to the wafer surface, increasing the number of particles on the wafer surface. As the film layer gradually thickens, the stability gradually improves. For example, when the thickness of the oxide film layer accumulates to greater than or equal to 9 μm, the oxide film layer on the inner wall surface of the reaction chamber and / or the surface of the wafer boat gradually becomes dynamically stable and is not easily peeled off.

[0090] This application improves the surface condition of the reaction chamber and the crystal boat by performing passivation and purging in advance before the oxide film reaches the lower limit of the particle-sensitive film thickness range.

[0091] The technical effects of this disclosure will be further explained below through comparative examples.

[0092] Existing technical solutions:

[0093] A pure thin-film growth and break-in process is employed, continuously depositing thin films to adapt the reaction chamber and crystal boat to their respective states. During this break-in phase, annular particles and boat-shaped particles are continuously generated. This process often takes up to 40 hours and has a significant impact on production capacity.

[0094] Embodiments of this disclosure:

[0095] S1. Rapid Coating Passivation: The furnace temperature in the reaction chamber is 680℃, the pressure is 200mTorr, the TEOS flow rate is 150sccm, a dense passivation layer is deposited, and the time is 90min, which quickly completes the surface adaptation of the entire reaction chamber and crystal boat.

[0096] S2, O2 Purge: Heat to 730℃, total duration 60min, O2 flow rate 1slm, pressure 400mTorr, dynamically remove loose powder and residual precursors throughout the heating process.

[0097] S3. Repeat steps S1 and S2 once;

[0098] S4. Rapid Coating Passivation: The furnace temperature in the reaction chamber is 680℃, the pressure is 200mTorr, the TEOS flow rate is 150sccm, a dense passivation layer is deposited, and the time is 90min, which quickly completes the surface adaptation of the entire reaction chamber and crystal boat.

[0099] S5, N2 Cycle Purge process: This is the last step in the process flow. The furnace temperature in the reaction chamber is 680℃ and the N2 flow rate is 2slm to perform cycle vacuum / purge, which is mainly to thoroughly purify the chamber environment.

[0100] Implementation results: In terms of time, the total time of this disclosed embodiment is only about 11 hours, which is more than half of the process time compared with the traditional 40-hour pure thin film break-in process.

[0101] For the improvement effect of granules, please refer to Figure 3 and Figure 4 As shown.

[0102] Figure 3This diagram illustrates the relationship between the thickness of the TEOS oxide film on the reaction chamber and the crystal boat and the number of particles on the semiconductor wafer surface when using existing technology. The horizontal axis represents the semiconductor wafer batch number, the bars represent the deposition thickness of the TEOS oxide film on the reaction chamber and / or crystal boat surface, and the dots represent the number of particles larger than 0.2 μm in diameter detected on the semiconductor wafer surface for the corresponding batch. For the same batch of semiconductor wafers, particle detection results can be obtained for multiple wafers, thus multiple particle count points can be displayed for the same batch.

[0103] Depend on Figure 3 As can be seen, in traditional reactive chamber processes, as the thickness of the TEOS oxide film on the reactive chamber and / or wafer surface gradually increases, when the oxide film thickness enters the particle-sensitive thickness range, such as the approximately 6μm to 9μm range corresponding to the dashed box in the figure, the number of particles on the semiconductor wafer surface shows a significant increase and fluctuation, with some batches having a significantly higher particle count than others. Such a high particle count clearly cannot meet process requirements. Therefore, in existing technologies, when the TEOS film thickness on the reactive chamber and wafer surface accumulates to this thickness range, the equipment cannot run normally and can only remain idle.

[0104] In this embodiment, when the deposition thickness of the oxide film layer on the reaction chamber and / or the crystal boat surface reaches a preset threshold (e.g., close to 6 μm), the particle size distribution after a multi-step process including rapid coating passivation and O2 purging is as follows: Figure 4 As stated. From Figure 4 As can be seen, after treatment using the method disclosed herein, the number of particles in the 6-9 μm range is significantly reduced.

[0105] This demonstrates that the present disclosure can suppress the abnormal increase in particle number within the particle-sensitive film thickness range, ensuring that even when the TEOS film thickness on the reaction chamber and crystal boat surface is within the sensitive range of 6 μm to 9 μm, the number of particles generated remains within the process-allowed range. Therefore, the equipment can operate normally during this period, reducing idle waiting time and improving equipment uptime and output.

[0106] Through extensive experiments, the inventors discovered that by adjusting the parameters of each step within the scope of this disclosure, although there are some differences in the number of particles corresponding to the 6μm to 9μm range, they are all within the allowable range of the process. For the sake of brevity, these results are not listed one by one.

[0107] A second aspect of this disclosure provides a semiconductor device that is maintained using the semiconductor device cavity maintenance method described in any of the above embodiments.

[0108] For a description of the maintenance methods, please refer to the foregoing content; for the sake of brevity, it will not be repeated here.

[0109] By using the maintenance method of this disclosure to maintain the cavity, the utilization and output of the semiconductor equipment provided by this disclosure can be significantly improved, the maintenance cycle can be extended, and customers can reduce costs.

[0110] like Figure 5 The diagram shown illustrates the structure of a computer device according to an embodiment of the present disclosure.

[0111] The computer device 700 may be exemplified as the control terminal of a semiconductor device cavity, such as a server, desktop computer, laptop computer, tablet computer, or other terminal.

[0112] The computer device 700 includes a bus 701, a processor 702, and a memory 703. The processor 702 and the memory 703 can communicate via the bus 701. The memory 703 can store computer programs or instructions. The processor 702 implements the method flow or function of the previous embodiments by running the computer program or instructions in the memory 703, for example... Figure 1 .

[0113] Bus 701 can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of representation, although only one thick line is used in the diagram, this does not indicate that there is only one bus or one type of bus.

[0114] In some embodiments, processor 702 may be implemented as a central processing unit (CPU), microprocessor unit (MCU), system on chip (System on Chip), or field-programmable array (FPGA). Memory 703 may include volatile memory for temporary data storage during program execution, such as random access memory (RAM).

[0115] The memory 703 may also include non-volatile memory for data storage, such as read-only memory (ROM), flash memory, hard disk drive (HDD), or solid-state disk (SSD).

[0116] In some embodiments, the computer device 700 may further include a communicator 704. The communicator 704 is used for communication with external devices. In specific examples, the communicator 704 may include one or more wired and / or wireless communication circuit modules. For example, the communicator 704 may include one or more of, for example, a wired network card, a USB module, a serial interface module, etc. The wireless communication protocols followed by the wireless communication module include, for example, Nearfield Communication (NFC) technology, Infrared (IR) technology, Global System for Mobile Communications (GSM), General Packet Radio Service (GPRS), Code Division Multiple Access (CDMA), Wideband Code Division Multiple Access (WCDMA), Time-Division Code Division Multiple Access (TD-SCDMA), Long Term Evolution (LTE), Bluetooth (BT), Global Navigation Satellite System (GNSS), etc.

[0117] This disclosure also provides a computer-readable storage medium storing a computer program or instructions, which, when run, implement the method flow or function of any of the previous embodiments.

[0118] That is, the method steps in the above embodiments are implemented as software or computer code that can be stored in a recording medium (such as CD ROM, RAM, floppy disk, hard disk or magneto-optical disk), or implemented as computer code that is originally stored in a remote recording medium or a non-transitory machine-readable medium and will be stored in a local recording medium after being downloaded via a network, so that the method represented herein can be stored in such software processing on a recording medium using a general-purpose computer, a special processor or programmable or special hardware (such as ASIC or FPGA).

[0119] This disclosure may also provide a computer program product, comprising one or more computer programs or instructions, which, when run, perform all or part of the processes or functions described in this disclosure. The computer program product includes one or more computer programs or instructions.

[0120] Computer programs or instructions can be stored in a readable storage medium or transferred from one readable storage medium to another. For example, the computer program or instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The readable storage medium can be any available medium capable of access, or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; an optical medium, such as a digital video optical disc; or a semiconductor medium, such as a solid-state drive. The computer-readable storage medium can be a volatile or non-volatile storage medium, or it can include both volatile and non-volatile types of storage media.

[0121] In summary, the present disclosure provides a semiconductor device and a cavity maintenance method thereof, the method comprising: S1: providing a reaction cavity, wherein the initial TEOS film thickness deposited on the inner wall of the reaction cavity and the crystal boat reaches a preset threshold, the crystal boat is placed in the reaction cavity with no load, and TEOS gas is introduced into the reaction cavity to passivate the initial TEOS film under the process temperature and pressure conditions of the TEOS film; S2: heating the reaction cavity to a preset purging temperature and introducing oxygen-containing gas, and increasing the pressure in the reaction cavity to perform a first purging, and then cooling down to the temperature of step S1; S3: repeating steps S1 and S2 several times; S4: placing the crystal boat in the reaction cavity with no load, and introducing TEOS gas into the reaction cavity under the process temperature and pressure conditions of the TEOS film; S5: when the temperature of the reaction cavity is the same as in step S4, introducing an inert gas into the reaction cavity to perform a second purging.

[0122] Compared to existing technologies, this disclosure offers a breakthrough reduction in process time and a significant increase in production capacity: This disclosure eliminates the lengthy pure thin film growth and break-in process required for traditional 6-9μm thick film processes. Through a coupled process of rapid passivation and heated oxygen purging, the original break-in time of tens of hours is reduced by more than half, improving pre-process efficiency by over 60%. This greatly enhances machine uptime and mass production capacity, effectively addressing the long-standing pain point of inefficiency in thick film processes within the industry. Simultaneously, this disclosure effectively eradicates specific particle defects: rapid passivation forms a dense passivation layer, eliminating stress mismatch issues in the furnace wall and boat body film layers, and preventing thick film deposition. The method effectively removes annular powder particles during the later stages of accumulation; dynamic oxygen-containing purging with heating rapidly removes the enriched precursors and loose powder deposits on the crystal boat rod, completely solving the problem of strip-shaped particle contamination on the crystal boat rod, which can reduce the particle defect rate by more than 80%; in addition, this method can effectively extend the equipment maintenance cycle and reduce production costs: the furnace body and crystal boat film accumulation state are stable, there is no frequent loose powder shedding problem, the furnace tube maintenance cycle is extended by 40% to 60%, reducing equipment downtime and consumable consumption, further reducing mass production costs; furthermore, this method is completed entirely using the existing equipment structure, without the need for additional equipment modifications (such as adding other pipelines), which helps to reduce production costs.

[0123] The above embodiments are merely illustrative of the principles and effects of this disclosure and are not intended to limit this disclosure. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this disclosure. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this disclosure should still be covered by the protection scope of this disclosure.

Claims

1. A method of semiconductor equipment chamber maintenance, comprising: The semiconductor device includes a reaction chamber and a crystal boat, and the method includes: S1: Provide a reaction chamber, wherein the deposition thickness of the initial TEOS film on the reaction chamber and the inner wall of the crystal boat reaches a preset threshold, the crystal boat is placed in the reaction chamber in an unloaded state, and TEOS gas is introduced into the reaction chamber under the process temperature and pressure conditions of the TEOS film to passivate the initial TEOS film. S2: Heat the reaction chamber to a preset purging temperature and introduce oxygen-containing gas, and increase the pressure in the reaction chamber to perform the first purging, and then cool it down to the temperature of step S1; S3: Repeat steps S1 and S2 several times; S4: The crystal boat is placed in the reaction chamber with no load, and TEOS gas is introduced into the reaction chamber under the process temperature and pressure conditions of the TEOS film layer; S5: When the temperature of the reaction chamber is the same as in step S4, an inert gas is introduced into the reaction chamber to perform a second purging.

2. The method of claim 1, wherein, The preset threshold does not exceed 6μm.

3. The method of claim 1, wherein, In step S1, the temperature is 620℃~740℃, the pressure is 180mTorr~220mTorr, the TEOS gas flow rate is 135sccm~165sccm, and the passivation treatment takes 60 minutes~120 minutes.

4. The method of claim 1, wherein, In step S2, the reaction chamber is heated to a second temperature and a second chamber pressure, and the oxygen-containing gas is introduced into the reaction chamber at a second gas flow rate; wherein, the second temperature is 650℃~800℃, the second chamber pressure is 360mTorr~440mTorr, the second gas flow rate is 0.5slm~1.5slm, and the first purging execution time is 30 minutes~90 minutes.

5. The method of claim 1, wherein, The heating rate in step S2 is 5℃ / min-10℃ / min. After heating to the preset purging temperature, oxygen-containing gas is continuously introduced while maintaining the temperature.

6. The method of claim 1, wherein, In step S4, the temperature is 620℃~740℃, the pressure is 180mTorr~220mTorr, the TEOS gas flow rate is 135sccm~165sccm, and the processing time is 60 minutes~120 minutes.

7. The method of claim 1, wherein, In step S5, the inert gas contains nitrogen and the flow rate is 1 slm-2.5 slm.

8. The method of claim 1, wherein, After completing step S2, the crystal boat is removed from the reaction chamber, and in the subsequent cycle of step S1, the crystal boat is moved into the reaction chamber. And / or, in step S3, steps S1 and S2 are repeated once.

9. The method of claim 1, wherein, The semiconductor equipment is a vertical furnace. And / or, the reaction chamber and the crystal boat are made of quartz.

10. A semiconductor device, characterized by comprising: The semiconductor device is maintained using the semiconductor device cavity maintenance method as described in any one of claims 1 to 9.

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