A metasurface feynman gate based on spectroscopic modulation

Abstract

This invention discloses a metasurface Feynman gate based on beam splitting modulation, belonging to the field of terahertz communication modulation technology. The optical path structure consists of two metasurfaces with different structures, a terahertz transmitter, a beam splitter, a reflector, and a receiver. Based on the conductivity of the metallic pattern and the phase transition from an insulating state to a metallic state, a vanadium dioxide thin film patch on the metasurface can act as a switch to change the transmittance of the terahertz wave, achieving high contrast and implementing Feynman gate logic operations. The high and low voltage states of the two metals conducting on the metasurface are used as the two input quantities of the device. By performing different logic operations through two different optical paths and using metasurfaces with different structures, two output quantities can be obtained, thus realizing the Feynman gate logic function at a certain frequency point in the terahertz band. This work fills the gap in beam splitting modulation technology for metasurface logic devices.

Description

Technical Field

[0001] This invention relates to the field of terahertz modulation technology, specifically to terahertz metasurface devices with Feynman gate logic and their operating schemes. Background Technology

[0002] Terahertz waves hold significant promise for applications in high-speed communication and computing. In recent years, terahertz logic devices based on metasurfaces have made some progress; for example, research has utilized phase-change materials such as vanadium dioxide (VO2) to realize basic logic gates like AND and XOR. However, most of these existing devices are designed for irreversible logic, meaning a one-to-one correspondence between inputs and outputs cannot be guaranteed. On the other hand, reversible computing is considered a key path to overcome the energy consumption bottleneck of traditional computing and holds a core position in cutting-edge fields such as quantum computing and low-power high-performance processors. Reversible logic requires logic gates to possess bi-emitter characteristics, with typical basic reversible gates including Feynman gates. However, existing implementations of reversible logic gates in the terahertz band are relatively scarce, and existing terahertz Feynman gates mainly rely on polarization modulation or dual-material systems, which suffer from limitations such as functional rigidity and the inability to clear garbage outputs. Therefore, how to realize compact, easily modulated, and garbage-clearing metasurface reversible logic devices in the terahertz band is a pressing technical problem that needs to be solved.

[0003] With the development of terahertz communication technology, the demand for multi-valued logic functional devices has also increased. To address the above issues, this invention proposes a metasurface Feynman gate based on beam splitting modulation. By configuring AND-type and XOR-type metasurfaces on two free-space optical paths respectively, and utilizing the VO2 phase transition characteristics to achieve electronically controlled logic switching, this invention not only achieves the standard Feynman gate function but also provides built-in output clearing capability, providing a more practical hardware foundation for the construction of terahertz reversible computing systems. Summary of the Invention

[0004] To address the above problems, this invention discloses a metasurface Feynman gate based on spectral modulation.

[0005] This invention is achieved through the following technical solution:

[0006] This invention provides a metasurface Feynman gate based on beam splitting modulation, comprising: a terahertz wave source; a beam splitter for splitting the terahertz wave into a first optical path and a second optical path; a first metasurface structure MSⅠ disposed in the first optical path for receiving a control bit signal and outputting pass-through logic; and a second metasurface structure MSⅡ disposed in the second optical path for receiving a control bit signal and a target bit signal and outputting XOR logic.

[0007] The top layer of the MSⅠ is a periodically arranged subwavelength metal structure, which is a "human" shaped metal strip, and a circular VO2 thin film is integrated in the gap between two "human" shaped metal strips; the metasurface structure is a double-layer structure, in which the bottom layer is a silicon dielectric layer.

[0008] The MSⅡ top and bottom layers are identical and symmetrically arranged periodically subwavelength metal structures. The metal structure is a "human" shaped metal strip, and a circular VO2 thin film is integrated in the gap between two "human" shaped metal strips. The metasurface structure is a three-layer structure, in which the middle layer is a silicon dielectric layer.

[0009] Both MSⅠ and MSⅡ are vanadium dioxide (VO2) integrated metasurfaces. By applying an external voltage to regulate the insulating-metallic phase transition of VO2, the transmittance of the metasurface to terahertz waves is changed, thereby achieving the output of logic "0" and logic "1". MSⅠ is configured as an AND gate logic unit, and MSⅡ is configured as an XOR gate logic unit.

[0010] By fixing the function bit input port of MSⅠ to logic "1", the control bit signal can be directly output (P=A); by fixing the target bit input port to logic "0", the clear output can be achieved (P=0), thus completing the garbage output clearing in the reversible circuit without adding additional logic gates.

[0011] The beam splitter is a 50:50 beam splitter, with the first and second optical paths being spatially independent and transmitting to different terahertz detectors respectively, enabling parallel detection of the two output channels.

[0012] The present invention also provides a garbage output removal method based on metasurface Feynman gates: a Feynman gate is provided, which includes an MSⅠ channel for outputting a pass-through signal; the output signal of the channel is identified as a garbage bit that does not need to participate in subsequent calculations; the input configuration of the MSⅠ channel is adjusted, its function bit input is fixed to logic "0", so that its output is constant to logic "0", thereby completing the physical removal of garbage bits without adding additional logic gates. Attached Figure Description

[0013] Figure 1 This is a schematic diagram of the optical path structure of a metasurface Feynman gate based on beam splitting modulation.

[0014] Figure 2 The diagram shows the unit structure of the first metasurface MSⅠ and the second metasurface MSⅡ.

[0015] Figure 3 The transmission spectra of the first metasurface MSⅠ are given at different vanadium dioxide conductivity values ​​σ1 and σ2.

[0016] Figure 4 This is a truth table of the first metasurface MSⅠ under different vanadium dioxide conductivity values ​​σ1 and σ2.

[0017] Figure 5 The transmission spectra of the second metasurface MSⅡ at different vanadium dioxide conductivity σ are shown.

[0018] Figure 6 This is a truth table of the second metasurface MSⅡ for different vanadium dioxide conductivity σ.

[0019] Figure 7 This is a truth table for a metasurface Feynman gate based on spectral modulation. Detailed Implementation

[0020] To provide a more detailed description of the solutions and advantages of the present invention, the present invention will be further explained and illustrated below with reference to the accompanying drawings and embodiments. The following embodiments are only some of the embodiments shown, and not all of the embodiments.

[0021] An example of an optical path structure based on a spectroscopically modulated metasurface Feynman gate. Figure 1 As shown, it includes a terahertz wave source, a 50:50 beam splitter, a first metasurface structure MSⅠ, and a second metasurface structure MSⅡ. The terahertz wave source generates a continuous terahertz wave of 0.75 THz, which is split into a first optical path and a second optical path by the beam splitter. MSⅠ is located in the first optical path and is used to receive the control bit signal A and output the direct logic P = A; MSⅡ is located in the second optical path and is used to receive the control bit signal A and the target bit signal B and output the XOR logic Q = A⊕B. Both MSⅠ and MSⅡ are VO2 integrated metasurfaces. The output switching between logic "0" and logic "1" is achieved by adjusting the insulating-metallic phase transition of VO2 through external voltage. After being modulated by MSⅠ and MSⅡ, the terahertz wave is received by the first detector and the second detector, respectively, to complete the Feynman gate logic operation.

[0022] This embodiment further illustrates the phase transition control method for VO2. For example... Figure 1 As shown, in MSⅠ and MSⅡ, the two ends of the VO2 thin film are connected to an external voltage source via upper and lower metal strips. When the applied voltage is 0 V, VO2 is in an insulating state with a conductivity of 200 S / m, defined as the "OFF state" of metasurface transmission. The metasurface is strongly coupled with terahertz waves, resulting in low transmittance, corresponding to logic "0". When the applied voltage reaches 3.65 V, the Joule heating effect triggers the insulating-metallic phase transition of VO2, transforming it into a metallic state with a conductivity increasing to 300,000 S / m. This is defined as the "ON state" of metasurface transmission, where the coupling between the metasurface and terahertz waves weakens, increasing transmittance, corresponding to logic "1". By switching the applied voltage, the dynamic switching between logic "0" and logic "1" can be achieved.

[0023] This embodiment, based on Embodiment 1, further defines the specific parameters of the metasurface structure. For example... Figure 2 As shown, MSⅠ (AND gate) adopts a double-layer, top-bottom "V"-shaped metal structure with a unit cell period P = 120 μm. The "V"-shaped metal strips are formed by splicing together a pair of quarter-elliptical metal layers with the middle quarter-elliptical cavity removed. A silicon dielectric layer with a dielectric constant ε of 11.9 and a thickness of 20 μm is placed between the two metal layers. A circular VO2 film with a radius of 5 μm is embedded in the middle of the two "V"-shaped metal strips. MSⅡ (XOR gate) adopts a single-layer "V"-shaped metal structure with a unit cell period P = 120 μm. The structural parameters of the top "V"-shaped metal strip are the same as those of the first metasurface structure. The substrate is silicon dielectric with a dielectric constant ε of 11.9 and a thickness of 50 μm. The above parameters have been optimized through simulation to ensure the best logic contrast at an operating frequency of 0.75 THz.

[0024] This embodiment describes the specific method of configuring MSⅠ (AND gate) for pass-through functionality. The function bit input port of MSⅠ is fixed to logic "1" (i.e., a voltage of 3.65 V is applied, causing the corresponding VO2 at this input to be in a metallic state). At this time, the output of MSⅠ, P = A·1 = A, meaning the control bit signal A is directly transmitted to the output, achieving the pass-through function.

[0025] MSⅠ implements pass-through function, such as Figure 3 As shown. By changing the input logic input, a pass-through function at 0.75THz can be achieved. The truth table of the designed first metasurface structure (AND gate) is as follows. Figure 4 As shown, A is the input terminal, and the function bit can be used to switch the pass-through function or set the output to 0. σ1 and σ2 are the conductivity of the top and bottom vanadium dioxide films, respectively. The actual transmittance is the actual transmittance in the first optical path after passing through the beam splitter. P is the output terminal, where the actual transmittance threshold is set to 0.1. If the actual transmittance is greater than 0.1, the output logic is 1, otherwise it is 0.

[0026] like Figure 4As shown, this embodiment describes the specific method of configuring MSI (AND gate) with a clear function to clear the garbage output bits of the Feynman gate. When the P output of the Feynman gate is identified as a garbage output bit that does not need to participate in subsequent calculations, the function bit input port of MSI is fixed to logic "0" (i.e., a 0 V voltage is applied, making the VO2 corresponding to this input terminal in an insulating state) through external voltage configuration. At this time, regardless of the value of the control bit A, the output P of MSI = A·0 = 0, realizing the physical clearing of the garbage output bits. Compared with existing technologies (such as Feynman gates based on graphene microring resonators), this scheme can complete the garbage bit clearing without adding additional logic gates, reducing circuit complexity and quantum cost. Simulation results show that at a working frequency of 0.75 THz, the transmittance of MSI in the ON state is 25.2%, the transmittance in the OFF state is 6.2%, and the logic contrast reaches 6.1 dB, which meets the interpretation requirements of terahertz logic operations.

[0027] MS II implements the XOR function as follows: Figure 4 As shown. By changing the input logic values, the XOR function at 0.75THz can be implemented. The truth table of the designed MSⅡ (XOR gate) is as follows. Figure 6 As shown, A and B are the input terminals, σ is the conductivity of the top and bottom vanadium dioxide films, the actual transmittance is the actual transmittance in the second optical path after passing through the beam splitter, and Q is the output terminal. The threshold for actual transmittance is set to 0.1. If the actual transmittance is greater than 0.1, the output logic is 1, otherwise it is 0.

[0028] like Figure 6 As shown, this embodiment describes the specific method by which the MSⅡ (XOR gate) implements the XOR function. The MSⅡ receives a control bit signal A and a target bit signal B as two independent inputs, which are applied to the two input terminals of the metasurface respectively. When the voltage combination of A and B causes the two VO2 thin films to have different phase states, the transmittance of the metasurface changes, achieving the logic output Q = A⊕B. Simulation results show that at a working frequency of 0.75 THz, the transmittance of the MSⅡ in the ON state is 26%, the transmittance in the OFF state is 1.5%, and the logic contrast reaches 12.38 dB, meeting the interpretation requirements of terahertz logic operations.

[0029] like Figure 7 As shown in the figure, this embodiment illustrates the relationship between the input and output of the Feynman gate obtained by the combined action of MSⅠ and MSⅡ.

[0030] This embodiment illustrates the independent optimization design of MSⅠ and MSⅡ. Since the first and second optical paths are spatially independent, MSⅠ and MSⅡ can be independently optimized for their respective functional requirements. MSⅠ focuses on optimizing transmittance and logic contrast under pass-through and clear functions, employing a double-layer structure to achieve Huygens resonance and improve ON-state transmittance. MSⅡ focuses on optimizing contrast under XOR function, employing a single-layer structure to simplify the design. The two are functionally decoupled through a beam splitter, preventing interference and thus achieving overall performance superior to a single-structure solution.

Claims

1. A metasurface Feynman gate based on spectral modulation, characterized in that: This optical path structure uses two different metasurface structures as the main computing carriers and combines them with various optical devices to form the optical path. First, a beam splitter is used to split the input terahertz wave into a first optical path and a second optical path; the first metasurface structure (corresponding to P output) is set in the first optical path to receive control bit signals and output pass-through logic; The second metasurface structure (corresponding to the Q output) is located in the second optical path to receive the control bit signal and the target bit signal and output XOR logic. Both the first and second metasurface structures are vanadium dioxide integrated metasurfaces. The phase transition state of VO2 is controlled by an external voltage to achieve the switching of logic functions. Ultimately, the logic function of a Feynman gate is realized, namely: Where A is the control bit input, B is the target bit input, P is the first output, and Q is the second output.

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