A method and apparatus for determining process parameters

Abstract

This invention provides a method and apparatus for determining process parameters, belonging to the field of semiconductor manufacturing technology. The method includes: etching a preset region of each wafer in a first test wafer set to different depths to obtain a second test wafer set, wherein the preset region of each wafer in the second test wafer set includes sub-regions with multiple etching depths; using the focal plane corresponding to the sub-region of the target etching depth as the exposure reference plane, and performing exposure processing on different wafers in the second test wafer set based on multiple exposure doses to obtain a third test wafer set, wherein one wafer in the second test wafer set corresponds to one exposure dose, and the target etching depth is one of the multiple etching depths; and determining the focus depth and exposure margin based on the multiple etching depths, the multiple exposure doses, and the development measurement results corresponding to the third test wafer set. This improves the accuracy of process parameters.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method and apparatus for determining process parameters. Background Technology

[0002] Depth of Focus (DOF) and Exposure Latitude are important process parameters in photolithography. They are usually obtained by measuring the entire wafer's focal-exposure matrix (FEM). This means that by presetting the matrix parameters of the focal plane position and exposure dose in the exposure program, the photolithography machine can be controlled to adjust the wafer stage height and exposure dose field by field. After development and measurement of critical dimensions (CD), a window for observing process parameters is obtained.

[0003] However, in the existing technology, when performing full-wafer FEM testing based on old stepper machines, there is a problem that the Z-axis aging causes distortion of the focal plane positioning accuracy. In addition, the full-wafer sampling is easily mixed with interference factors from the entire surface, such as the unevenness of the coating, the temperature difference of the hot plate, and the flatness error of the entire wafer surface, which affects the accuracy of the final determination of process parameters.

[0004] It is evident that the process parameters determined based on existing technologies suffer from poor accuracy. Summary of the Invention

[0005] To address the aforementioned technical problems, this invention provides a method and apparatus for determining process parameters, which can improve the accuracy of process parameters.

[0006] To achieve the above objectives, the technical solution adopted in the embodiments of the present invention is as follows:

[0007] This invention provides a method for determining process parameters, the method comprising:

[0008] Etching at different depths is performed on a preset area of ​​each wafer in the first test wafer set to obtain a second test wafer set. The preset area of ​​each wafer in the second test wafer set includes sub-regions with multiple etching depths.

[0009] Using the focal plane corresponding to the sub-region of the target etching depth as the exposure reference plane, different wafers in the second test wafer set are exposed based on multiple exposure doses to obtain a third test wafer set. In the second test wafer set, one wafer corresponds to one exposure dose, and the target etching depth is one of the multiple etching depths.

[0010] Based on the various etching depths, the various exposure doses, and the development measurement results corresponding to the third test wafer set, the focus depth and exposure margin are determined.

[0011] In some embodiments, etching a preset region of each wafer in the first test wafer set to obtain a second test wafer set at different depths includes:

[0012] The preset area of ​​the first wafer is divided into M grids of equal area, where the first wafer is any one of the first test wafers, and M is a positive integer.

[0013] The M grids define N sub-regions, each sub-region comprising at least one grid, and different sub-regions comprising different grids, where N is a positive integer less than or equal to M;

[0014] The N sub-regions are etched to different depths to obtain a second wafer. The second wafer includes N sub-regions with different etching depths, and each sub-region corresponds to one etching depth. The second test wafer set includes the second wafer.

[0015] In some embodiments, the etching process of the N sub-regions to obtain a second wafer at different depths includes:

[0016] Obtain the position information of each grid in the first sub-region of the first wafer, wherein the first sub-region is any one of the N sub-regions of the first wafer;

[0017] Based on the position information of each grid in the first sub-region, the etching area corresponding to the first sub-region is determined. One etching area corresponds to one grid, and the area of ​​the etching area is smaller than the area of ​​the grid.

[0018] The etching region corresponding to the first sub-region is etched to a first depth until the etching regions corresponding to each sub-region of the first wafer are etched to different depths, and then the second wafer is obtained.

[0019] In some embodiments, the preset region is the central region of the wafer.

[0020] In some embodiments, the plurality of etching depths are gradient etching depths, and the target etching depth is the etching depth located at the middle position among the gradient etching depths.

[0021] In some embodiments, determining the focus depth and exposure margin based on the multiple etching depths, the multiple exposure doses, and the development measurement results corresponding to the third test wafer set includes:

[0022] After developing the third test wafer set, the size of the photoresist pattern in each sub-region is measured to obtain the size data of the photoresist pattern in the sub-region corresponding to each wafer in the third test wafer set.

[0023] A mapping relationship is constructed based on the size data of the photoresist pattern in each sub-region, the etching depth of each sub-region, and the exposure dose of each sub-region.

[0024] Based on the mapping relationship, a Borson curve is fitted to obtain Borson curves with etching depth as the equivalent focus depth and size data as the response value under different exposure doses.

[0025] Determine the depth of focus and exposure margin from the Boson curve.

[0026] This invention also provides a process parameter determination device, comprising:

[0027] The etching module is used to etch a preset area of ​​each wafer in the first test wafer set to different depths to obtain a second test wafer set. The preset area of ​​each wafer in the second test wafer set includes sub-regions with multiple etching depths.

[0028] The exposure module is used to expose different wafers in the second test wafer set based on multiple exposure doses, using the focal plane corresponding to the sub-region of the target etching depth as the exposure reference plane, to obtain a third test wafer set. In the second test wafer set, one wafer corresponds to one exposure dose, and the target etching depth is one of the multiple etching depths.

[0029] The determination module is used to determine the focus depth and exposure margin based on the multiple etching depths, the multiple exposure doses, and the development measurement results corresponding to the third test wafer set.

[0030] This invention also provides an electronic device, including: a processor, a memory, and a program stored in the memory and executable on the processor, wherein the program, when executed by the processor, implements the steps of the above method.

[0031] This invention also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the above-described method.

[0032] This invention also provides a computer program product, including computer instructions that, when executed by a processor, implement the steps of the above-described method.

[0033] In this embodiment, by etching different depths within a predetermined area of ​​the wafer, and creating multiple sub-regions of varying depths within that area, an equivalent defocusing amount is achieved. This replaces the traditional FEM method that relies on Z-axis movement of a stepper machine to simulate focal plane shift, avoiding positioning errors caused by Z-axis aging of older machines. Furthermore, by using a predetermined area of ​​the wafer instead of the entire wafer, the influence of interference factors such as uniformity of the photoresist coating, temperature differences across the hot plate, and flatness errors across the entire wafer surface is reduced. Then, using the focal plane corresponding to the sub-region at the target etching depth as the exposure reference plane, different wafers are exposed separately based on different exposure doses, enabling flexible configuration of the two major process variables: defocusing amount and exposure dose. Finally, by combining the etching depth, exposure dose, and measurement results to determine the acceptable range, the final focus depth and exposure margin are determined, improving the accuracy of the process parameters. Attached Figure Description

[0034] Figure 1 A flowchart illustrating the method for determining process parameters in an embodiment of the present invention;

[0035] Figure 2 This is a schematic diagram showing the preset region grid division of the first wafer in an embodiment of the present invention;

[0036] Figure 3 This diagram illustrates an etching process with an etching depth of 100 nm in an embodiment of the present invention.

[0037] Figure 4 This diagram illustrates the grid distribution in the sub-regions corresponding to etching depths from 200 nm to 800 nm in this embodiment of the invention.

[0038] Figure 5 A schematic diagram showing sub-regions with different etching depths in a preset region of the second wafer in an embodiment of the present invention;

[0039] Figure 6 This is a schematic diagram showing the position information of each grid within a preset area in the first wafer in an embodiment of the present invention.

[0040] Figure 7 This is a schematic diagram of the layout used for alignment and exposure in an embodiment of the present invention;

[0041] Figure 8 This is a schematic diagram of the process parameter determination device in an embodiment of the present invention;

[0042] Figure 9 This is a schematic diagram of the structure of the electronic device in an embodiment of the present invention. Detailed Implementation

[0043] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention are within the scope of protection of the present invention.

[0044] In existing technologies, the method of determining process parameters by performing full-wafer FEM testing on aging stepper machines is prone to aging, leading to distortion in focal plane positioning accuracy. Furthermore, this full-wafer sampling method is easily influenced by interference factors from the entire wafer, such as unevenness in the coating process, temperature differences across the hot plate, and flatness errors across the wafer surface, all of which affect the accuracy of the final determined process parameters. Therefore, this invention provides a method and apparatus for determining process parameters, which can improve the accuracy of the process parameters.

[0045] This invention provides a method for determining process parameters, such as... Figure 1 As shown, it includes the following steps:

[0046] Step 101: Etch a preset area of ​​each wafer in the first test wafer set to a different depth to obtain a second test wafer set. The preset area of ​​each wafer in the second test wafer set includes sub-regions with multiple etching depths.

[0047] In this step, the wafers in the first test wafer set can be raw wafers, serving as the substrate for subsequent tests. During the etching process on the wafers in the first test wafer set, a preset area of ​​the wafer is selected for etching, and the subsequent exposure processing also targets this preset area, rather than the entire wafer. This reduces the impact of interference factors such as uniformity of the resist coating, temperature difference across the entire hot plate, and flatness error across the entire wafer surface.

[0048] Furthermore, each wafer's preset area is etched to different depths, resulting in each wafer's preset area comprising sub-regions with multiple etch depths. These multiple etch depths can be set according to the actual defocus level. For example, if the defocus level includes -400nm, -300nm, -200nm, -100nm, 0nm (i.e., the exposure reference plane), 100nm, 200nm, 300nm, and 400nm, then the multiple etch depths can include: 0nm, 100nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, and 800nm. In subsequent exposure processing, the focal plane corresponding to one of the sub-regions at one etch depth can be defined as the exposure reference plane, and other etch depths can be equivalent to steps of the focal plane. In this way, by etching sub-regions of different depths in a preset area of ​​the wafer, an equivalent defocusing amount is prepared, replacing the traditional FEM method of simulating focal plane offset by moving the Z-axis of a stepper machine, thus avoiding positioning errors caused by the aging of the Z-axis of old machines.

[0049] Step 102: Using the focal plane corresponding to the sub-region of the target etching depth as the exposure reference plane, different wafers in the second test wafer set are exposed based on multiple exposure doses to obtain the third test wafer set. In the second test wafer set, one wafer corresponds to one exposure dose, and the target etching depth is one of multiple etching depths.

[0050] In this step, a focal plane corresponding to one of multiple etching depths (e.g., 0nm, 100nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, 800nm) can be selected as the exposure reference plane. The projection focal plane of the lithography machine is fixed on the exposure reference plane, eliminating the need for adjustment of the machine's Z-axis throughout the process and avoiding positioning errors caused by the aging of the Z-axis in older machines. Furthermore, different exposure doses (e.g., gradients from 90mJ to 170mJ) are set for different wafers in the second test wafer set, with one exposure dose corresponding to one wafer. For each wafer, after setting the exposure dose, the projection focal plane of the lithography machine is fixed on the exposure reference plane for exposure processing. This allows for the generation of photoresist exposure patterns at different etching depths within the wafer under a single exposure dose condition, with each region exhibiting different defocus levels. Under different exposure dose conditions, the preset regions of each wafer undergo exposure processing to obtain the third test wafer set. By utilizing different etching depths in each sub-region to simulate different focal plane offsets, and configuring independent exposure doses for each wafer, the two types of process variables, defocusing amount and exposure dose, can be flexibly configured, effectively improving the accuracy of process parameter calibration results.

[0051] Step 103: Based on multiple etching depths, multiple exposure doses, and the development measurement results corresponding to the third test wafer set, determine the focus depth and exposure margin.

[0052] In this step, the exposed wafers, i.e., the wafers in the third test wafer set, undergo development processing to form photoresist test patterns. Subsequently, the critical dimension (CD) of the pattern in each sub-region of the wafer is measured to obtain the development measurement results corresponding to the third test wafer set, i.e., the measured CD data of all sub-regions of each wafer. The measured CD data covers various defocus amounts and various exposure doses. By using the wafer etching depth to equivalently simulate different defocus amounts, an independent exposure dose is configured for each wafer. Based on this, the characteristic curves of etching depth, exposure dose, and measurement results are fitted and the qualified intervals are determined, thereby determining the final focus depth and exposure margin, improving the accuracy of process parameters.

[0053] In this embodiment of the invention, by etching different depths in a preset area of ​​the wafer, and by etching multiple sub-regions of different depths within that preset area, an equivalent defocus amount is prepared. This replaces the traditional FEM method that relies on the Z-axis movement of a stepper machine to simulate focal plane shift, avoiding positioning errors caused by the aging of the Z-axis of older machines. Furthermore, by using a preset area of ​​the wafer instead of the entire wafer, the influence of interference factors such as uniformity of the photoresist coating, temperature difference across the hot plate, and flatness errors across the entire wafer surface is reduced. Then, using the focal plane corresponding to the sub-region at the target etching depth as the exposure reference plane, different wafers are exposed separately based on different exposure doses, achieving flexible configuration of the two major process variables: defocus amount and exposure dose. Finally, by combining the etching depth, exposure dose, and measurement results to determine the acceptable range, the final focus depth and exposure margin are determined, improving the accuracy of the process parameters.

[0054] In some embodiments, the preset region is the central region of the wafer.

[0055] In this embodiment, considering that the wafer edge region is prone to problems such as uneven photoresist coating thickness, differences in hot plate heating temperature distribution, and substrate flatness deviations, which can easily introduce additional process interference, the preset areas corresponding to etching, exposure, and measurement are set as the center region of the wafer. This reduces various disturbances caused by the wafer edge, ensures a uniform testing environment for each sub-region, and makes the development measurement results reflect only the influence of defocusing amount and exposure dose on the photolithographic pattern, thereby improving the accuracy of process parameter determination.

[0056] In some embodiments, the multiple etching depths are gradient etching depths, and the target etching depth is the etching depth located at the middle position among the gradient etching depths.

[0057] In this embodiment, the etching depth of each sub-region within a preset area of ​​each wafer can be set using a gradient progression method. This involves sequentially forming multiple measurable physical steps with fixed step sizes. For example, the etching depth can include 0nm, 100nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, and 800nm. This simulates continuous, multi-level focal plane offsets, comprehensively covering various defocusing conditions commonly encountered in photolithography. Simultaneously, the etching depth located at the middle position within the gradient progression is selected as the target etching depth; in this example, the target etching depth is 400nm. The focal plane corresponding to the sub-region of the target etching depth is defined as the exposure reference plane. Using this target etching depth as a reference, symmetrically distributed positive and negative defocusing intervals naturally form on both sides of the plane, resulting in a more balanced distribution of test data under different defocusing conditions. This facilitates accurate analysis of the changing trends of key dimensions with defocusing amount, further improving the accuracy of focusing depth and exposure margin determination.

[0058] In some embodiments, step 101, etching a preset area of ​​each wafer in the first test wafer set to a different depth to obtain a second test wafer set, includes:

[0059] The preset area of ​​the first wafer is divided into M grids of equal area. The first wafer is any wafer in the first test wafer set, and M is a positive integer.

[0060] N subregions are defined using M grids. Each subregion includes at least one grid, and different subregions include different grids. N is a positive integer less than or equal to M.

[0061] The N sub-regions are etched to different depths to obtain the second wafer. The second wafer includes N sub-regions with different etching depths, and each sub-region corresponds to one etching depth. The second test wafer set includes the second wafer.

[0062] In this embodiment, the original wafers in the first test wafer set can be 6-inch or 8-inch Si wafers. Taking any one wafer in the first test wafer set, i.e. the first wafer, as an example, the etching of a preset area of ​​the wafer at different depths is illustrated by way of example.

[0063] First, the preset area of ​​the first wafer is divided into M grids of equal area, such as... Figure 2 As shown, the preset area can be 16mm x 20mm, meaning the width is 16mm and the height is 20mm. Within this preset area, 5 x 8 cells can be divided, each corresponding to one etching area. Each cell can be 3.1mm x 2.1mm in size. In this case, M is 40.

[0064] Then, N sub-regions are determined from the M grids. Each sub-region corresponds to a specific etching depth, and each sub-region can include at least one grid. In other words, grids located within the same sub-region have the same etching depth. For example, Figure 2 Taking an etching depth of 200nm as an example, the preset region includes four grids, each with an etching depth of 200nm. This means that the sub-region corresponding to this etching depth includes four grids. The positions of these four grids with an etching depth of 200nm within the preset region can be randomly determined. The sum of the grids in each of the N sub-regions is M. The grids occupied by different sub-regions do not overlap or intersect, avoiding the situation where the same grid is assigned to multiple sub-regions, leading to inconsistent etching depths.

[0065] Within the same wafer, the preset area includes sub-regions with various etching depths. The number N of these sub-regions can be set according to the actual defocus level. For example, if the defocus levels include -400nm, -300nm, -200nm, -100nm, 0nm, 100nm, 200nm, 300nm, and 400nm, then N can be 9, and the corresponding etching depths can include 0nm, 100nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, and 800nm.

[0066] For example, different etching depths can be achieved by controlling the etching reaction time or concentration, so that each wafer after etching includes sub-regions with multiple etching depths within a preset area. Specifically, when the etching depth is 0 nm, no etching processing is required in the corresponding sub-region. When performing etching processing at a depth of 100 nm, such as... Figure 3 As shown, by controlling the etching reaction time or concentration to a first preset value, a 100nm etching process can be achieved on a sub-region consisting of five grids in the figure; then, resist removal and cleaning are performed. Similarly, for other sub-regions within the preset area of ​​the first wafer, a greater etching depth can be achieved by increasing the etching reaction time or concentration. Specifically, within the preset area of ​​the first wafer, the sub-regions corresponding to etching depths from 200nm to 800nm ​​are as follows: Figure 4 As shown. After sequentially etching a predetermined region of the first wafer to different depths, a second wafer is obtained. The predetermined region of the second wafer can include nine sub-regions with nine etching depths: 0nm, 100nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, and 800nm, as shown. Figure 5As shown, the sub-regions with etching depths of 0 nm include 4 grids, 100 nm and 200 nm include 4 grids, 300 nm and 400 nm include 4 grids, 500 nm and 600 nm include 4 grids, 700 nm and 800 nm include 5 grids. The grids in each sub-region with a different etching depth can be randomly distributed within a preset area, reducing the impact on residual independence and homogeneity of variance, thereby reducing unexpected noise during testing due to fixed positions.

[0067] In this process, different depths of etching are performed on N sub-regions to obtain a second wafer, as detailed below:

[0068] In some embodiments, etching is performed on N sub-regions at different depths to obtain a second wafer, including:

[0069] Obtain the position information of each grid in the first sub-region of the first wafer. The first sub-region is any sub-region among the N sub-regions of the first wafer.

[0070] Based on the position information of each grid in the first sub-region, the etching area corresponding to the first sub-region is determined. One etching area corresponds to one grid, and the area of ​​the etching area is smaller than the area of ​​the grid.

[0071] The etching process is carried out on the etching area corresponding to the first sub-region at a first depth until the etching processes corresponding to each sub-region of the first wafer at different depths are completed, and then the second wafer is obtained.

[0072] In this embodiment, the center of the first wafer can be taken as the origin of a two-dimensional Cartesian coordinate system, and the position information of each grid can be represented by the coordinates corresponding to the grid center. Then, the position information corresponding to each grid within a preset area in the first wafer is as follows: Figure 6 As shown. Taking any sub-region within the preset area of ​​the first wafer, i.e., the first sub-region, as an example. First, the position information of each grid in the first sub-region of the first wafer is obtained, so that the position of each grid in the first sub-region within the preset area can be located, and then the etching area corresponding to each grid can be determined.

[0073] The preset area can be 16mm x 20mm (width 16mm, height 20mm). This preset area can be divided into 5 x 8 cells, each corresponding to an etching zone. Each cell can be 3.1mm x 2.1mm, and each etching zone can be 3mm x 2mm. This ensures the etching zone area is smaller than the cell area, allowing the remaining area within each cell not designated as an etching zone to act as an isolation barrier. This effectively blocks the diffusion of etching gas and etching fluid, as well as interference from etching edge effects, reducing crosstalk between etching processes of adjacent cells and sub-regions, and enabling etching structures of different depths to be independent of each other.

[0074] For the etched area corresponding to the first sub-region, a preset first depth etching process is performed; similarly, different depths of etching are performed on the etched areas of all remaining sub-regions in sequence. When the etching operations of all sub-regions are completed, the second wafer is obtained.

[0075] In some embodiments, step 103, determining the focus depth and exposure margin based on multiple etching depths, multiple exposure doses, and the development measurement results corresponding to the third test wafer set, includes:

[0076] After developing the third test wafer set, the size of the photoresist pattern in each sub-region is measured to obtain the size data of the photoresist pattern in the sub-region corresponding to each wafer in the third test wafer set.

[0077] A mapping relationship is constructed based on the size data of the photoresist pattern in each sub-region, the etching depth of each sub-region, and the exposure dose of each sub-region.

[0078] Based on the mapping relationship, Borsson curves were fitted to obtain Borsson curves under different exposure doses, with the etching depth as the equivalent focus depth and the size data as the response value.

[0079] Determine the depth of focus and exposure margin from the Boson curve.

[0080] In this embodiment, the focal plane corresponding to the sub-region of the target etching depth in the first wafer is used as the exposure reference plane. The exposure layout is aligned, such as... Figure 7As shown, the preset area of ​​the first wafer is aligned with the layout for alignment exposure and then exposed to obtain a wafer under a certain exposure dose. Similarly, other wafers are aligned and exposed by setting different exposure doses to obtain the third test wafer set. Then, the third test wafer set is developed so that each sub-region of each wafer in the third test wafer set forms a complete photoresist test pattern. Subsequently, the size of the pattern in each sub-region is measured, and the size data of the photoresist pattern corresponding to all sub-regions is collected, i.e., the critical dimension CD data.

[0081] The measured CD data covers various defocus amounts and exposure doses. Different defocus amounts are simulated using wafer etching depth as an equivalent, and an independent exposure dose is configured for each wafer. Based on this, a complete mapping relationship is established between etching depth, exposure dose, and measurement results. Then, with etching depth as the horizontal axis (i.e., equivalent defocus amount) and pattern size data as the vertical axis (i.e., response value), discrete measurement points are fitted based on the mapping relationship to obtain multiple Bossung curves corresponding to different exposure doses. These Bossung curves are then fitted to obtain Bossung curves at different exposure doses, with etching depth as the equivalent focus depth and size data as the response value. The Bossung curve is a standard characteristic curve for lithography processes, which can intuitively show the change in pattern size with defocus amount. Through curve fitting, random errors caused by single measurements can be eliminated, transforming scattered measured data into a continuous and smooth process change trend, and reproducing the change characteristics of pattern size affected by defocus state under different exposure conditions.

[0082] Finally, the process parameters can be extracted from the Boson curve graph by combining the product's preset pattern size tolerance range. For example, for a single curve, the horizontal axis interval where the pattern size falls within the tolerance can be found; the width of this interval represents the depth of focus at the corresponding exposure dose. By combining curves corresponding to multiple exposure doses, all exposure dose intervals that allow the pattern size to meet the tolerance requirements can be counted; this interval range represents the exposure margin. The final determined depth of focus and exposure margin improve the accuracy of the process parameters.

[0083] This invention also provides a process parameter determination device, such as... Figure 8 As shown, it includes:

[0084] Etching module 81 is used to etch a preset area of ​​each wafer in the first test wafer set to different depths to obtain a second test wafer set. The preset area of ​​each wafer in the second test wafer set includes sub-regions with multiple etching depths.

[0085] The exposure module 82 is used to expose different wafers in the second test wafer set based on multiple exposure doses, using the focal plane corresponding to the sub-region of the target etching depth as the exposure reference plane, to obtain the third test wafer set. In the second test wafer set, one wafer corresponds to one exposure dose, and the target etching depth is one of multiple etching depths.

[0086] The determination module 83 is used to determine the focus depth and exposure margin based on multiple etching depths, multiple exposure doses, and the development measurement results corresponding to the third test wafer set.

[0087] In some embodiments, the etching module is specifically used for:

[0088] The preset area of ​​the first wafer is divided into M grids of equal area. The first wafer is any wafer in the first test wafer set, and M is a positive integer.

[0089] N subregions are defined using M grids. Each subregion includes at least one grid, and different subregions include different grids. N is a positive integer less than or equal to M.

[0090] The N sub-regions are etched to different depths to obtain the second wafer. The second wafer includes N sub-regions with different etching depths, and each sub-region corresponds to one etching depth. The second test wafer set includes the second wafer.

[0091] In some embodiments, etching is performed on N sub-regions at different depths to obtain a second wafer, including:

[0092] Obtain the position information of each grid in the first sub-region of the first wafer. The first sub-region is any sub-region among the N sub-regions of the first wafer.

[0093] Based on the position information of each grid in the first sub-region, the etching area corresponding to the first sub-region is determined. One etching area corresponds to one grid, and the area of ​​the etching area is smaller than the area of ​​the grid.

[0094] The etching process is carried out on the etching area corresponding to the first sub-region at a first depth until the etching processes corresponding to each sub-region of the first wafer at different depths are completed, and then the second wafer is obtained.

[0095] In some embodiments, the preset region is the central region of the wafer.

[0096] In some embodiments, the multiple etching depths are gradient etching depths, and the target etching depth is the etching depth located at the middle position among the gradient etching depths.

[0097] In some embodiments, the determining module is specifically used for:

[0098] After developing the third test wafer set, the size of the photoresist pattern in each sub-region is measured to obtain the size data of the photoresist pattern in the sub-region corresponding to each wafer in the third test wafer set.

[0099] A mapping relationship is constructed based on the size data of the photoresist pattern in each sub-region, the etching depth of each sub-region, and the exposure dose of each sub-region.

[0100] Based on the mapping relationship, Borsson curves were fitted to obtain Borsson curves under different exposure doses, with the etching depth as the equivalent focus depth and the size data as the response value.

[0101] Determine the depth of focus and exposure margin from the Boson curve.

[0102] The process parameter determination device is capable of implementing each process of the above-described method embodiments, with one-to-one correspondence of technical features and achieving the same technical effect. To avoid repetition, it will not be described in detail here.

[0103] Please refer to Figure 9 The present invention also provides an electronic device 90, including a processor 91, a memory 92, and a computer program stored in the memory 92 and executable on the processor 91. When the computer program is executed by the processor 91, it implements the various processes of the above-described process parameter determination method embodiment and can achieve the same technical effect. To avoid repetition, it will not be described again here.

[0104] This invention also provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements the various processes of the above-described process parameter determination method embodiments and achieves the same technical effect. To avoid repetition, it will not be described again here.

[0105] The term "computer-readable storage medium" includes both permanent and non-permanent, removable and non-removable media, which can store information using any method or technology. Information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic magnetic disk storage or other magnetic storage, or any other non-transferable medium that can be used to store information accessible to the computer-readable storage medium. As defined herein, computer-readable storage media does not include transient media, such as modulated data signals and carrier waves.

[0106] This invention also provides a computer program product, including computer instructions that, when executed by a processor, implement the above-described... Figure 1 The various processes of the method embodiments shown can achieve the same technical effect, and will not be described again here to avoid repetition.

[0107] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0108] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods of the various embodiments of the present invention.

[0109] In the various method embodiments of this disclosure, the sequence number of each step is not intended to limit the order of the steps. For those skilled in the art, any changes in the order of the steps are within the scope of protection of this disclosure without any creative effort.

[0110] It should be noted that the various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, since the embodiments are basically similar to the product embodiments, the descriptions are relatively simple, and the relevant parts can be referred to the descriptions of the product embodiments.

[0111] The above are preferred embodiments of this disclosure. It should be noted that, for those skilled in the art, several improvements and modifications can be made without departing from the principles of this disclosure, and these improvements and modifications should also be considered within the scope of protection of this disclosure.

Claims

1. A method of process parameter determination, characterized by, The method includes: Etching at different depths is performed on a preset area of ​​each wafer in the first test wafer set to obtain a second test wafer set. The preset area of ​​each wafer in the second test wafer set includes sub-regions with multiple etching depths. Using the focal plane corresponding to the sub-region of the target etching depth as the exposure reference plane, different wafers in the second test wafer set are exposed based on multiple exposure doses to obtain a third test wafer set. In the second test wafer set, one wafer corresponds to one exposure dose, and the target etching depth is one of the multiple etching depths. Based on the various etching depths, the various exposure doses, and the development measurement results corresponding to the third test wafer set, the focus depth and exposure margin are determined.

2. The method of claim 1, wherein, The process of etching a predetermined area at different depths on each wafer in the first test wafer set to obtain the second test wafer set includes: The preset area of ​​the first wafer is divided into M grids of equal area, where the first wafer is any one of the first test wafers, and M is a positive integer. The M grids define N sub-regions, each sub-region comprising at least one grid, and different sub-regions comprising different grids, where N is a positive integer less than or equal to M; The N sub-regions are etched to different depths to obtain a second wafer. The second wafer includes N sub-regions with different etching depths, and each sub-region corresponds to one etching depth. The second test wafer set includes the second wafer.

3. The method of claim 2, wherein, The step of etching the N sub-regions to different depths to obtain the second wafer includes: Obtain the position information of each grid in the first sub-region of the first wafer, wherein the first sub-region is any one of the N sub-regions of the first wafer; Based on the position information of each grid in the first sub-region, the etching area corresponding to the first sub-region is determined. One etching area corresponds to one grid, and the area of ​​the etching area is smaller than the area of ​​the grid. The etching region corresponding to the first sub-region is etched to a first depth until the etching regions corresponding to each sub-region of the first wafer are etched to different depths, and then the second wafer is obtained.

4. The method according to any one of claims 1 to 3, characterized in that, The preset area is the central area of ​​the wafer.

5. The method according to any one of claims 1 to 3, characterized in that, The multiple etching depths are gradient etching depths, and the target etching depth is the etching depth located at the middle position among the gradient etching depths.

6. The method according to any one of claims 1 to 3, characterized in that, The determination of focus depth and exposure margin based on the multiple etching depths, the multiple exposure doses, and the development measurement results corresponding to the third test wafer set includes: After developing the third test wafer set, the size of the photoresist pattern in each sub-region is measured to obtain the size data of the photoresist pattern in the sub-region corresponding to each wafer in the third test wafer set. A mapping relationship is constructed based on the size data of the photoresist pattern in each sub-region, the etching depth of each sub-region, and the exposure dose of each sub-region. Based on the mapping relationship, a Borson curve is fitted to obtain Borson curves with etching depth as the equivalent focus depth and size data as the response value under different exposure doses. Determine the depth of focus and exposure margin from the Boson curve.

7. A process parameter determining device, characterized in that, include: The etching module is used to etch a preset area of ​​each wafer in the first test wafer set to different depths to obtain a second test wafer set. The preset area of ​​each wafer in the second test wafer set includes sub-regions with multiple etching depths. The exposure module is used to expose different wafers in the second test wafer set based on multiple exposure doses, using the focal plane corresponding to the sub-region of the target etching depth as the exposure reference plane, to obtain a third test wafer set. In the second test wafer set, one wafer corresponds to one exposure dose, and the target etching depth is one of the multiple etching depths. The determination module is used to determine the focus depth and exposure margin based on the multiple etching depths, the multiple exposure doses, and the development measurement results corresponding to the third test wafer set.

8. An electronic device, comprising: include: A processor, a memory, and a program stored in the memory and executable on the processor, wherein the program, when executed by the processor, implements the steps of the method as described in any one of claims 1 to 5.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the method as described in any one of claims 1 to 5.

10. A computer program product, characterised in that, Includes computer instructions that, when executed by a processor, implement the steps of the method as described in any one of claims 1 to 5.

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