Chip voltage compensation method, device, system and chip

Abstract

This application provides a chip voltage compensation method, apparatus, system, and chip. The method includes: after debugging any chip, acquiring a reference voltage value corresponding to the target voltage domain of the chip; converting the reference voltage value into a reference voltage digital signal; monitoring the actual voltage value of the chip in each clock cycle within a preset time period; converting each actual voltage value into a corresponding actual voltage digital signal; calculating the voltage difference signal corresponding to each actual voltage digital signal based on the reference voltage digital signal; determining the average voltage difference corresponding to the chip based on each voltage difference signal; and controlling the power supply device to complete the chip voltage compensation based on the average voltage difference, thereby ensuring the stability of chip operation.

Description

Technical Field

[0001] This application relates to the field of chip voltage regulation technology, and in particular to a chip voltage compensation method, apparatus, system and chip. Background Technology

[0002] Chip voltage compensation is a key power management technology in integrated circuit design, designed to address the problem of unstable power supply voltage caused by factors such as process variations, temperature fluctuations, and power supply noise during actual chip operation. Therefore, understanding how to perform chip voltage compensation is of paramount importance.

[0003] In the existing technology, the traditional chip voltage compensation method uses a dynamic voltage frequency adjustment table to estimate the voltage margin to cover the worst case of power supply output voltage fluctuations and voltage drops on the chip, in order to complete the subsequent chip voltage compensation.

[0004] However, in the existing technology, the method of covering power supply output voltage fluctuations and voltage drops by reserving voltage margin relies on the fixed configuration of the regulator, which is difficult to dynamically adapt to the voltage requirements of the actual operating scenario of the chip, and thus cannot guarantee the stability of chip operation. Summary of the Invention

[0005] This application provides a chip voltage compensation method, apparatus, system, and chip to solve the problem that the method of covering power supply output voltage fluctuations and voltage drops by reserving voltage margin relies on the fixed configuration of the adjustment table, which is difficult to dynamically adapt to the voltage requirements of the actual operating scenario of the chip, and thus cannot guarantee the stability of chip operation.

[0006] In a first aspect, this application provides a chip voltage compensation method, including:

[0007] After debugging any chip, the reference voltage value corresponding to the target voltage domain of the chip is collected.

[0008] Convert the reference voltage value into a reference voltage digital signal;

[0009] Monitor the actual voltage value of the chip in each clock cycle within a preset time period;

[0010] Convert each actual voltage value into a corresponding actual voltage digital signal;

[0011] Based on the reference voltage digital signal, calculate the voltage difference signal corresponding to each actual voltage digital signal;

[0012] The average voltage difference corresponding to the chip is determined based on each voltage difference signal;

[0013] Based on the average voltage difference, the power supply device is controlled to perform voltage compensation for the chip.

[0014] In one possible design, controlling the power supply device to perform voltage compensation for the chip based on the average voltage difference includes: outputting a first voltage compensation request signal and a second voltage compensation request signal corresponding to the average voltage difference; determining whether the first voltage compensation request signal is valid; if the first voltage compensation request signal is valid, determining whether the second voltage compensation request signal is valid; if the second voltage compensation request signal is valid, calculating a first cumulative voltage difference for the chip based on the average voltage difference and a preset initial voltage difference; and controlling the power supply device to perform voltage compensation for the chip based on the first cumulative voltage difference.

[0015] In one possible design, controlling the power supply device to perform voltage compensation for the chip based on the first accumulated voltage difference includes: determining whether the first accumulated voltage difference is positive or negative; if the first accumulated voltage difference is positive, determining whether the first accumulated voltage difference is greater than or equal to a preset positive threshold; if the first accumulated voltage difference is greater than or equal to the preset positive threshold, controlling the power supply device to perform voltage compensation for the chip based on the first accumulated voltage difference; if the first accumulated voltage difference is negative, determining whether the first accumulated voltage difference is less than or equal to a preset negative threshold; if the first accumulated voltage difference is less than or equal to the preset negative threshold, controlling the power supply device to perform voltage compensation for the chip based on the first accumulated voltage difference.

[0016] In one possible design, the step of controlling the power supply device to complete the voltage compensation of the chip based on the first accumulated voltage difference if it is determined that the first accumulated voltage difference is greater than or equal to the preset positive threshold includes: if it is determined that the first accumulated voltage difference is greater than or equal to the preset positive threshold, generating a voltage regulation request based on the first accumulated voltage difference; sending the voltage regulation request to the power supply device so that the power supply device performs DC compensation response on the chip according to the voltage regulation request and according to a preset voltage regulation process to complete the voltage compensation of the chip.

[0017] In one possible design, the method further includes: detecting the load state of the chip and determining the corresponding load type based on the load state; adjusting the preset positive threshold and the preset negative threshold according to the load type to update the preset positive threshold and the preset negative threshold.

[0018] In one possible design, the step of acquiring the reference voltage value corresponding to the target voltage domain of the chip after debugging of any chip includes: after debugging any chip according to frequency parameters or voltage parameters, calibrating the chip voltage using a digital voltage sensor on the chip; and after the chip voltage calibration is completed, acquiring the reference voltage value corresponding to the target voltage domain of the chip at the specified frequency parameters or voltage parameters.

[0019] In one possible design, the method further includes: determining the average voltage difference of the chip over multiple preset time periods according to a preset interval period; and calculating a second cumulative voltage difference of the chip based on the average voltage difference in the current preset time period and the average voltage difference in the previous preset time period.

[0020] Based on the second accumulated voltage difference, the power supply device is controlled to complete the voltage compensation of the chip.

[0021] Secondly, this application provides a chip voltage compensation device, comprising:

[0022] The acquisition module is used to acquire the reference voltage value corresponding to the target voltage domain of the chip after the debugging of any chip is completed;

[0023] The first conversion module is used to convert the reference voltage value into a reference voltage digital signal;

[0024] The monitoring module is used to monitor the actual voltage value of the chip in each clock cycle within a preset time period;

[0025] The second conversion module is used to convert each actual voltage value into a corresponding actual voltage digital signal;

[0026] The first calculation module is used to calculate the voltage difference signal corresponding to each actual voltage digital signal based on the reference voltage digital signal.

[0027] The first determining module is used to determine the average voltage difference corresponding to the chip based on each voltage difference signal;

[0028] The first control module is used to control the power supply device to complete the voltage compensation of the chip based on the average voltage difference.

[0029] Thirdly, this application provides a chip voltage compensation system, including: a chip, a power supply device, a chip package, and an external circuit board;

[0030] The chip is equipped with a control unit and a digital voltage sensor; the chip package is used to encapsulate and connect the chip.

[0031] The chip is communicatively connected to the power supply device;

[0032] The chip is connected to the external circuit board via the chip package.

[0033] The external circuit board is electrically connected to the power supply device.

[0034] Fourthly, this application provides a chip comprising: at least one processor and a memory;

[0035] The memory stores computer-executed instructions;

[0036] The at least one processor executes computer execution instructions stored in the memory, causing the at least one processor to perform the method described in the first aspect above and various possible designs of the first aspect.

[0037] The chip voltage compensation method, apparatus, system, and chip provided in this application, after the debugging of any chip is completed, acquires the reference voltage value corresponding to the target voltage domain of the chip; converts the reference voltage value into a reference voltage digital signal; monitors the actual voltage value of the chip in each clock cycle within a preset time period; converts each actual voltage value into a corresponding actual voltage digital signal; calculates the voltage difference signal corresponding to each actual voltage digital signal based on the reference voltage digital signal; determines the average voltage difference corresponding to the chip based on each voltage difference signal; and controls the power supply device to complete the chip voltage compensation based on the average voltage difference. By determining the average voltage difference corresponding to the chip based on the calculated reference voltage digital signal and the voltage difference signal of each actual voltage digital signal, the power supply device is controlled to complete the chip voltage compensation, realizing real-time voltage compensation of the chip in the operating scenario, thereby ensuring the stability of chip operation. Attached Figure Description

[0038] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0039] Figure 1 This is a schematic diagram illustrating an application scenario of the chip voltage compensation method provided in the embodiments of this application;

[0040] Figure 2 A flowchart illustrating the chip voltage compensation method provided in this application embodiment. Figure 1 ;

[0041] Figure 3 A flowchart illustrating the chip voltage compensation method provided in this application embodiment. Figure 2 ;

[0042] Figure 4 This is a schematic diagram of the chip voltage compensation device provided in the embodiments of this application;

[0043] Figure 5 This is a schematic diagram of the chip voltage compensation system provided in the embodiments of this application;

[0044] Figure 6 This is a schematic diagram of the hardware structure of the chip provided in an embodiment of this application. Detailed Implementation

[0045] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0046] Chip voltage compensation is a key power management technology in integrated circuit design, aiming to solve the problem of unstable power supply voltage caused by factors such as process deviations, temperature fluctuations, and power supply noise during actual chip operation. Therefore, how to perform chip voltage compensation is particularly important. In existing technologies, traditional chip voltage compensation methods estimate voltage margins in dynamic voltage frequency adjustment tables to cover the worst-case scenarios of power supply output voltage fluctuations and voltage drops on the chip, in preparation for subsequent chip voltage compensation. However, existing technologies, by reserving voltage margins to cover power supply output voltage fluctuations and voltage drops, rely on the fixed configuration of the adjustment table, making it difficult to dynamically adapt to the voltage requirements of the chip's actual operating scenarios, thus failing to guarantee the stability of chip operation.

[0047] To address the aforementioned technical problems, this application proposes the following technical concept: The inventors consider the acquired reference voltage digital signal of the chip and the actual voltage digital signal of the chip in each clock cycle within a preset time period; based on the reference voltage digital signal, the voltage difference signal corresponding to each actual voltage digital signal is calculated; the average voltage difference corresponding to the chip is determined using each voltage difference signal, so as to control the power supply device to complete the voltage compensation of the chip, thereby ensuring the stability of chip operation.

[0048] Figure 1 This is a schematic diagram illustrating an application scenario of the chip voltage compensation method provided in this application embodiment.

[0049] like Figure 1 As shown, the scenario includes: chip 101 and power supply device 102.

[0050] The chip 101 includes at least a control unit 1011 and a digital voltage sensor 1012.

[0051] The power supply device 102 can be a single device or a cluster of multiple devices.

[0052] After debugging any chip 101, the control unit 1011 acquires the reference voltage value corresponding to the target voltage domain of chip 101 through the digital voltage sensor 1012; converts the reference voltage value into a reference voltage digital signal through the digital voltage sensor 1012; monitors the actual voltage value of chip 101 in each clock cycle within a preset time period through the digital voltage sensor 1012; converts each actual voltage value into a corresponding actual voltage digital signal through the digital voltage sensor 1012; calculates the voltage difference signal corresponding to each actual voltage digital signal based on the reference voltage digital signal; determines the average voltage difference corresponding to chip 101 based on each voltage difference signal; and controls the power supply device 102 to complete the voltage compensation of the chip based on the average voltage difference. A detailed embodiment is described below.

[0053] Figure 2 A flowchart illustrating the chip voltage compensation method provided in this application embodiment. Figure 1 The execution entity in this embodiment can be Figure 1 The control unit in the illustrated embodiment is not specifically limited in this embodiment. Figure 2 As shown, the method includes:

[0054] S201: After debugging any chip, acquire the reference voltage value corresponding to the target voltage domain of the chip.

[0055] Specifically, step S201 includes steps a~b:

[0056] Step a: After any chip has been debugged according to the frequency or voltage parameters, the chip is calibrated using the digital voltage sensor on the chip.

[0057] In this embodiment, the chip is a SOC chip, a voltage stability sensitive chip such as a CPU, GPU, AI and CME, or a related module of a high-performance chip that is sensitive to voltage drop within the chip.

[0058] The voltage drop is referred to as IR-drop.

[0059] In this embodiment, the digital voltage sensor includes a pseudo-sensing unit and an analog-to-digital converter.

[0060] Among them, the digital voltage sensor is the DVS sensor, which stands for Digital Voltage Sensor.

[0061] Furthermore, if the chip is interpreted as a multi-core processor architecture, then each independent computing chip organized in the same cluster within the multi-core processor architecture needs to be equipped with a digital voltage sensor.

[0062] Step b: After the chip voltage calibration is completed, acquire the reference voltage value corresponding to the target voltage domain of the chip at the specified frequency or voltage parameters.

[0063] Specifically, after the chip voltage calibration is completed, the reference voltage value corresponding to the target voltage domain of the chip at the frequency parameter or voltage parameter is collected by the pseudo-sensing unit in the digital voltage sensor.

[0064] S202: Converts the reference voltage value into a reference voltage digital signal.

[0065] Specifically, the reference voltage value is converted into a reference voltage digital signal by an analog-to-digital converter in the digital voltage sensor.

[0066] S203: Monitors the actual voltage value of the chip in each clock cycle within a preset time period.

[0067] Specifically, the actual voltage value of the chip in each clock cycle within a preset time period is monitored through the pseudo-sensing unit in the digital voltage sensor.

[0068] The preset time period is T1, which can be any time period of 1 second, 10 seconds, or 1 minute, or other time periods, depending on the actual needs.

[0069] The clock cycle, or cycle, is a complete fluctuation cycle of the clock signal in a digital system. It is the smallest unit of time for the processor to execute operations, and its length is equal to the reciprocal of the clock frequency.

[0070] For example, a 3GHz CPU has a clock cycle of approximately 0.33 nanoseconds.

[0071] S204: Converts each actual voltage value into a corresponding actual voltage digital signal.

[0072] Specifically, the analog-to-digital converter in the digital voltage sensor converts each actual voltage value into a corresponding actual voltage digital signal.

[0073] S205: Calculate the voltage difference signal corresponding to each actual voltage digital signal based on the reference voltage digital signal.

[0074] S206: Determine the average voltage difference corresponding to the chip based on each voltage difference signal.

[0075] Specifically, the average voltage difference signal corresponding to the chip is determined based on each voltage difference signal, and the average voltage difference signal is converted into an average voltage difference.

[0076] The average voltage difference supports two modes: outputting a moving average value per clock cycle and outputting a configurable voltage over a specified time interval.

[0077] For example, the voltage difference corresponding to any voltage difference signal is DELTA_VOL, which can be used as a voltage compensation value for subsequent voltage compensation.

[0078] For example, the average voltage difference is ΔDELTA_VOL.

[0079] In addition, when calculating the average voltage difference, a digital filtering algorithm can be introduced to preprocess each voltage difference signal to suppress noise interference.

[0080] Among them, the digital filtering algorithm is either the Kalman filtering algorithm or the median filtering algorithm.

[0081] S207: Based on the average voltage difference, control the power supply device to complete the voltage compensation of the chip.

[0082] Specifically, step S207 includes steps a~e:

[0083] Step a: Output the corresponding first voltage compensation request signal and second voltage compensation request signal based on the average voltage difference.

[0084] In this embodiment, the first voltage compensation request signal is an enable signal, namely dvs_delta_en; the second voltage compensation request signal is dvs_delta_vol.

[0085] When dvs_delta_en=0, the first voltage compensation request signal is invalid, indicating that dvs_delta_vol is invalid, and DC compensation does not respond.

[0086] DC compensation is suitable for high-performance chips.

[0087] When dvs_delta_en=1, the first voltage compensation request signal is valid.

[0088] When dvs_delta_vol=0, the second voltage compensation request signal is also invalid, and DC compensation does not respond.

[0089] When dvs_delta_vol≠0, the second voltage compensation request signal is valid, and DC compensation response is initiated.

[0090] Step b: Determine whether the first voltage compensation request signal is valid.

[0091] Step c: If the first voltage compensation request signal is determined to be valid, then determine whether the second voltage compensation request signal is valid.

[0092] For example, if it is determined that dvs_delta_en=1, then it is determined whether dvs_delta_vol≠0 is true.

[0093] Step d: If the second voltage compensation request signal is determined to be valid, the first cumulative voltage difference of the chip is calculated based on the average voltage difference and the preset initial voltage difference.

[0094] In this embodiment, the second voltage compensation request signal can be used to represent the average voltage difference over a preset time period.

[0095] For example, the average voltage difference ΔDELTA_VOL is set to dvs_delta_vol1, the preset initial voltage difference is set to dvs_delta_vol0, and the value of dvs_delta_vol0 is 0.

[0096] For example, if it is determined that dvs_delta_vol ≠ 0, then the formula for calculating the first cumulative voltage difference of the chip based on the average voltage difference and the preset initial voltage difference is as follows:

[0097] Δ1dvs_delta_vol=dvs_delta_vol1-dvs_delta_vol0

[0098] In the formula, Δ1dvs_delta_vol is the first cumulative voltage difference.

[0099] Step e: Based on the first accumulated voltage difference, control the power supply device to complete the voltage compensation of the chip.

[0100] Specifically, step e includes steps e1 to e5:

[0101] Step e1: Determine whether the first accumulated voltage difference is positive or negative.

[0102] Step e2: If the first accumulated voltage difference is determined to be positive, then determine whether the first accumulated voltage difference is greater than or equal to a preset positive threshold.

[0103] For example, if the first cumulative voltage difference is determined to be positive, then it is determined whether Δdvs_delta_vol ≥ a preset positive threshold is true.

[0104] Step e3: If the first accumulated voltage difference is determined to be greater than or equal to the preset positive threshold, then the power supply device is controlled to complete the voltage compensation of the chip according to the first accumulated voltage difference.

[0105] Specifically, step e3 includes steps e31 to e32:

[0106] Step e31: If the first accumulated voltage difference is determined to be greater than or equal to the preset positive threshold, a voltage regulation request is generated based on the first accumulated voltage difference.

[0107] For example, if Δdvs_delta_vol ≥ a preset positive threshold, a voltage regulation request is generated based on Δdvs_delta_vol.

[0108] Furthermore, if Δdvs_delta_vol < preset positive threshold, subsequent DC compensation will not respond.

[0109] Step e32: Send a voltage regulation request to the power supply device so that the power supply device responds to the chip with DC compensation according to the voltage regulation request and the preset voltage regulation process, so as to complete the voltage compensation of the chip.

[0110] In this embodiment, the power supply device can be a PMIC power supply device or other devices.

[0111] Among them, PMIC (Power Management IC) power devices, namely power management integrated circuit devices, are highly integrated chips used for power conversion, distribution and battery management.

[0112] In this embodiment, the preset voltage regulation process can be either a DVFS process or an ADI process.

[0113] Among them, the DVFS process, namely Dynamic Voltage and Frequency Scaling, is the core execution process of dynamic voltage and frequency adjustment, which achieves a balance between power consumption and performance through hardware and software collaboration.

[0114] The DVFS process is suitable for scenarios that require dynamic adjustment of voltage and frequency by updating the dynamic voltage and frequency adjustment table to adjust power supply parameters.

[0115] The ADI process, or Analog-to-Digital Interface, is used to transmit the voltage deviation output by the digital voltage sensor to the power management integrated circuit device to achieve dynamic voltage regulation.

[0116] The ADI process is suitable for scenarios that require rapid response to voltage fluctuations, and directly triggers the PMIC device to adjust the output voltage through the analog-to-digital interface.

[0117] Step e4: If the first accumulated voltage difference is determined to be negative, then determine whether the first accumulated voltage difference is less than or equal to the preset negative threshold.

[0118] For example, if the first cumulative voltage difference is determined to be negative, then it is determined whether Δdvs_delta_vol ≤ preset negative threshold is true.

[0119] Step e5: If the first accumulated voltage difference is determined to be less than or equal to the preset negative threshold, then the power supply device is controlled to complete the voltage compensation of the chip based on the first accumulated voltage difference.

[0120] Specifically, if the first accumulated voltage difference is determined to be less than or equal to a preset negative threshold, a voltage adjustment request is generated based on the first accumulated voltage difference; the voltage adjustment request is sent to the power supply device so that the power supply device responds to the chip with DC compensation according to the voltage adjustment request and the preset voltage adjustment process, so as to complete the voltage compensation of the chip.

[0121] For example, if Δdvs_delta_vol ≤ a preset negative threshold, a voltage regulation request is generated based on Δdvs_delta_vol.

[0122] Furthermore, if Δdvs_delta_vol > the preset negative threshold, subsequent DC compensation will not respond.

[0123] In addition, after step e5, steps e6-e7 are also included:

[0124] Step e6: Detect the load status of the chip and determine the corresponding load type based on the load status.

[0125] In this embodiment, the load type is high load, low load, or burst load.

[0126] Step e7: Adjust the preset positive threshold and preset negative threshold according to the load type to update the preset positive threshold and preset negative threshold.

[0127] For example, if the load type is high load, the preset positive threshold is reduced and the preset negative threshold is increased to update the preset positive threshold and the preset negative threshold in order to trigger compensation in advance.

[0128] In addition, by introducing preset positive and preset negative thresholds, it is possible to avoid initiating voltage regulation requests to power supply equipment when voltage fluctuations are small, thereby avoiding unnecessary voltage compensation.

[0129] For example, the voltage fluctuation is within ±3.125mV.

[0130] In summary, the chip voltage compensation method provided in this embodiment, after any chip is debugged, acquires the reference voltage value corresponding to the target voltage domain of the chip; converts the reference voltage value into a reference voltage digital signal; monitors the actual voltage value of the chip in each clock cycle within a preset time period; converts each actual voltage value into a corresponding actual voltage digital signal; calculates the voltage difference signal corresponding to each actual voltage digital signal based on the reference voltage digital signal; determines the average voltage difference corresponding to the chip based on each voltage difference signal; and controls the power supply device to complete the chip voltage compensation based on the average voltage difference. By determining the average voltage difference corresponding to the chip based on the calculated reference voltage digital signal and the voltage difference signal of each actual voltage digital signal, the power supply device is controlled to complete the chip voltage compensation, realizing real-time voltage compensation of the chip in the operating scenario, thereby ensuring the stability of chip operation.

[0131] Furthermore, the chip voltage compensation method provided in this embodiment outputs a first voltage compensation request signal and a second voltage compensation request signal based on the average voltage difference; determines whether the first voltage compensation request signal is valid; if the first voltage compensation request signal is valid, determines whether the second voltage compensation request signal is valid; if the second voltage compensation request signal is valid, calculates the first cumulative voltage difference of the chip based on the average voltage difference and a preset initial voltage difference; and controls the power supply device to complete the chip voltage compensation based on the first cumulative voltage difference. Through the cooperation of the first voltage compensation request signal and the second voltage compensation request signal, the operating stability and operating energy efficiency of the chip under complex load scenarios are significantly improved.

[0132] Furthermore, the chip voltage compensation method provided in this embodiment determines whether the first accumulated voltage difference is positive or negative. If the first accumulated voltage difference is positive, it determines whether the first accumulated voltage difference is greater than or equal to a preset positive threshold. If the first accumulated voltage difference is greater than or equal to the preset positive threshold, it controls the power supply device to complete the chip voltage compensation based on the first accumulated voltage difference. If the first accumulated voltage difference is negative, it determines whether the first accumulated voltage difference is less than or equal to a preset negative threshold. If the first accumulated voltage difference is less than or equal to the preset negative threshold, it controls the power supply device to complete the chip voltage compensation based on the first accumulated voltage difference. By using the preset positive or negative threshold, unnecessary voltage compensation caused by small voltage fluctuations can be avoided.

[0133] In addition, the chip voltage compensation method provided in this embodiment detects the load state of the chip and determines the corresponding load type based on the load state; according to the load type, it adjusts the preset positive threshold and preset negative threshold to update the preset positive threshold and preset negative threshold. Through dynamic threshold adjustment, it can more accurately match the voltage fluctuation tolerance under different load types.

[0134] Figure 3 A flowchart illustrating the chip voltage compensation method provided in this application embodiment. Figure 2 In the embodiments of this application, in Figure 2 Based on the provided embodiments, a detailed explanation of the specific implementation method for voltage compensation in subsequent chips is given. For example... Figure 3 As shown, the method includes:

[0135] S301: Determine the average voltage difference of the chip over multiple preset time periods according to a preset time interval.

[0136] In this embodiment, the preset interval time period is T2, and the value needs to be determined according to actual needs.

[0137] Specifically, at each preset time interval, the average voltage difference of the chip within a preset time period is determined, until the average voltage difference within multiple preset time periods is obtained.

[0138] In addition, step S301 can specifically be performed by calculating the average voltage difference within each preset time period according to steps S203 to S206.

[0139] S302: Calculate the second cumulative voltage difference of the chip based on the average voltage difference in the current preset time period and the average voltage difference in the previous preset time period.

[0140] In this embodiment, the formula for calculating the second cumulative voltage difference of the chip based on the average voltage difference within the current preset time period and the average voltage difference within the previous preset time period is as follows:

[0141] Δ2dvs_delta_vol=dvs_delta_vol (i) -dvs_delta_vol (i-1)

[0142] In the formula, Δ2dvs_delta_vol is the second cumulative voltage difference; dvs_delta_vol (i) For the i-th second voltage compensation request signal, dvs_delta_vol represents the average voltage difference within the i-th preset time period. (i-1) The (i-1)th second voltage compensation request signal represents the average voltage difference within the (i-1)th preset time period; i=1,2,…,n.

[0143] The second accumulated voltage difference is obtained by gradually accumulating from 0 based on the preset initial voltage difference. In each accumulation calculation of the second accumulated voltage difference, the power supply device is controlled to perform voltage compensation for the chip based on the corresponding calculation result.

[0144] Therefore, the second cumulative voltage difference between the average voltage difference in the current preset time period and the average voltage difference in the previous preset time period is the basis for further voltage compensation of the chip based on the previous voltage compensation.

[0145] S303: Based on the second accumulated voltage difference, control the power supply device to complete the voltage compensation of the chip.

[0146] Furthermore, the specific implementation of step S303 can be carried out according to... Figure 1 The relevant steps are implemented in the embodiments.

[0147] In summary, the chip voltage compensation method provided in this embodiment determines the average voltage difference of the chip over multiple preset time periods according to a preset interval period; calculates the second cumulative voltage difference of the chip based on the average voltage difference in the current preset time period and the average voltage difference in the previous preset time period; and controls the power supply device to complete the chip voltage compensation based on the second cumulative voltage difference, thereby improving the accuracy of chip voltage compensation.

[0148] It should be noted that this application uses a digital voltage sensor inside the chip to characterize a first voltage compensation request signal and a second voltage compensation request signal. These signals are then combined using certain logic and transmitted to a power supply device for voltage compensation of the chip, thereby achieving monitoring and compensation of voltage fluctuations within the chip. Simultaneously, this fills the technical gap in existing voltage compensation schemes regarding voltage monitoring and compensation from the voltage compensation point to the chip's interior.

[0149] Figure 4 This is a schematic diagram of the chip voltage compensation device provided in an embodiment of this application. Figure 4 As shown, the chip voltage compensation device includes: a data acquisition module 401, a first conversion module 402, a monitoring module 403, a second conversion module 404, a first calculation module 405, a first determination module 406, and a first control module 407.

[0150] The acquisition module 401 is used to acquire the reference voltage value corresponding to the target voltage domain of the chip after the debugging of any chip is completed;

[0151] The first conversion module 402 is used to convert the reference voltage value into a reference voltage digital signal;

[0152] Monitoring module 403 is used to monitor the actual voltage value of the chip in each clock cycle within a preset time period;

[0153] The second conversion module 404 is used to convert each actual voltage value into a corresponding actual voltage digital signal;

[0154] The first calculation module 405 is used to calculate the voltage difference signal corresponding to each actual voltage digital signal based on the reference voltage digital signal.

[0155] The first determining module 406 is used to determine the average voltage difference corresponding to the chip based on each voltage difference signal;

[0156] The first control module 407 is used to control the power supply device to complete the voltage compensation of the chip based on the average voltage difference.

[0157] In one possible implementation, the first control module 407 specifically includes:

[0158] The output unit is used to output a first voltage compensation request signal and a second voltage compensation request signal according to the average voltage difference.

[0159] The first judgment unit is used to determine whether the first voltage compensation request signal is valid;

[0160] The second judgment unit is used to determine whether the second voltage compensation request signal is valid if the first voltage compensation request signal is determined to be valid.

[0161] The calculation unit is used to calculate the first cumulative voltage difference of the chip based on the average voltage difference and the preset initial voltage difference if the second voltage compensation request signal is determined to be valid.

[0162] The control unit is used to control the power supply device to complete the voltage compensation of the chip based on the first accumulated voltage difference.

[0163] In one possible implementation, the control unit specifically includes:

[0164] The first judgment unit is used to determine whether the first accumulated voltage difference is positive or negative.

[0165] The second judgment unit is used to determine whether the first accumulated voltage difference is greater than or equal to a preset positive threshold if the first accumulated voltage difference is determined to be positive.

[0166] The first control unit is used to control the power supply device to complete the voltage compensation of the chip based on the first accumulated voltage difference if it is determined that the first accumulated voltage difference is greater than or equal to a preset positive threshold.

[0167] The third judgment unit is used to determine whether the first cumulative voltage difference is less than or equal to a preset negative threshold if the first cumulative voltage difference is determined to be negative.

[0168] The second control unit is used to control the power supply device to complete the voltage compensation of the chip based on the first accumulated voltage difference if it is determined that the first accumulated voltage difference is less than or equal to a preset negative threshold.

[0169] In one possible implementation, the first control unit specifically includes:

[0170] The generation unit is used to generate a voltage regulation request based on the first accumulated voltage difference if it is determined that the first accumulated voltage difference is greater than or equal to a preset positive threshold.

[0171] The sending unit is used to send a voltage regulation request to the power supply device, so that the power supply device can respond to the chip with DC compensation according to the voltage regulation request and according to the preset voltage regulation process, so as to complete the voltage compensation of the chip.

[0172] In one possible implementation, the device further includes:

[0173] The detection module is used to detect the load status of the chip and determine the corresponding load type based on the load status.

[0174] The adjustment module is used to adjust the preset positive threshold and preset negative threshold according to the load type, so as to update the preset positive threshold and preset negative threshold.

[0175] In one possible implementation, the acquisition module 401 specifically includes:

[0176] The calibration unit is used to calibrate the voltage of any chip after it has been debugged according to the frequency or voltage parameters, using a digital voltage sensor on the chip.

[0177] The acquisition unit is used to acquire the reference voltage value corresponding to the target voltage domain of the chip at the specified frequency or voltage parameters after the chip voltage calibration is completed.

[0178] In one possible implementation, the device further includes:

[0179] The second determining module is used to determine the average voltage difference of the chip in multiple preset time periods according to a preset interval time period.

[0180] The second calculation module is used to calculate the second cumulative voltage difference of the chip based on the average voltage difference in the current preset time period and the average voltage difference in the previous preset time period.

[0181] The second control module is used to control the power supply device to complete the voltage compensation of the chip based on the second accumulated voltage difference.

[0182] The apparatus provided in this embodiment can be used to execute the technical solutions of the above method embodiments. Its implementation principle and technical effects are similar, and will not be described again here.

[0183] Figure 5 This is a schematic diagram of the chip voltage compensation system provided in an embodiment of this application. Figure 5As shown, the chip voltage compensation system includes: chip 101, power supply device 102, chip package 103 and external circuit board 104.

[0184] The chip 101 is equipped with a control unit 1011 and a digital voltage sensor 1012; the chip package 103 is used to wrap and connect the chip 101.

[0185] Chip 101 is connected to power supply device 102.

[0186] Chip 101 is connected to the external circuit board 104 via chip package 103.

[0187] The external circuit board 104 is electrically connected to the power supply device 102.

[0188] Figure 6 This is a schematic diagram of the hardware structure of the chip provided in an embodiment of this application. Figure 6 As shown, the chip in this embodiment includes: a processor 601 and a memory 602; the memory stores computer-executable instructions; at least one processor executes the computer-executable instructions stored in the memory, causing at least one processor to execute the chip voltage compensation method described above.

[0189] Alternatively, the memory 602 can be either standalone or integrated with the processor 601.

[0190] When the memory 602 is set up independently, the chip also includes a bus 603 for connecting the memory 602 and the processor 601.

[0191] This application also provides a computer storage medium storing computer execution instructions. When the processor executes the computer execution instructions, the chip voltage compensation method described above is implemented.

[0192] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the chip voltage compensation method described above.

[0193] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative; for instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, devices, or modules, and may be electrical, mechanical, or other forms.

[0194] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to implement the solution of this embodiment according to actual needs.

[0195] Furthermore, the functional modules in the various embodiments of this application can be integrated into one processing unit, or each module can exist physically separately, or two or more modules can be integrated into one unit. The unit composed of the above modules can be implemented in hardware or in the form of hardware plus software functional units.

[0196] The integrated modules described above, implemented as software functional modules, can be stored in a computer-readable storage medium. These software functional modules, stored in a storage medium, include several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute some steps of the methods of the various embodiments of this application.

[0197] It should be understood that the aforementioned processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), etc. A general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in this invention can be directly manifested as execution by a hardware processor, or execution by a combination of hardware and software modules within the processor.

[0198] The memory may include high-speed RAM, and may also include non-volatile storage (NVM), such as at least one disk storage device, and may also be a USB flash drive, external hard drive, read-only memory, disk or optical disc, etc.

[0199] The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of illustration, the buses shown in the accompanying drawings are not limited to a single bus or a single type of bus.

[0200] The aforementioned storage media can be implemented from any type of volatile or non-volatile storage device or a combination thereof, such as Static Random-Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read-Only Memory (EPROM), Programmable Read-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. The storage media can be any available medium accessible to general-purpose or special-purpose computers.

[0201] An exemplary storage medium is coupled to a processor, enabling the processor to read information from and write information to the storage medium. Alternatively, the storage medium can be an integral part of the processor. Both the processor and the storage medium can reside in an Application Specific Integrated Circuit (ASIC). Alternatively, the processor and storage medium can exist as discrete components in an electronic device or host device.

[0202] Those skilled in the art will understand that all or part of the steps of the above-described method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When executed, the program performs the steps of the above-described method embodiments; and the aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disks, or optical disks.

[0203] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A method of chip voltage compensation, the method comprising: include: After debugging any chip, the reference voltage value corresponding to the target voltage domain of the chip is collected. Convert the reference voltage value into a reference voltage digital signal; Monitor the actual voltage value of the chip in each clock cycle within a preset time period; Convert each actual voltage value into a corresponding actual voltage digital signal; Based on the reference voltage digital signal, calculate the voltage difference signal corresponding to each actual voltage digital signal; The average voltage difference corresponding to the chip is determined based on each voltage difference signal; Based on the average voltage difference, the power supply device is controlled to perform voltage compensation for the chip.

2. The method according to claim 1, characterized in that, The step of controlling the power supply device to perform voltage compensation for the chip based on the average voltage difference includes: Based on the average voltage difference, output the corresponding first voltage compensation request signal and second voltage compensation request signal; Determine whether the first voltage compensation request signal is valid; If the first voltage compensation request signal is determined to be valid, then determine whether the second voltage compensation request signal is valid. If the second voltage compensation request signal is determined to be valid, the first cumulative voltage difference of the chip is calculated based on the average voltage difference and the preset initial voltage difference. Based on the first accumulated voltage difference, the power supply device is controlled to complete the voltage compensation of the chip.

3. The method of claim 2, wherein, The step of controlling the power supply device to perform voltage compensation for the chip based on the first accumulated voltage difference includes: Determine whether the first accumulated voltage difference is positive or negative; If the first accumulated voltage difference is determined to be positive, then determine whether the first accumulated voltage difference is greater than or equal to a preset positive threshold. If it is determined that the first accumulated voltage difference is greater than or equal to a preset positive threshold, then the power supply device is controlled to complete the voltage compensation of the chip based on the first accumulated voltage difference. If the first accumulated voltage difference is determined to be negative, then determine whether the first accumulated voltage difference is less than or equal to a preset negative threshold. If the first accumulated voltage difference is determined to be less than or equal to a preset negative threshold, then the power supply device is controlled to complete the voltage compensation of the chip based on the first accumulated voltage difference.

4. The method of claim 3, wherein, If the first accumulated voltage difference is determined to be greater than or equal to a preset positive threshold, then based on the first accumulated voltage difference, the power supply device is controlled to complete the voltage compensation of the chip, including: If it is determined that the first accumulated voltage difference is greater than or equal to a preset positive threshold, a voltage regulation request is generated based on the first accumulated voltage difference; The voltage regulation request is sent to the power supply device, so that the power supply device responds to the chip with DC compensation according to the voltage regulation request and according to the preset voltage regulation process, so as to complete the voltage compensation of the chip.

5. The method of claim 3, wherein, Also includes: The load status of the chip is detected, and the corresponding load type is determined based on the load status; Based on the load type, the preset positive threshold and the preset negative threshold are adjusted to update the preset positive threshold and the preset negative threshold.

6. The method of claim 1, wherein, After debugging any chip, the process of acquiring the reference voltage value corresponding to the target voltage domain of the chip includes: After any chip is debugged according to the frequency or voltage parameters, the chip is calibrated by the digital voltage sensor on the chip. After the chip voltage calibration is completed, the reference voltage value corresponding to the target voltage domain of the chip at the specified frequency parameter or voltage parameter is acquired.

7. The method according to any one of claims 1 to 6, characterized in that, Also includes: The average voltage difference of the chip within multiple preset time periods is determined according to a preset interval period. The second cumulative voltage difference of the chip is calculated based on the average voltage difference within the current preset time period and the average voltage difference within the previous preset time period; Based on the second accumulated voltage difference, the power supply device is controlled to complete the voltage compensation of the chip.

8. A chip voltage compensation device, characterized by, include: The acquisition module is used to acquire the reference voltage value corresponding to the target voltage domain of the chip after the debugging of any chip is completed; The first conversion module is used to convert the reference voltage value into a reference voltage digital signal; The monitoring module is used to monitor the actual voltage value of the chip in each clock cycle within a preset time period; The second conversion module is used to convert each actual voltage value into a corresponding actual voltage digital signal; The first calculation module is used to calculate the voltage difference signal corresponding to each actual voltage digital signal based on the reference voltage digital signal. The first determining module is used to determine the average voltage difference corresponding to the chip based on each voltage difference signal; The first control module is used to control the power supply device to complete the voltage compensation of the chip based on the average voltage difference.

9. A chip voltage compensation system, characterized by, include: Chips, power supply equipment, chip packaging and external circuit boards; The chip is equipped with a control unit and a digital voltage sensor; the chip package is used to encapsulate and connect the chip. The chip is communicatively connected to the power supply device; The chip is connected to the external circuit board via the chip package. The external circuit board is electrically connected to the power supply device.

10. A chip, characterized by include: At least one processor and memory; The memory stores computer-executed instructions; The at least one processor executes computer execution instructions stored in the memory, causing the at least one processor to perform the method as described in any one of claims 1 to 7.

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