A mirror burning method, device, equipment, medium and program product

Abstract

This application discloses a method, apparatus, device, medium, and program product for image burning, relating to the field of computer technology. It establishes a first mapping relationship between a first address window of an endpoint device and the data address space of a non-volatile storage medium, and a second mapping relationship between a second address window and the register address space of a storage controller. This enables high-speed transfer and burning of image data through access to the storage controller and non-volatile storage medium via a high-speed interconnect bus. By sending control commands to the storage controller through the second address window, the on-chip system switches to the boot and running environment in the target storage area before performing image burning, reducing the impact on the currently running system and decreasing the dependence of network burning methods on network services and additional hardware interfaces. This solves the technical problems of low image burning efficiency, strong hardware dependence, and high resource consumption, achieving the technical effects of improving image burning efficiency, reducing resource overhead, and enhancing burning stability.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a method, apparatus, device, medium, and program product for burning computer images. Background Technology

[0002] In embedded system image burning solutions in related technologies, offline programmers require powering off and physically removing the device to be burned, and then using a dedicated programmer to complete the burning process. This is cumbersome and cannot adapt to frequent firmware iterations. Serial port burning is limited by its physical layer speed; burning an image of tens of megabytes can take more than an hour, resulting in extremely low efficiency. While network burning is faster, it heavily relies on the onboard network PHY chip and upper-layer FTP / TFTP protocol stacks, increasing both hardware costs and software deployment complexity. Therefore, these technologies suffer from low image burning efficiency, strong hardware dependence, and high system resource consumption. Summary of the Invention

[0003] This application provides a method, apparatus, device, medium, and program product for image burning, which at least solves the technical problems of low image burning efficiency, strong hardware dependence, and large resource consumption in related technologies, and achieves the technical effects of improving image burning efficiency, reducing resource consumption, and improving burning stability.

[0004] This application provides a method for image burning, applied to a system-on-a-chip (SoC), the SoC including an endpoint device based on a high-speed serial computer expansion bus, a memory controller, and a non-volatile storage medium connected to the SoC, comprising: A first mapping relationship is established between the first address window of the endpoint device and the data address space of the non-volatile storage medium, and a second mapping relationship is established between the second address window of the endpoint device and the register address space of the storage controller; Based on the second mapping relationship, a control command is sent to the storage controller through the second address window to control the on-chip system to switch to the target storage area for startup; After the on-chip system starts the boot environment in the target storage area, the image data is written to the non-volatile storage medium through the first address window based on the first mapping relationship.

[0005] This application also provides a mirror burning apparatus for use in a system-on-a-chip (SoC), the SoC including an endpoint device based on a high-speed serial computer expansion bus, a memory controller, and a non-volatile storage medium connected to the SoC, characterized in that it includes: The mapping relationship establishment module is used to establish a first mapping relationship between the first address window of the endpoint device and the data address space of the non-volatile storage medium, and to establish a second mapping relationship between the second address window of the endpoint device and the register address space of the storage controller; The command sending module is used to send control commands to the storage controller through the second address window based on the second mapping relationship, so as to control the on-chip system to switch to the target storage area for startup; The data storage module is used to write the image data into the non-volatile storage medium based on the first mapping relationship and through the first address window after the on-chip system starts the boot running environment in the target storage area.

[0006] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for executing the computer program to implement the steps of any of the above-described image burning methods.

[0007] This application also provides a computer-readable storage medium storing a computer program, wherein when the computer program is executed by a processor, it implements the steps of any of the above-described image burning methods.

[0008] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described image burning methods.

[0009] This application establishes a first mapping relationship between the first address window of the endpoint device and the data address space of the non-volatile storage medium, and a second mapping relationship between the second address window and the register address space of the storage controller. This enables high-speed transfer and burning of image data by accessing the storage controller and non-volatile storage medium via a high-speed interconnect bus. By sending control commands to the storage controller through the second address window, the on-chip system switches to the boot and running environment in the target storage area before performing image burning. This reduces the impact on the currently running system, decreases the dependence of network burning on network services and additional hardware interfaces, and solves the technical problems of low image burning efficiency, strong hardware dependence, and high resource consumption. It achieves the technical effects of improving image burning efficiency, reducing resource overhead, and enhancing burning stability. Attached Figure Description

[0010] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0011] Figure 1 A schematic diagram illustrating a method for image burning provided in an embodiment of this application; Figure 2 This is a schematic diagram of a mirror burning device provided in an embodiment of this application; Figure 3 A flowchart for invoking firmware flashing is provided as an embodiment of this application; Figure 4 A schematic diagram of the base address register mapping provided in an embodiment of this application; Figure 5 A flowchart illustrating the overall programming process provided in this application embodiment. Detailed Implementation

[0012] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0013] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0014] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0015] The specific application environment architecture or specific hardware architecture on which the image burning method depends is described here.

[0016] like Figure 2The image burning method of this application is applied to a hardware architecture consisting of a test host and a remote on-chip system. The test host and the on-chip system establish a remote connection through network communication. The on-chip system integrates an endpoint device based on a high-speed serial computer expansion bus, a storage controller, and a status register, and is connected to a non-volatile storage medium. The endpoint device is configured with multiple address windows, at least two of which are used to map the data address space of the non-volatile storage medium and the register address space of the storage controller, respectively. This enables the test host to perform high-speed transfer of image data, storage area switching control, and image burning verification based on the high-speed serial computer expansion bus.

[0017] like Figure 1 This application provides an image burning method, and the method is described in detail below in conjunction with the execution flow of the image burning method. This image burning method is applied to a system-on-a-chip (SoC), which includes an endpoint device based on a high-speed serial computer expansion bus, a memory controller, and a non-volatile memory medium connected to the SoC, including: S11: Establish a first mapping relationship between the first address window of the endpoint device and the data address space of the non-volatile storage medium, and establish a second mapping relationship between the second address window of the endpoint device and the register address space of the storage controller; In this application, the endpoint device includes multiple address windows, each corresponding to a different access object. The first address window corresponds to the data address space of the non-volatile storage medium, and the second address window corresponds to the register address space of the storage controller. During the on-chip system initialization process, an address translation table is pre-configured to determine the mapping relationship between each address window and its corresponding target address. From the implementation perspective, when the test host subsequently accesses the first address window, the access request is translated to the data address space of the non-volatile storage medium; when accessing the second address window, the access request is translated to the register address space of the storage controller. Therefore, it is easy to understand that the test host can access different functional areas through the endpoint device without directly accessing the underlying physical memory or directly connecting to the storage control interface.

[0018] Furthermore, in this application, the first address window and the second address window correspond to data access and control access, respectively. Since the image burning process involves both the large-scale transmission of image data and control operations such as starting switching, resetting, and stopping the current service, processing all data access and control access through the same address space could easily lead to access conflicts or mixed control logic. This application uses different address windows corresponding to different address spaces, making the data transfer process and the control command process independent. Therefore, it can be understood that during image writing, the test host can continuously write image data through the first address window, while issuing commands to the storage controller through the second address window; the two operations do not interfere with each other.

[0019] Furthermore, the mapping relationship in this application is not a fixed, hard-coded physical connection, but rather a correspondence established during the on-chip system startup initialization phase through the configuration of the address translation table. Therefore, if subsequent adaptation to different non-volatile storage media, different register address regions, or different endpoint devices is required, only the mapping content in the address translation table needs to be adjusted; the overall data transmission process does not need to be modified. It can be seen that this application, through the correspondence between address windows and target address spaces, enables the test host to complete subsequent mirror control and data writing operations based on a high-speed serial computer expansion bus. Moreover, the mapping relationship established in this application is configured during on-chip system initialization; therefore, during subsequent operation, it is not necessary to repeatedly establish the address correspondence. The accessing party only needs to access the corresponding address window to indirectly access the address space corresponding to the non-volatile storage media or storage controller.

[0020] S12: Based on the second mapping relationship, send a control command to the memory controller through the second address window to control the on-chip system to switch to the target memory area for startup; Since the second address window has established a second mapping relationship with the register address space of the memory controller, accessing the second address window actually corresponds to accessing the registers in the memory controller. As seen in this application, control commands are not directly sent to the non-volatile storage medium, but rather the memory controller's register address space is accessed first through the second address window, and then the memory controller executes the corresponding control operation. It is easy to understand that the memory controller itself is responsible for managing memory access in the on-chip system; therefore, after writing control commands to the registers, the memory controller can perform a target memory area switching operation according to the corresponding command content.

[0021] Furthermore, the target storage area in this application is the storage area selected by the on-chip system during subsequent startup. Therefore, this step mainly involves controlling the register contents in the storage controller to change the storage area read by the on-chip system during subsequent startup. After the control command is sent, the storage controller adjusts the access relationship corresponding to the target storage area according to the command content, so that the on-chip system reads startup data from the target storage area during subsequent startup. Therefore, this step does not directly perform image writing, but first completes the switching control of the target storage area to provide a runtime environment for subsequent image burning.

[0022] Furthermore, this application uses a second mapping relationship to send control commands through a second address window. Therefore, the sending of control commands does not require a direct connection to an additional control line; instead, register access is completed through the address window corresponding to the endpoint device. The second address window corresponds to the register address space, thus it is more biased towards control access than data transfer access. By mapping control command access and mirrored data access to different address windows, control operations and data write operations can be distinguished, avoiding simultaneous control and data transmission during the same access process.

[0023] S13: After the on-chip system starts the boot running environment in the target storage area, the image data is written to the non-volatile storage medium through the first address window based on the first mapping relationship.

[0024] The system-on-chip (SoC) has already started the boot environment in the target storage area. Therefore, the SoC can now perform image write operations within the corresponding runtime environment. A first address window has established a first mapping relationship with the data address space of the non-volatile storage medium. Therefore, accessing the first address window actually corresponds to accessing the data address space of the non-volatile storage medium. It is easy to understand that after the mapping relationship is established, when image data is written to the first address window, the endpoint device can forward the image data to the corresponding data address space of the non-volatile storage medium according to the corresponding mapping relationship.

[0025] Furthermore, in this application, the mirrored data is written to the non-volatile storage medium through the first address window based on the first mapping relationship. Therefore, the transmission process of the mirrored data is a data transfer process based on a high-speed serial computer expansion bus. The mirrored data does not need to be transmitted byte by byte through the serial port, nor does it need to rely on network file transfer methods. Instead, data access is completed through the address window corresponding to the endpoint device. Therefore, it can be seen that the mirrored data can be directly written into the data address space corresponding to the non-volatile storage medium through the address mapping relationship.

[0026] Furthermore, in this application, the first address window corresponds to the data address space of the non-volatile storage medium. Therefore, this address window is mainly used for image data writing access, while the second address window is mainly used for control command access. By assigning different access objects to different address windows, image data writing operations and control command operations can be distinguished from each other. During the image data writing process, the endpoint device is mainly responsible for completing the address translation according to the first mapping relationship and writing the image data into the data address space corresponding to the non-volatile storage medium, thereby completing the image burning.

[0027] In summary, the image burning method provided in this application establishes a first mapping relationship between the first address window of the endpoint device and the data address space of the non-volatile storage medium, and a second mapping relationship between the second address window and the register address space of the storage controller. This enables high-speed transfer and burning of image data through access to the storage controller and non-volatile storage medium via a high-speed interconnect bus. By sending control commands to the storage controller through the second address window, the on-chip system is switched to the boot and running environment in the target storage area before image burning is performed. This reduces the impact on the currently running system, decreases the dependence of network burning methods on network services and additional hardware interfaces, and solves the technical problems of low image burning efficiency, strong hardware dependence, and high resource consumption. It achieves the technical effects of improving image burning efficiency, reducing resource overhead, and enhancing burning stability.

[0028] In one exemplary embodiment, establishing a first mapping relationship between a first address window of the endpoint device and the data address space of the non-volatile storage medium, and establishing a second mapping relationship between a second address window of the endpoint device and the register address space of the storage controller, includes: During the system-on-chip startup initialization process, a first address translation table is configured to establish a first mapping relationship between the first address window and the data address space of the non-volatile storage medium; During the system-on-chip startup initialization process, a second address translation table is configured to establish a second mapping relationship between the second address window of the endpoint device and the register address space of the memory controller.

[0029] In this embodiment, the first address window and the second address window correspond to different access objects. Therefore, during the on-chip system startup initialization process, a corresponding address translation table is pre-configured to establish the correspondence between different address windows and different address spaces. The address translation table may, but is not limited to, record information such as the address window number, target address range, and access offset address. When an external access point accesses an address window in an endpoint device, the endpoint device can translate the access request to the corresponding target address space based on the correspondence in the address translation table. Therefore, it is easy to understand that the address translation table is essentially used to record the correspondence between address windows and target address spaces.

[0030] Furthermore, in this embodiment, the first address translation table is used to establish a first mapping relationship between the first address window and the data address space of the non-volatile storage medium. That is, when accessing the first address window, the endpoint device will locate the access request to the corresponding data address space of the non-volatile storage medium according to the address mapping relationship in the first address translation table. The first address translation table may, but is not limited to, be configured with the starting address, address offset range, and address length of the non-volatile storage medium. Therefore, in this embodiment, by configuring the first address translation table, the first address window can access the data area of ​​the non-volatile storage medium, rather than accessing other functional areas.

[0031] Furthermore, the second address translation table in this embodiment is used to establish a second mapping relationship between the second address window and the register address space of the storage controller. Unlike the first address window, which is biased towards data access, the second address window is biased towards register access. The second address translation table can be configured with information such as the register address range, control register offset address, and register access permissions corresponding to the storage controller. Therefore, when accessing the second address window, the endpoint device can forward the access request to the register address space corresponding to the storage controller based on the correspondence in the second address translation table. This embodiment, by configuring the first and second address translation tables separately, ensures that different address windows correspond to different access objects, avoiding the mixing of data access and control access in the same address space.

[0032] In one exemplary embodiment, the control commands include at least one of a command to stop the currently running service, a command to trigger a watchdog reset, and a command to select a target storage region to start.

[0033] In this embodiment, the control command is used to control the subsequent operating state and startup method of the on-chip system. Therefore, the control command may include, but is not limited to, at least one of the following: a command to stop the currently running service, a command to trigger a watchdog reset, and a command to select a target storage area for startup. The command to stop the currently running service is mainly used to stop the data processing service or storage access service currently being executed by the on-chip system. Upon receiving the command to stop the currently running service, the on-chip system may, but is not limited to, stop the currently running application, stop data read / write tasks, or suspend peripheral access operations. This is because if the on-chip system continues to execute the current service, data access to the currently running area may still occur during subsequent target storage area switching. Therefore, in this embodiment, the operation to stop the currently running service is executed first.

[0034] Furthermore, in this embodiment, the watchdog reset command is used to control the on-chip system to enter the restart process. It is possible, but not limited to, that upon receiving the watchdog reset command, the watchdog counter in the on-chip system can enter a timeout state and trigger a reset operation after reaching a preset condition. This embodiment uses a watchdog reset method instead of a direct power-off restart or manual reset because the watchdog reset is an existing reset control method within the on-chip system; therefore, no additional external reset control hardware is needed, nor is manual intervention required. It is easy to understand that after the watchdog reset, the on-chip system will re-execute the startup process.

[0035] Furthermore, the target storage area selection boot command in this embodiment is used to control which storage area the on-chip system will subsequently boot from. It is possible, but not limited to, that the on-chip system can have multiple bootable storage areas, and different storage areas can store different boot data or different versions of data content. After receiving the target storage area selection boot command, the on-chip system can modify the corresponding boot selection information so that the subsequent boot process reads boot data from the target storage area. Therefore, the multiple control commands in this embodiment are not isolated, but are executed in a certain order: first, the currently running service is stopped, then the watchdog timer is triggered to reset, and then the subsequent boot process is executed according to the target storage area.

[0036] In one exemplary embodiment, the execution order of the control commands is as follows: Execute the command to stop the currently running business and perform a power-off operation on the currently running main storage area; Execute the watchdog reset command to restart the on-chip system; Execute the boot command to select the target memory region, causing the on-chip system to boot from the target memory region.

[0037] In this embodiment, control commands are executed sequentially according to a preset order, rather than multiple commands being executed simultaneously. First, the command to stop the currently running service is executed, and a power-off operation is performed on the currently running main storage area. The currently running service may, but is not limited to, include data processing tasks, storage access tasks, or peripheral interaction tasks. After stopping the currently running service, the on-chip system performs a power-off operation on the currently running main storage area, preventing it from participating in the subsequent startup process. It is easy to understand that if the currently running main storage area remained operational, the on-chip system might continue to read startup data from it upon subsequent restarts. Therefore, in this embodiment, the service is stopped first, and a power-off process is performed.

[0038] Furthermore, after the power-off process is completed in the currently running main memory area, this embodiment executes a watchdog reset command to initiate the on-chip system's restart process. The watchdog reset can be triggered by a watchdog timeout or by writing a specific control value to the watchdog register, but is not limited to this. Compared to a direct hardware power-off restart, the watchdog reset in this embodiment is an existing reset method within the on-chip system; therefore, the on-chip system can re-execute the initialization operation according to the normal startup process. Since the power-off process was performed on the currently running main memory area in the previous stage, the on-chip system will not continue to read startup data from the currently running main memory area during the restart process.

[0039] Furthermore, during the on-chip system restart process, this embodiment executes a target memory region boot command, enabling the on-chip system to subsequently read boot data from the target memory region. This target memory region boot command can, but is not limited to, modify the boot identifier information in the boot selection register or modify the boot address mapping. When the on-chip system restarts, it reads the corresponding boot data from the target memory region based on the modified boot selection information. Therefore, in this embodiment, the command to stop the currently running service, the command to trigger the watchdog reset, and the command to select the target memory region boot are sequentially coordinated. By executing them in a preset order, the on-chip system completes the boot memory region switching process.

[0040] In one exemplary embodiment, the target storage area is a standby storage area that is distinct from the primary storage area; the primary storage area is the currently running storage area, and the standby storage area is the currently non-running storage area.

[0041] In this embodiment, the on-chip system can be configured with multiple bootable storage areas, where the target storage area is a spare storage area distinct from the main storage area. The main storage area is the storage area corresponding to the current runtime of the on-chip system; that is, the startup data read by the on-chip system during startup comes from the main storage area. The spare storage area is the storage area that is not currently running; in the current running state, the on-chip system will not read startup data from the spare storage area. It is possible, but not limited to, that the main storage area and the spare storage area can store different versions of image data, or startup data in different states, respectively.

[0042] Furthermore, in this embodiment, the target storage area is set as a backup storage area instead of the currently running primary storage area. This is because, during the current operation, the primary storage area may still be subject to data reading, program execution, or status access operations. If data is directly modified in the currently running primary storage area, the currently running program may continue to access the data being modified. Therefore, in this embodiment, a currently non-running backup storage area is selected as the target storage area, allowing subsequent related operations to be performed in the backup storage area. Since the backup storage area is not currently involved in operation, it will not conflict with the currently running data access process.

[0043] Furthermore, in this embodiment, the primary storage area and the backup storage area can be implemented using a dual-storage area approach, but are not limited to this. For example, two independent non-volatile storage areas can be set up, one as the currently running area and the other as the backup area; alternatively, different address partitions can be divided within the same non-volatile storage medium, serving as the primary storage area and the backup storage area respectively. When the on-chip system subsequently switches to startup, the target storage area, originally the backup storage area, can become the new running area, while the original primary storage area can become the non-running area. Therefore, it is easy to understand that the primary storage area and the backup storage area in this embodiment are not fixed but will switch as the startup state changes.

[0044] In one exemplary embodiment, the backup storage area stores the boot environment for the firmware, which is a real-time operating system. The memory usage and task scheduling overhead of the real-time operating system are both less than those of a non-real-time operating system.

[0045] In this embodiment, the backup storage area stores the boot environment for performing firmware burning. When the on-chip system switches to the backup storage area for booting, it enters the corresponding boot environment to perform subsequent burning-related operations. The boot environment can be, but is not limited to, a real-time operating system, such as Zephyr RTOS, FreeRTOS, RT-Thread, etc.; correspondingly, a non-real-time operating system can be, but is not limited to, a Linux system. Compared to a non-real-time operating system, a real-time operating system has a relatively smaller number of background tasks and consumes relatively less memory resources during operation. Therefore, in this embodiment, the boot environment for firmware burning is set to a real-time operating system.

[0046] Furthermore, the real-time operating system in this embodiment is primarily used to execute programming-related tasks. Therefore, its operation is relatively focused and does not require the simultaneous maintenance of a large number of applications, user processes, and background services like a non-real-time operating system. It is possible, but not limited to, that the real-time operating system only runs programming tasks, storage access tasks, and basic driver tasks. From this embodiment, since the number of tasks running in the real-time operating system is relatively small, the scheduling overhead during task scheduling is also relatively low. When the on-chip system performs programming operations, processing resources can be used more for data transfer and storage access processes.

[0047] Furthermore, in this embodiment, the boot environment for firmware burning is set in the backup storage area. Therefore, after the on-chip system switches to boot, it will directly enter the corresponding real-time operating system environment. Compared with performing burning operations under a non-real-time operating system, the real-time operating system in this embodiment has relatively simple content and loads relatively less data during startup. Therefore, it is easy to understand that the real-time operating system in this embodiment is more suitable for performing burning-related operations.

[0048] In one exemplary embodiment, writing mirrored data to a non-volatile storage medium through a first address window based on a first mapping relationship includes: Write the image data to be burned into the cache space corresponding to the first address window; By burning firmware running on the system-on-chip, the image data in the cache space is moved to a non-volatile storage medium.

[0049] In this embodiment, the first address window corresponds to a cache space. The image data to be programmed is first written to this cache space, rather than directly to the non-volatile storage medium. The cache space can be, but is not limited to, a data cache area reserved inside the endpoint device, or a shared cache area within the on-chip system. When the image data to be programmed is written to the first address window externally, the endpoint device will write the corresponding data to the cache space corresponding to the first address window according to the first mapping relationship. Therefore, it is easy to understand that the first address window in this embodiment is essentially used as the data entry area after the image data enters the on-chip system.

[0050] Furthermore, in this embodiment, the data writing to the non-volatile storage medium is not directly performed externally. Instead, the firmware running on the system-on-chip moves the mirrored data in the cache space to the non-volatile storage medium. This can be, but is not limited to, the firmware periodically reading data from the cache space, or performing a data transfer operation after detecting data to be written in the cache space. From this embodiment, it can be seen that the firmware is mainly responsible for writing the mirrored data in the cache space to the non-volatile storage medium according to the corresponding addresses. Therefore, the actual flashing process of the mirrored data is completed within the system-on-chip.

[0051] Furthermore, this embodiment employs a method of first writing to the cache space and then having the firmware perform data migration, thus distinguishing the image data receiving process from the image data programming process. It is possible, but not limited to, that the test host can continuously write image data to the first address window, while the firmware gradually writes the data in the cache space to the non-volatile storage medium according to a preset method. Compared to directly performing continuous writing to the non-volatile storage medium, the data migration process in this embodiment is uniformly controlled by the firmware; therefore, data writing operations can be performed according to the writing method corresponding to the non-volatile storage medium.

[0052] In one exemplary embodiment, the firmware is programmed to access the cache space by calling the driver interface of the endpoint device in the system-on-chip.

[0053] In this embodiment, the firmware does not directly access the physical address of the cache space, but rather accesses the cache space by calling the driver interface of the endpoint device in the system-on-a-chip. The driver interface can, but is not limited to, encapsulate functions for reading the cache space, obtaining data offsets, and detecting cache status. When the firmware needs to obtain the image data to be written, it can read the corresponding data content from the cache space by calling the corresponding driver interface. Therefore, the driver interface in this embodiment is essentially used to establish an access channel between the firmware and the cache space.

[0054] Furthermore, in this embodiment, the cache space corresponds to the data access area in the endpoint device. Therefore, when the firmware is flashed and accesses the cache space through the driver interface, the endpoint device can complete the cache data reading operation according to the corresponding data access rules. The driver interface can, but is not limited to, support reading data according to a fixed length or according to a preset offset address. The firmware flashing process does not need to directly handle the underlying address translation process; instead, it obtains the mirrored data in the cache space through the driver interface. Therefore, the cache space access process is mainly completed by the driver interface corresponding to the endpoint device.

[0055] Furthermore, in this embodiment, accessing the cache space through the driver interface allows for differentiation between the access methods of the flashing firmware and the underlying cache space. It is possible, but not limited to, that when the cache space size, cache access method, or data reading rules change, adaptation can be achieved by modifying the access logic in the driver interface, while the data migration process in the flashing firmware can remain unchanged. In this embodiment, the flashing firmware is primarily responsible for performing the image data migration operation, while the specific access process of the cache space is completed by the driver interface corresponding to the endpoint device.

[0056] In one exemplary embodiment, it further includes: Read the startup status information from the status register; The system-on-chip (SoC) is determined to have started successfully based on the startup status information, which is written to the status register after the SoC starts.

[0057] In this embodiment, after completing the boot process, the on-chip system writes boot status information to the status register. Subsequently, by reading the boot status information in the status register, it is determined whether the on-chip system has booted successfully. The boot status information can, but is not limited to, include boot completion, boot failure, or boot stage indicators. When the on-chip system completes the corresponding boot process, it writes the corresponding status value to a specified location in the status register. Therefore, the status register in this embodiment is mainly used to record the current boot status.

[0058] Furthermore, in this embodiment, by reading the startup status information in the status register, it can be determined whether the on-chip system has entered a normal operating state. Specifically, when a preset startup completion flag is read, it can be determined that the on-chip system has started successfully; when the corresponding status value is not read, or an abnormal status value is read, it can be determined that the current startup process has not yet completed or has failed. From this embodiment, it can be seen that the startup status information is actively written by the on-chip system during the startup process; therefore, the contents of the status register can reflect the current startup result.

[0059] Furthermore, this embodiment uses a status register to determine whether the on-chip system has started successfully, rather than relying on manual confirmation or external detection. It is possible, but not limited to, that the status value in the status register can be automatically updated after startup is complete, or it can be updated separately according to different stages during the startup process. It is easy to understand that the status register in this embodiment can not only indicate whether startup was successful, but also indicate the current startup stage.

[0060] In one exemplary embodiment, it further includes: Obtain the amount of mirrored data that has been written to non-volatile storage media; Get the total amount of data to be written; The burning progress is determined based on the amount of image data already written and the total amount of data to be written.

[0061] In this embodiment, during the image data writing process, the amount of image data already written to the non-volatile storage medium is counted in real time, and the total amount of data to be written is obtained. The current burning progress is determined based on the correspondence between the two. The total amount of data to be written can be obtained by reading the file size of the image file to be burned, or by parsing the data length information in the image file; correspondingly, the amount of image data already written can be counted based on the length of data that has been written. Therefore, the burning progress in this embodiment is not a fixed time estimate, but is calculated based on the actual data writing situation.

[0062] Furthermore, in this embodiment, the amount of image data already written will continuously change during the image writing process. It is possible, but not limited to, that the amount of data already written can be updated after each data block write operation is completed; alternatively, the cumulative amount of data written can be counted according to a preset time period. By continuously acquiring the amount of data already written and comparing it with the total amount of data to be written, the progress of the current image burning process can be obtained, and the burning progress can reflect the real-time status of the current image data writing.

[0063] Furthermore, in this embodiment, the burning progress is determined by comparing the amount of image data already written with the total amount of data to be written. Therefore, the burning progress changes dynamically as the data writing process progresses. Specifically, when the amount of image data already written gradually approaches the total amount of data to be written, it indicates that the current burning process is nearing completion; when both amounts are equal, it indicates that the image data has been completely written. This embodiment determines the burning progress by statistically analyzing the amount of data written in real time, allowing the current image burning status to be obtained in real time.

[0064] In one exemplary embodiment, determining the burning progress based on the amount of image data already written and the total amount of data to be written includes: Determine the ratio between the amount of image data already written and the total amount of data; The programming progress information is generated and displayed as a percentage based on the ratio value.

[0065] In this embodiment, the burning progress is determined by the ratio between the amount of image data already written and the total data volume. This can be, but is not limited to, the amount of image data already written can be obtained by counting the length of data that has been written so far, and the total data volume can be obtained by reading the total data length of the image file to be burned. After obtaining both data volumes, the amount of image data already written can be divided by the total data volume to obtain the ratio corresponding to the current burning process. Therefore, the burning progress in this embodiment is dynamically calculated based on the actual data writing situation, rather than estimated based on a fixed time.

[0066] Furthermore, in this embodiment, percentage-based burning progress information is generated and displayed based on a ratio value. For example, when the ratio value is 0.5, 50% burning progress information can be generated; when the ratio value is 1, it indicates that all image data has been written. As seen in this embodiment, the percentage format can more intuitively represent the current burning progress. Therefore, users can determine the current stage of image burning based on the displayed percentage information.

[0067] Furthermore, the burning progress information in this embodiment is dynamically updated as the amount of image data written changes. It can be, but is not limited to, updating the percentage information after each data block is written, or updating the current progress information periodically at preset time intervals. Therefore, it is easy to understand that the percentage-based burning progress information in this embodiment essentially reflects the proportion of the currently written data to the total amount of data to be written.

[0068] In one exemplary embodiment, after writing the mirrored data to the non-volatile storage medium through the first address window based on the first mapping relationship, the method further includes: Based on the burning progress information, determine whether all the image data has been written to the non-volatile storage medium; If so, then perform integrity verification on the mirrored data in the non-volatile storage medium.

[0069] In this embodiment, after the image data is written to the non-volatile storage medium, the burning progress information is used to determine whether the image data has been completely written. Specifically, when the percentage corresponding to the burning progress information reaches a preset value, it can be determined that the current image data has been completely written. For example, when the burning progress reaches 100%, it can be determined that the image data to be burned has been completely written to the non-volatile storage medium. The burning progress information itself reflects the correspondence between the amount of data currently written and the total amount of data. Therefore, the burning progress information can be used to determine whether the current image writing process has ended.

[0070] Furthermore, after confirming that all mirror data has been written to the non-volatile storage medium, an integrity check is performed on the mirror data in the non-volatile storage medium. This integrity check can be performed by reading the mirror data from the non-volatile storage medium, or by calculating a checksum on the written data. The integrity check is primarily used to determine whether the written mirror data contains missing data, data errors, or abnormal data changes. Therefore, it is easy to understand that the integrity check corresponds to the data inspection process after the mirror data writing is complete.

[0071] Furthermore, in this embodiment, integrity verification is performed after all the image data has been written, rather than during the data writing process. It is possible, but not limited to, that while the image data has not been fully written, the data content in the non-volatile storage medium is still in a state of continuous change; therefore, performing integrity verification at this time may not reflect the final writing result. In this embodiment, the integrity verification is performed only after determining that the image data has been fully written based on the burning progress information. Therefore, the data content corresponding to the integrity verification is the image data after the final writing is completed.

[0072] In one exemplary embodiment, performing integrity verification on mirrored data in a non-volatile storage medium includes: Determine the first checksum corresponding to the mirrored data in the non-volatile storage medium; Determine the second checksum corresponding to the image data to be written; Compare the first checksum and the second checksum; If the first and second check values ​​match, the programming is confirmed to be successful; otherwise, the programming is confirmed to have failed and a failure message is generated.

[0073] In this embodiment, when performing integrity verification on mirrored data in a non-volatile storage medium, the MD5 checksum method can be used, but is not limited to. Specifically, after the mirrored data is written, the mirrored data in the non-volatile storage medium can be read, and a corresponding first checksum can be calculated based on the mirrored data; correspondingly, for the mirrored data to be written, a corresponding second checksum can also be calculated based on the same checksum algorithm. The first and second checksums can be, but are not limited to, MD5 digest values ​​or other hash checksums. In this embodiment, both the first and second checksums originate from the data calculation results under the same checksum algorithm.

[0074] Furthermore, by comparing the first checksum and the second checksum, it is determined whether the mirrored data in the non-volatile storage medium is consistent with the mirrored data to be written. In this embodiment, if the mirrored data experiences data loss, errors, or changes during the writing process, the final first checksum and the second checksum will typically not be consistent. Therefore, it is easy to understand that by comparing the two checksums, it can be determined whether the written mirrored data remains intact. It is possible, but not limited to, that when the first checksum and the second checksum are consistent, it can be determined that the mirrored data in the non-volatile storage medium is consistent with the mirrored data to be written.

[0075] Furthermore, if the first and second checksums match, the programming is confirmed to be successful; if they do not match, the programming is confirmed to have failed and a failure message is generated. The failure message can, but is not limited to, an error code, a failure message character, or a status indicator. Performing integrity verification after the image data has been written allows for confirmation of the final programming result, rather than solely relying on the data writing completion status to determine programming success.

[0076] In one exemplary embodiment, before establishing a first mapping relationship between the first address window of the endpoint device and the address space of the non-volatile storage medium, and before establishing a second mapping relationship between the second address window of the endpoint device and the register address space of the storage controller, the method further includes: Obtain the network address information of the on-chip system; A remote communication connection is established with the system-on-a-chip based on network address information.

[0077] In this embodiment, before establishing the first and second mapping relationships, the network address information of the on-chip system is obtained, and a remote communication connection is established with the on-chip system based on the network address information. The network address information can be, but is not limited to, an IP address, port information, or corresponding network identifier information. Since the on-chip system and external devices do not rely on direct serial port connection for communication, this embodiment first determines the network access location corresponding to the current on-chip system through the network address information. In this way, the external device can subsequently interact remotely with the on-chip system based on the network address information.

[0078] Furthermore, the remote communication connection in this embodiment is mainly used to establish a data communication channel between the external device and the system-on-chip. This remote communication connection can be established based on Ethernet communication or other network communication methods, but is not limited to these methods. No additional serial cable or dedicated programming line is needed between the system-on-chip and the external device; instead, they are connected through existing network communication methods. Therefore, it is easy to understand that the network address information in this embodiment is mainly used to determine the network access object corresponding to the system-on-chip.

[0079] Furthermore, in this embodiment, subsequent related operations are performed after the remote communication connection is established. It is possible, but not limited to, that after the remote communication connection is successfully established, the external device can send subsequent control data or access requests to the on-chip system. The remote communication connection corresponds to the data interaction basis for subsequent operations; therefore, in this embodiment, network address information acquisition and remote communication connection establishment are completed first, followed by subsequent address mapping related operations.

[0080] In one exemplary embodiment, obtaining the network address information of the on-chip system includes: Send a preset communication data packet to the on-chip system; Receive network address information fed back by the on-chip system in response to a preset communication data packet.

[0081] In this embodiment, when obtaining the network address information of the system-on-a-chip (SoC), a preset communication data packet is first sent to the SoC. This preset communication data packet can be, but is not limited to, a broadcast data packet, a handshake request data packet, or a device discovery data packet. After the external device sends the preset communication data packet, the SoC, upon receiving the corresponding data packet, will identify the request content within the data packet and execute the corresponding response operation. Therefore, in this embodiment, the preset communication data packet is primarily used to proactively initiate the device discovery process, rather than requiring manual input of the SoC's network address information.

[0082] Furthermore, after receiving a preset communication data packet, the on-chip system will return the corresponding network address information. This network address information may, but is not limited to, include the IP address, port number, or device identification information corresponding to the current on-chip system. In this embodiment, the network address information returned by the on-chip system can be used to identify the current communication location of the on-chip system in the network. Therefore, external devices can subsequently establish a communication connection with the on-chip system based on this network address information. It is easy to understand that the network address information in this embodiment is data content actively returned by the on-chip system.

[0083] Furthermore, this embodiment uses a method of sending preset communication data packets and receiving feedback information to obtain network address information. Therefore, it is not necessary to pre-configure the network address of the on-chip system, nor is it necessary to manually query the current network parameters of the on-chip system. It is possible, but not limited to, that when the network address of the on-chip system changes, the external device can still resend the preset communication data packets and re-obtain the corresponding network address information. Therefore, the network address acquisition method in this embodiment is suitable for device discovery processes in dynamic network environments.

[0084] The following is in conjunction with the attached figures (for reference). Figures 3 to 5The preferred embodiments of the present invention will be described in detail below. This embodiment takes an ARM-based System-on-a-Chip (SoC) as an example. The SoC integrates an endpoint device based on a high-speed serial computer expansion bus (PCIExpress, PCIe) and a memory controller, and externally connects an SPI NOR Flash chip as a non-volatile storage medium. A remote communication connection is established between the test host and the SoC via Ethernet, and high-speed data transmission is achieved through the PCIe bus.

[0085] During SoC power-on initialization, the system bootloader first configures the Address Translation Unit (ATU) inside the endpoint devices. Specifically, it configures the first ATU, mapping the first address window of the PCIe endpoint device, BAR0, to the data address space of the SPI NOR Flash chip. This mapping is linear, ensuring that any data written by the test host to BAR0 directly reaches the corresponding physical address of the Flash chip after transmission via the PCIe bus, without requiring the SoC's central processing unit to participate in data transfer. The second ATU is then configured, mapping the second address window of the PCIe endpoint device, BAR1, to the register address space of the memory controller. By writing different values ​​to BAR1, the test host can control the memory controller to perform various operations, such as selecting the Flash chip, sending reset timings, and switching boot partitions.

[0086] Before image flashing, the test host needs to establish a control channel with the remote SoC. The test host sends a preset communication data packet, such as a flashing packet, to the SoC's preset network port. Upon receiving this data packet, the management firmware running inside the SoC sends its currently assigned network address information, such as its IP address, back to the test host. The test host obtains the SoC's IP address based on the feedback information and establishes a remote communication connection with the SoC via Ethernet based on that IP address. This connection is only used to send control commands and not to transmit image data.

[0087] The test host sends a programming preparation command to the SoC via the aforementioned remote connection. Subsequently, the test host accesses the memory controller register space mapped by BAR1 via the PCIe bus and sequentially issues the following three control commands: The first command stops the currently running service. The test host writes a power-down control bit to a specific register of the memory controller, performing a power-down operation on the currently running main memory area, i.e., the Flash partition of the storage service system, stopping all running service processes. The second command triggers a watchdog reset. The test host writes a trigger value to the watchdog control register, starting the SoC's internal watchdog timer, causing the SoC to perform a hardware reset within a very short time. The third command selects a target memory area for boot. During the reset process, the test host writes a selection value to the memory controller's boot mode register via BAR1, causing the SoC to boot from the target memory area. In this embodiment, the target memory area is a spare memory area distinct from the main memory area, such as a different partition of the same Flash chip, or another independent Flash chip. This spare memory area contains a pre-programmed boot environment with firmware, a lightweight real-time operating system; in this embodiment, Zephyr RTOS is used. Compared to traditional non-real-time operating systems such as Linux, this real-time operating system has reduced memory usage, minimal task scheduling overhead, and interrupt latency in the microsecond range.

[0088] After SoC reset, ZephyrRTOS is loaded and started from the spare storage area according to the boot mode selection of the storage controller. Zephyr RTOS performs the following operations immediately after booting: Initializes the PCIe endpoint device driver, enabling BAR0 and BAR1 windows. Writes a boot success flag to a status register inside the SoC, for example, writes 0x5A5A5A5A. Waits for the test host to initiate a programming operation via PCIe. After sending the reset command, the test host periodically reads this status register via PCIe. When the boot success flag is read, it is determined that the on-chip system has successfully entered the programming-ready state.

[0089] After confirming that Zephyr RTOS was running, the test host began writing the image data. The test host opened the local image file to be programmed and obtained its size as the total amount of data to be written. The test host then wrote the image file data in blocks to the corresponding cache space of BAR0 via the PCIe bus using direct memory access. For each block of data written, the PCIe endpoint device automatically moved the data to the corresponding physical address of the SPI NOR Flash chip according to the first address translation table. Simultaneously, the programming firmware running on the SoC, specifically the programming tool in Zephyr RTOS, called the driver interface of the PCIe endpoint device to continuously monitor the arrival of data in the BAR0 cache space and further ensured that the data was written to the specified offset address in the Flash.

[0090] During the firmware programming process, the amount of data written to the Flash memory is tracked in real time. Specifically, the total data volume of the image file to be programmed is pre-acquired, for example, 64MB. After each data block is written, the written data volume count is updated. The ratio of the written data volume to the total data to be written is calculated and multiplied by 100% to obtain the programming progress percentage. This percentage is displayed in real time on the display terminal connected to the SoC, such as a serial console or a monitor, for example, programming progress: 45%. The test host can also read the progress variable in the SoC's memory via PCIe and display it synchronously on the host side.

[0091] When the amount of data written equals the total amount of data to be written, it is confirmed that all image data has been written to the non-volatile storage medium. Subsequently, the firmware programming automatically triggers an integrity check. The newly written image data is read from the SPI NOR Flash chip, and the first checksum is calculated using the MD5 hash algorithm. The original image file is read from the test host, and the second checksum is calculated using the MD5 hash algorithm. The first and second checksums are compared. If they match, the programming is confirmed successful, and the firmware returns a success status message to the test host. If they do not match, the programming is confirmed to have failed, and the firmware generates a failure message on the test host side, such as "Programming failed, MD5 checksum mismatch, please re-enter the programming command."

[0092] If any abnormality occurs during the burning process, such as a PCIe link disconnection, Flash write timeout, or verification failure, the test host will receive explicit error feedback and prompt the user to re-enter the burning command on its command-line interface or graphical interface. The user can then repeat the above steps according to the prompts until the burning is successful.

[0093] This embodiment reuses the existing PCIe bus interface of the SoC, eliminating the need for an additional network PHY chip or dedicated programmer, thus keeping hardware costs to a minimum. Leveraging the high bandwidth and low latency of the PCIe bus, programming a 64MB image takes only a few seconds. Thanks to the lightweight nature of Zephyr RTOS, system startup and programming task execution are extremely fast. The entire process supports remote network triggering, eliminating the need for physical contact with the board, thus improving the efficiency of production line programming and field upgrades.

[0094] This application also provides a mirroring and programming apparatus for a system-on-a-chip (SoC). The SoC includes an endpoint device based on a high-speed serial computer expansion bus, a memory controller, and a non-volatile storage medium connected to the SoC. In one exemplary embodiment, it includes: The mapping relationship establishment module is used to establish a first mapping relationship between the first address window of the endpoint device and the data address space of the non-volatile storage medium, and to establish a second mapping relationship between the second address window of the endpoint device and the register address space of the storage controller; The command sending module is used to send control commands to the storage controller through the second address window based on the second mapping relationship, so as to control the on-chip system to switch to the target storage area for startup; The data storage module is used to write the image data to the non-volatile storage medium based on the first mapping relationship and through the first address window after the boot runtime environment in the target storage area of ​​the on-chip system is started.

[0095] In one exemplary embodiment, the mapping relationship establishment module is specifically used for: During the system-on-chip startup initialization process, a first address translation table is configured to establish a first mapping relationship between the first address window and the data address space of the non-volatile storage medium; During the system-on-chip startup initialization process, a second address translation table is configured to establish a second mapping relationship between the second address window of the endpoint device and the register address space of the memory controller.

[0096] In one exemplary embodiment, the control commands include at least one of a command to stop the currently running service, a command to trigger a watchdog reset, and a command to select a target storage region to start.

[0097] In one exemplary embodiment, the execution order of the control commands is as follows: Execute the command to stop the currently running business and perform a power-off operation on the currently running main storage area; Execute the watchdog reset command to restart the on-chip system; Execute the boot command to select the target memory region, causing the on-chip system to boot from the target memory region.

[0098] In one exemplary embodiment, the target storage area is a standby storage area that is distinct from the primary storage area; the primary storage area is the currently running storage area, and the standby storage area is the currently non-running storage area.

[0099] In one exemplary embodiment, the backup storage area stores the boot environment for the firmware, which is a real-time operating system. The memory usage and task scheduling overhead of the real-time operating system are both less than those of a non-real-time operating system.

[0100] In one exemplary embodiment, the data storage module is specifically used to write the image data to be burned into the cache space corresponding to the first address window after the boot runtime environment in the target storage area of ​​the on-chip system is started; and to move the image data in the cache space to a non-volatile storage medium by burning firmware running on the on-chip system.

[0101] In one exemplary embodiment, the firmware is programmed to access the cache space by calling the driver interface of the endpoint device in the system-on-chip.

[0102] In one exemplary embodiment, the image programming device is further configured to read the startup status information in the status register; determine whether the on-chip system has started successfully based on the startup status information; the startup status information is written to the status register after the on-chip system starts.

[0103] In one exemplary embodiment, the image burning device further includes: The data volume acquisition module is used to acquire the amount of mirrored data already written to the non-volatile storage medium; and to acquire the total amount of data to be written. The progress determination module is used to determine the burning progress based on the amount of image data already written and the total amount of data to be written.

[0104] In one exemplary embodiment, the progress determination module is specifically used to: determine the ratio between the amount of image data written and the total amount of data; generate and display programming progress information in percentage form based on the ratio.

[0105] In one exemplary embodiment, the system further includes a verification module, configured to determine, based on the burning progress information, whether the image data has been fully written to the non-volatile storage medium after writing the image data to the non-volatile storage medium through the first address window according to the first mapping relationship; if so, to perform integrity verification on the image data in the non-volatile storage medium.

[0106] In one exemplary embodiment, the verification module is specifically used to determine a first verification value corresponding to the image data in the non-volatile storage medium; determine a second verification value corresponding to the image data to be written; compare the first verification value and the second verification value; if the first verification value and the second verification value are consistent, then the burning is confirmed to be successful; otherwise, the burning is confirmed to have failed and a failure prompt message is generated.

[0107] In one exemplary embodiment, the system further includes: a connection establishment module, configured to obtain network address information of the system-on-chip before establishing a first mapping relationship between a first address window of the endpoint device and the address space of the non-volatile storage medium, and establishing a second mapping relationship between a second address window of the endpoint device and the register address space of the storage controller; and establish a remote communication connection with the system-on-chip based on the network address information.

[0108] In one exemplary embodiment, the connection establishment module is specifically used to send a preset communication data packet to the system-on-a-chip; receive network address information fed back by the system-on-a-chip in response to the preset communication data packet; and establish a remote communication connection with the system-on-a-chip based on the network address information.

[0109] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0110] For a description of the features in the embodiment corresponding to the image burning device, please refer to the relevant description of the embodiment corresponding to the image burning method, which will not be repeated here.

[0111] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above-described image burning method embodiments.

[0112] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above-described image burning method embodiments when running.

[0113] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0114] The embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above-described image burning method embodiments.

[0115] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above-described image burning method embodiments.

[0116] Any of the components, modules, units, parts, methods, and operations described herein can be implemented using software, firmware, hardware (e.g., fixed logic circuitry), manual processing, or any combination thereof. Alternatively or additionally, any functionality described herein can be executed at least in part by one or more hardware logic components, such as, but not limited to, a central processing unit (CPU), a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), an application-specific standard product (ASSP), a system-on-a-chip (SoC), a complex programmable logic device (CPLD), a microprocessor (MCU), etc. The terms "system," "computing device," or "apparatus" as used herein encompass various means, devices, and machines for processing data, including, for example, one or more programmable processors, computers, SoCs, or combinations thereof. The apparatus may also include code that creates an execution environment for the computer program in question, such as code constituting processor firmware, a protocol stack, a database management system, an operating system, a cross-platform runtime environment, a virtual machine, or one or more combinations thereof. The aforementioned computer program (also known as a program, software, software application, app, script, or code) can be written in any form of programming language, including compiled or interpreted languages, declarative or procedural languages, and can be deployed in any form, including as a standalone program or as a module, component, subroutine, object, or other unit suitable for a computing environment.

[0117] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0118] The foregoing has provided a detailed description of the image burning method, apparatus, device, medium, and program product provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only intended to aid in understanding the method and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A mirror burning method, characterized by, Applied to a system-on-a-chip (SoC), the SoC includes an endpoint device based on a high-speed serial computer expansion bus, a memory controller, and a non-volatile memory medium connected to the SoC, comprising: A first mapping relationship is established between the first address window of the endpoint device and the data address space of the non-volatile storage medium, and a second mapping relationship is established between the second address window of the endpoint device and the register address space of the storage controller; Based on the second mapping relationship, a control command is sent to the storage controller through the second address window to control the on-chip system to switch to the target storage area for startup; After the on-chip system starts the boot environment in the target storage area, the image data is written to the non-volatile storage medium through the first address window based on the first mapping relationship.

2. The mirror burning method according to claim 1, wherein, Establishing a first mapping relationship between the first address window of the endpoint device and the data address space of the non-volatile storage medium, and establishing a second mapping relationship between the second address window of the endpoint device and the register address space of the storage controller, includes: During the system-on-chip startup initialization process, a first address translation table is configured to establish a first mapping relationship between the first address window and the data address space of the non-volatile storage medium; During the system-on-chip startup initialization process, a second address translation table is configured to establish a second mapping relationship between the second address window of the endpoint device and the register address space of the storage controller.

3. The mirror burning method according to claim 1, wherein The control commands include at least one of the following: a command to stop the currently running service, a command to trigger a watchdog reset, and a command to select a target storage area to start.

4. The mirror burning method according to claim 3, wherein The execution order of the control commands is as follows: Execute the command to stop the currently running service and perform a power-off operation on the currently running main storage area; Execute the watchdog reset command to restart the on-chip system; The system-on-chip is started from the target storage area by executing the boot command to select the target storage area.

5. The mirror burning method according to claim 4, wherein The target storage area is a standby storage area that is distinct from the main storage area; the main storage area is the currently running storage area, and the standby storage area is the currently non-running storage area.

6. The mirror burning method according to claim 5, wherein The backup storage area stores the boot and running environment of the firmware, which is a real-time operating system. The memory usage and task scheduling overhead of the real-time operating system are both less than those of a non-real-time operating system.

7. The mirror burning method according to claim 1, wherein Based on the first mapping relationship, writing the mirrored data into the non-volatile storage medium through the first address window includes: Write the image data to be burned into the cache space corresponding to the first address window; The image data in the cache space is moved to the non-volatile storage medium by burning firmware running on the system-on-chip.

8. The mirror burning method according to claim 7, wherein, The firmware is programmed to access the cache space by calling the driver interface of the endpoint device in the system-on-a-chip.

9. The mirror burning method according to claim 1, wherein, Also includes: Read the startup status information from the status register; Based on the startup status information, determine whether the on-chip system has started successfully; The startup status information is written to the status register after the on-chip system starts up.

10. The mirror burning method according to claim 1, wherein, Also includes: Obtain the amount of mirrored data already written to the non-volatile storage medium; Get the total amount of data to be written; The burning progress is determined based on the amount of image data already written and the total amount of data to be written.

11. The image burning method according to claim 10, characterized in that, The burning progress is determined based on the amount of image data already written and the total amount of data to be written, including: Determine the ratio between the amount of image data already written and the total amount of data; The programming progress information is generated and displayed as a percentage based on the ratio value.

12. The mirror burning method according to claim 11, wherein, Based on the first mapping relationship, after writing the mirrored data to the non-volatile storage medium through the first address window, the method further includes: Based on the burning progress information, determine whether the image data has been completely written to the non-volatile storage medium; If so, then the integrity of the mirrored data in the non-volatile storage medium is verified.

13. The mirror burning method according to claim 12, wherein, Integrity verification of the mirrored data in the non-volatile storage medium includes: Determine the first check value corresponding to the mirrored data in the non-volatile storage medium; Determine the second checksum corresponding to the image data to be written; Compare the first check value and the second check value; If the first verification value and the second verification value are consistent, the programming is confirmed to be successful; otherwise, the programming is confirmed to have failed and a failure message is generated.

14. The mirror burning method according to claim 1, wherein, Before establishing a first mapping relationship between the first address window of the endpoint device and the address space of the non-volatile storage medium, and before establishing a second mapping relationship between the second address window of the endpoint device and the register address space of the storage controller, the method further includes: Obtain the network address information of the on-chip system; A remote communication connection is established with the system-on-a-chip based on the network address information.

15. The mirror burning method according to claim 14, wherein, The acquisition of the network address information of the on-chip system includes: Send a preset communication data packet to the on-chip system; The system receives network address information fed back by the on-chip system in response to the preset communication data packet.

16. A mirror burning apparatus, characterized by comprising: Applied to a system-on-a-chip (SoC), the SoC includes an endpoint device based on a high-speed serial computer expansion bus, a memory controller, and a non-volatile memory medium connected to the SoC, characterized in that it includes: The mapping relationship establishment module is used to establish a first mapping relationship between the first address window of the endpoint device and the data address space of the non-volatile storage medium, and to establish a second mapping relationship between the second address window of the endpoint device and the register address space of the storage controller; The command sending module is used to send control commands to the storage controller through the second address window based on the second mapping relationship, so as to control the on-chip system to switch to the target storage area for startup; The data storage module is used to write the image data into the non-volatile storage medium based on the first mapping relationship and through the first address window after the on-chip system starts the boot running environment in the target storage area.

17. An electronic device, comprising: include: Memory, used to store computer programs; A processor, configured to implement the steps of the image burning method as described in any one of claims 1 to 15 when executing the computer program.

18. The electronic device according to claim 17, characterized in that, It also includes an on-chip system and a non-volatile storage medium, the on-chip system being connected to the electronic device; the on-chip system includes: An endpoint device based on a high-speed serial computer expansion bus is configured with at least a first address window and a second address window; A storage controller, connected to the endpoint device, is configured to control the system-on-chip in response to a control command sent by the second address window; A non-volatile storage medium, connected to the storage controller, is used to store mirror data written through the first address window under the control of the storage controller; The first address window has a first mapping relationship with the data address space of the non-volatile storage medium, and the second address window has a second mapping relationship with the register address space of the storage controller.

19. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein when the computer program is executed by a processor, it implements the steps of the image burning method as described in any one of claims 1 to 15.

20. A computer program product comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of the image burning method as described in any one of claims 1 to 15.

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