A bios parameter repair circuit

Abstract

This invention relates to the field of BIOS parameter repair technology and discloses a BIOS parameter repair circuit, including an embedded controller and a power button, a power-on circuit, a power indicator, and a reset circuit, all electrically connected to the embedded controller. The power button is connected to the GPIO pin of the embedded controller via the KB_PWRBTN_N signal line. The embedded controller drives the power-on circuit to power on the motherboard by outputting the V3P3A_EN signal. The embedded controller controls the power indicator to light up or flash via the EC_LED_PWR pin. When the computer cannot be powered on normally, simply press and hold the power button for more than 5 seconds. The power indicator will flash regularly, indicating that the repair function has been triggered. Then, release the power button. The EC pin will pull the V3P3_RTC_RST signal low for 500ms, which will restore all BIOS parameters to their default values. No disassembly is required, and ordinary users can complete the repair themselves, significantly reducing the pressure on after-sales customer service and logistics costs.

Description

Technical Field

[0001] This invention relates to the field of BIOS parameter repair technology, specifically a BIOS parameter repair circuit. Background Technology

[0002] BIOS parameter repair refers to the operation or mechanism that restores the configuration parameters (setting data stored in CMOS NVRAM) in the BIOS / UEFI to a usable state when they are corrupted, inconsistent, or misconfigured, causing the system to fail to boot normally.

[0003] In modern laptops, the BIOS offers increasingly more permissions, providing users with greater customization and feature settings to meet various needs. However, with the unlocking of more features, various problems have emerged where improper user settings can prevent the computer from booting.

[0004] Previous solutions for boot failures caused by improper BIOS settings involved physically removing the RTC battery from the laptop casing to restore the BIOS to default settings, a cumbersome process. Therefore, we need to propose a BIOS parameter repair circuit. Summary of the Invention

[0005] The purpose of this invention is to provide a BIOS parameter repair circuit. When the computer cannot boot normally, simply press and hold the power button for more than 5 seconds. The power light will flash regularly, indicating that the repair function has been triggered. Then, release the power button, and the EC will pull the V3P3_RTC_RST signal low for 500ms, which will restore all BIOS parameters to their default values. No disassembly is required, and ordinary users can complete the repair themselves, which greatly reduces the pressure on after-sales customer service and logistics costs, thus solving the problems mentioned in the background art.

[0006] To achieve the above objectives, the present invention provides the following technical solution: a BIOS parameter repair circuit, comprising an embedded controller and a power button, a power-on circuit, a power indicator, and a reset circuit, all electrically connected to the embedded controller. The power button is connected to the GPIO pin of the embedded controller via the KB_PWRBTN_N signal line. The embedded controller drives the power-on circuit to power on the motherboard by outputting the V3P3A_EN signal. The embedded controller controls the power indicator to light up or flash via the EC_LED_PWR pin.

[0007] The reset circuit includes an RC filter circuit and a MOS on / off control circuit, which are connected to the GPIO pins of the embedded controller via the V3P3_RTC_RST signal line.

[0008] Preferably, the power-on circuit includes MOSFET Q1 and MOSFET Q2. The gate of MOSFET Q1 and the drain of MOSFET Q2 are connected to diode D2. The output terminal of diode D2 is connected to capacitor C1 and diode D1 and resistor R1 connected in series. The gate of MOSFET Q2 is connected to resistor R2 and diode D3.

[0009] Preferably, the connection end between diode D1 and resistor R1 is provided with an interface KB-PWRBTN-C for connecting to an embedded controller, the other end of resistor R1 is connected to an indicator circuit, and the connection end between capacitor C1 and diode D1 is provided with an interface KB-PWRBTN-N for connecting to an embedded controller.

[0010] Preferably, the end of diode D3 away from resistor R2 is provided with an interface EC-PWR-LATCH for connecting to an embedded controller, and the end of resistor R2 away from diode D3 is grounded.

[0011] Preferably, resistors R3 and R4 are connected between the gate and drain of the MOS transistor Q1, and capacitor C2 and resistor R5 are connected in parallel between the source and drain of the MOS transistor Q1.

[0012] Preferably, the connection terminals of resistors R3 and R4 are provided with an interface +V3P3-RTC, the connection terminals of resistor R4 and MOSFET Q4 are both connected to the connection terminals of capacitor C2 and resistor R5, and the connection terminals of resistor R5 and capacitor C2 are provided with an interface V3P3A-EN for connecting to an embedded controller.

[0013] Preferably, the indicator circuit includes a resistor R6 and a diode D4 connected in series at the other end of the resistor R1, with one end of the diode D4 connected to the EC_LED_PWR pin of the embedded controller.

[0014] Preferably, the MOS on / off control circuit includes a MOS transistor Q11, the source of which is grounded, the gate of which is connected to an RC filter circuit, and the RC filter circuit is provided with an interface EC-V3PV-RTC-RST for connecting to an embedded controller.

[0015] Preferably, the RC filter circuit includes a capacitor C11 and a resistor R41 connected in series on the gate of the MOSFET Q11, and a resistor R31 is also connected to the gate of the MOSFET Q11.

[0016] Preferably, the reset circuit further includes a MOSFET Q21, a resistor R11 is connected between the drain of the MOSFET Q11 and the drain of the MOSFET Q21, and a resistor R21 is connected to the gate of the MOSFET Q21.

[0017] Compared with the prior art, the beneficial effects of the present invention are:

[0018] 1. When the device fails to power on normally, this invention allows users to simply press and hold the power button for more than 5 seconds until the power light flashes regularly, indicating that the repair function has been triggered. Then, by releasing the power button, the EC signal will pull the V3P3_RTC_RST signal low for 500ms, which will restore all BIOS parameters to their default values. No disassembly is required, and ordinary users can complete the repair themselves, greatly reducing the pressure on after-sales customer service and logistics costs. Attached Figure Description

[0019] Figure 1 This is a system block diagram of the present invention;

[0020] Figure 2 This is a circuit diagram of the power-on circuit of the present invention;

[0021] Figure 3 This is a circuit diagram of the reset circuit of the present invention. Detailed Implementation

[0022] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0023] Please see Figures 1-3 This invention provides a technical solution: a BIOS parameter repair circuit, including an embedded controller and a power button, a power-on circuit, a power indicator, and a reset circuit, all electrically connected to the embedded controller. The embedded controller is an EC chip, such as the IT8586E. The power button is connected to the GPIO pin of the embedded controller via the KB_PWRBTN_N signal line. The embedded controller drives the power-on circuit to power on the motherboard by outputting the V3P3A_EN signal. The embedded controller controls the power indicator to light up or flash via the EC_LED_PWR pin.

[0024] When the machine fails to power on, a normal user would force a shutdown and troubleshoot the problem by pressing the power button.

[0025] If, after a forced shutdown and subsequent power-on, the system still fails to boot due to BIOS parameter issues, press and hold the power button. The embedded controller (EC)'s power button GPIO will detect the trigger for 5 seconds and then send a command to the power LED to flash regularly, indicating that the repair function has been triggered. Release the power button at this point, and the EC will pull the V3P3_RTC_RST signal low for 500ms, thus restoring all BIOS parameters to their default values.

[0026] like Figure 2 As shown, the power-on circuit includes MOSFETs Q1 and Q2. The gate of MOSFET Q1 and the drain of MOSFET Q2 are connected to diode D2. The output terminal of diode D2 is connected to capacitor C1 and a series connection of diode D1 and resistor R1. The gate of MOSFET Q2 is connected to resistor R2 and diode D3. The connection terminal between diode D1 and resistor R1 is provided with an interface KB-PWRBTN-C for connection to an embedded controller. The other end of resistor R1 is connected to an indicator circuit. The connection terminal between capacitor C1 and diode D1 is provided with an interface KB-PWRBTN-N for connection to an embedded controller. Interface KB-PWRBTN-N transmits the original low-level pulse of the button. After voltage division and current limiting by resistor R1, interface KB-PWRBTN-C is sent to EC. EC compares the two signals to verify the validity of the button trigger, preventing single-line interference from falsely triggering the repair function.

[0027] The end of diode D3 away from resistor R2 is provided with an interface EC-PWR-LATCH for connecting to the embedded controller. The end of resistor R2 away from diode D3 is grounded. Diode D3 prevents the motherboard power supply voltage from flowing back to the EC pin, thus protecting the EC chip. Diodes D1, D2, and D3 are all Schottky diodes.

[0028] The power button pulls KB_PWRBTN_N low, and the low level pulls the gate of MOSFET Q1 low through diode D2, turning MOSFET Q1 off. At the same time, the low level generates the KB-PWRBTN-C signal through diode D1 and resistor R1 and is sent to the EC, which captures the power-on trigger interrupt. MOSFETs Q1 and Q2 form two independent pull-down control paths, and diode D2 isolates the two control signals to prevent crosstalk. Diode D3 and resistor R2 form a static pull-down of the gate of MOSFET Q2. When there is no trigger, MOSFET Q2 remains off to avoid standby leakage. Capacitor C1 is connected in parallel at the button signal input to filter out mechanical bounce of the power button and electromagnetic interference from the motherboard, and to prevent the EC from misinterpreting short / long press logic.

[0029] A resistor R3 and a resistor R4 are connected between the gate and drain of the MOS transistor Q1, and a capacitor C2 and a resistor R5 are connected in parallel between the source and drain of the MOS transistor Q1.

[0030] The connection terminals of resistors R3 and R4 are provided with an interface +V3P3-RTC. The connection terminals of resistor R4 and MOSFET Q4 are both connected to the connection terminals of capacitor C2 and resistor R5. The connection terminals of resistor R5 and capacitor C2 are provided with an interface V3P3A-EN for connecting to an embedded controller.

[0031] The indicator circuit includes a resistor R6 connected in series at the other end of resistor R1 and a diode D4. One end of diode D4 is connected to the EC_LED_PWR pin of the embedded controller. During normal power-on, EC_LED_PWR outputs a continuous high level, and the current is limited by resistor R6 to light up diode D4, keeping the power indicator constantly lit. Resistor R6 limits the current of the LED to prevent overcurrent from burning out the indicator light. Power is drawn from the branch of resistor R1, eliminating the need for a separate power supply line and simplifying the PCB layout.

[0032] The power button triggers and the EC latch controls the V3P3A_EN level, thereby turning the entire unit + V3P3A basic standby power supply on / off. Two N-channel MOSFETs (MOSFET Q1 and MOSFET Q2) are connected in parallel as a pull-down switch, and diode D2 isolates the two control signals or logic.

[0033] When the power button KB_PWRBTN_N is pulled low, the gate of MOSFET Q1 is pulled low via diode D2, causing MOSFET Q1 to turn off. Diode D1 sends a low level to the KB_PWRBTN_EC pin, and EC receives the power-on trigger signal. V3P3A_EN powers on the motherboard, and EC_LED_PWR detects the power-on signal, turning on the power LED.

[0034] like Figure 3 As shown, the reset circuit includes an RC filter circuit and a MOS on / off control circuit, which are connected to the GPIO pin of the embedded controller via the V3P3_RTC_RST signal line.

[0035] The MOS on / off control circuit includes a MOS transistor Q11, the source of which is grounded, and the gate of which is connected to an RC filter circuit. The RC filter circuit is provided with an interface EC-V3PV-RTC-RST for connecting to an embedded controller.

[0036] The RC filter circuit includes a capacitor C11 and a resistor R41 connected in series on the gate of the MOSFET Q11, and a resistor R31 is also connected to the gate of the MOSFET Q11.

[0037] The reset circuit also includes a MOSFET Q21. A resistor R11 is connected between the drain of the MOSFET Q11 and the drain of the MOSFET Q21, and a resistor R21 is connected to the gate of the MOSFET Q21.

[0038] The reset circuit is controlled via the EC_GPIO port. When V3P3_RTC_RST is low, MOSFET Q11 is turned on and short-circuited to ground, VRTC_SOC is powered off and reset. Capacitor C11 and resistor R41 form an RC delay signal. Resistor R1 is a 200-ohm protection resistor to prevent instantaneous discharge and damage to the device. +V3P3_LDO outputs +VRTC_3V3_SOC through the turned-on MOSFET Q21 and is continuously powered on. When V3P3_RTC_RST is low, MOSFET Q21 is turned off.

[0039] During operation, when the user presses the power button, the EC detects a low level in KB_PWRBTN_EC and outputs V3P3A_EN, powering on the power-on circuit and illuminating the power indicator. If the system fails to power on due to BIOS parameter errors, the user presses the power button again to force a shutdown. If the user presses the power button a third time and holds it down, the EC detects a low level in KB_PWRBTN_EC for more than 5 seconds, and the power indicator starts flashing regularly. Only when the user releases the button does the EC output a control signal, turning on MOSFET Q11 and pulling the V3P3_RTC_RST signal low for 500ms, clearing all CMOS parameters and restoring the BIOS to its default values.

[0040] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A BIOS parameter repair circuit, characterized by: The device includes an embedded controller and a power button, a power-on circuit, a power indicator, and a reset circuit, all electrically connected to the embedded controller. The power button is connected to the GPIO pin of the embedded controller via the KB_PWRBTN_N signal line. The embedded controller drives the power-on circuit to power on the motherboard by outputting the V3P3A_EN signal. The embedded controller controls the power indicator to light up or blink via the EC_LED_PWR pin. The power-on circuit includes MOSFET Q1 and MOSFET Q2. The gate of MOSFET Q1 and the drain of MOSFET Q2 are connected to diode D2. The output terminal of diode D2 is connected to capacitor C1 and diode D1 and resistor R1 connected in series. The gate of MOSFET Q2 is connected to resistor R2 and diode D3. The connection terminal between diode D1 and resistor R1 is provided with an interface KB-PWRBTN-C for connection with an embedded controller. The other end of resistor R1 is connected to an indicator circuit. The connection terminal between capacitor C1 and diode D1 is provided with an interface KB-PWRBTN-N for connection with an embedded controller. The reset circuit includes an RC filter circuit and a MOS on / off control circuit, which are connected to the GPIO pins of the embedded controller via the V3P3_RTC_RST signal line. The reset circuit also includes a MOSFET Q21. A resistor R11 is connected between the drain of the MOSFET Q11 and the drain of the MOSFET Q21. A ground resistor R21 is connected to the gate of the MOSFET Q21.

2. The BIOS parameter repair circuit according to claim 1, characterized in that: The end of diode D3 away from resistor R2 is provided with an interface EC-PWR-LATCH for connecting to an embedded controller, and the end of resistor R2 away from diode D3 is grounded.

3. The BIOS parameter repair circuit according to claim 2, characterized in that: A resistor R3 and a resistor R4 are connected between the gate and drain of the MOS transistor Q1, and a capacitor C2 and a resistor R5 are connected in parallel between the source and drain of the MOS transistor Q1.

4. The BIOS parameter repair circuit according to claim 3, characterized in that: The connection terminals of resistors R3 and R4 are provided with an interface +V3P3-RTC. The connection terminals of resistor R4 and MOSFET Q4 are both connected to the connection terminals of capacitor C2 and resistor R5. The connection terminals of resistor R5 and capacitor C2 are provided with an interface V3P3A-EN for connecting to an embedded controller.

5. A BIOS parameter repair circuit according to claim 3, characterized in that: The indicator circuit includes a resistor R6 and a diode D4 connected in series at the other end of the resistor R1, with one end of the diode D4 connected to the EC_LED_PWR pin of the embedded controller.

6. A BIOS parameter repair circuit according to claim 5, characterized in that: The MOS on / off control circuit includes a MOS transistor Q11, the source of which is grounded, and the gate of which is connected to an RC filter circuit. The RC filter circuit is provided with an interface EC-V3PV-RTC-RST for connecting to an embedded controller.

7. A BIOS parameter repair circuit according to claim 6, characterized in that: The RC filter circuit includes a capacitor C11 and a resistor R41 connected in series on the gate of the MOSFET Q11, and a resistor R31 is also connected to the gate of the MOSFET Q11.

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