A memory management method and electronic device

Abstract

The application discloses a memory management method and electronic equipment, relates to the technical field of big data, and comprises generating a first interface for user state management of available memory, so as to realize user state sharing of a multi-level page table through the first interface; a second interface is used for pre-registering a data transmission area for a plurality of access devices, and a first access key is generated. When the access device is called to perform data transceiving, the multi-level page table is accessed through the first interface, a virtual address carried in a data transceiving request is converted into a physical address according to the multi-level page table, and the physical address is transmitted to the access device, so that the access device performs a data transceiving operation on a memory area corresponding to the physical address according to a first access key matched by the access device and the physical address. The unified multi-level page table is shared by the plurality of access devices, and the memory overhead caused by a traditional mapping table is effectively reduced. The pre-registration is completed by means of the second interface, and the problem of high latency in registering a memory area during memory transmission is effectively solved.

Description

Technical Field

[0001] This application relates to the field of big data technology, and in particular to a memory management method and an electronic device. Background Technology

[0002] With the development of technologies such as the Internet, cloud computing, the Internet of Things, and mobile Internet, data is growing explosively, bringing new challenges to traditional data transmission networks. Remote Direct Memory Access (RDMA) uses kernel messaging to transfer data directly from the memory of one computer to another without the intervention of the operating systems of both computers, achieving low Central Processing Unit (CPU) overhead and high bandwidth. However, for the main application program, registering memory using RDMA also consumes memory. If the registered memory area is too large, there will be additional memory consumption; if the registered memory area is too small, for complex services such as centralized storage, a memory copying process will be required, increasing latency. Summary of the Invention

[0003] This application provides a memory management method and an electronic device to at least solve the problems of large memory area occupation and high latency in related technologies.

[0004] This application provides a memory management method, including paging the available memory of kernel-mode modules and constructing multi-level page tables; Generate a first interface for user-mode management of available memory, so as to realize user-mode sharing of multi-level page tables through the first interface; The second interface is used to pre-register the data transmission area for multiple access devices and generate a first access key; wherein, the data transmission area is the memory area corresponding to the minimum and maximum physical addresses of available memory; the second interface is an interface provided to the user space to implement the physical address registration function; When calling the access device to perform data transmission and reception, the multi-level page table is accessed through the first interface, and the virtual address carried by the data transmission and reception request is converted into a physical address according to the multi-level page table. The physical address is then transmitted to the access device so that the access device can perform data transmission and reception operations on the memory region corresponding to the physical address according to its matching first access key and physical address.

[0005] This application also provides a memory management device, including a construction unit, a generation unit, a pre-registration unit, an access unit, and a conversion unit; The building unit is used to compile page numbers for the available memory of kernel-mode modules and build multi-level page tables; The generation unit is used to generate the first interface for user-mode management of available memory, so as to realize user-mode sharing of multi-level page tables through the first interface; The pre-registration unit is used to pre-register the data transmission area for multiple access devices through the second interface and generate a first access key; wherein, the data transmission area is the memory area corresponding to the minimum and maximum physical addresses of available memory; the second interface is an interface provided to the user space to implement the physical address registration function; The access unit is used to access multi-level page tables through the first interface when the access device is invoked to perform data transmission and reception. The translation unit is used to convert the virtual address carried by the data transmission and reception request into a physical address according to the multi-level page table, and transmit the physical address to the access device so that the access device can perform data transmission and reception operations on the memory region corresponding to the physical address according to its matching first access key and the physical address.

[0006] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for implementing any of the above-described memory management methods when executing the computer program.

[0007] This application also provides a computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the steps of any of the above-described memory management methods.

[0008] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described memory management methods.

[0009] This application generates a first interface for managing available memory in user space, enabling user-space sharing of multi-level page tables. A second interface is used to pre-register data transmission regions for multiple access devices and generate a first access key. The data transmission region refers to the memory region corresponding to the minimum and maximum physical addresses of available memory. The second interface is an interface provided to user space to implement physical address registration. When an access device is invoked to perform data transmission and reception, the first interface accesses the multi-level page table, converting the virtual address carried in the data transmission and reception request into a physical address based on the multi-level page table. The physical address is then transmitted to the access device, allowing the access device to perform data transmission and reception operations on the memory region corresponding to the physical address based on its matching first access key and the physical address. In this technical solution, by setting up the first interface to achieve user-space available memory sharing, and relying on a unified multi-level page table shared by multiple access devices, there is no need to maintain a separate mapping table for virtual and physical addresses for each device, effectively reducing the memory overhead caused by traditional mapping tables and solving the problem of accumulated memory consumption during multi-device memory registration. Simultaneously, the second interface facilitates the pre-registration of the entire data transmission area and generates the first access key during the initialization phase, effectively resolving the high latency issue associated with registering the memory area during memory transmission. By limiting the minimum and maximum physical addresses of available memory, the number of entries in the mapping table of the access device is effectively limited, avoiding high latency caused by frequent refreshes of the network card's static random access memory due to frequent memory registration. During data transmission and reception, the first interface quickly queries multi-level page tables, converting the virtual address carried in the request into a physical address and sending it to the access device. Combined with the first access key, data reading and writing are completed, eliminating the runtime memory registration and data copying processes, reducing interaction time, and effectively improving the efficiency and stability of data transmission on the access device. This makes it well-suited for high-concurrency, fine-grained business access scenarios. Attached Figure Description

[0010] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0011] Figure 1 A flowchart illustrating a memory management method provided in an embodiment of this application; Figure 2 A schematic diagram of a multi-level page table provided for an embodiment of this application; Figure 3 This is a schematic diagram of the structure of a memory management device provided in an embodiment of this application; Figure 4This is a schematic diagram of a memory management system provided in an embodiment of this application. Detailed Implementation

[0012] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0013] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0014] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0015] With the development of technologies such as cloud computing, the Internet of Things, and mobile internet, data is growing explosively, bringing new challenges to traditional data transmission networks. Faced with high-performance computing, big data analytics, and surge-type input / output (I / O) high-concurrency, low-latency applications, the current hardware and software architecture based on Transmission Control Protocol / Internet Protocol (TCP / IP) and the high CPU consumption of these applications are simply insufficient to meet application demands.

[0016] RDMA utilizes a messaging-through-kernel approach, transferring data directly from one computer's memory to another without the intervention of either operating system, achieving low latency, low CPU overhead, and high bandwidth. To ensure compatibility with current Ethernet networks, RDMA has evolved into RDMA over Ethernet (ROCE), significantly advancing the technology. Due to RDMA's kernel bypass and direct memory access (DMA) characteristics, buffers for various RDMA operations must be registered using programming interfaces (verbs) to meet DMA usage requirements. Since the registration process is relatively time-consuming, pre-registering the memory regions to be used is a common practice.

[0017] For the main application program, registering memory using RDMA also consumes memory. Taking the MELLANOX network card test as an example, registering 100GB of memory on a single port consumes approximately 5GB of memory, mainly for recording Memory Protection Tables (MPT) and Memory Translation Tables (MTT). When multiple ports register the same 100GB area, the memory consumption accumulates. Registering an excessively large memory area results in additional memory consumption; if the registered memory area is too small, for complex services like centralized storage, it will require a memory copying process, increasing latency.

[0018] In addition to the above, when RDMA accesses a memory block, this memory must first be page-locked. Then, the mapping table from virtual address to logical address of this memory block needs to be sent to the RDMA device for subsequent access lookup. This process is called memory registration, and the registered memory block is called a memory region. Simultaneously, access permissions for this memory block need to be specified during registration. The RDMA device stores this access permission information in the MPT (Memory Transfer Table) for user request verification. The RDMA device reads and writes system memory through DMA. Since DMA can only access memory based on physical addresses, the RDMA device needs to maintain a mapping table from virtual memory to physical memory of the target memory region. This mapping table is stored in the RDMA device's MTT (Memory Transfer Table).

[0019] The MTT and MPT are stored in memory, but are cached in the RDMA device's Static Random Access Memory (SRAM). When the RDMA device receives a read / write request from a user, it first looks up the physical address corresponding to the requested target address and the access permissions for that address in the SRAM cache. If the cache hits, the operation is performed directly based on DMA. If the cache misses, a request must be sent via PCIe to search for the MTT and MPT in memory. This incurs considerable overhead, especially when your application requires a large number of fine-grained memory accesses. In such cases, the impact of a missed MTT / MPT in the RDMA device's SRAM can be fatal.

[0020] Therefore, this application provides a memory management method and electronic device. During OS driving, the platform management module obtains the total current platform memory and determines the memory size that the application's main program can request based on the allocation strategy contained in the configuration file. Based on the allocable memory size, memory is requested page by page, and the physical addresses of all pages are recorded. All requested memory is managed using a two-level page table, and user-mode memory requests are made from this memory region. During the initialization phase, the RDMA port pre-registers all memory pages (PA registration) to obtain PA_MR. When data transmission is required, the memory page table is searched based on the virtual address to resolve the physical address of the memory to be transmitted, and the physical address is sent to the corresponding RDMA request. The RDMA network card sends and receives data based on the physical address of the memory in the RDMA request. Relying on a unified multi-level page table shared by multiple access devices, there is no need to maintain a separate mapping table for virtual and physical addresses for each device, effectively reducing the memory overhead caused by traditional mapping tables and solving the problem of accumulated memory consumption during multi-device memory registration. By using the PA registration function, the registration of MR during transmission is avoided, transmission latency is reduced, and user space can use RDMA devices to transmit memory physical addresses, thereby reducing memory consumption.

[0021] The embodiments of this application provide a memory management method, and the method is described in detail below in conjunction with the execution flow of the memory management method.

[0022] Figure 1 A flowchart of a memory management method provided in this application embodiment includes: S101: Page numbering is performed on the available memory of kernel-mode modules to construct multi-level page tables.

[0023] The kernel-mode module refers to the platform memory management kernel module (PMMK), which runs in the operating system kernel space, has hardware access permissions, and is responsible for low-level memory allocation and page table construction.

[0024] Available memory refers to the memory range within the platform's total memory that is allocated to PMMK for unified management according to configuration rules.

[0025] Page numbering involves sorting all allocated 4K memory pages by their physical addresses in ascending order and assigning them consecutive numbers for quick memory page location.

[0026] In this embodiment, a two-level page table (a first-level page table and a second-level page table) can be used to replace the traditional independent MTT table in RDMA to achieve global address mapping.

[0027] During the driver loading phase, the memory management system uses a platform management module to uniformly plan and initialize the memory available for access devices. This platform management module can be a kernel-mode driver. The access device can be a device that implements data transmission and reception operations; in this application, we will use an RDMA device as an example for detailed explanation.

[0028] The implementation of paging the available memory of kernel-mode modules and constructing multi-level page tables can include determining the available memory of kernel-mode modules based on the total memory of the platform. The available memory is then divided into multiple memory pages according to a set unit memory, and these memory pages are paged according to their physical memory addresses to construct multi-level page tables.

[0029] First, the platform management module identifies the current platform's hardware configuration, primarily focusing on the CPU architecture and total memory. For example, the CPU architecture might be Non-Uniform Memory Access (NUMA). The platform management module or associated configuration files pre-define the correspondence between different memory levels and allocation strategies. Different memory levels correspond to different memory capacity ranges. Allocation strategies can include the memory request ratio for kernel modules or specific available memory capacity. For example, a 256GB platform can request 160GB, while a 128GB platform can request 70GB. The platform management module then matches the obtained total memory size (i.e., total memory) with the corresponding allocation strategy to determine the available memory for the kernel modules.

[0030] RDMA operations require physically contiguous or at least fixed memory pages (Page Lock), and registering large memory blocks consumes additional memory for storing MTT / MPT tables. Dynamically allocating memory directly from the operating system is not only inefficient but may also fail due to memory fragmentation. In this embodiment, by pre-planning and allocating a large, independent memory block, sufficient and contiguous memory resources are ensured for subsequent RDMA operations. Simultaneously, dynamically adjusting the memory allocation ratio based on the platform's total memory avoids insufficient memory allocation or excessive system memory consumption, achieving a balance and optimization of resource utilization.

[0031] After determining the available memory of the kernel-mode module, the available memory can be divided into multiple memory pages according to the set unit memory, and page numbers can be compiled for the multiple memory pages according to the physical memory address to build a multi-level page table.

[0032] A unit of memory can be the smallest unit of memory allocation and address management. In this embodiment, a unit of memory can be set to a 4KB standard memory page.

[0033] S102: Generate the first interface for user-mode management of available memory, so as to realize user-mode sharing of multi-level page tables through the first interface.

[0034] The system will generate the first interface for user-mode management of available memory, enabling the main application program to easily use the available memory managed in S101.

[0035] In the specific implementation, the minimum and maximum physical addresses of available memory can be recorded through a user-mode module; and the first interface for user-mode management of available memory can be provided.

[0036] User-space modules can be Platform Memory Manage User (PMMU) modules for platform memory management.

[0037] The first interface can be the user-mode memory management interface exposed by the PMMU, providing the function of querying page numbers and physical memory addresses based on virtual memory addresses.

[0038] PMMU acts as a bridge between user-mode programs and kernel-mode PMMK. Its functions include memory allocation, memory release, memory mapping (mmap), page fault allocation, metadata management, and address lookup services.

[0039] Metadata management refers to the PMMU recording key metadata for the entire available memory region, such as the minimum physical address (PA1) and maximum physical address (PA2) of that region. Simultaneously, the PMMU can also maintain a copy of the virtual address mapping of this memory region in the user process space for application use.

[0040] Address lookup service refers to the function of providing the ability to find the corresponding physical address and page number based on a virtual address.

[0041] The operating system isolates kernel mode and user mode, preventing application main programs from directly accessing kernel memory and page tables. Granting kernel-mode permissions would introduce system stability and security risks. This application uses the PMMU to generate a standardized first user-mode interface, preserving system permission isolation while allowing upper-layer applications to easily call multi-level page tables, reducing application development complexity. Simultaneously, the unified interface entry point allows centralized management of memory allocation, release, and access behavior, preventing memory leaks caused by multiple applications arbitrarily manipulating memory, thus ensuring stable system operation.

[0042] S103: Pre-register the data transmission area for multiple access devices through the second interface and generate the first access key.

[0043] The data transmission area is the memory region corresponding to the minimum and maximum physical addresses of available memory; the second interface is an interface provided to the user space to implement the physical address registration function.

[0044] The second interface is encapsulated by the RDMA core library (rdma_core) and made available for user-space calls. Its main function is to complete the registration of the physical address's Memory Region.

[0045] Pre-registration refers to completing the registration of the memory region in one go during the device initialization phase, which is different from the traditional solution of temporarily registering memory during business operation.

[0046] The first access key (PA_MR) is a unique credential generated after the access device registers its physical memory region. It serves as the permission identifier for the access device when performing data read and write operations. Each access device has its own independent PA_MR.

[0047] During the device initialization phase, the system will pre-register the entire available memory region managed in S101 and generate a corresponding access key for each access device.

[0048] In this embodiment of the application, the memory physical address registration function can be set based on the driver module, and a second interface for the memory physical address registration function can be provided through the user-mode software stack.

[0049] The pre-registration method for each access device is similar. Taking any one of the multiple access devices, i.e. the target access device, as an example, the second interface can be called to register the physical address mapping with the data transmission area and obtain the first access key of the target access device.

[0050] Taking the registration of addresses for data transmission areas by RDMA devices as an example, in specific implementations, the function of registering physical memory addresses (PAs) for memory mapping (MRs) can be implemented in the OFED kernel driver based on the principles of RDMA's MPT and MTT tables. Simultaneously, this function is exposed to user space as a second interface through user-space software stacks such as rdma_core.

[0051] During the initialization phase, the application's main program obtains the minimum and maximum physical addresses of the data transfer area through the PMMU module. Subsequently, for each RDMA device, the application's main program calls this second interface to submit the address range PA1 to PA2 to the kernel driver for registration. After registration, each RDMA device obtains its own first access key (PA_MR). This key is actually an internal identifier used by the RDMA device to identify this physical memory region; subsequent data transfer requests must carry this key.

[0052] Traditional RDMA solutions register memory on demand during operation, a time-consuming process that increases transmission latency. Furthermore, fragmented registration generates numerous scattered MPT and MTT entries, leading to frequent SRAM cache switching and refreshing in RDMA devices, severely impacting performance in high-concurrency scenarios. This application pre-registers the entire data region during device initialization, moving the time-consuming memory registration operation to this phase. During operation, repeated registration is unnecessary, effectively eliminating the latency caused by dynamic registration. Compared to the virtual address registration method of traditional solutions, this application directly registers physical addresses, eliminating address translation overhead and improving random access performance. Simultaneously, globally unified pre-registration generates only a limited number of MTT entries, allowing the RDMA device's SRAM to stably cache fixed entries for a long period, significantly improving cache hit rate and avoiding performance degradation caused by frequent cache refreshes.

[0053] S104: When calling the access device to perform data transmission and reception, the multi-level page table is accessed through the first interface, and the virtual address carried by the data transmission and reception request is converted into a physical address according to the multi-level page table. The physical address is then transmitted to the access device so that the access device can perform data transmission and reception operations on the memory region corresponding to the physical address according to its matching first access key and the physical address.

[0054] When the main application program actually needs to transmit data, it can use the previously constructed two-level page table and the registered key to achieve efficient data sending and receiving.

[0055] In the actual implementation, when the application's main program needs to transfer data, it generates a data transfer request. This request contains the virtual address (VA) pointing to the data buffer to be sent or received, as well as information such as the buffer size. This buffer memory is allocated through the aforementioned PMMU interface (first interface).

[0056] Address Translation: Upon receiving this transfer request, the RDMA device cannot directly use the virtual address for DMA operations. Instead, it invokes the first interface provided by the PMMU module. The PMMU module searches its maintained secondary page table based on the incoming virtual address to determine the matching physical address (PA) and then sends that physical address to the RDMA device.

[0057] Upon receiving this request, the RDMA device, having already cached the permission information related to PA_MR in its internal SRAM and with the request directly specifying the physical address, eliminates the need for complex address translation and permission lookup. The RDMA device can directly initiate a DMA operation, reading and writing data from system memory based on the physical address to complete the entire data transfer process.

[0058] In traditional RDMA operations, the RDMA device receives a request carrying a virtual address and must manually look up the MTT and MPT, resulting in significant latency overhead. This application accesses a multi-level page table through a first interface, thus pre-completing address translation and directly passing the translated physical address to the RDMA device. This reduces data transmission latency because the address translation step is calculated in advance along the data path. The RDMA device can directly perform DMA, making end-to-end transmission latency more deterministic and inefficient.

[0059] As can be seen from the above technical solution, a first interface for managing available user-mode memory is generated to achieve user-mode sharing of multi-level page tables. A second interface is used to pre-register data transmission areas for multiple access devices and generate a first access key. The data transmission area refers to the memory region corresponding to the minimum and maximum physical addresses of available memory. The second interface is an interface provided to user-mode to implement physical address registration. When an access device is invoked to perform data transmission and reception, the first interface accesses the multi-level page table, and the virtual address carried in the data transmission and reception request is converted to a physical address based on the multi-level page table. The physical address is then transmitted to the access device, allowing the access device to perform data transmission and reception operations on the memory region corresponding to the physical address based on its matching first access key and physical address. In this technical solution, by setting up the first interface to achieve user-mode shared available memory, and relying on a unified multi-level page table for multiple access devices to share, there is no need to maintain a separate mapping table for virtual and physical addresses for each device. This effectively reduces the memory overhead caused by traditional mapping tables and solves the problem of accumulated memory consumption during multi-device memory registration. Simultaneously, the second interface facilitates the pre-registration of the entire data transmission area and generates the first access key during the initialization phase, effectively resolving the high latency issue associated with registering the memory area during memory transmission. By limiting the minimum and maximum physical addresses of available memory, the number of entries in the mapping table of the access device is effectively limited, avoiding high latency caused by frequent refreshes of the network card's static random access memory due to frequent memory registration. During data transmission and reception, the first interface quickly queries multi-level page tables, converting the virtual address carried in the request into a physical address and sending it to the access device. Combined with the first access key, data reading and writing are completed, eliminating the runtime memory registration and data copying processes, reducing interaction time, and effectively improving the efficiency and stability of data transmission on the access device. This makes it well-suited for high-concurrency, fine-grained business access scenarios.

[0060] Regarding the construction of multi-level page tables, in this embodiment, memory pages can be requested in batches from available memory according to a set unit memory, and the physical addresses of multiple memory pages are recorded; the multiple memory pages are sorted by physical address and assigned consecutive page numbers; the multiple memory pages are divided into multiple second-level groups according to the number of pages in a single second-level page table; the physical address of each memory page in the multiple second-level groups is written into the corresponding entry of the second-level page table to obtain multiple second-level page tables; the starting physical address of the multiple second-level page tables is written into the corresponding entry of the first-level page table to obtain a first-level page table.

[0061] In its implementation, the PMMK module requests memory pages from the system according to a set unit of memory. Upon successful request, PMMK records the physical address of each memory page. The system then sorts these memory pages in descending order of their physical addresses and assigns them consecutive page numbers starting from 0. This process essentially establishes a global, unified mapping between physical addresses and page numbers for the entire available memory region.

[0062] This application constructs a two-level page table structure to manage these memory pages. This two-level page table is essentially a global MTT that is shared by all RDMA devices.

[0063] To construct the second-level page table, all memory pages are first grouped into groups of 8 (8 * 4KB = 32KB). The physical address information of each group of memory pages is stored in a second-level page table. Each second-level page table is 8 memory pages in size, and each entry in the second-level page table is 8 bytes in size. Each entry in the second-level page table can store the starting physical address of a physical memory page.

[0064] Then, a first-level page table is created. The size of the first-level page table is 256 * 4KB = 1MB, and the size of each entry in the first-level page table is also 8 bytes. Therefore, the first-level page table contains 1MB / 8B = 128K entries. Each entry in the first-level page table points to the starting physical address of a second-level page table.

[0065] Figure 2 This is a schematic diagram of a multi-level page table provided in an embodiment of this application. Figure 2 Taking a first-level page table containing 128K entries as an example, each entry in the first-level page table points to a second-level page table. Each second-level page table consists of 8 pages, with each page being 4KB in size. Therefore, the size of a second-level page table is 32KB. Each page in each second-level page table contains 4KB entries, and each entry maps to a physical data block (PD). One PD points to a data memory page, and the size of a data memory page is 4KB.

[0066] In traditional RDMA registration methods, each RDMA device needs to maintain its own independent MTT (Mean Transfer Table). When multiple devices register the same large memory area, this results in significant memory consumption. This application constructs a globally shared two-level page table, allowing all RDMA devices to complete address translation by querying the same page table. This reduces the storage overhead of the MTT from the number of devices multiplied by the registered memory size to approximately equal to one MTT table, greatly saving memory resources. Furthermore, the multi-level page table structure makes it possible to manage a large physical address space and provides a data structure foundation for subsequent fast address lookups, eliminating the need to maintain independent mapping tables for each memory region.

[0067] In addition to allocating a data transmission area, the application's main program also allocates a small user-space memory area for each RDMA device for sending and receiving commands (CMND). The user-space memory area is registered using the traditional Virtual Address (VA) method to obtain a corresponding second access key (VA_MR).

[0068] By allocating user-mode memory areas, the memory areas for business data and control commands are isolated, making data transmission and command transmission relatively independent. This not only standardizes the access logic of RDMA devices but also improves overall transmission efficiency and security.

[0069] When the application's main program calls the access device to execute send and receive commands, it can write the send and receive commands into the user-mode memory area so that the access device can access the user-mode memory area through its matching second access key to obtain the send and receive commands.

[0070] Since different types of send and receive commands use different protocols, the parsing methods differ.

[0071] Therefore, when calling the access device to execute send and receive commands, the send and receive commands can be transmitted to the parsing module that matches the protocol type, so that the parsing module can send back the parsed send and receive commands to the application main program; the application main program writes the parsed send and receive commands into the user space memory area.

[0072] In this embodiment, access permissions for the data transmission area can be stored in a memory-protected page table. When a send / receive command is executed by accessing the device, it is determined whether the operation type of the send / receive command falls within the access permissions recorded in the memory-protected page table. If the operation type of the send / receive command falls within the access permissions recorded in the memory-protected page table, the step of writing the send / receive command into the user-mode memory area is performed.

[0073] By recording the access permissions of each accessing device to the data transmission area through a memory protection page table, and verifying the matching relationship between the operation type and permissions before executing send and receive commands, unauthorized access can be accurately identified and blocked, thus improving the security of memory data.

[0074] Considering that in practical applications, there may be situations where multiple access devices access the same memory area at the same time, in order to avoid interference between the operations of access devices, it is possible to set only one or a set number of access devices to perform operations on the data in the memory area at the same time.

[0075] In this embodiment, a device access log table can be added in user space to record the device identifier of the device currently accessing the memory region. Once the accessing device completes its data transmission / reception operation on the memory region, its device identifier is deleted from the device access log table. If the device identifier is recorded in the device access log table, other accessing devices are prohibited from accessing the memory region.

[0076] By setting up a device access log table, access control to memory regions can be implemented, allowing only one device to operate on the target memory region at a time, effectively avoiding data corruption and overwriting issues caused by concurrent read / write operations from multiple devices. Clearing the log after each operation releases access permissions, ensuring the cyclical use of memory resources.

[0077] After a long period of memory allocation, release, and reuse operations, scattered free pages will form memory fragments, causing a large number of small, fragmented spaces to be unavailable for large blocks of business memory. Therefore, in this embodiment, the data of fragmented memory pages can be proactively migrated to a reserved contiguous memory area to avoid the problem of having sufficient total memory but being unable to allocate large blocks of contiguous memory.

[0078] In practice, when the fragmentation rate of the memory page corresponding to the target virtual address exceeds the set threshold, the data on the memory page corresponding to the target virtual address can be migrated to the reserved memory area, and the multi-level page table can be updated.

[0079] The threshold value can be flexibly set based on actual needs and is not limited here. For example, it can be set to 50%.

[0080] When the memory page fragmentation rate exceeds a threshold, the corresponding memory page data is migrated to a reserved memory area and multi-level page tables are updated simultaneously. This effectively consolidates discrete memory spaces, eliminates memory fragmentation, and avoids the problem of insufficient total memory allocation for large blocks of contiguous memory, thus significantly improving memory utilization. Furthermore, memory page defragmentation can proactively prevent memory allocation failures caused by memory fragmentation, enhancing the long-term stability of the system.

[0081] Before accessing the multi-level page table through the first interface, target memory regions with access frequency exceeding a frequency threshold can be identified, and the mapping relationship between the virtual address and physical address of the target memory region can be stored in a designated cache area. It is then determined whether the cache area contains the virtual address carried by the data transmission request. If the cache area contains the virtual address carried by the data transmission request, the physical address matching the virtual address carried by the data transmission request is transmitted to the accessing device.

[0082] The mapping relationship of cache area records is adjusted based on the rate of change of access popularity of available memory within a period of time.

[0083] High-frequency address mappings are filtered based on memory region access frequency and stored in a dedicated cache area. When a data transmission request hits a virtual address in the cache, the corresponding physical address can be directly retrieved and sent to the accessing device, eliminating the need to query multiple levels of page tables, greatly shortening address translation time, and effectively reducing RDMA data transmission latency. Simultaneously, the mapping relationships in the cache are dynamically updated based on the rate of change in access frequency within a period. This ensures that the cache area always records high-frequency access addresses while promptly removing invalid address mappings with decaying access frequency, preventing redundant data from occupying cache space and improving cache hit rate.

[0084] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0085] Figure 3 A schematic diagram of the structure of a memory management device provided in an embodiment of this application includes a construction unit 31, a generation unit 32, a pre-registration unit 33, an access unit 34, and a conversion unit 35; Construction unit 31 is used to compile page numbers for the available memory of kernel-mode modules and construct multi-level page tables; The generation unit 32 is used to generate a first interface for user-mode management of available memory, so as to realize user-mode sharing of multi-level page tables through the first interface; The pre-registration unit 33 is used to pre-register the data transmission area for multiple access devices through the second interface and generate a first access key; wherein, the data transmission area is the memory area corresponding to the minimum and maximum physical addresses of available memory; the second interface is an interface provided to the user space to implement the physical address registration function; Access unit 34 is used to access a multi-level page table through a first interface when the access device is invoked to perform data transmission and reception. The conversion unit 35 is used to convert the virtual address carried by the data transmission request into a physical address according to the multi-level page table, and transmit the physical address to the access device so that the access device can perform data transmission and reception operations on the memory region corresponding to the physical address according to its matching first access key and the physical address.

[0086] In some embodiments, an allocation unit is also included; The allocation unit is used to allocate user-mode memory regions for multiple access devices and generate a second access key.

[0087] In some embodiments, a writing unit is also included; The write unit is used to write the send / receive command to the user-mode memory area when the access device is invoked to execute the send / receive command, so that the access device can access the user-mode memory area through its matching second access key to obtain the send / receive command.

[0088] In some embodiments, the writing unit is configured to, when the device is invoked to execute a send / receive command, transmit the send / receive command to a parsing module that matches the protocol type of the command, so that the parsing module can provide feedback of the parsed send / receive command to the application main program; and write the parsed send / receive command to the user-mode memory area.

[0089] In some embodiments, the system further includes a storage unit and an access control unit; Storage units are used to store access permissions for data transfer areas in memory-protected page tables; The permission determination unit is used to determine whether the operation type of the send / receive command belongs to the access permissions recorded in the memory protection page table when the send / receive command is executed by calling the access device; if the operation type of the send / receive command belongs to the access permissions recorded in the memory protection page table, the write unit is triggered to execute the operation steps of writing the send / receive command to the user space memory area.

[0090] In some embodiments, the construction unit includes a determining subunit and a compiling subunit; The subunit is determined based on the total memory of the platform to determine the available memory for kernel-mode modules. The sub-unit is used to divide the available memory into multiple memory pages according to the set unit memory, and to compile page numbers for multiple memory pages according to their physical memory addresses in order to build a multi-level page table.

[0091] In some embodiments, a subunit is determined for obtaining the platform's memory capacity; determining an allocation strategy matching the memory capacity according to the correspondence between memory levels and allocation strategies; wherein the allocation strategy includes the memory request ratio of kernel-mode modules; and determining the available memory of kernel-mode modules according to the allocation strategy matching the memory capacity.

[0092] In some embodiments, a sub-unit is configured to request memory pages in batches from available memory according to a set unit memory, and record the physical addresses of multiple memory pages; sort the multiple memory pages by physical address and assign consecutive page numbers; divide the multiple memory pages into multiple secondary groups according to the number of pages in a single secondary page table; write the physical address of each memory page in the multiple secondary groups into the corresponding entry of the secondary page table to obtain multiple secondary page tables; and write the starting physical address of the multiple secondary page tables into the corresponding entry of the primary page table to obtain a primary page table.

[0093] In some embodiments, the generation unit is configured to record the minimum and maximum physical addresses of available memory through a user-mode module; and to provide a first interface for user-mode management of available memory.

[0094] In some embodiments, the pre-registration unit includes a setting subunit and an obtaining subunit; The configuration subunit is used to set up the memory physical address registration function based on the driver module, and provides a second interface for the memory physical address registration function through the user-mode software stack. The acquisition subunit is used to call the second interface to register the physical address mapping with the data transmission area for the target access device, and to obtain the first access key of the target access device; wherein, the target access device is any one of multiple access devices.

[0095] In some embodiments, it further includes a recording unit, a deletion unit, and a blocking unit; The recording unit is used to add a device access record table in user mode to record the device identifier of the device accessing the memory region currently being accessed; The deletion unit is used to delete the device identifier of the accessing device from the device access record table after the accessing device has completed the data transmission and reception operation on the memory area. The prohibition unit is used to prevent other access devices from accessing the memory area if the device identifier is recorded in the device access log table.

[0096] In some embodiments, a migration unit is also included; The migration unit is used to migrate the data on the memory page corresponding to the target virtual address to a reserved memory area and update the multi-level page table when the fragmentation rate of the memory page corresponding to the target virtual address exceeds a set threshold.

[0097] In some embodiments, the system further includes a statistics unit, an address determination unit, and a transmission unit; The statistics unit is used to count the target memory regions whose access popularity exceeds the popularity threshold, and store the mapping relationship between the virtual address and the physical address of the target memory region into the set cache area; The address determination unit is used to determine whether a virtual address carried in a data transmission / reception request exists in the cache area; The transmission unit is used to transmit a physical address that matches the virtual address carried in the data transmission request to the access device when the virtual address carried in the data transmission request exists in the cache area.

[0098] In some embodiments, an adjustment unit is also included; The adjustment unit is used to adjust the mapping relationship of cache area records based on the rate of change of access popularity of available memory within a period of time.

[0099] For a description of the features in the embodiment corresponding to the memory management device, please refer to the relevant description in the embodiment corresponding to the memory management method, which will not be repeated here.

[0100] As can be seen from the above technical solution, a first interface for managing available user-mode memory is generated to achieve user-mode sharing of multi-level page tables. A second interface is used to pre-register data transmission areas for multiple access devices and generate a first access key. The data transmission area refers to the memory region corresponding to the minimum and maximum physical addresses of available memory. The second interface is an interface provided to user-mode to implement physical address registration. When an access device is invoked to perform data transmission and reception, the first interface accesses the multi-level page table, and the virtual address carried in the data transmission and reception request is converted to a physical address based on the multi-level page table. The physical address is then transmitted to the access device, allowing the access device to perform data transmission and reception operations on the memory region corresponding to the physical address based on its matching first access key and physical address. In this technical solution, by setting up the first interface to achieve user-mode shared available memory, and relying on a unified multi-level page table for multiple access devices to share, there is no need to maintain a separate mapping table for virtual and physical addresses for each device. This effectively reduces the memory overhead caused by traditional mapping tables and solves the problem of accumulated memory consumption during multi-device memory registration. Simultaneously, the second interface facilitates the pre-registration of the entire data transmission area and generates the first access key during the initialization phase, effectively resolving the high latency issue associated with registering the memory area during memory transmission. By limiting the minimum and maximum physical addresses of available memory, the number of entries in the mapping table of the access device is effectively limited, avoiding high latency caused by frequent refreshes of the network card's static random access memory due to frequent memory registration. During data transmission and reception, the first interface quickly queries multi-level page tables, converting the virtual address carried in the request into a physical address and sending it to the access device. Combined with the first access key, data reading and writing are completed, eliminating the runtime memory registration and data copying processes, reducing interaction time, and effectively improving the efficiency and stability of data transmission on the access device. This makes it well-suited for high-concurrency, fine-grained business access scenarios.

[0101] Figure 4A schematic diagram of a memory management system provided in this application embodiment includes a platform management module 41, a kernel-mode module 42, a user-mode module 43, a driver module 44, and an application module 45; The platform management module 41 is connected to the kernel module 42 and is used to determine the available memory of the kernel module 42 based on the total memory of the platform; and to transmit the memory information of the available memory to the kernel module 42. Kernel module 42 is used to divide the available memory corresponding to the memory information into multiple memory pages according to the set unit memory, and to compile page numbers for multiple memory pages according to the physical memory address in order to build a multi-level page table; User-mode module 43 is used to record the minimum and maximum physical addresses of available memory; and provides the first interface for user-mode management of available memory. Kernel-mode module 42 and user-mode module 43 can communicate through channels provided by the kernel.

[0102] Driver module 44 is used to set up the memory physical address registration function and provide a second interface for the memory physical address registration function to application module 45 through user-mode software stack; Application module 45 is used to call the second interface provided by driver module 44 to pre-register data transmission areas for multiple access devices and generate a first access key. When an access device is invoked to perform data transmission and reception, a multi-level page table is accessed through the first interface, and the virtual address carried in the data transmission and reception request is converted into a physical address according to the multi-level page table. The physical address is then transmitted to the access device so that the access device can perform data transmission and reception operations on the memory area corresponding to the physical address based on its matching first access key and physical address.

[0103] Application module 45 is also used to allocate user-mode memory regions for multiple access devices and generate a second access key so that the access devices can access the user-mode memory regions through their matching second access key to obtain data transmission and reception requests.

[0104] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any of the memory management method embodiments described above.

[0105] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above-described memory management method embodiments at runtime.

[0106] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0107] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above-described memory management method embodiments.

[0108] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above-described memory management method embodiments.

[0109] Any of the components, modules, units, parts, methods, and operations described herein can be implemented using software, firmware, hardware (e.g., fixed logic circuitry), manual processing, or any combination thereof. Alternatively or additionally, any functionality described herein can be performed at least in part by one or more hardware logic components, such as, but not limited to, a central processing unit (CPU), a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), an application-specific standard product (ASSP), a system-on-a-chip (SoC), a complex programmable logic device (CPLD), a microprocessor (MCU), etc. The terms "system," "computing device," or "apparatus" as used herein encompass various means, devices, and machines for processing data, including, for example, one or more programmable processors, computers, SoCs, or combinations thereof. The apparatus may also include code that creates an execution environment for the computer program in question, such as code constituting processor firmware, a protocol stack, a database management system, an operating system, a cross-platform runtime environment, a virtual machine, or a combination thereof. The aforementioned computer program (also known as a program, software, software application, app, script, or code) can be written in any form of programming language, including compiled or interpreted languages, declarative or procedural languages, and can be deployed in any form, including as a standalone program or as a module, component, subroutine, object, or other unit suitable for a computing environment.

[0110] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0111] The foregoing has provided a detailed description of a memory management method, apparatus, system, electronic device, computer-readable storage medium, and computer program product provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of this application.

Claims

1. A memory management method, characterized in that, include: Page numbers are compiled for the available memory of kernel-mode modules, and multi-level page tables are constructed. A first interface for user-mode management of the available memory is generated, so as to realize user-mode sharing of the multi-level page table through the first interface; The second interface is used to pre-register data transmission areas for multiple access devices and generate a first access key; wherein, the data transmission area is the memory area corresponding to the minimum and maximum physical addresses of the available memory; the second interface is an interface provided to the user space to implement the physical address registration function; When the access device is invoked to perform data transmission and reception, the multi-level page table is accessed through the first interface, and the virtual address carried by the data transmission and reception request is converted into a physical address according to the multi-level page table. The physical address is then transmitted to the access device so that the access device can perform data transmission and reception operations on the memory region corresponding to the physical address according to its matching first access key and the physical address. Generate a first interface for user-mode management of the available memory, including: The user-space module records the minimum and maximum physical addresses of the available memory and provides a first interface for user-space management of the available memory. The second interface is used to pre-register data transmission areas for multiple access devices and generate a first access key, including: The memory physical address registration function is set based on the driver module, and a second interface for the memory physical address registration function is provided through the user-space software stack. For the target access device, the second interface is invoked to register a physical address mapping with the data transmission area and to obtain the first access key of the target access device; wherein, the target access device is any one of a plurality of access devices.

2. The memory management method according to claim 1, characterized in that, Also includes: Allocate user-mode memory regions for multiple access devices and generate a second access key.

3. The memory management method according to claim 2, characterized in that, Also includes: When the access device is invoked to execute a send / receive command, the send / receive command is written into the user-mode memory area so that the access device can access the user-mode memory area through its matching second access key to obtain the send / receive command.

4. The memory management method according to claim 3, characterized in that, When invoking the access device to execute send / receive commands, writing the send / receive commands into the user-mode memory area includes: When the device is invoked to execute send and receive commands, the send and receive commands are transmitted to a parsing module that matches the protocol type according to the protocol type of the send and receive commands, so that the parsing module can send back the parsed send and receive commands to the application main program. The parsed send and receive commands are written to the user-space memory area.

5. The memory management method according to claim 3, characterized in that, After pre-registering the data transmission area for multiple access devices through the second interface and generating the first access key, the process also includes: The access permissions for the data transmission area are stored in a memory-protected page table; When calling the access device to execute send / receive commands, determine whether the operation type of the send / receive command belongs to the access permissions recorded in the memory protection page table; If the operation type of the send / receive command belongs to the access permission recorded in the memory protection page table, the operation step of writing the send / receive command into the user-mode memory area is executed.

6. The memory management method according to claim 1, characterized in that, Page numbering is performed on the available memory of kernel-mode modules, and multi-level page tables are constructed, including: Based on the total memory of the platform, determine the available memory of the kernel-mode module; The available memory is divided into multiple memory pages according to the set unit memory, and page numbers are assigned to the multiple memory pages according to their physical memory addresses to construct a multi-level page table.

7. The memory management method according to claim 6, characterized in that, Based on the platform's total memory, the available memory for the kernel-mode module is determined, including: Get the platform's memory capacity; Based on the correspondence between memory levels and allocation strategies, an allocation strategy matching the memory capacity is determined; wherein, the allocation strategy includes the memory request ratio of kernel-mode modules; The available memory for the kernel-mode module is determined based on the memory capacity matching allocation strategy.

8. The memory management method according to claim 6, characterized in that, The available memory is divided into multiple memory pages according to the set unit memory, and page numbers are assigned to these memory pages according to their physical memory addresses to construct a multi-level page table, including: Request memory pages in batches from the available memory according to the set unit memory, and record the physical addresses of multiple memory pages; Sort multiple memory pages by their physical addresses and assign them consecutive page numbers; Based on the number of pages in a single second-level page table, multiple memory pages are divided into multiple second-level groups; Write the physical address of each memory page in multiple second-level groups into the corresponding entry of the second-level page table to obtain multiple second-level page tables; The starting physical addresses of multiple second-level page tables are written into the corresponding entries of the first-level page table to obtain a single first-level page table.

9. The memory management method according to claim 1, characterized in that, Also includes: Add a device access log table in user space to record the device identifier of the device currently accessing the memory region; When the access device completes the data transmission and reception operation of the memory region, the device identifier of the access device is deleted from the device access record table; If a device identifier is recorded in the device access log table, other access devices are prohibited from accessing the memory area.

10. The memory management method according to claim 1, characterized in that, After paging the available memory of the kernel-mode modules and constructing multi-level page tables, the following steps are also included: When the fragmentation rate of the memory page corresponding to the target virtual address exceeds the set threshold, the data on the memory page corresponding to the target virtual address is migrated to the reserved memory area, and the multi-level page table is updated.

11. The memory management method according to claim 1, characterized in that, Before accessing the multi-level page table through the first interface, the method further includes: Target memory regions with access popularity exceeding a popularity threshold are identified, and the mapping relationship between the virtual address and physical address of the target memory regions is stored in a designated cache area. Determine whether the virtual address carried in the data transmission and reception request exists in the cache area; If the virtual address carried by the data transmission request exists in the cache area, the physical address matching the virtual address carried by the data transmission request will be transmitted to the access device.

12. The memory management method according to claim 11, characterized in that, Also includes: The mapping relationship recorded in the cache area is adjusted based on the rate of change of access popularity of the available memory within a period of time.

13. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for implementing the steps of the memory management method as described in any one of claims 1 to 12 when executing the computer program.

Images