A system, method, electronic device, and storage medium for memory access

Abstract

This application provides a system, method, electronic device, and storage medium for memory access, including a processor, a conversion circuit, and a memory. The processor issues access addresses according to data structures; the conversion circuit determines whether the access address exceeds the end address of the current data structure based on pre-configured address boundary parameters. If it does not exceed the end address, it is directly sent to the memory as the target physical address; if it exceeds the end address, a remapping calculation is performed before sending. The memory performs read and write operations based on the target physical address. This system automatically handles address boundary issues through hardware conversion circuitry, allowing the processor to access continuously without needing to perceive boundaries, effectively improving system efficiency.

Description

Technical Field

[0001] This application relates to the field of chip technology, and more specifically, to a system, method, electronic device, and storage medium for memory access. Background Technology

[0002] In a chip-based System-on-a-Chip (SoC), the processor and memory are directly connected. The processor typically stores and reads data according to a fixed data structure, and the data addresses within the data structure are contiguous. For example, in the process of transmitting and receiving Wi-Fi packets, the Wi-Fi MAC header is stored in the processor using a fixed data structure. When data within a data structure crosses memory boundaries, although the processor's operational addresses are contiguous, the actual memory access addresses are not.

[0003] In an architecture where the processor and memory are directly connected, if the processor handles the boundaries, it needs to determine whether the data is at the end of the memory boundary before reading or writing each piece of data. If it is at the boundary, the next data needs to be addressed from the beginning of the memory boundary; otherwise, the next data needs to be addressed from the next address. Such branching processing will significantly reduce the processor's speed. Summary of the Invention

[0004] In view of this, the purpose of this application is to provide a system, method, electronic device and storage medium for memory access to overcome the problems in the prior art.

[0005] In a first aspect, embodiments of this application provide a memory access system, including: a processor, a conversion circuit, and a memory; The processor is used to respond to data processing operations and issue an access address according to the data structure corresponding to the data processing operation. The conversion circuit is used to receive the access address and determine whether the access address exceeds the end address of the current data structure according to the pre-configured address boundary parameters; if it does not exceed the end address, the access address is sent to the memory as the target physical address; if it exceeds the end address, the access address is remapped and the calculated target physical address is sent to the memory. The memory is used to perform corresponding read and write operations based on the received target physical address.

[0006] In some technical solutions of this application, when the access address bit width is greater than the target physical address bit width, the processor is used to respond to data processing operations containing multiple data structures, generate an access address corresponding to the data structure of the current operation, and the access address contains a function indicator bit for distinguishing different data structures; The conversion circuit is used to configure multiple sets of address boundary parameters, each set of address boundary parameters including a start address and an end address, and corresponding to different function indicator bit values; and to select a corresponding set of address boundary parameters according to the function indicator bit in the access address, and to determine whether the access address exceeds the end address according to the selected address boundary parameters.

[0007] In some technical solutions of this application, the above refers to the situation where the access address exceeds the end address of the current data structure; The conversion circuit is used to subtract the end address of the selected address boundary parameter from the address bits other than the function indicator bit in the access address, and then add the start address of the selected address boundary parameter to obtain the target physical address.

[0008] In some technical solutions of this application, when the access address bit width is equal to the target physical address bit width, the processor is used to generate a continuous access address that does not contain a function indicator bit. The conversion circuit is used to configure address boundary parameters including a start address, an end address, and a remapping end address; wherein the remapping end address is greater than the end address; Determine whether the access address is greater than the end address and less than or equal to the remapping end address; if so, perform remapping calculation on the access address.

[0009] In some technical solutions of this application, the above-mentioned conversion circuit is used to subtract the end address from the access address and add the start address to obtain the target physical address.

[0010] In some technical solutions of this application, the above-mentioned conversion circuit is also used to configure the actual starting address; When the access address is located between the start address and the end address, subtract the start address from the access address and add the actual start address to obtain the target physical address; When the access address is greater than the end address and less than or equal to the remapping end address, the access address is subtracted from the end address and then added to the actual start address to obtain the target physical address.

[0011] In some technical solutions of this application, the above-mentioned conversion circuit includes: Address receiving unit, used to receive the access address sent by the processor; The parameter configuration unit is used to store pre-configured address boundary parameters; An address comparison unit is used to determine whether the access address exceeds the end address of the current data structure; The remapping calculation unit is used to perform remapping calculation on the access address to obtain the target physical address when the access address exceeds the end address; and to use the access address as the target physical address when it does not exceed the end address. A memory access unit is used to send the target physical address to the memory.

[0012] Secondly, embodiments of this application provide a method for accessing a memory, the method comprising: The processor responds to the data processing operation and issues an access address according to the data structure corresponding to the data processing operation. The conversion circuit receives the access address and determines whether the access address exceeds the end address of the current data structure based on the pre-configured address boundary parameters. If it does not exceed the end address, the conversion circuit sends the access address as the target physical address to the memory. If it exceeds the end address, the conversion circuit performs a remapping calculation on the access address and sends the calculated target physical address to the memory. The memory performs corresponding read and write operations based on the received target physical address.

[0013] Thirdly, embodiments of this application provide an electronic device, a processor, a memory, and a bus. The memory stores machine instructions executed by the processor. When the electronic device is running, the processor communicates with the memory via the bus. When the machine instructions are executed by the processor, the steps of the memory access method described above are performed.

[0014] Fourthly, embodiments of this application provide a computer storage medium storing a computer program, the computer program being executed by a processor to perform the steps of the memory access method described above.

[0015] The technical solutions provided by the embodiments of this application may include the following beneficial effects: This application provides a memory access system, including: a processor, a conversion circuit, and a memory; the processor is configured to respond to a data processing operation and issue an access address according to the data structure corresponding to the data processing operation; the conversion circuit is configured to receive the access address and determine whether the access address exceeds the end address of the current data structure according to pre-configured address boundary parameters; if it does not exceed the end address, the access address is sent to the memory as a target physical address; if it exceeds the end address, the access address is remapped and the calculated target physical address is sent to the memory; the memory is configured to perform corresponding read and write operations according to the received target physical address.

[0016] This application sets up a conversion circuit between the processor and the memory. The conversion circuit determines whether the access address issued by the processor exceeds the end address of the current data structure based on the pre-configured address boundary parameters. If it does, it automatically performs address remapping calculation. This allows the processor to issue access addresses continuously according to the data structure format without having to pay attention to whether the data crosses the memory boundary. This avoids the speed reduction problem caused by the processor performing boundary judgment and branch processing every time it reads or writes, and effectively improves the overall system efficiency.

[0017] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0018] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This illustration shows a schematic diagram of a memory access system provided in an embodiment of this application; Figure 2 This illustration shows a schematic diagram of address remapping of a function indicator bit provided in an embodiment of this application; Figure 3 This illustration shows a schematic diagram of address remapping in a specified remapping space provided by an embodiment of this application; Figure 4 This illustration shows a space-saving address remapping method provided by an embodiment of this application. Figure 5 This illustration shows another functional indicator bit remapping provided in an embodiment of this application; Figure 6 This illustration shows another schematic diagram of address remapping by specifying a remapping space, provided by an embodiment of this application. Figure 7 A flowchart illustrating a memory access method provided in an embodiment of this application is shown; Figure 8 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. It should be understood that the accompanying drawings in this application are for illustrative and descriptive purposes only and are not intended to limit the scope of protection of this application. Furthermore, it should be understood that the schematic drawings are not drawn to scale. The flowcharts used in this application illustrate operations implemented according to some embodiments of this application. It should be understood that the operations in the flowcharts may not be implemented in sequence, and steps without logical contextual relationships may be reversed or implemented simultaneously. In addition, those skilled in the art, guided by the content of this application, may add one or more other operations to the flowcharts, or remove one or more operations from the flowcharts.

[0021] Furthermore, the described embodiments are merely some, not all, of the embodiments of this application. The components of the embodiments of this application described and illustrated herein can typically be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0022] It should be noted that the term "comprising" will be used in the embodiments of this application to indicate the presence of the features declared thereafter, but does not exclude the addition of other features.

[0023] In a chip-based System-on-a-Chip (SoC), the processor and memory are directly connected. The processor typically stores and reads data according to a fixed data structure, and the data addresses within the data structure are contiguous. For example, in the process of transmitting and receiving Wi-Fi packets, the Wi-Fi MAC header is stored in the processor using a fixed data structure. When data within a data structure crosses memory boundaries, although the processor's operational addresses are contiguous, the actual memory access addresses are not.

[0024] In an architecture where the processor and memory are directly connected, if the processor handles the boundaries, it needs to determine whether the data is at the end of the memory boundary before reading or writing each piece of data. If it is at the boundary, the next data needs to be addressed from the beginning of the memory boundary; otherwise, the next data needs to be addressed from the next address. Such branching processing will significantly reduce the processor's speed.

[0025] Based on this, embodiments of this application provide a system, method, electronic device, and storage medium for memory access, which are described below through embodiments. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0026] Figure 1 A schematic diagram of a memory access system provided in an embodiment of this application is shown, including a processor, a conversion circuit, and a memory.

[0027] The processor responds to data processing operations by issuing an access address according to the data structure corresponding to that operation. A data processing operation refers to a specific task performed by the processor, such as wireless communication packet transmission and reception, audio and video encoding and decoding, and storage protocol processing. Different data processing operations correspond to different data structures. A data structure is the way the processor organizes data at the software level, specifying the storage format and order of data in memory; its internal data addresses are contiguous. When executing a data processing operation, the processor generates and issues an access address to the conversion circuit according to the format of the data structure corresponding to that operation.

[0028] The translation circuit receives the access address from the processor and determines whether the access address exceeds the end address of the current data structure based on pre-configured address boundary parameters. Address boundary parameters are configuration information pre-stored in the translation circuit, used to define the address range of the current data structure in memory, including at least the start and end addresses. The start address refers to the first address of the current data structure in memory, and the end address refers to the last address in that memory space.

[0029] The conversion circuit compares the received access address with the end address of the current data structure. If the access address does not exceed the end address, it indicates that the currently accessed data is still within the contiguous storage space of the data structure. The conversion circuit directly sends the access address as the target physical address to the memory without address translation. If the access address exceeds the end address, it indicates that the currently accessed data has crossed the boundary of the data structure's storage space. The contiguous logical addresses issued by the processor are no longer contiguous in the actual physical memory. In this case, the conversion circuit performs a remapping calculation on the access address and sends the calculated target physical address to the memory. The target physical address is the address that is ultimately sent to the memory to select the actual physical storage unit. The remapping calculation refers to the process of mapping the access address back to the starting region of the corresponding storage space of the current data structure when the access address exceeds the end address, so that the final accessed physical address falls within the actual storage space range of the data structure.

[0030] The memory is used to perform corresponding read and write operations based on the received target physical address. After receiving the target physical address, the memory performs data read or write operations on the memory cell pointed to by the target physical address according to the standard memory read and write timing. The memory itself does not participate in the address judgment and remapping process; it only acts as the accessed physical storage device, responding to the target physical address issued by the conversion circuit and completing the corresponding data access.

[0031] In one alternative implementation, the access address can be in two cases: the access address width is greater than the target physical address width, and the access address width is equal to the target physical address width.

[0032] When the access address width is greater than the target physical address width, the processor has spare address bits available for use. The processor generates an access address corresponding to the data structure being accessed in response to data processing operations involving multiple data structures. This access address includes function indicator bits to distinguish between different data structures. A data processing operation involving multiple data structures refers to an operation that involves two or more functional data structures. Different functional data structures correspond to different storage regions in memory, and the processor needs to access these different storage regions separately. The function indicator bits are identification information appended to the access address by the processor when generating the access address, based on the type of data structure being accessed. These bits occupy spare address bits and indicate which functional data structure is being accessed.

[0033] The conversion circuit is used to configure multiple sets of address boundary parameters. Each set of address boundary parameters includes a start address and an end address, and corresponds to different function indicator bit values. The start address refers to the first address of the memory space corresponding to the function indicator bit value, and the end address refers to the last address of the memory space. The conversion circuit selects the corresponding set of address boundary parameters based on the function indicator bit in the access address, and determines whether the access address exceeds the end address based on the selected address boundary parameters.

[0034] Specifically, the conversion circuit extracts the value of the function indicator bit from the access address, searches for a set of address boundary parameters corresponding to the value of the function indicator bit in a pre-configured set, uses the end address in the set as the boundary judgment basis for the current data structure, and compares the address bits in the access address other than the function indicator bit with the end address to determine whether it exceeds the limit.

[0035] When the access address exceeds the end address of the current data structure, the conversion circuit subtracts the end address of the selected address boundary parameter from the address bits excluding the function indicator bits in the access address, and adds the start address of the selected address boundary parameter to obtain the target physical address. The address bits excluding the function indicator bits refer to the remaining address portion after removing the function indicator bits used to distinguish data structures from the complete access address issued by the processor; this portion indicates the specific offset position within the current data structure's storage space. The end address of the selected address boundary parameter refers to the end address of the set of address boundary parameters selected by the conversion circuit based on the function indicator bits, and the start address of the selected address boundary parameter refers to the start address of that set of address boundary parameters. Through the above calculation, the conversion circuit maps the out-of-bounds address exceeding the end address back to the starting region of the current data structure's storage space, ensuring that the target physical address falls within the actual physical storage range of the data structure, thereby automatically maintaining address continuity at the hardware level.

[0036] In specific implementation, such as Figure 2 As shown, a function indicator bit of 1 indicates that the starting address of the current data structure is start_address1 and the ending address is end_address1. After receiving the access address, the conversion circuit extracts the function indicator bit. If the function indicator bit is 1, the starting address start_address1 and the ending address end_address1 are selected as the address boundary parameters of the current data structure. The conversion circuit compares the address bits (excluding the function indicator bit) of the access address with the ending address end_address1. If address falls after end_address1 (i.e., address is greater than end_address1), it indicates that the access address has exceeded the storage space boundary of the current data structure. The conversion circuit performs a remapping calculation on the address, obtaining the final access address final_address as address minus end_address1 plus start_address1, thus wrapping the out-of-bounds address back to the starting region of the current data structure. If the function indicator bit is 2, the conversion circuit selects the corresponding starting address start_address2 and ending address end_address2, and performs address remapping according to the same judgment and calculation method. Other function indicator bit values ​​follow the same logic.

[0037] When the access address width equals the target physical address width, the processor's addressing width has no extra bits available for function indication. The processor generates consecutive access addresses that do not contain function indication bits. Consecutive access addresses refer to logically sequentially increasing address sequences issued by the processor according to the data structure format. These addresses do not carry identification information to distinguish different data structures; all address bits are used to indicate the specific location within the memory space.

[0038] The conversion circuit is used to configure address boundary parameters, including the start address, end address, and remapping end address. The start address refers to the first address in the memory space where the current data structure is stored, the end address is the last address in that memory space, and the remapping end address is greater than the start address. The remapping end address is an address parameter used to define the upper limit of the remapping space, which is the address range between the start address and the remapping end address. Access addresses falling within this range logically exceed the actual storage space of the current data structure, but are not valid access addresses for other data structures; therefore, they are used as the criterion for triggering address remapping.

[0039] The conversion circuit determines whether the access address is greater than the end address and less than or equal to the remapping end address. If the access address falls within this range, it indicates that the continuous logical address issued by the processor has exceeded the storage boundary of the current data structure. The conversion circuit performs a remapping calculation on the access address, mapping it back to the starting area of ​​the current data structure's storage space. If the access address does not fall within this range, i.e., the access address is less than or equal to the end address, it indicates that the address is still within the storage space of the current data structure. The conversion circuit directly sends the access address as the target physical address to the memory without performing a remapping.

[0040] In an optional implementation, when the access address is greater than the end address and less than or equal to the remapping end address, the conversion circuit performs a remapping calculation on the access address. The end address is subtracted from the access address, and the starting address is added to obtain the target physical address. Here, the access address refers to the continuous address issued by the processor that does not include function indicator bits, and both the end address and the starting address are address boundary parameters pre-configured by the conversion circuit. This calculation means that the offset of the out-of-bounds access address relative to the end address is added to the starting address of the current data structure, thereby mapping the out-of-bounds access back to the starting region of the current data structure's storage space. This ensures that the target physical address falls within the actual physical storage range of the data structure, achieving automatic address wraparound.

[0041] In an optional implementation, when the access address width equals the target physical address width, the address in the remapped space is remapped to the starting region of the current data structure, rendering this address unusable for actual memory access and resulting in wasted memory resources. To address this issue, the conversion circuit is also used to configure the actual starting address. The actual starting address refers to the starting address of the physical storage space actually occupied by the current data structure in memory, distinct from the logical starting address of the data structure from the processor's perspective.

[0042] The conversion circuit uses different calculation methods to obtain the target physical address based on the different ranges of the accessed address. When the accessed address is between the start and end addresses, it indicates that the accessed address is within the normal storage space of the current data structure and has not exceeded the bounds. The conversion circuit subtracts the start address from the accessed address to obtain the offset of the accessed address relative to the logical start address, and adds it to the actual start address to obtain the target physical address. This calculation maps the logical address issued by the processor to the actual physical address of the data structure in memory. When the accessed address is greater than the end address and less than or equal to the remapped end address, it indicates that the accessed address has exceeded the normal storage space of the current data structure and falls into the remapped space. The conversion circuit subtracts the end address from the accessed address to obtain the offset of the out-of-bounds portion relative to the end address, and adds it to the actual start address to obtain the target physical address. This calculation maps the out-of-bounds accessed address back to the starting region of the actual physical storage space of the data structure.

[0043] In this way, the physical address range occupied by the remapped space can be utilized by the actual storage space. The logical addresses continuously issued by the processor can be completely mapped to the actual physical address space of the memory, avoiding address space waste and achieving the effect of saving memory resources. Figure 4 As shown. For address 3, which falls within the address range start_address3 to end_address3, the final access address is: final_address3=address3-start_address3+actual_start_address3; For the address address 'address3_remap' which falls within the address range from 'end_address3' to 'remap_end_address3', the final access address is: final_address3_remap=address3_remap-end_address3+actual_start_address3.

[0044] In specific implementation, such as Figure 3As shown, the conversion circuit checks each received access address. It determines whether the access address is greater than the end address and less than the remapping end address, i.e., whether the address satisfies the following conditions: address>end_address3 and address <remap_end_address3; If this condition is met, it indicates that the current access address has exceeded the normal storage space of the data structure and fallen into the remapping space. The conversion circuit then performs address remapping on this access address. If the access address is less than or equal to the end address, it indicates that the address is still within the normal storage space of the current data structure. The conversion circuit does not perform remapping and directly uses the access address as the target physical address. If the access address is greater than or equal to the remapping end address, it indicates that the address has exceeded the remapping space range corresponding to the current data structure and belongs to the storage space or remapping space of other data structures. The conversion circuit then processes this address separately according to the configuration parameters of those other data structures.

[0045] In an optional implementation, the conversion circuit internally includes an address receiving unit, a parameter configuration unit, an address comparison unit, a remapping calculation unit, and a memory access unit.

[0046] The address receiving unit receives the access address from the processor and passes it to the address comparison unit and the remapping calculation unit. The parameter configuration unit stores pre-configured address boundary parameters, which include at least a start address and an end address. Depending on the remapping method, these parameters may also include a remapping end address, the actual start address, multiple sets of address boundary parameters, and their correspondence with the values ​​of the function indicator bits. These parameters are pre-written into the parameter configuration unit according to the storage layout of the data structure during system initialization.

[0047] The address comparison unit obtains the address boundary parameters corresponding to the current data structure from the parameter configuration unit, compares the access address with the end address, and determines whether the access address exceeds the end address of the current data structure. In an implementation including a function indicator bit, the address comparison unit first extracts the function indicator bit from the access address, selects a corresponding set of address boundary parameters from the parameter configuration unit based on the function indicator bit, and then compares the address bits in the access address excluding the function indicator bit with the end address of that set of parameters. In an implementation using a remapping space, the address comparison unit determines whether the access address is greater than the end address and less than or equal to the remapping end address. The address comparison unit sends the determination result to the remapping calculation unit.

[0048] The remapping calculation unit performs corresponding processing based on the judgment result of the address comparison unit. If the access address does not exceed the end address, the remapping calculation unit directly outputs the access address as the target physical address without transformation. If the access address exceeds the end address, the remapping calculation unit obtains the required parameters such as the start address from the parameter configuration unit, performs remapping calculation on the access address, obtains the target physical address, and outputs it. The memory access unit receives the target physical address output by the remapping calculation unit and sends the target physical address to the memory according to the memory interface timing requirements to complete subsequent read and write operations.

[0049] In practical implementation, each unit in the conversion circuit can be implemented using the following devices or circuit structures. The address receiving unit can be implemented using registers or latches. Registers are used to latch the access address issued by the processor on clock edge triggering, ensuring stable transmission of the address signal within the conversion circuit; latches can be used in level-sensitive scenarios. Specifically, a parallel register composed of D flip-flops can be selected, with a bit width consistent with the processor access address bit width.

[0050] The parameter configuration unit can be implemented using a programmable register set, with configuration values ​​written to it via software during system initialization. Each register in the register set stores an address boundary parameter, including the start address, end address, remapping end address, and actual start address. In a function indicator bit scheme, multiple register sets can be configured, each corresponding to a function indicator bit value. A multiplexer selects the appropriate set of parameters based on the function indicator bit. Alternatively, the parameter configuration unit can also use a one-time programmable memory unit, such as a fuse or antifuse, to fix the parameters during chip manufacturing or testing, suitable for applications where parameters remain constant.

[0051] The address comparison unit can be implemented using a digital comparator. A digital comparator consists of combinational logic gates, accepting the access address and the end address as inputs, and outputting a comparison result signal indicating whether the access address is greater than, equal to, or less than the end address. In the remapping space scheme, two comparators are needed to determine whether the access address is greater than the end address and whether it is less than or equal to the remapping end address, respectively. The two comparison results are combined through an AND gate to generate the final interval hit signal.

[0052] The remapping calculation unit can be implemented using an adder. The adder performs a combination of subtraction and addition, calculating the access address along with parameters such as the end address and start address. Specifically, a ripple carry adder or a carry-lookahead adder can be selected based on the bit width and timing requirements. To save area, subtraction can be performed by inverting the subtrahend, adding one, and then adding the subtrahend back to the minuend. On paths within the boundary, the access address is directly selected and output using a multiplexer, bypassing the adder operation to reduce power consumption.

[0053] The memory access unit can be implemented using a memory interface control circuit. This control circuit generates corresponding read / write control signals based on the memory type, such as the chip select signal and read / write enable signal for SRAM, or the row address strobe signal and column address strobe signal for DRAM, etc., sends the target physical address to the memory according to the memory interface timing requirements, and completes the data transfer.

[0054] The above units are connected via hardware wiring to form a complete address remapping and translation circuit. The entire process is completed by pure hardware logic without processor intervention, ensuring the real-time performance and determinism of address determination and remapping.

[0055] In an alternative implementation, such as Figure 5 As shown, when the processor reads and writes memory, if there are two data structures with different functions stored in the address space of 0~15 and the address space of 16~31 respectively, then address remapping using the function indicator bit method requires at least 8 bits of address width. Bits[6:0] indicate the actual memory address, and bit[7] indicates the function information. If bit[7] is 0, it means that the starting address of this operation is 0 and the ending address is 15. Then look at the address of bit[6:0]. If the address of bit[6:0] is between 1 and 15, no remapping is needed. If bit[6:0] appears in 16~20, it is remapped to 0~4. If bit[7] is 1, it means that the starting address of this operation is 16 and the ending address is 31. If bit[6:0] is in the address space of 16~31, no remapping is needed. If bit[6:0] appears in the address space of 32~36, it is remapped to 16~20.

[0056] like Figure 6 As shown, if only a 7-bit address width is provided, the function indicator bit method cannot be used for remapping; the remapping space method is required. The data structure for function 1 is stored in the address space 0-15, with a remapping space of 16-20, and the actual storage address is 0-15. The data structure for function 2 is stored in the address space 21-36, with a remapping space of 37-41, and the actual storage address is 16-31. If the processor accesses the address space 0-15, the final memory space is remapped to 0-15; if the processor accesses the address space 16-20, the final memory space is remapped to 0-4; if the processor accesses the address space 21-36, the final memory space is remapped to 16-31; and if the processor accesses the address space 37-41, the memory space is remapped to 16-20.

[0057] Figure 7 The diagram illustrates a flowchart of a memory access method provided in an embodiment of this application, wherein the method includes steps S101-S103; specifically: S101. The processor responds to the data processing operation and issues an access address according to the data structure corresponding to the data processing operation. S102. The conversion circuit receives the access address and determines whether the access address exceeds the end address of the current data structure according to the pre-configured address boundary parameters. If it does not exceed the end address, the conversion circuit sends the access address as the target physical address to the memory. If it exceeds the end address, the conversion circuit performs a remapping calculation on the access address and sends the calculated target physical address to the memory. S103. The memory performs corresponding read and write operations according to the received target physical address.

[0058] When the access address bit width is greater than the target physical address bit width, the processor responds to a data processing operation that includes multiple data structures, generates an access address corresponding to the data structure of the current operation, and the access address includes a function indicator bit for distinguishing different data structures; The conversion circuit is configured with multiple sets of address boundary parameters, each set of address boundary parameters including a start address and an end address, and corresponding to different function indicator bit values; and, according to the function indicator bit in the access address, a corresponding set of address boundary parameters is selected, and according to the selected address boundary parameters, it is determined whether the access address exceeds the end address.

[0059] When the access address exceeds the end address of the current data structure; The conversion circuit subtracts the end address of the selected address boundary parameter from the address bits (excluding the function indicator bit) of the access address, and adds the start address of the selected address boundary parameter to obtain the target physical address.

[0060] When the access address bit width is equal to the target physical address bit width, the processor generates a continuous access address that does not include function indicator bits; The conversion circuit configuration includes address boundary parameters such as a start address, an end address, and a remapping end address; wherein the remapping end address is greater than the end address; Determine whether the access address is greater than the end address and less than or equal to the remapping end address; if so, perform remapping calculation on the access address.

[0061] The conversion circuit subtracts the end address from the access address and adds the start address to obtain the target physical address.

[0062] The conversion circuit is configured with the actual starting address; When the access address is located between the start address and the end address, subtract the start address from the access address and add the actual start address to obtain the target physical address; When the access address is greater than the end address and less than or equal to the remapping end address, the access address is subtracted from the end address and then added to the actual start address to obtain the target physical address.

[0063] like Figure 8 As shown, this application provides an electronic device for executing the memory access method described in this application. The device includes a memory, a processor, a bus, and a computer program stored in the memory and executable on the processor. The processor executes the computer program to implement the steps of the memory access method described above.

[0064] Specifically, the aforementioned memory and processor can be general-purpose memory and processor, without any specific limitations. When the processor runs a computer program stored in the memory, it can execute the aforementioned memory access method.

[0065] Corresponding to the memory access method in this application, this application embodiment also provides a computer storage medium storing a computer program, which is executed by a processor to perform the steps of the memory access method described above.

[0066] Specifically, the storage medium can be a general-purpose storage medium, such as a removable disk or hard disk, and when the computer program on the storage medium is run, it can execute the memory access method described above.

[0067] In the embodiments provided in this application, it should be understood that the disclosed systems and methods can be implemented in other ways. The system embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and there may be other division methods in actual implementation. Furthermore, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Additionally, the coupling or direct coupling or communication connection shown or discussed may be through some communication interface; the indirect coupling or communication connection between systems or units may be electrical, mechanical, or other forms.

[0068] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0069] In addition, the functional units in the embodiments provided in this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0070] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0071] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. In addition, the terms "first", "second", "third", etc. are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0072] Finally, it should be noted that the above-described embodiments are merely specific implementations of this application, used to illustrate the technical solutions of this application, and not to limit them. The protection scope of this application is not limited thereto. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features, within the scope of the technology disclosed in this application; and these modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application. All should be covered within the protection scope of this application. Therefore, the protection scope of this application should be determined by the protection scope of the claims.

Claims

1. A memory access system, characterized in that, include: Processor, conversion circuitry, and memory; The processor is used to respond to data processing operations and issue an access address according to the data structure corresponding to the data processing operation. The conversion circuit is used to receive the access address and determine whether the access address exceeds the end address of the current data structure according to the pre-configured address boundary parameters. If the access address is not exceeded, the access address will be sent to the memory as the target physical address. If the access address is exceeded, a remapping calculation is performed on the access address, and the calculated target physical address is sent to the memory; The memory is used to perform corresponding read and write operations based on the received target physical address.

2. The system according to claim 1, characterized in that, When the access address bit width is greater than the target physical address bit width, the processor is used to respond to a data processing operation that includes multiple data structures, generate an access address corresponding to the data structure of the current operation, and the access address includes a function indicator bit for distinguishing different data structures; The conversion circuit is used to configure multiple sets of address boundary parameters, each set of address boundary parameters including a start address and an end address, and corresponding to different function indicator bit values; and to select a corresponding set of address boundary parameters according to the function indicator bit in the access address, and to determine whether the access address exceeds the end address according to the selected address boundary parameters.

3. The system according to claim 2, characterized in that, When the access address exceeds the end address of the current data structure, The conversion circuit is used to subtract the end address of the selected address boundary parameter from the address bits other than the function indicator bit in the access address, and then add the start address of the selected address boundary parameter to obtain the target physical address.

4. The system according to claim 1, characterized in that, When the access address bit width is equal to the target physical address bit width, the processor is used to generate a continuous access address that does not contain a function indicator bit; The conversion circuit is used to configure address boundary parameters including a start address, an end address, and a remapping end address; wherein the remapping end address is greater than the end address; Determine whether the access address is greater than the end address and less than or equal to the remapping end address; if so, perform remapping calculation on the access address.

5. The system according to claim 4, characterized in that, The conversion circuit is used to subtract the end address from the access address and add the start address to obtain the target physical address.

6. The system according to claim 4, characterized in that, The conversion circuit is also used to configure the actual starting address; When the access address is located between the start address and the end address, subtract the start address from the access address and add the actual start address to obtain the target physical address; When the access address is greater than the end address and less than or equal to the remapping end address, the access address is subtracted from the end address and then added to the actual start address to obtain the target physical address.

7. The system according to claim 1, characterized in that, The conversion circuit includes: Address receiving unit, used to receive the access address sent by the processor; The parameter configuration unit is used to store pre-configured address boundary parameters; An address comparison unit is used to determine whether the access address exceeds the end address of the current data structure; The remapping calculation unit is used to perform remapping calculation on the access address to obtain the target physical address when the access address exceeds the end address; and to use the access address as the target physical address when it does not exceed the end address. A memory access unit is used to send the target physical address to the memory.

8. A method for accessing a memory, characterized in that, include: The processor responds to the data processing operation and issues an access address according to the data structure corresponding to the data processing operation. The conversion circuit receives the access address and determines whether the access address exceeds the end address of the current data structure based on the pre-configured address boundary parameters. If the access address is not exceeded, the conversion circuit sends the access address as the target physical address to the memory; If the value exceeds the limit, the conversion circuit performs a remapping calculation on the access address and sends the calculated target physical address to the memory. The memory performs corresponding read and write operations based on the received target physical address.

9. An electronic device, characterized in that, include: The device includes a processor, a memory, and a bus. The memory stores machine instructions that the processor executes. When the electronic device is running, the processor communicates with the memory via the bus. When the machine instructions are executed by the processor, they perform the steps of the memory access method as described in claim 8.

10. A computer storage medium, characterized in that, The computer storage medium stores a computer program that, when executed by a processor, performs the steps of the memory access method as described in claim 8.

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