A global autonomous intelligent agent bottom constraint homologous anchor management and control architecture

Abstract

The application discloses a global autonomous intelligent agent bottom layer constraint homologous anchoring management and control architecture and belongs to the technical field of artificial intelligence safety and hardware trusted computing core technology.The application takes a global mother root chip as a hardware trust root base, solidifies an intelligent agent constraint core benchmark hash value through a hardware level irreversible medium, realizes homologous irreversible binding of a constraint system and hardware firmware relying on hash consistency verification, is matched with offline self-sustaining operation, dual-mode safe updating, full-process traceability auditing, hierarchical abnormality disposal functions, is compatible with multiple algorithms and storage media, and has the advantages of strong attack resistance, full-scene adaptation and high compliance.The scheme can block intelligent agent constraint avoidance tampering paths, is compatible with existing equipment and future technology iteration, and is suitable for various autonomous intelligent agent bottom layer safety compliance management and control scenes.

Description

Technical Field

[0001] This invention relates to the fields of artificial intelligence security management, trusted hardware computing, and compliance governance of autonomous intelligent agents, specifically to a bottom-level constraint homogeneous anchoring management architecture for all-domain autonomous intelligent agents. Background Technology

[0002] With the large-scale deployment of general artificial intelligence and autonomous intelligent agent technology globally, the demand for intelligent agent behavior control, permission constraints, and security compliance in various scenarios such as intelligent terminals, cloud clusters, edge nodes, industrial equipment, vehicle systems, and smart homes continues to rise. AI regulatory policies in various countries around the world have put forward mandatory requirements for the underlying security control of intelligent agents. Current mainstream hardware root of trust technologies, such as traditional TPM, TCM trusted modules, and general-purpose chip secure boot mechanisms, only provide basic integrity protection for hardware firmware and system boot processes. They do not build dedicated hardware-level trust bindings for the underlying constraint system specific to autonomous intelligent agents, resulting in core technical defects such as separation of software and hardware benchmarks, susceptibility to tampering of constraint rules, insufficient targeted control, and limited security levels. Furthermore, existing related technologies generally suffer from insufficient offline operation capabilities, lack of full-process traceability and auditing, lack of tiered handling of verification anomalies, security vulnerabilities in rule updates, weak resistance to physical attacks, and insufficient algorithm security adaptability. These shortcomings make them unable to meet the security control requirements of the underlying constraints of intelligent agents in all scenarios and difficult to cope with the security challenges brought by subsequent technological iterations and quantum computing. Terminology Definition 1. Global root chip: refers to various dedicated and general-purpose chip carriers that integrate hardware-level trusted storage, irreversible benchmark solidification, consistency verification, operation control, anomaly interception, and source tracing audit functions, and have hardware-level security control capabilities independent of the terminal's native root of trust. It serves as the only hardware root of trust in the underlying constraint system of intelligent agents. 2. Core Benchmark of Intelligent Agent Underlying Constraints: The core data consisting of the intelligent agent constraint rule set, execution logic, and permission mapping table is the underlying basis for controlling the intelligent agent's permissions, computing power, and behavior; 3. Core baseline hash value: A unique feature hash value generated by the overall operation of the agent's constraint rule set, execution logic, and permission mapping table, serving as the core criterion for same-origin verification; 4. Homogeneous Anchoring: This refers to the unique and inseparable binding relationship between the core benchmark of the agent's underlying constraints and the hardware-fixed data of the global root chip. The matching judgment is completed through hash consistency verification, realizing the hardware-level irreversible binding of the software and hardware control logic. 5. Tiered anomaly interception: Three levels of handling rules are set for the verification results. Minor anomalies trigger operation alarm prompts, moderate anomalies execute intelligent agent operation permission restrictions, and serious tampering directly initiates forced shutdown interception; after the anomaly is handled, a compliant recovery process is supported. Only after the baseline verification is restored to consistency can the permission restrictions be lifted and normal operation be restored. The entire anomaly process is synchronously and immutably recorded in audit logs. Additional notes: The core benchmark hash value is generated using a 256-bit fixed-length feature operation. The hash operation process has unidirectional irreversibility and collision resistance characteristics; the hardware storage medium solidification process is a one-time write solidification, and it cannot be reversed, erased, or overwritten after writing; the audit log has the characteristic of being tamper-proof, and the log data can only be added and appended, and modification and deletion are not supported. Summary of the Invention

[0003] This invention addresses the technical pain points of existing intelligent agent underlying constraint control technologies, such as separation of software and hardware benchmarks, low security protection levels, poor offline adaptability, imperfect anomaly handling, weak anti-attack capabilities, and insufficient iterative compatibility. It provides a globally autonomous intelligent agent underlying constraint homogeneous anchoring control architecture. This solution uses a hardware-level trusted chip as the sole foundation of trust, and through irreversible benchmark solidification, closed-loop homogeneous verification, dual-mode security updates, full-process traceability auditing, and hierarchical anomaly handling, it achieves globally unified, hardware-level secure control of intelligent agent underlying constraints, blocking various evasion and tampering paths. The technical solution of this invention is as follows: A unified control architecture for bottom-level constraints of fully autonomous intelligent agents is proposed. It uses a global root chip as the hardware trust foundation. The core benchmark hash value of the bottom-level constraints of the intelligent agent is solidified in the hardware-level irreversible storage medium of the global root chip. By verifying the consistency between the core benchmark of the constraint system to be loaded and the pre-stored hardware benchmark, the bottom-level constraint system of the intelligent agent and the bottom-level firmware of the global root chip are anchored and bound together. Only when the verification is passed can the constraint system be loaded and run. If the verification fails, hierarchical anomaly interception is directly initiated and the full-process audit log is retained, thus completing the unified control of the bottom-level constraints of the fully autonomous intelligent agent. Furthermore, the same-source anchoring verification adopts the SM3 national cryptographic hash algorithm, SHA256, SHA512 internationally used hash algorithm, or quantum-resistant hash algorithm, with the SM3 national cryptographic algorithm being preferred for high-security scenarios; the hardware-level irreversible storage medium includes any one of the following: BootROM read-only memory area, eFUSE fuse, OTP one-time programmable memory unit, and PUF physically unclonable function module, with the eFUSE / OTP+PUF combined medium being preferred for high-security scenarios; Additional notes: eFUSE fuses, OTP one-time programmable storage units, and PUF physically unclonable functions all possess hardware-level irreversible storage characteristics. Once the reference data inside the medium is solidified, it can only be read and cannot be modified; the internal verification link of the architecture is an independent closed loop, which does not rely on the external network environment to complete the reference comparison calculation. Furthermore, the carrier of the architecture includes any one or more combinations of hardware security chips, embedded firmware, computer software programs, cloud management and control services, locally deployed independent modules, distributed computing power clusters, edge computing nodes, and smart terminal integrated modules; Furthermore, the architecture supports any one of the following implementation methods: local pre-programming, cloud-based remote encrypted distribution, offline local secure input, secondary development integration, terminal firmware iterative upgrade, and modular plug-and-play deployment. Furthermore, the internal hierarchy of the architecture, the way functional modules are split, the content of constraint rules and the iterative update strategy can be flexibly adjusted according to the actual application scenario, while the core same-source anchoring logic of the architecture and the hardware trust foundation remain unchanged. Furthermore, the architecture possesses native offline self-sustaining operation capabilities. Without external networks or third-party platform dependencies, it can independently complete the entire process of constraint verification, loading, and control. It supports dual modes of online cloud encrypted updates and offline local secure updates. During the update process, data is transmitted through a dedicated hardware encrypted channel, and two-factor authentication ensures update security. After switching and updating, the same-origin verification process is automatically restarted without breaking the core anchoring logic. Furthermore, the architecture has an external specification adaptation link, which can connect with AI regulatory technical requirements, industry security standards, and third-party compliance constraints in various countries around the world. The adapted derivative rules must not deviate from the core logic of the same source, and must not modify the hardware underlying fixed benchmark data. Furthermore, the architecture incorporates a unified end-to-end traceability and auditing link, which records, verifies, audits, and handles hierarchical anomalies throughout the entire process of intelligent agent permission scheduling, computing resource allocation, running status changes, constraint rule loading, verification anomaly handling, and rule update operations. The hierarchical anomaly handling is divided into three levels of handling rules based on the anomaly level: minor anomaly alarm prompts, moderate anomaly permission restrictions, and severe tampering forced shutdown. Furthermore, the architecture is compatible with various existing computing power carriers, smart terminals, general artificial intelligence systems, and embedded operating environments. Subsequent additions of smart hardware, AI systems, computing power nodes, and technology iteration solutions will all use the same core anchoring and control logic. Furthermore, any technical solution that achieves the core control logic of the intelligent agent's underlying constraint system and hardware firmware through equivalent substitution, derivative improvement, indirect adaptation, local parameter adjustment, or module reorganization falls entirely within the scope of protection of this patent. Furthermore, the global root chip includes any one of the following: a dedicated hardware security chip, a general-purpose main control chip with integrated security and trust functions, an automotive intelligent chip, an industrial control chip, a high-security-level terminal chip, an IoT intelligent chip, a smart wearable device main control chip, a smart home main control chip, and an industrial control edge terminal chip.

[0004] Beneficial effects 1. It pioneered a mechanism for anchoring the underlying constraints of intelligent agents and the root of trust in hardware, realizing an irreversible hardware-level binding of the three-in-one core benchmark. This completely solves the core problems of easy tampering of constraint rules and separation of software and hardware benchmarks in traditional solutions, and improves the security protection level to the chip level. 2. It is compatible with multiple encryption algorithms and irreversible storage media, taking into account the requirements of national cryptographic compliance, international universality and quantum security, while also having good resistance to physical attacks and adapting to all levels of security application scenarios; 3. It has native offline self-sustaining operation capability, and is equipped with a dual-mode security update mechanism. It blocks update vulnerabilities through hardware encryption and identity authentication, and achieves full closed-loop management in online and offline scenarios without any blind spots in management; 4. Construct a full-process traceability and auditing and hierarchical anomaly handling system, so that all operations are traceable, auditable, and anomalies can be handled in a closed loop, which fully complies with global AI regulatory compliance requirements and improves the practicality of the solution; 5. Fully compatible with existing equipment and subsequent technology iterations, with stable core logic, broad protection coverage, and adaptable to intelligent agent security management applications in multiple fields. Attached Figure Description

[0005] Figure 1 This is a schematic diagram of the core logic of the global control architecture of this invention; Figure 2 This is a schematic diagram of the same-source anchoring verification and hierarchical anomaly handling process of the present invention; Figure 3 This is a schematic diagram illustrating the full-process control of the global deployment and traceability audit of this invention. Detailed Implementation

[0006] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The embodiments described are only for explaining the present invention and are not intended to limit the scope of protection of the present invention. Example 1: Homologous Anchoring Control of High-Security Dedicated Chips Employing a dedicated global root security chip, and using an eFUSE fuse + PUF combination as the irreversible storage medium, the system firmly embeds a 256-bit SM3 national cryptographic core baseline hash value. After the constraint system is uploaded, the system automatically extracts the core baseline hash value for consistency verification. Anomalies are handled according to a three-level rule, and audit logs are retained throughout the process. This architecture is suitable for high-security scenarios such as finance, government affairs, and industrial control. It supports offline independent operation and exhibits excellent resistance to physical attacks and tampering. Logs are stored immutably throughout the process, and anomaly recovery verification procedures are supported. Example 2: Homologous Anchoring Control of Vehicle-Mounted Intelligent Terminals It adopts an in-vehicle intelligent main control chip, equipped with OTP one-time programmable storage medium, and uses the SHA256 hash algorithm to complete the same source verification; the architecture is deployed in the form of embedded firmware, supporting dual modes of cloud-based remote encrypted updates and offline local secure input, and ensuring update security through a hardware encryption channel. It is compatible with vehicle-road cooperative devices and in-vehicle intelligent agents for full-scenario management, and adapts to the compliance and security management requirements of the automotive industry; the encrypted update link is implemented based on the native hardware channel, without external software relay dependencies; Example 3: IoT Global Intelligent Agent Homogeneous Anchoring Control It adopts a general-purpose smart chip for the Internet of Things (IoT), uses a BootROM read-only memory area to solidify the core benchmark, and is compatible with quantum-resistant hash algorithms. The architecture is deployed in a lightweight module form, without relying on third-party platforms, and can independently complete management and control in offline mode. The constraint rules can be flexibly adjusted, and it is compatible with various IoT terminals and smart wearable devices. Subsequent product iterations do not require changes to the core logic, realizing long-term management and control of the entire intelligent agent. It is compatible with multiple types of lightweight deployments, and the verification logic runs completely and independently in offline mode.

Claims

1. A global autonomous agent infrastructure constraint homogenous anchoring management architecture, characterized in that, Using the global root chip as the hardware trust foundation, the core benchmark hash value of the intelligent agent's underlying constraints is solidified in the hardware-level irreversible storage medium of the global root chip. Through consistency verification between the core benchmark of the constraint system to be loaded and the pre-stored hardware benchmark, the underlying constraint system of the intelligent agent and the underlying firmware of the global root chip are anchored and bound together. Only when the verification passes can the constraint system be loaded and run. If the verification fails, hierarchical anomaly interception is directly initiated and the full-process audit log is retained, thus completing the unified management and control of the underlying constraints of the global autonomous intelligent agent.

2. The global governance framework of claim 1, wherein, The same-source anchoring verification adopts the SM3 national cryptographic hash algorithm, SHA256, SHA512 internationally used hash algorithm or quantum-resistant hash algorithm. In high-security scenarios, the SM3 national cryptographic algorithm is preferred. The hardware-level irreversible storage medium includes any one of the following: BootROM read-only memory area, eFUSE fuse, OTP one-time programmable memory unit, and PUF physically unclonable function module. In high-security scenarios, the eFUSE / OTP+PUF combined medium is preferred.

3. The global governance framework of claim 1, wherein, The carrier of the architecture includes any one or more combinations of hardware security chips, embedded firmware, computer software programs, cloud management and control services, locally deployed independent modules, distributed computing power clusters, edge computing nodes, and smart terminal integrated modules.

4. The global governance framework of claim 1, wherein, The architecture supports any of the following implementation methods: local pre-programming, cloud-based remote encrypted distribution, offline local secure input, secondary development integration, terminal firmware iterative upgrades, and modular plug-and-play deployment.

5. The global governance framework of claim 1, wherein, The internal hierarchy of the architecture, the way functional modules are split, the content of constraint rules and the iterative update strategy can be flexibly adjusted according to the actual application scenario, while the core same-source anchoring logic of the architecture and the hardware trust foundation remain unchanged.

6. The global governance framework of claim 1, wherein, The architecture has native offline self-sustaining operation capability. Without external network or third-party platform dependence, it can independently complete the entire process of constraint verification, loading, and control. It supports dual modes of online cloud encrypted update and offline local secure update. The update process transmits data through a dedicated hardware encrypted channel, and is equipped with two-factor authentication to ensure update security. After switching and updating, the same source verification process is automatically restarted without breaking the core anchoring logic.

7. The global governance framework of claim 1, wherein, The architecture has an external specification adaptation link, which can connect with AI regulatory technical requirements, industry security standards, and third-party compliance constraints in various countries around the world. Adapted derivative rules must not deviate from the core logic of the same source, and must not modify the underlying hardware fixed benchmark data.

8. The global control architecture according to claim 1, characterized in that, The architecture incorporates a unified traceability and auditing link throughout the entire process, enabling full-process recording, real-time verification, closed-loop auditing, and tiered anomaly handling for intelligent agent permission scheduling, computing resource call, operational status changes, constraint rule loading, verification anomaly handling, and rule update operations. The tiered anomaly handling is divided into three levels of rules based on the anomaly level: minor anomaly alarm prompts, moderate anomaly permission restrictions, and severe tampering forced shutdown.

9. The global governance framework of claim 1, wherein, The architecture is compatible with various existing computing power carriers, smart terminals, general artificial intelligence systems, and embedded operating environments. Subsequent additions of smart hardware, AI systems, computing power nodes, and technology iteration solutions will all use the same core anchoring and control logic.

10. The global governance framework of claim 1, wherein, All technical solutions that achieve the core control logic of the intelligent agent's underlying constraint system and hardware firmware through equivalent substitution, derivative improvement, indirect adaptation, local parameter adjustment, and module reorganization fall entirely within the scope of protection of this patent.

11. The global governance framework of claim 1, wherein, The global root chip includes any one of the following: dedicated hardware security chip, general-purpose main control chip with integrated security and trust functions, vehicle-mounted smart chip, industrial control chip, high-security terminal chip, Internet of Things smart chip, smart wearable device main control chip, smart home main control chip, and industrial control edge terminal chip.

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