Sha3 data processing apparatus and method based on protection mode switching

Abstract

This invention discloses a SHA3 data processing apparatus and method based on protection mode switching. The apparatus includes: a control module for controlling the protection mode and iteration rounds; an XOR module for performing XOR operations simultaneously on slices of the two masks of the state data in the protected mode and on slices of the first and last half bits of the state data in the unprotected mode, in each cycle of the current round, to obtain XOR data; a shift module for shifting the XOR data to obtain intermediate data; a multiplication module for performing protected Boolean multiplication on slices of the two masks of the intermediate data in the protected mode and on slices of the first and last half bits of the intermediate data directly in the unprotected mode, to obtain multiple registered values; and a round constant module for performing round constant addition on the multiple registered values ​​to obtain the updated data for each cycle. This invention supports two protection modes.

Description

Technical Field

[0001] This invention relates to the fields of circuit structure design and computer data processing technology, and in particular to a SHA3 data processing device and method based on protection mode switching. Background Technology

[0002] This section is intended to provide background or context for the embodiments of the invention set forth in the claims. The description herein is not an admission that it is prior art simply because it is included in this section.

[0003] The integrity of the data encryption process and the resilience of hardware systems against attacks are crucial for ensuring privacy and protecting sensitive information. Encryption algorithms typically implemented on hardware devices are particularly vulnerable to side-channel attacks—attacks that do not directly break the encryption protocol but instead exploit physical properties such as time, power consumption, and electromagnetic radiation to discover secret data. Chip-based side-channel attacks are a major subset of these attacks, targeting specific physical leaks in microprocessors, smart cards, and other hardware to infer sensitive information such as encryption keys or user data.

[0004] To defend against these threats, masking has become a crucial countermeasure. By obfuscating or "masking" sensitive data with random values ​​during encrypted computation, masking reduces the correlation between leaked physical signals and secret data, making side-channel attacks more challenging. This protection mechanism is particularly important in the hardware implementation of encryption algorithms.

[0005] Encryption algorithms are methods used to transform data into an unreadable format, allowing only authorized parties to access the original information. There are various types of encryption algorithms, generally categorized as symmetric and asymmetric encryption. However, some encryption algorithms, such as the Secure Hash Algorithm 3 (SHA3), are used as part of a security system to provide data integrity, verification, and other cryptographic guarantees. SHA3 utilizes a unique sponge structure, and its versatility makes it widely used in applications such as digital signatures, data integrity checks, and other encryption protocols.

[0006] Existing SHA3 masking methods during data processing mainly fall into two categories: threshold-based (TI) methods and domain-based (DOM) methods. TI-based methods do not require fresh random numbers but require at least three shared values, resulting in a large area; while DOM-based methods only require two shared values, resulting in a smaller area, but require more cycles and consume more random numbers.

[0007] Existing SHA3 mask circuit designs for data processing mainly fall into two categories: parallel implementation and serial implementation. Parallel implementation requires only 24 cycles per operation, but has a large area, about three times that of serial implementation; serial implementation has a small area, but requires a large number of cycles per operation.

[0008] However, the SHA3 masking circuits mentioned above significantly increase the circuit area, and not all applications of SHA3 masking circuits require protection. For example, when the data being processed is public and attackers can already use it (e.g., a public key), masking protection is unnecessary; or if there is a reliable monitoring system that can determine whether the circuit is susceptible to side-channel attacks, and if not, unprotected encryption can be used.

[0009] Most current SHA3 data processing mask protection designs do not support unprotected operations, or consume multiple times the area and power consumption of unprotected designs while providing the same speed during periods when no protection is required. Summary of the Invention

[0010] This invention provides a SHA3 data processing device based on protection mode switching, which supports SHA3 data processing in both unprotected and protected modes. The device features a small circuit area, low power consumption, avoids two types of side-channel leakage, and has high throughput. The device includes:

[0011] The control module is used to control the protection mode and iteration rounds; determine the state data of the current round based on the updated data output from the previous round; after all rounds are completed, use the updated data output by the round constant module as the output summary; the protection mode includes a protected mode and a non-protected mode.

[0012] The XOR module is used to perform XOR operations on a slice of the first mask and a slice of the second mask of the state data simultaneously in each cycle of the current round, in protected mode, and in unprotected mode, to perform XOR operations on a slice of the first half bit and a slice of the second half bit of the state data simultaneously to obtain the XOR data.

[0013] The shift module is used to perform corresponding shift operations on the XOR data in each cycle of the current round, according to the protection mode, to obtain intermediate data;

[0014] The multiplication module is used to perform protected Boolean multiplication on a slice of the first mask and a slice of the second mask of the intermediate data in each cycle of the current round in protected mode, and to directly perform Boolean multiplication on a slice of the first half bit and a slice of the second half bit of the intermediate data in unprotected mode to obtain multiple register values.

[0015] The wheel constant module is used to perform wheel constant addition calculations on multiple register values ​​in each cycle of the current wheel, based on the protection mode, to obtain the updated data for each cycle.

[0016] This invention also provides a SHA3 data processing method based on protection mode switching, which supports SHA3 data processing in both unprotected and protected modes. The method features a small circuit area, low power consumption, avoids two types of side-channel leakage, and achieves high throughput. The method includes:

[0017] In each cycle of the current round, in protected mode, a slice of the first mask and a slice of the second mask of the state data are XORed simultaneously. In unprotected mode, a slice of the first half of the state data and a slice of the second half of the state data are XORed simultaneously to obtain the XOR data. The state data of the current round is determined based on the updated data output from the previous round.

[0018] In each cycle of the current round, according to the protection mode, the XOR data is shifted accordingly to obtain intermediate data;

[0019] In each cycle of the current round, in protected mode, a protected Boolean multiplication operation is performed on a slice of the first mask and a slice of the second mask of the intermediate data. In unprotected mode, a Boolean multiplication operation is directly performed on a slice of the first half of the bits and a slice of the second half of the bits of the intermediate data to obtain multiple register values.

[0020] In each cycle of the current round, based on the protection mode, multiple registered values ​​are calculated using the corresponding round constant addition to obtain the updated data for each cycle;

[0021] After all rounds are completed, the updated data output by the round constant module is used as the output summary. The protection mode includes a protected mode and an unprotected mode.

[0022] This invention also provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the above-described SHA3 data processing method based on protection mode switching.

[0023] This invention also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described SHA3 data processing method based on protection mode switching.

[0024] This invention also provides a computer program product, which includes a computer program that, when executed by a processor, implements the above-described SHA3 data processing method based on protection mode switching.

[0025] In this embodiment of the invention, in the protected mode, the state data is the state mask, which includes two masks. This is equivalent to using the theoretically minimum number of shared values, i.e., two shared values, which reduces the circuit area and power consumption of the SHA3 data processing device based on the protected mode switching. Boolean multiplication is performed on the intermediate mask, followed by round constant addition. This S-box circuit structure can avoid two types of side channel leakage. In the unprotected mode, two slices can be processed simultaneously in one cycle, achieving double the throughput. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. In the drawings:

[0027] Figure 1 This is a schematic diagram of a SHA3 data processing device based on protection mode switching in an embodiment of the present invention;

[0028] Figure 2 This is a description of the variables in the embodiments of the present invention;

[0029] Figure 3 This is a flowchart of the SHA3 data processing method based on protection mode switching in an embodiment of the present invention;

[0030] Figure 4 This is another flowchart of the SHA3 data processing method based on protection mode switching in this embodiment of the invention;

[0031] Figure 5 This is a schematic diagram of a computer device in an embodiment of the present invention. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings. Here, the illustrative embodiments of the present invention and their descriptions are used to explain the present invention, but are not intended to limit the present invention.

[0033] The inventors discovered that if the increased area caused by mask protection design can be utilized in the circuit design to more efficiently support unprotected encryption modes, the utilization rate of the circuit can be greatly improved.

[0034] Current serial implementations use a threshold-based approach, requiring 1625 clock cycles, three shared values, and have an area three times larger than unprotected serial implementations. They also do not guarantee output uniformity and can only support protected modes.

[0035] Figure 1 This is a schematic diagram of a SHA3 data processing device based on protection mode switching in an embodiment of the present invention. The device includes:

[0036] The control module is used to control the protection mode and iteration rounds; determine the state data of the current round based on the updated data output from the previous round; after all rounds are completed, use the updated data output by the round constant module as the output summary; the protection mode includes a protected mode and a non-protected mode.

[0037] The XOR module is used to perform XOR operations on a slice of the first mask and a slice of the second mask of the state data simultaneously in each cycle of the current round, in protected mode, and in unprotected mode, to perform XOR operations on a slice of the first half bit and a slice of the second half bit of the state data simultaneously to obtain the XOR data.

[0038] The shift module is used to perform corresponding shift operations on the XOR data in each cycle of the current round, according to the protection mode, to obtain intermediate data;

[0039] The multiplication module is used to perform protected Boolean multiplication on a slice of the first mask and a slice of the second mask of the intermediate data in each cycle of the current round in protected mode, and to directly perform Boolean multiplication on a slice of the first half bit and a slice of the second half bit of the intermediate data in unprotected mode to obtain multiple register values.

[0040] The wheel constant module is used to perform wheel constant addition calculations on multiple register values ​​in each cycle of the current wheel, based on the protection mode, to obtain the updated data for each cycle.

[0041] In this embodiment of the invention, in the protected mode, the state data is the state mask, which includes two masks. This is equivalent to using the theoretically minimum number of shared values, i.e., two shared values, which reduces the circuit area and power consumption of the SHA3 data processing device based on the protected mode switching. Boolean multiplication is performed on the intermediate mask, followed by round constant addition. This S-box circuit structure can avoid two types of side channel leakage. In the unprotected mode, two slices can be processed simultaneously in one cycle, achieving double the throughput.

[0042] In this embodiment of the invention, the mask is used for protection. Therefore, the concept of a mask exists in the protected mode, but not in the unprotected mode.

[0043] Figure 2 For the purpose of explaining variables in the embodiments of the present invention, for example, Figure 2 The document provides a structural description of the variables, including the message mask, state mask, and intermediate mask, under protected mode. In this embodiment of the invention, under protected mode, the message mask corresponding to the data to be processed... These are two actually uniformly shared values ​​of the input in unprotected mode, which can be represented as two masks. satisfy In protected mode, the memory modules and arithmetic units (including XOR modules, shift modules, multiplication modules, and round constant modules) are approximately twice the size of those in unprotected mode.

[0044] In protected mode, the state data is a state mask; in unprotected mode, the state data is the state value. In protected mode, intermediate data is an intermediate mask; in unprotected mode, intermediate data is an intermediate value. In protected mode, update data is an update mask; in unprotected mode, update data is an update value.

[0045] In protected mode, the first mask in the state mask Second mask Each mask is 1600 bits, so the state mask... The status value is 3200 bits. In unprotected mode, the status value is 1600 bits.

[0046] In the unprotected mode, the circuit corresponding to the device has the following two design considerations:

[0047] (1) Within one cycle, one slice of the first 800 bits and one slice of the last 800 bits of the state value can be processed simultaneously, thereby achieving double the throughput.

[0048] (2) When performing multiple consecutive encryptions, the output of the round constant module is stored in the first half of the memory module, and the intermediate mask output by the shift module is stored in the second half of the memory module, thereby further reducing the operation cycle.

[0049] In the protected mode, the key to ensuring safety and reducing area lies in the protection design of nonlinear operations (S-box). The S-box design has the following four key points:

[0050] (1) When calculating the nonlinear operation of x=3~4 in each row, the intermediate mask of the next row x=3~4 is used as the intermediate variable of the S-box for random number protection, and fresh random number protection is used when calculating x=3~4 in the last row, which solves part of the leakage problem and the problem of output uniformity.

[0051] (2) The specific circuit design of the nonlinear layer of the S-box, as shown in the following formula, distributes the inverters in the two multiplications, which solves part of the leakage problem.

[0052] (3) Register clearing design: When not in use, the registers in the multiplication module need to be cleared in time to solve the leakage problem;

[0053] (4) Register reuse design: the registers of the register module are reused during multiplication, thus significantly saving the area of ​​the register module.

[0054] In one embodiment, the XOR module is specifically used for:

[0055] In protected mode, in each cycle of the current round, a slice of the first mask of the state mask is XORed with Theta to obtain the slice of the first mask in the XOR data; at the same time, a slice of the second mask of the state mask is XORed with Theta to obtain the slice of the second mask in the XOR data.

[0056] In the unprotected mode, in each cycle of the current round, a slice of the first half of the state value is XORed to obtain the slice corresponding to the XOR data; at the same time, a slice of the second half of the state value is XORed to obtain the slice corresponding to the XOR data.

[0057] In one embodiment, the shift module is specifically used for:

[0058] In protected mode, in each cycle of the current round, the first mask of the XOR data is subjected to a Rho shift operation to obtain the first mask of the Rho-shifted data, and the second mask of the XOR data is subjected to a Rho shift operation to obtain the second mask of the Rho-shifted data; then, the first mask of the Rho-shifted data is subjected to a Pi shift operation to obtain the first mask of the intermediate mask, and the second mask of the Rho-shifted data is subjected to a Pi shift operation to obtain the second mask of the intermediate mask;

[0059] In unprotected mode, the XOR data is subjected to a Rho shift operation to obtain Rho shifted data. Then, the Rho shifted data is subjected to a Pi shift operation to obtain an intermediate value.

[0060] In one embodiment, the multiplication module is specifically used for:

[0061] In protected mode, in each cycle of the current round, based on a slice of the first mask and a slice of the second mask of the intermediate mask, a multiplication operation is performed on each coordinate in the SHA3 state space dimension to obtain four products. The SHA3 state space dimension includes x-dimensional, y-dimensional and z-dimensional. Based on the four products and fresh random numbers, the first register value, second register value, third register value and fourth register value of different coordinates are calculated.

[0062] In unprotected mode, in each cycle of the current round, the fifth register value is obtained based on a slice of the first half of the bits in the middle value; the sixth register value is obtained based on a slice of the second half of the bits in the middle value.

[0063] In one embodiment, the multiplication module is specifically used for:

[0064] In protected mode, in each cycle of the current round, for each coordinate in the SHA3 state space dimension, the first product is calculated based on a slice of the first mask of the intermediate mask;

[0065] Calculate the second product and the third product based on a slice of the first mask and a slice of the second mask of the intermediate mask;

[0066] Calculate the fourth product based on a slice of the second mask of the intermediate mask.

[0067] In one embodiment, the multiplication module is specifically used for:

[0068] In protected mode, in each cycle of the current round, the first registered value is calculated based on the first product; the fourth registered value is calculated based on the fourth product.

[0069] For coordinates in the SHA3 state space where x is 0, 1, or 2, calculate the second register value based on the second product and a slice of the first mask of the intermediate mask; calculate the third register value based on the third product and a slice of the second mask of the intermediate mask.

[0070] For coordinates in the SHA3 state space where x-dimensional values ​​are 3 or 4 and z-dimensional values ​​are not equal to 63, the second register value is calculated based on the second product and a slice of the first mask of the intermediate mask; the third register value is calculated based on the third product, a slice of the first mask of the intermediate mask, and a slice of the second mask.

[0071] For coordinates in the SHA3 state space with x dimensions of 3 and 4 and z dimension of 63, calculate the second register value based on the second product and two fresh random numbers; calculate the third register value based on the third product, a fresh random number, and a slice of the second mask of the intermediate mask.

[0072] In one embodiment, the wheel constant module is specifically used for:

[0073] In protected mode, in each cycle of the current round, the first register value is XORed with the second register value and added to the round constant to obtain a slice of the first mask of the update mask for each cycle of the current round; the third register value is XORed with the fourth register value to obtain a slice of the second mask of the update mask for each cycle of the current round; the update mask is stored in the register module.

[0074] In unprotected mode, in each cycle of the current round, the fifth register value is added to the round constant to obtain a slice of the first half of the updated value of each cycle of the current round; the sixth register value is added to the round constant to obtain a slice of the second half of the updated value of each cycle of the current round.

[0075] In one embodiment, the device further includes a memory module;

[0076] The shift module is specifically used to: store the intermediate mask into the register module in protected mode; and store the intermediate value into the first half of the register module's storage unit in unprotected mode.

[0077] The multiplication module is specifically used for: in protected mode, storing the first and second registered values ​​into the register module; storing the second and third registered values ​​into the register of the multiplication module; and in unprotected mode, storing the fifth and sixth registered values ​​into the register of the multiplication module.

[0078] The round constant module is specifically used to store the updated value into the second half of the register module's storage unit in unprotected mode.

[0079] In one embodiment, the control module is specifically used for:

[0080] The received protection mode switching command is sent to the XOR module, shift module, multiplication module and round constant module;

[0081] After the last cycle of the current cycle in the cycle constant module is completed, the next cycle begins;

[0082] In protected mode, in the first round, the message mask corresponding to the data to be processed is used as the state mask. In rounds other than the first round, the state mask is obtained based on the update mask output in the previous round.

[0083] In unprotected mode, in the first round, the message corresponding to the data to be processed is used as the status value. In subsequent rounds, the status value is obtained based on the updated value output from the previous round.

[0084] Based on the above embodiments, two protection modes are described below.

[0085] I. Protection Mode

[0086] During the operation, only the shift module performs the operation on all XOR data. The multiplication module and the round constant module each perform the operation on only one slice (equivalent to using 3200 bits to represent the original 1600 bits). Therefore, a slice also contains two masks (using 50 bits to represent the original 25 bits). It can also be understood as taking one slice from each of the two masks (taking 25 bits from each of the two masks), which is 50 bits. Due to the special nature of its operation, the XOR module needs to perform a partial XOR operation on the first slice while calculating the last slice in each round.

[0087] In each cycle of the current round, the XOR module performs a Theta XOR operation on a slice of the first mask of the state mask to obtain the slice corresponding to the first mask in the XOR data. Taking the nth round as an example, the formula is as follows:

[0088]

[0089] Where [x, y, z] are the coordinates of the x, y, and z dimensions of the SHA3 state space; where y′ indicates that the range is from 0 to 4, and y is a value between 0 and 4, with different values.

[0090] Simultaneously, a Theta XOR operation is performed on a slice of the second mask of the state mask to obtain the slice corresponding to the second mask in the XOR data. Taking the nth round as an example, the formula is as follows:

[0091]

[0092] The XOR module calculates only one slice per cycle, meaning that z takes only one value in the same cycle, while x and y take values ​​from 0 to 4, which is 25 bits. Therefore, the first and second masks of the state mask together are 50 bits.

[0093] The XOR operation requires the data from the previous cycle (z-1), so a register module is needed to store the XOR data from the previous cycle for the operation in the current cycle. For the first slice, the XOR data from the last slice is needed; therefore, the result of the first slice cannot be calculated in the first cycle. The first slice needs to be retrieved and processed together while calculating the last slice.

[0094] In the current round, the shift module performs SHA3 Rho shift and Pi shift operations on all XOR data after the XOR operation, including the output of the XOR module after calculating the last slice and other slices in the register module that have already undergone XOR operations.

[0095] The formula for obtaining the first mask of the XOR data by performing a Rho shift operation on the first mask is as follows:

[0096] Where OFFSET is the Rho shift constant in SHA3;

[0097] Perform a Rho shift operation on the second mask of the XOR data to obtain the second mask of the Rho-shifted data; the operation formula is as follows:

[0098]

[0099] Perform a Pi shift operation on the first mask of the Rho-shifted data to obtain the first mask of the intermediate mask; the operation formula is as follows:

[0100]

[0101] Performing a Pi shift operation on the second mask of the Rho-shifted data, the formula for the second mask of the intermediate mask is as follows:

[0102]

[0103] In the shift module, all XOR data after the XOR operation needs to be shifted. Therefore, in one cycle, x and y are taken from 0 to 4, and z is taken from 0 to 64, for a total of 1600 bits. That is, the first and second masks of the XOR data together are 3200 bits.

[0104] The multiplication module performs SHA3 Chi multiplication on the intermediate mask, and uses fresh random numbers to protect the multiplication process to prevent side channel leakage, so that the final updated mask satisfies uniformity.

[0105] In each cycle, the multiplication module multiplies slices of the intermediate mask. For a fixed value of z (i.e., taking a 25-bit slice, but in protection mode it's divided into two masks, so a slice also contains two masks, or you can understand it as taking one slice from each of the two masks, which is 50 bits), for each coordinate in x = 0~4 and y = 0~4, the first, second, third, and fourth products are obtained respectively. The following calculates a slice of the first mask and a slice of the second mask for the intermediate mask respectively:

[0106] The formula for the first product operation is as follows:

[0107]

[0108] The formula for the second product operation is as follows:

[0109]

[0110] The formula for the third product operation is as follows:

[0111]

[0112] The formula for calculating the fourth product is as follows:

[0113]

[0114] Then, the first, second, third, and fourth register values ​​are calculated in different ways for different coordinates.

[0115] For x = 0 to 2 and y = 0 to 4, the register values ​​are:

[0116] First registered value:

[0117] Second registered value:

[0118] Third registered value:

[0119] Fourth Registered Value:

[0120] For x = 3 to 4, y = 0 to 4 and The formula remains unchanged, while and for:

[0121]

[0122] Where, when y = 4 and z ≠ 63, that is... and This corresponds to the value of the first intermediate mask of the first row of the next slice, which is... and When y = 4 and z = 63 and A fresh two-bit random number r n Therefore, only two fresh random numbers are needed per round.

[0123] Then, all the registered values ​​are stored in registers, totaling 25 × 4 = 100 registers, of which and Store it in the corresponding register location in the register module. and The data is stored in the registers within the multiplication module, thereby enabling register reuse and saving space.

[0124] The wheel constant module is specifically used for:

[0125] In each cycle of the current round, the first registered value is XORed with the second registered value and added to the round constant to obtain the first mask of the update mask for each cycle of the current round, as shown in the following formula:

[0126]

[0127] Where RC is the wheel constant in SHA3, z takes a fixed value, x = 0 to 4, y = 0 to 4.

[0128] XORing the third register value with the fourth register value yields the second mask of the update mask for each cycle in the current round, as shown in the following formula:

[0129]

[0130] Finally, after the last cycle of the current cycle in the wheel constant module is completed, the control module proceeds to the next cycle. After all cycles are completed, the update mask output by the wheel constant module is used as the output digest.

[0131] II. Unprotected Mode

[0132] The principle of unprotected mode is to change the operation of the first and second masks in all modules to the operation of a slice of the first 800 bits and a slice of the last 800 bits in the 1600-bit input at the same time, halving the number of cycles, thereby realizing a double-speed unprotected mode circuit.

[0133] In each cycle of the current round, the XOR module takes a slice of the first half of the state value (i.e., the first 800 bits) and performs an XOR operation to obtain the slice corresponding to the XOR data; at the same time, it takes a slice of the second half of the state value (i.e., the last 800 bits) and performs an XOR operation to obtain the slice corresponding to the XOR data.

[0134] The shift module performs a Rho shift operation on the XOR data (1600 bits) to obtain Rho shifted data. Then, it performs a Pi shift operation on the Rho shifted data (1600 bits) to obtain an intermediate value (1600 bits).

[0135] In this process, the multiplication module, in each cycle of the current round, calculates a slice (the first 800 bits) based on the first half of the bits in the intermediate value. Obtain the fifth register value; based on a slice of the last half bit (last 800 bits) of the intermediate value. Obtain the sixth register value.

[0136] The formula for calculating the fifth register value is as follows:

[0137]

[0138] The formula for calculating the sixth register value is as follows:

[0139]

[0140] In each cycle of the current cycle, the round constant module adds the fifth register value (the first 25 bits of the multiplication module's register output) to the round constant to obtain a slice of the first half of the updated value for each cycle of the current cycle, as shown in the following formula:

[0141]

[0142] Add the sixth register value (the last 25 bits of the multiplication module's register output) to the round constant to obtain a slice of the last half bits of the update value for each cycle of the current round, as shown in the following formula:

[0143]

[0144] During storage, the shift module stores the intermediate value into the first half of the register module's storage unit; the round constant module stores the updated value into the second half of the register module's storage unit, thereby further reducing the computation cycle.

[0145] This invention also proposes a SHA3 data processing method based on protection mode switching, the principle of which is similar to that of the SHA3 data processing device based on protection mode switching, and will not be described in detail here.

[0146] Figure 3 The flowchart of the SHA3 data processing method based on protection mode switching in this embodiment of the invention includes:

[0147] Step 301: In each cycle of the current round, in the protected mode, a slice of the first mask and a slice of the second mask of the state data are XORed simultaneously; in the unprotected mode, a slice of the first half of the bits and a slice of the second half of the bits of the state data are XORed simultaneously to obtain the XOR data; wherein, the state data of the current round is determined based on the updated data output from the previous round.

[0148] Step 302: In each cycle of the current round, according to the protection mode, perform the corresponding shift operation on the XOR data to obtain intermediate data;

[0149] Step 303: In each cycle of the current round, in protected mode, a protected Boolean multiplication operation is performed on a slice of the first mask and a slice of the second mask of the intermediate data. In unprotected mode, a Boolean multiplication operation is directly performed on a slice of the first half bit and a slice of the second half bit of the intermediate data to obtain multiple register values.

[0150] Step 304: In each cycle of the current round, according to the protection mode, perform corresponding round constant addition calculations on multiple registered values ​​to obtain the updated data for each cycle;

[0151] Step 305: After all rounds are completed, the updated data output by the round constant module is used as the output summary. The protection mode includes a protected mode and an unprotected mode.

[0152] In one embodiment, in the protected mode, the state data is a state mask, and in the unprotected mode, the state data is a state value.

[0153] In each cycle of the current round, in protected mode, a slice of the first mask and a slice of the second mask of the state data are XORed simultaneously; in unprotected mode, a slice of the first half of the state data and a slice of the second half of the state data are XORed simultaneously to obtain the XOR data, including:

[0154] In protected mode, in each cycle of the current round, a slice of the first mask of the state mask is XORed with Theta to obtain the slice of the first mask in the XOR data; at the same time, a slice of the second mask of the state mask is XORed with Theta to obtain the slice of the second mask in the XOR data.

[0155] In the unprotected mode, in each cycle of the current round, a slice of the first half of the state value is XORed to obtain the slice corresponding to the XOR data; at the same time, a slice of the second half of the state value is XORed to obtain the slice corresponding to the XOR data.

[0156] In one embodiment, in each cycle of the current round, in protected mode, the intermediate data is an intermediate mask, and in unprotected mode, the intermediate data is an intermediate value;

[0157] Based on the protection mode, the XOR data is shifted accordingly to obtain intermediate data, including:

[0158] In protected mode, in each cycle of the current round, the first mask of the XOR data is subjected to a Rho shift operation to obtain the first mask of the Rho-shifted data, and the second mask of the XOR data is subjected to a Rho shift operation to obtain the second mask of the Rho-shifted data; then, the first mask of the Rho-shifted data is subjected to a Pi shift operation to obtain the first mask of the intermediate mask, and the second mask of the Rho-shifted data is subjected to a Pi shift operation to obtain the second mask of the intermediate mask;

[0159] In unprotected mode, the XOR data is subjected to a Rho shift operation to obtain Rho shifted data. Then, the Rho shifted data is subjected to a Pi shift operation to obtain an intermediate value.

[0160] In one embodiment, in each cycle of the current round, in protected mode, a slice of the first mask and a slice of the second mask of the intermediate data are subjected to protected Boolean multiplication; in unprotected mode, a slice of the first half of the intermediate data and a slice of the second half of the intermediate data are directly subjected to Boolean multiplication to obtain multiple registered values, including:

[0161] In protected mode, in each cycle of the current round, based on a slice of the first mask and a slice of the second mask of the intermediate mask, a multiplication operation is performed on each coordinate in the SHA3 state space dimension to obtain four products. The SHA3 state space dimension includes x-dimensional, y-dimensional and z-dimensional. Based on the four products and fresh random numbers, the first register value, second register value, third register value and fourth register value of different coordinates are calculated.

[0162] In unprotected mode, in each cycle of the current round, the fifth register value is obtained based on a slice of the first half of the bits in the middle value; the sixth register value is obtained based on a slice of the second half of the bits in the middle value.

[0163] In one embodiment, in protected mode, in each cycle of the current round, based on the intermediate mask, each coordinate in the SHA3 state space dimension where the z-dimensional value is fixed is multiplied to obtain four products, including:

[0164] In protected mode, in each cycle of the current round, for each coordinate in the SHA3 state space dimension, the first product is calculated based on a slice of the first mask of the intermediate mask;

[0165] Calculate the second product and the third product based on a slice of the first mask and a slice of the second mask of the intermediate mask;

[0166] Calculate the fourth product based on a slice of the second mask of the intermediate mask.

[0167] In one embodiment, calculating the first, second, third, and fourth register values ​​for different coordinates based on four products and a fresh random number includes:

[0168] In protected mode, in each cycle of the current round, the first registered value is calculated based on the first product; the fourth registered value is calculated based on the fourth product.

[0169] For coordinates in the SHA3 state space where x is 0, 1, or 2, calculate the second register value based on the second product and a slice of the first mask of the intermediate mask; calculate the third register value based on the third product and a slice of the second mask of the intermediate mask.

[0170] For coordinates in the SHA3 state space where x-dimensional values ​​are 3 or 4 and z-dimensional values ​​are not equal to 63, the second register value is calculated based on the second product and a slice of the first mask of the intermediate mask; the third register value is calculated based on the third product, a slice of the first mask of the intermediate mask, and a slice of the second mask.

[0171] For coordinates in the SHA3 state space with x dimensions of 3 and 4 and z dimension of 63, calculate the second register value based on the second product and two fresh random numbers; calculate the third register value based on the third product, a fresh random number, and a slice of the second mask of the intermediate mask.

[0172] In one embodiment, in protected mode, the update data is an update mask, and in unprotected mode, the update data is an update value;

[0173] In each cycle of the current round, based on the protection mode, multiple registered values ​​are calculated using the corresponding round constant addition to obtain the updated data for each cycle, including:

[0174] In protected mode, in each cycle of the current round, the first register value is XORed with the second register value and added to the round constant to obtain a slice of the first mask of the update mask for each cycle of the current round; the third register value is XORed with the fourth register value to obtain a slice of the second mask of the update mask for each cycle of the current round; the update mask is stored in the register module.

[0175] In unprotected mode, in each cycle of the current round, the fifth register value is added to the round constant to obtain a slice of the first half of the updated value of each cycle of the current round; the sixth register value is added to the round constant to obtain a slice of the second half of the updated value of each cycle of the current round.

[0176] Figure 4 This is another flowchart of the SHA3 data processing method based on protection mode switching in an embodiment of the present invention. In one embodiment, the method further includes:

[0177] Step 401: In protected mode, store all slices of XOR data into the register module;

[0178] Step 402: In protected mode, the intermediate mask is stored in the register module; in unprotected mode, the intermediate value is stored in the first half of the register module's storage unit.

[0179] Step 403: In protected mode, store the first and second registered values ​​into the register module; store the second and third registered values ​​into the register of the multiplication module; in unprotected mode, store the fifth and sixth registered values ​​into the register of the multiplication module.

[0180] Step 404: In unprotected mode, the updated value is stored in the second half of the register module's storage unit.

[0181] In one embodiment, the method further includes:

[0182] The received protection mode switching command is sent to the XOR module, shift module, multiplication module and round constant module;

[0183] After the last cycle of the current cycle in the cycle constant module is completed, the next cycle begins;

[0184] In protected mode, in the first round, the message mask corresponding to the data to be processed is used as the state mask. In rounds other than the first round, the state mask is obtained based on the update mask output in the previous round.

[0185] In unprotected mode, in the first round, the message corresponding to the data to be processed is used as the status value. In subsequent rounds, the status value is obtained based on the updated value output from the previous round.

[0186] In summary, the method and apparatus proposed in this invention can simultaneously support both unprotected and protected operation modes. In protected mode, the state mask includes two masks, which is equivalent to using the theoretically minimum number of shared values, i.e., two shared values, reducing the circuit area and power consumption of the SHA3 data processing device based on protected mode switching. A register reuse strategy is adopted during the operation to reduce the circuit area. Boolean multiplication is performed on the intermediate mask, followed by round constant addition; this S-box circuit structure avoids two types of side-channel leakage. Input variable borrowing achieves output uniformity and reduces the requirement for fresh random numbers. In unprotected mode, two slices can be operated on simultaneously within one cycle, achieving double the throughput. When performing multiple consecutive encryptions, the output of the round constant module is stored in the first half-memory unit of the memory module, and the intermediate mask output by the shift module is stored in the second half-memory unit of the memory module, thereby further reducing the operation cycle.

[0187] This invention also provides a computer device. Figure 5 This is a schematic diagram of a computer device in an embodiment of the present invention. The computer device 500 includes a memory 510, a processor 520, and a computer program 530 stored in the memory 510 and executable on the processor 520. When the processor 520 executes the computer program 530, it implements the above-mentioned SHA3 data processing method based on protection mode switching.

[0188] This invention also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described SHA3 data processing method based on protection mode switching.

[0189] This invention also provides a computer program product, which includes a computer program that, when executed by a processor, implements the above-described SHA3 data processing method based on protection mode switching.

[0190] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0191] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0192] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0193] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0194] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A SHA3 data processing apparatus based on shield mode switching, characterized by, include: The control module is used to control the protection mode and iteration rounds; it determines the state data of the current round based on the updated data output from the previous round. After all rounds are completed, the updated data output by the round constant module is used as the output summary. The protection mode includes a protected mode and a no-protection mode. The XOR module is used to perform an XOR operation on a slice of the first mask and a slice of the second mask of the state data simultaneously in each cycle of the current round in protected mode, and to perform an XOR operation on a slice of the first half bit and a slice of the second half bit of the state data simultaneously in unprotected mode to obtain the XOR data. The shift module is used to perform corresponding shift operations on the XOR data in each cycle of the current round, according to the protection mode, to obtain intermediate data; The multiplication module is used to perform protected Boolean multiplication on a slice of the first mask and a slice of the second mask of the intermediate data in each cycle of the current round in protected mode, and to directly perform Boolean multiplication on a slice of the first half bit and a slice of the second half bit of the intermediate data in unprotected mode to obtain multiple register values. The wheel constant module is used to perform wheel constant addition calculations on multiple register values ​​in each cycle of the current wheel, based on the protection mode, to obtain the updated data for each cycle.

2. The apparatus of claim 1, wherein, In protected mode, the status data is a status mask; in unprotected mode, the status data is a status value. The XOR module is specifically used for: In protected mode, in each cycle of the current round, a slice of the first mask of the state mask is XORed with Theta to obtain the slice of the first mask in the XOR data; at the same time, a slice of the second mask of the state mask is XORed with Theta to obtain the slice of the second mask in the XOR data. In the unprotected mode, in each cycle of the current round, a slice of the first half of the state value is XORed to obtain the slice corresponding to the XOR data; at the same time, a slice of the second half of the state value is XORed to obtain the slice corresponding to the XOR data.

3. The apparatus of claim 1, wherein, In protected mode, the intermediate data is the intermediate mask; in unprotected mode, the intermediate data is the intermediate value. The shift module is specifically used for: In protected mode, in each cycle of the current round, the first mask of the XOR data is subjected to a Rho shift operation to obtain the first mask of the Rho-shifted data, and the second mask of the XOR data is subjected to a Rho shift operation to obtain the second mask of the Rho-shifted data; then, the first mask of the Rho-shifted data is subjected to a Pi shift operation to obtain the first mask of the intermediate mask, and the second mask of the Rho-shifted data is subjected to a Pi shift operation to obtain the second mask of the intermediate mask; In unprotected mode, the XOR data is subjected to a Rho shift operation to obtain Rho shifted data. Then, the Rho shifted data is subjected to a Pi shift operation to obtain an intermediate value.

4. The apparatus of claim 3, wherein, The multiplication module is specifically used for: In protected mode, in each cycle of the current round, based on a slice of the first mask and a slice of the second mask of the intermediate mask, a multiplication operation is performed on each coordinate in the SHA3 state space dimension to obtain four products. The SHA3 state space dimension includes x-dimensional, y-dimensional and z-dimensional. Based on the four products and fresh random numbers, the first register value, second register value, third register value and fourth register value of different coordinates are calculated. In unprotected mode, in each cycle of the current round, the fifth register value is obtained based on a slice of the first half of the bits in the middle value; the sixth register value is obtained based on a slice of the second half of the bits in the middle value.

5. The apparatus of claim 4, wherein, The multiplication module is specifically used for: In protected mode, in each cycle of the current round, for each coordinate in the SHA3 state space dimension, the first product is calculated based on a slice of the first mask of the intermediate mask; Calculate the second product and the third product based on a slice of the first mask and a slice of the second mask of the intermediate mask; Calculate the fourth product based on a slice of the second mask of the intermediate mask.

6. The apparatus of claim 5, wherein, The multiplication module is specifically used for: In protected mode, in each cycle of the current round, the first registered value is calculated based on the first product; the fourth registered value is calculated based on the fourth product. For coordinates in the SHA3 state space where x is 0, 1, or 2, calculate the second register value based on the second product and a slice of the first mask of the intermediate mask; calculate the third register value based on the third product and a slice of the second mask of the intermediate mask. For coordinates in the SHA3 state space where x-dimensional values ​​are 3 or 4 and z-dimensional values ​​are not equal to 63, the second register value is calculated based on the second product and a slice of the first mask of the intermediate mask; the third register value is calculated based on the third product, a slice of the first mask of the intermediate mask, and a slice of the second mask. For coordinates in the SHA3 state space with x dimensions of 3 and 4 and z dimension of 63, calculate the second register value based on the second product and two fresh random numbers; calculate the third register value based on the third product, a fresh random number, and a slice of the second mask of the intermediate mask.

7. The apparatus of claim 6, wherein, In protected mode, the updated data is the updated mask; in unprotected mode, the updated data is the updated value. The wheel constant module is specifically used for: In protected mode, in each cycle of the current round, the first register value is XORed with the second register value and added to the round constant to obtain a slice of the first mask of the update mask for each cycle of the current round; the third register value is XORed with the fourth register value to obtain a slice of the second mask of the update mask for each cycle of the current round. Store the updated mask into the register module; In unprotected mode, in each cycle of the current round, the fifth register value is added to the round constant to obtain a slice of the first half of the updated value of each cycle of the current round; the sixth register value is added to the round constant to obtain a slice of the second half of the updated value of each cycle of the current round.

8. The apparatus of claim 7, wherein, It also includes a memory module; The XOR module is specifically used to: store all slices of XOR data into the register module in protected mode; The shift module is specifically used to: store the intermediate mask into the register module in protected mode; and store the intermediate value into the first half of the register module's storage unit in unprotected mode. The multiplication module is specifically used for: in protected mode, storing the first and second registered values ​​into the register module; storing the second and third registered values ​​into the register of the multiplication module; and in unprotected mode, storing the fifth and sixth registered values ​​into the register of the multiplication module. The round constant module is specifically used to store the updated value into the second half of the register module's storage unit in unprotected mode.

9. The apparatus of claim 1, wherein, The control module is specifically used for: The received protection mode switching command is sent to the XOR module, shift module, multiplication module and round constant module; After the last cycle of the current cycle in the cycle constant module is completed, the next cycle begins; In protected mode, in the first round, the message mask corresponding to the data to be processed is used as the state mask. In rounds other than the first round, the state mask is obtained based on the update mask output in the previous round. In unprotected mode, in the first round, the message corresponding to the data to be processed is used as the status value. In subsequent rounds, the status value is obtained based on the updated value output from the previous round.

10. A SHA3 data processing method based on protection mode switching, characterized in that, include: In each cycle of the current round, in protected mode, a slice of the first mask and a slice of the second mask of the state data are XORed simultaneously. In unprotected mode, a slice of the first half of the state data and a slice of the second half of the state data are XORed simultaneously to obtain the XOR data. The state data of the current round is determined based on the updated data output from the previous round. In each cycle of the current round, according to the protection mode, the XOR data is shifted accordingly to obtain intermediate data; In each cycle of the current round, in protected mode, a slice of the first mask and a slice of the second mask of the intermediate data are subjected to protected Boolean multiplication. In unprotected mode, a slice of the first half bit and a slice of the second half bit of the intermediate data are subjected to Boolean multiplication directly to obtain multiple register values. In each cycle of the current round, based on the protection mode, multiple registered values ​​are calculated using the corresponding round constant addition to obtain the updated data for each cycle; After all rounds are completed, the updated data output by the round constant module is used as the output summary. The protection mode includes a protected mode and an unprotected mode.

11. A computer device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the method of claim 10.

12. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the method of claim 10.

13. A computer program product, characterised in that, The computer program product includes a computer program that, when executed by a processor, implements the method of claim 10.

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