Intelligent data graph rapid conversion and analysis method and system

Abstract

This application relates to the field of computer technology and discloses an intelligent data graphics rapid conversion and analysis method and system, aiming to solve the problems of high rendering latency, large resource waste, prominent transmission bottlenecks, and easy loss of dynamic features caused by full redrawing and CPU relay in the prior art. Specifically, it includes: writing real-time data streams directly to the GPU's dual memory buffers via a direct memory access channel; using computational shaders to perform spatiotemporal difference analysis in parallel, identifying changing data points and generating motion vectors; constructing a two-dimensional template mask consistent with the screen resolution based on the analysis results; enabling GPU hardware template testing, performing incremental rendering only on the mask-marked areas; and simultaneously performing online feature analysis in parallel, extracting key patterns and overlaying visualized primitives under mask constraints. This invention significantly reduces rendering overhead and latency, and improves the accuracy and end-to-end efficiency of dynamic data visualization.

Description

Technical Field

[0001] This invention belongs to the field of computer technology, specifically relating to a method and system for rapid conversion and analysis of intelligent data and graphics. Background Technology

[0002] With the rapid development of real-time data-intensive applications such as the Industrial Internet of Things (IIoT), smart grids, and high-frequency financial trading, millisecond-level response data visualization has become a core capability supporting critical decision-making. In scenarios such as power dispatching, intelligent manufacturing monitoring, and quantitative trading, graphics rendering latency directly affects the timeliness of anomaly identification and intervention. Current mainstream graphics engines typically employ a full redraw mechanism based on OpenGL or Vulkan, which forces a complete refresh of the frame buffer whenever data is updated, regardless of the size of the change. This strategy exposes serious performance bottlenecks when handling high-throughput data streams and high-resolution displays.

[0003] Graphics transformation technology for real-time big data streams aims to efficiently map high-speed dynamic data into visual elements, with the core objective of minimizing rendering latency while ensuring the integrity of data features. However, existing solutions face three structural contradictions: First, the global redraw mechanism lacks the ability to perceive changes in the spatial distribution of data, resulting in a significant consumption of GPU computing power in static areas; second, data transmission relies on CPU relay, leading to bus bandwidth contention and cache synchronization overhead; and finally, change detection and rendering execution are disconnected in the software architecture, making it difficult to accurately capture key data features in high-speed motion scenes.

[0004] Therefore, there is an urgent need for an intelligent graphics transformation method that can deeply integrate spatial indexing, direct hardware transmission, and incremental rasterization to overcome the dual bottlenecks of latency and fidelity in real-time big data visualization. Summary of the Invention

[0005] The purpose of this invention is to provide an intelligent data graphics rapid conversion and analysis method and system to solve the technical problems in the prior art, such as high graphics rendering latency, serious waste of computing resources, significant data transmission bottlenecks, and easy loss of dynamic data features caused by the use of full redraw mechanism and central processing unit data transfer.

[0006] To achieve the above objectives, according to one aspect of the present invention, a method for rapid conversion and analysis of intelligent data graphics is provided, characterized by comprising the following steps:

[0007] Through the direct memory access channel, external real-time data streams are injected directly into the dedicated video memory work area of ​​the graphics processor without passing through the central processing unit and system main memory, and a double buffer of the current frame data state and the previous frame data state is built in the video memory work area.

[0008] One or more compute shaders are launched to perform a parallel spatiotemporal difference comparison analysis between the current frame data state and the previous frame data state within the graphics processor, in order to identify data points whose data values ​​or spatial positions have changed, and to calculate the motion vector and affected area of ​​the data points in screen space.

[0009] Based on the spatiotemporal difference comparison analysis results, a two-dimensional template mask with the same display resolution is generated in the video memory; wherein, the pixel position with a value of one in the template mask corresponds to the area where the data changes, and the pixel position with a value of zero corresponds to the area where the data remains unchanged.

[0010] Activate the graphics processor hardware template test function and configure the function to only allow rasterization operations to be performed in pixel areas where the template mask value is one, thereby incrementally rendering the current frame data state and updating the rendering results to the frame buffer.

[0011] Another set of computation shaders is launched in parallel to perform online feature analysis on the current frame data state to extract preset key data patterns. The analysis results of the key data patterns are then transformed into visual primitives, which are rendered according to the constraints of the two-dimensional template mask and superimposed on the final frame buffer.

[0012] As one embodiment of the present invention, injecting external real-time data streams directly into the dedicated video memory workspace of the graphics processor via a direct memory access channel specifically includes:

[0013] Configure a hardware network interface that supports converged Ethernet remote direct data access or unlimited bandwidth protocol, or a field-programmable gate array data acquisition card that supports peer-to-peer network communication with a graphics processor.

[0014] Using the application programming interface provided by the graphics processor driver, two contiguous physical memory blocks of equal size and identical structure are pre-allocated in the video memory, serving as the previous frame data buffer and the current frame data buffer, respectively.

[0015] Establish a direct data transmission path from the hardware network interface or data acquisition card to the video memory working area, so that the input data frames are alternately written to the current frame data buffer according to the time sequence, while maintaining the integrity of the previous frame data in the previous frame data buffer, thereby completing the data status update without central processing unit intervention.

[0016] Furthermore, initiating one or more computation shaders for spatiotemporal difference comparison analysis specifically includes:

[0017] Write and compile a computation shader program that is distributed to multiple streaming multiprocessors of the graphics processor for parallel execution, with each computation shader workgroup responsible for processing a subset of the data buffer;

[0018] The compute shader program receives memory pointers to the previous frame's data buffer and the current frame's data buffer as input;

[0019] In the program execution body, for each data point, read its corresponding numerical and coordinate information in the buffer area of ​​the current frame and the previous frame, and compare it element by element;

[0020] If the value or coordinates of a data point change, the point is determined to be an active data point, and its screen space coordinate displacement vector is calculated. This displacement vector is obtained by subtracting the previous frame's screen coordinates from the current frame's screen coordinates and dividing by the frame interval time.

[0021] Based on the visual size of the data points on the screen, and combined with their positions in the previous and current frames, a minimum rectangular bounding box that can completely cover their motion trajectory is calculated as their basic influence area.

[0022] Furthermore, for data points moving at high speeds, the spatiotemporal difference comparative analysis also includes a trajectory reconstruction step:

[0023] Inside the compute shader program, a displacement velocity threshold is set, which is set to five pixel units per frame.

[0024] When the magnitude of the calculated data point screen space displacement vector exceeds the displacement velocity threshold, the trajectory reconstruction logic is activated.

[0025] The trajectory reconstruction logic uses a digital differential analyzer algorithm to generate a series of intermediate pixel coordinate points between the screen coordinates of the data points in the previous frame and the screen coordinates of the current frame, and reconstructs the motion trajectory line segment of the data points in a linear interpolation manner.

[0026] All pixel positions traversed by the trajectory line segment are identified as areas where data changes.

[0027] Furthermore, generating a two-dimensional template mask based on the spatiotemporal difference comparison analysis results specifically includes:

[0028] Create a single-channel 8-bit integer texture in video memory that is exactly the same as the target display resolution as a template mask storage area, and clear all pixel values ​​of it to zero before the analysis of each frame begins.

[0029] For each data point determined to be active, the compute shader program finds the coordinates of all pixels covered by its influence area, including its basic influence area and trajectory reconstruction area.

[0030] The image atomic write operation instructions provided by the graphics processor are used to modify the values ​​of the corresponding pixel coordinates in the template mask storage area from zero to one.

[0031] Once all computation shader working groups have completed their tasks, the template mask storage area will form a complete two-dimensional template mask that marks all screen pixel update requirements.

[0032] Furthermore, activating the graphics processor's hardware template testing function and performing incremental rendering specifically includes:

[0033] During the rendering pipeline state setup phase, enable hardware template testing;

[0034] Configure the template test function as an equality comparison, set the reference value to one, and set the mask to all ones;

[0035] Configure the template operation to keep the existing values ​​of the template buffer unchanged when the test passes, the test fails, or the deep test fails;

[0036] Then, submit the vertex data and drawing instructions for drawing the data graphics;

[0037] When processing each fragment, the photoluminescence unit of the graphics processor first reads the value of its corresponding screen coordinates in the two-dimensional template mask. Only when the value is equal to one will the fragment be retained and enter the subsequent fragment shading stage; otherwise, the fragment is directly discarded by the hardware without consuming any fragment shading computing resources.

[0038] Furthermore, launching another set of computation shaders in parallel to perform online feature analysis specifically includes:

[0039] The computational shader program for online feature analysis runs independently of the shader program for spatiotemporal difference comparison analysis, and its input is only the current frame data buffer;

[0040] The program internally implements a peak detection algorithm based on a sliding time window. By comparing the value of the central data point within the window with the values ​​of its neighboring data points, it determines whether the point constitutes a local maximum or minimum, i.e., a key data feature.

[0041] When a key data feature is detected, the computation shader program generates geometric information representing the feature in a separate dedicated vertex buffer, such as the vertex coordinates of a triangle or a star.

[0042] This dedicated vertex buffer is then used for a separate draw call, which is also constrained by the aforementioned 2D template mask to ensure that feature markers are rendered effectively only in areas where the data changes.

[0043] According to another aspect of the present invention, an intelligent data and graphics rapid conversion and analysis system is provided, characterized in that the system comprises:

[0044] A direct memory access data injection module is configured to capture external real-time data streams and establish a hardware channel that bypasses the CPU and system main memory to write the data stream directly into the graphics processor's internal memory working area.

[0045] A spatiotemporal difference analysis module, consisting of a set of computation shaders deployed on the graphics processor, is used to receive the current frame and the previous frame data in the video memory work area, perform parallel comparison, locate data changes and calculate motion vectors.

[0046] A dynamic template mask generation module is essentially a two-dimensional data structure in the video memory. It is filled in real time by the spatiotemporal difference analysis module based on its analysis results and is used to mark the pixel areas on the screen that need to be updated.

[0047] A mask-constrained rendering execution module, which is the hardware rendering pipeline inside the graphics processor, is configured to operate with hardware stencil testing enabled and selectively perform fragment rasterization and shading based on the content of the dynamic stencil mask.

[0048] An online data feature analysis module, consisting of another set of independent computation shaders, is used to perform real-time algorithmic analysis on the current frame data, extract key features, and generate geometric data for visualizing the features.

[0049] As one embodiment of the present invention, the direct memory access data injection module includes a hardware network interface that supports converged Ethernet remote direct data access or unlimited bandwidth protocol. This interface is directly connected to the graphics processor through the peripheral interconnect standard high-speed bus and is authorized to directly read and write the graphics processor's video memory. The video memory working area is divided into a previous frame data buffer and a current frame data buffer. The data injection module cyclically decodes newly arriving data packets and writes them into the current frame data buffer.

[0050] Furthermore, the spatial difference analysis module is specifically a set of computational shader programs deployed on top of the graphics processor's streaming multiprocessor. These programs include differential comparison logic for data point values ​​and coordinates, as well as mathematical operation instructions for calculating screen space displacement vectors. The module also has a built-in trajectory interpolation logic based on a digital differential analyzer algorithm. When the speed of the data point movement exceeds a preset threshold, this logic is triggered to ensure the pixel continuity of the movement path.

[0051] Furthermore, the state template mask generation module is a single-channel 8-bit integer texture object that matches the display resolution and is bound to a readable and writable image storage target; the computation shader of the spatiotemporal difference analysis module writes the pixel positions corresponding to the analyzed change areas to the value one through the built-in image atomic write function, thereby completing the mask construction; the module is reset to an all-zero state by the graphics command processor at the beginning of each frame rendering loop.

[0052] Furthermore, the code-constrained rendering execution module includes the graphics processor's rasterizer and stencil test unit; the stencil test unit is programmed to allow fragments generated by the rasterizer to pass only when the value read from the corresponding position of the dynamic stencil mask generation module is one; all fragments rejected by the hardware stencil test unit will not enter the fragment shader, thereby greatly saving the graphics processor's computing power and power consumption.

[0053] Furthermore, the line data feature analysis module consists of a set of computational shader programs that implement specific analysis algorithms, such as sliding window peak detection or trend fitting algorithms. The output of this module is a dynamically updated list of vertices that stores geometric primitive information used to mark the discovered features on the screen. This vertex list is invoked by a separate rendering instruction, and its rendering process is also controlled by the mask constraint rendering execution module.

[0054] In summary, this application includes at least one of the following beneficial technical effects:

[0055] First, by generating a template mask and enabling hardware template testing, this invention precisely focuses the computing resources of the graphics processor on the pixel areas that actually change on the screen, fundamentally eliminating invalid rendering of static areas. Depending on the data change rate, it can save up to 95% or more of the pixel processing overhead, significantly reducing the rendering time per frame and system energy consumption.

[0056] Second, by building a data link based on direct memory access technology, this invention enables the direct injection of data flow from the source to the video memory, completely bypassing the central processing unit and system main memory as data transfer stations. This eliminates the PCIe bus transmission delay, cache consistency maintenance overhead, and central processing unit scheduling interruption caused by this, providing hardware-level guarantees to meet the needs of ultra-low latency real-time monitoring applications.

[0057] Third, this invention integrates the analysis and trajectory reconstruction functions of motion vectors of data points at the computation shader level, ensuring the continuity and integrity of the visualization path of high-speed motion data points. It effectively prevents the omission and misjudgment of key data features, such as signal peaks or abnormal trajectories, caused by discrete sampling and untimely coordinate comparison at the software level, thereby improving the accuracy and reliability of data visualization analysis.

[0058] Fourth, this invention also migrates data analysis tasks, such as feature extraction, to be executed within the graphics processor and shares data and hardware resources with the rendering process. It constructs a new architecture in which data processing, change perception, feature analysis, and incremental rendering are all executed in a closed loop within the graphics processor, realizing deep coupling and collaborative optimization between computing and rendering, and improving the end-to-end efficiency of data-to-graphics conversion and analysis as a whole. Attached Figure Description

[0059] Figure 1 This is a schematic diagram of the overall technical architecture of the intelligent data graphics rapid conversion and analysis method and system proposed in this invention;

[0060] Figure 2 This is a schematic diagram of the core principle framework of the present invention based on spatiotemporal difference comparison and dynamic template mask generation;

[0061] Figure 3 This is a schematic diagram of the multi-level interaction relationship and data flow between direct memory access data injection, incremental rendering, and online feature analysis in this invention; Detailed Implementation

[0062] See Figures 1 to 3 This invention provides an intelligent data graphics rapid conversion and analysis method and system, aiming to solve the core problems existing in current real-time data visualization technologies, such as high graphics rendering latency, serious waste of computing resources, significant CPU-GPU data transmission bottlenecks, and easy loss of dynamic data features. By constructing an integrated architecture of data processing, change perception, incremental rendering, and feature analysis that is executed entirely in a closed loop within the graphics processor, low-latency, high-fidelity graphics conversion and online analysis of high-speed real-time data streams are achieved.

[0063] The first aspect is the intelligent data graphics rapid conversion and analysis method disclosed in this application, which includes the following steps:

[0064] S1, through the direct memory access channel, injects the external real-time data stream directly into the dedicated video memory work area of ​​the graphics processor without passing through the central processing unit and the system main memory, and builds a double buffer in the video memory work area to contain the current frame data state and the previous frame data state.

[0065] S2, start one or more compute shaders to perform parallel spatiotemporal difference comparison analysis between the current frame data state and the previous frame data state inside the graphics processor, in order to identify data points whose data values ​​or spatial positions have changed, and calculate the motion vector and affected area of ​​the data points in screen space.

[0066] S3, based on the spatiotemporal difference comparison analysis results, generates a two-dimensional template mask in the video memory that is equivalent to the display resolution; wherein, the pixel position with a value of one in the template mask corresponds to the area where the data changes, and the pixel position with a value of zero corresponds to the area where the data remains unchanged.

[0067] S4, activate the graphics processor hardware template test function and configure the function to only allow rasterization operations to be performed in pixel areas where the template mask value is one, thereby performing incremental rendering on the current frame data state and updating the rendering results to the frame buffer.

[0068] S5, another set of computation shaders is started in parallel to perform online feature analysis on the current frame data state to extract preset key data patterns, and the analysis results of the key data patterns are transformed into visual primitives, which are also rendered according to the constraints of the two-dimensional template mask and superimposed on the final frame buffer.

[0069] The specific details of each of the above steps are as follows:

[0070] In step S1, external real-time data streams are directly injected into the dedicated video memory workspace of the graphics processor via a direct memory access channel, specifically including the following methods:

[0071] S1.1, Configure a hardware network interface that supports converged Ethernet remote direct data access or unlimited bandwidth protocol, or configure a field-programmable gate array data acquisition card that supports peer-to-peer network communication with a graphics processor.

[0072] S1.2, using the application programming interface provided by the graphics processor driver, allocates two contiguous physical memory blocks of equal size and identical structure in the video memory, which serve as the previous frame data buffer and the current frame data buffer, respectively.

[0073] S1.3 Establish a direct data transmission path from the hardware network interface or data acquisition card to the video memory working area, so that the input data frame is alternately written to the current frame data buffer according to the time sequence, while maintaining the integrity of the previous frame data in the previous frame data buffer, and realizing data state update without central processing unit intervention.

[0074] S1.4 The data injection process is initiated directly through the DMA engine of the hardware network interface. The target address is the starting physical address of the pre-allocated current frame data buffer in the video memory. Each time a new data frame arrives, the DMA controller automatically switches the write target to another buffer, realizing the ping-pong switching mechanism of the dual buffer.

[0075] S1.5 uses a compact structure array layout for the data format. Each data point contains the original value, logical coordinates, timestamp, and visual attribute fields. All fields are aligned to 16 bytes. The total capacity of the video memory workspace is dynamically allocated according to the maximum expected number of data points. A typical configuration supports a dataset of 100,000 points and occupies approximately 8MB of video memory.

[0076] In step S2, one or more computation shaders are started to perform spatiotemporal difference comparison analysis, which specifically includes the following sub-steps:

[0077] S2.1, Write and compile a computation shader program, specifically:

[0078] The program is distributed to multiple streaming multiprocessors of the graphics processor for parallel execution, with each compute shader working group responsible for processing a subset of the data buffer.

[0079] The memory pointers pointing to the previous frame data buffer and the current frame data buffer are passed as input parameters to the compute shader program.

[0080] Set the workgroup size to 256 threads to ensure that each thread processes one data point.

[0081] S2.2, each thread indexes the data buffer through its global thread identifier and reads the numerical and coordinate information of the corresponding data point in the current frame and the previous frame, specifically:

[0082] The numerical values ​​and coordinates are compared element by element; if the numerical value or coordinates of a data point change, the point is identified as the active data point.

[0083] For active data points, calculate their screen space displacement vector: After converting logical coordinates to screen coordinates using the built-in projection matrix, subtract the previous frame's screen coordinates from the current frame's screen coordinates, and then divide by the frame interval time to obtain the displacement vector in pixels per millisecond.

[0084] Calculate the basic influence area based on the visualization of the data points:

[0085] For point primitives, the basic influence area is a square bounding box centered at the screen coordinates with a side length equal to the point size.

[0086] For line segment primitives, the basic influence area is the axis-aligned bounding box formed by the four coordinates of the two endpoints of the line segment in the previous frame and the current frame.

[0087] S2.3, Trajectory reconstruction of high-speed motion data specifically includes the following steps:

[0088] Inside the compute shader program, the displacement velocity threshold is set to 5 pixels per frame.

[0089] When the magnitude of the screen space displacement vector of an active data point exceeds the threshold, the trajectory reconstruction logic is activated.

[0090] The trajectory reconstruction logic uses a digital differential analyzer algorithm to perform linear interpolation between the screen coordinates of the data point in the previous frame and the current frame, generating a series of intermediate pixel coordinate points to reconstruct continuous motion trajectory segments.

[0091] All pixel positions traversed by the trajectory line segment are identified as areas where data changes.

[0092] The reconstructed trajectory pixel set is merged with the basic influence area calculated in step S2.2 to form the final dynamic region description of the data point.

[0093] Finally, the analysis results of step S2.4 are output as follows:

[0094] The final dynamic region information of all active data points is temporarily stored in shared memory.

[0095] After all threads in the entire compute shader workgroup have finished processing, the temporarily stored affected region information will be written to the global output buffer in batches.

[0096] In step S3, a two-dimensional template mask is generated based on the spatiotemporal difference comparison analysis results, which specifically includes the following sub-steps:

[0097] S3.1, Mask storage area creation:

[0098] Create a single-channel 8-bit integer texture in video memory that is exactly the same as the target display resolution, as a template mask storage area;

[0099] S3.2, Mask storage area initialization:

[0100] Before each frame analysis begins, all pixel values ​​in the template mask storage area are cleared to zero to ensure that the initial state of the mask is all zeros;

[0101] S3.3, Identification of Change Areas:

[0102] For each data point determined to be active, the compute shader program finds the coordinates of all pixels covered by its influence region, which includes the basic influence region and the trajectory reconstruction region.

[0103] S3.4, Mask Marker Update:

[0104] The image atomic write operation instructions provided by the graphics processor are used to modify the values ​​of these pixel coordinate positions in the template mask storage area from zero to one.

[0105] S3.5, Mask generation complete:

[0106] After all the compute shader working groups have finished executing, the template mask storage area will form a complete two-dimensional template mask that marks all screen pixel update requirements;

[0107] The template mask texture adopts a single-channel, 8-bit unsigned integer format, and its size is strictly aligned with the output frame buffer.

[0108] The clearing operation is performed by the graphics command processor at the beginning of the frame via a clear instruction;

[0109] The pixel coordinates of the affected region are obtained by traversing the bounding box boundary using a double loop.

[0110] Since the influence areas of multiple data points may overlap, atomic write operations are used to avoid write conflicts, ensuring that any pixel is set to one when it is covered by at least one active region.

[0111] In step S4, activating the graphics processor's hardware template testing function and performing incremental rendering specifically includes the following sub-steps:

[0112] S4.1, Template Test Configuration:

[0113] During the rendering pipeline's state setup phase, enable the hardware template testing feature;

[0114] Configure the template test's comparison function to "equality" comparison and set the reference comparison value to 1;

[0115] Configure template update operations so that the existing values ​​in the template buffer remain unchanged regardless of the results of template testing or depth testing.

[0116] S4.2, Submission of Graphical Data:

[0117] Vertex data and drawing instructions used to draw data graphics are submitted to the graphics processor's rendering pipeline.

[0118] S4.3, Template Test Execution:

[0119] When processing each fragment, the rasterization unit of the graphics processor first reads the value of its corresponding screen coordinates in the two-dimensional template mask;

[0120] Based on the S4.1 configuration, the template test passes only when this value equals 1, and the corresponding fragments are retained and enter the subsequent fragment coloring stage.

[0121] Fragments that fail the stencil test are discarded directly by the graphics processor hardware without triggering any fragment shading calculations.

[0122] S4.4, Rendering Optimization Effects:

[0123] Through the above-mentioned incremental rendering mechanism based on template mask, the fragment shader of the graphics processor only performs calculations on the pixel regions on the screen that are marked as having undergone data changes.

[0124] This mechanism achieves zero-overhead culling of static display areas, thereby significantly reducing the computational load on the graphics processor in terms of arithmetic logic and texture sampling, resulting in a significant improvement in rendering efficiency.

[0125] In step S5, another set of computation shaders is started in parallel to perform online feature analysis, which specifically includes the following sub-steps:

[0126] S5.1, Feature Analysis Program Initialization:

[0127] Start a computational shader program that is independent of the spatiotemporal difference comparison analysis. The input of this program is only the current frame data buffer.

[0128] The feature analysis shader executes concurrently with the shader in step S2, sharing the same graphics processor computing resource pool, but is submitted through different command buffers to achieve logical isolation;

[0129] S5.2, Key Feature Identification:

[0130] Implement a peak detection algorithm based on a sliding time window within the computation shader program. By comparing the value of the center data point within the window with the values ​​of its neighboring data points, determine whether the point constitutes a local maximum or minimum, i.e., a key data feature.

[0131] S5.3, Feature marker geometry generation:

[0132] When a key data feature is detected, the computation shader program generates geometric information in a dedicated vertex buffer representing a visual marker of that feature, including the vertex coordinates of a triangle or star marker.

[0133] The feature-marked vertex data is written to a dynamic vertex buffer, the contents of which are updated every frame.

[0134] S5.4, Mask Constraint Rendering:

[0135] A dedicated vertex buffer is used for a single draw call, which is constrained by the aforementioned 2D template mask to ensure that feature markers are rendered effectively only in areas where the data changes.

[0136] The drawing calls use the same rendering pipeline as the main data graph, automatically inherit the template test configuration, and ensure that feature markers are not drawn incorrectly in static areas;

[0137] S5.5, Space Consistency Guarantee:

[0138] The screen position of the feature marker is obtained by transforming the logical coordinates of the original data points using the same projection matrix, ensuring spatial consistency between the feature marker and the original data.

[0139] In summary, this application achieves a direct memory access-based hardware channel, enabling external real-time data streams to bypass the central processing unit and system main memory, and directly inject into the GPU's dual memory buffers. This fundamental improvement eliminates the latency bottleneck caused by CPU relay and bus transmission in traditional architectures.

[0140] By performing spatiotemporal difference comparison analysis in parallel within the GPU, not only are points of data change identified, but a trajectory reconstruction mechanism is also innovatively introduced to ensure the visualization continuity of high-speed motion data points. This step elevates change detection from simple numerical comparison to intelligent analysis at the motion trajectory level.

[0141] A two-dimensional template mask is generated based on the change analysis results, and the hardware template testing function is activated, realizing true incremental rendering. This technique precisely focuses GPU rendering computing resources on the actual screen areas that have changed, fundamentally solving the resource waste problem caused by full redraw.

[0142] By migrating the feature analysis task to the GPU and sharing data resources with the rendering pipeline, a complete closed loop within the GPU—from data processing to feature analysis to visualization rendering—is constructed. This deeply coupled architecture ensures real-time synchronization between analysis results and visualization output.

[0143] This solution, through the organic combination of the aforementioned technical means, significantly reduces rendering latency and computational overhead while maintaining the integrity of data features, providing a solution for real-time big data visualization. The close collaboration between each step generates a significant technical synergy, with overall performance improvements far exceeding the simple sum of improvements in each stage.

[0144] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention. Therefore, the embodiments should be regarded as exemplary and non-limiting in all respects.

[0145] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A method for rapid conversion and analysis of intelligent data graphics, characterized in that, include: Through the direct memory access channel, external real-time data streams are injected directly into the dedicated video memory work area of ​​the graphics processor without passing through the central processing unit and system main memory, and a double buffer of the current frame data state and the previous frame data state is built in the video memory work area. The compute shader is activated to perform a parallel spatiotemporal difference comparison analysis between the current frame data state and the previous frame data state within the graphics processor, in order to identify data points whose data values ​​or spatial positions have changed, and to calculate the motion vector and affected area of ​​the data points in screen space. Based on the spatiotemporal difference comparison analysis results, a two-dimensional template mask with the same display resolution is generated in the video memory; wherein, the pixel position with a value of one in the two-dimensional template mask corresponds to the area where the data changes, and the pixel position with a value of zero corresponds to the area where the data remains unchanged. Activate the graphics processor hardware template test function and configure the function to only allow rasterization operations to be performed in pixel areas where the template mask value is one, thereby incrementally rendering the current frame data state and updating the rendering results to the frame buffer. Another set of computation shaders is launched in parallel to perform online feature analysis on the current frame data state to extract preset key data patterns. The analysis results of the key data patterns are then transformed into visual primitives, which are rendered according to the constraints of the two-dimensional template mask and superimposed on the final frame buffer.

2. The intelligent data graphics rapid conversion and analysis method according to claim 1, characterized in that, The direct memory access channel allows external real-time data streams to be injected directly into the dedicated video memory workspace of the graphics processor. Specifically, this includes: Configure a hardware network interface that supports converged Ethernet remote direct data access or unlimited bandwidth protocol, or a field-programmable gate array data acquisition card that supports peer-to-peer network communication with a graphics processor. Using the application programming interface provided by the graphics processor driver, two contiguous physical memory blocks of equal size and identical structure are pre-allocated in the video memory, serving as the previous frame data buffer and the current frame data buffer, respectively. Establish a direct data transmission path from the hardware network interface or data acquisition card to the video memory working area, so that the input data frames are alternately written to the current frame data buffer according to the time sequence, while maintaining the integrity of the previous frame data in the previous frame data buffer, thereby completing the data status update without central processing unit intervention.

3. The intelligent data graphics rapid conversion and analysis method according to claim 2, characterized in that, Starting one or more computation shaders to perform spatiotemporal difference comparison analysis specifically includes: Write and compile a computation shader program that is distributed to multiple streaming multiprocessors of the graphics processor for parallel execution, with each computation shader workgroup responsible for processing a subset of the data buffer; The compute shader program receives memory pointers to the previous frame's data buffer and the current frame's data buffer as input; In the program execution body, for each data point, read its corresponding numerical and coordinate information in the buffer area of ​​the current frame and the previous frame, and compare it element by element; If the value or coordinates of a data point change, the point is determined to be an active data point, and its screen space coordinate displacement vector is calculated. This displacement vector is obtained by subtracting the previous frame's screen coordinates from the current frame's screen coordinates and dividing by the frame interval time. Based on the visual size of the data points on the screen, and combined with their positions in the previous and current frames, a minimum rectangular bounding box that can completely cover their motion trajectory is calculated as their basic influence area.

4. The intelligent data graphics rapid conversion and analysis method according to claim 3, characterized in that, For data points moving at high speeds, spatiotemporal difference comparative analysis also includes a trajectory reconstruction step: Inside the compute shader program, a displacement velocity threshold is set; When the magnitude of the calculated data point screen space displacement vector exceeds the displacement velocity threshold, the trajectory reconstruction logic is activated. The trajectory reconstruction logic uses a digital differential analyzer algorithm to generate a series of intermediate pixel coordinate points between the screen coordinates of the data points in the previous frame and the screen coordinates of the current frame, and reconstructs the motion trajectory line segments of the data points in a linear interpolation manner. All pixel positions traversed by the trajectory line segment are identified as areas where data changes.

5. The intelligent data graphics rapid conversion and analysis method according to claim 4, characterized in that, The generation of a two-dimensional template mask based on the spatiotemporal difference comparison analysis results specifically includes: Create a single-channel 8-bit integer texture in video memory that is exactly the same as the target display resolution as a template mask storage area, and clear all pixel values ​​of it to zero before the analysis of each frame begins. For each data point determined to be active, the compute shader program finds the coordinates of all pixels covered by its influence area, including its basic influence area and trajectory reconstruction area. The image atomic write operation instructions provided by the graphics processor are used to modify the values ​​of the corresponding pixel coordinates in the template mask storage area from zero to one. Once all computation shader working groups have completed their tasks, the template mask storage area will form a complete two-dimensional template mask that marks all screen pixel update requirements.

6. The intelligent data graphics rapid conversion and analysis method according to claim 5, characterized in that, Activating the graphics processor's hardware template testing function and performing incremental rendering specifically includes: During the rendering pipeline state setup phase, enable hardware template testing; Configure the template test function as an equality comparison, set the reference value to one, and set the mask to all ones; Configure the template operation to keep the existing values ​​of the template buffer unchanged when the test passes, the test fails, or the deep test fails; Then, submit the vertex data and drawing instructions for drawing the data graphics; When processing each fragment, the rasterization unit of the graphics processor first reads the value of its corresponding screen coordinates in the two-dimensional template mask. Only when the value is equal to one will the fragment be retained and enter the subsequent fragment shading stage; otherwise, the fragment is directly discarded by the hardware without consuming any fragment shading computing resources.

7. The intelligent data graphics rapid conversion and analysis method according to claim 6, characterized in that, In parallel, another set of computation shaders is launched to perform online feature analysis, specifically including: The computational shader program for online feature analysis runs independently of the shader program for spatiotemporal difference comparison analysis, and its input is only the current frame data buffer; The program internally implements a peak detection algorithm based on a sliding time window. By comparing the value of the central data point within the window with the values ​​of its neighboring data points, it determines whether the point constitutes a local maximum or minimum, i.e., a key data feature. When a key data feature is detected, the computation shader program generates geometric information representing the feature in a separate dedicated vertex buffer, such as the vertex coordinates of a triangle or a star. This dedicated vertex buffer is then used for a separate draw call, which is also constrained by the aforementioned 2D template mask to ensure that feature markers are rendered effectively only in areas where the data changes.

8. A smart data graphics rapid conversion and analysis system, characterized in that, include: The Direct Memory Access Data Injection Module is used to inject external real-time data streams directly into the dedicated video memory workspace of the graphics processor through the direct memory access channel, without passing through the central processing unit and system main memory, and to build a double buffer of the current frame data state and the previous frame data state in the video memory workspace. The Spatiotemporal Difference Analysis module is used to launch one or more compute shaders to perform parallel spatiotemporal difference comparison analysis between the current frame data state and the previous frame data state within the graphics processor, in order to identify data points whose data values ​​or spatial positions have changed, and calculate the motion vector and affected area of ​​the data points in screen space. The dynamic template mask generation module is used to generate a two-dimensional template mask in the video memory with the same resolution as the display based on the spatiotemporal difference comparison analysis results. In this module, the pixel positions with a value of one correspond to the areas where the data changes, and the pixel positions with a value of zero correspond to the areas where the data remains unchanged. The mask-constrained rendering execution module is used to activate the graphics processor hardware stencil test function and configure the function to only allow rasterization operations to be performed in pixel areas where the stencil mask value is one, thereby performing incremental rendering on the current frame data state and updating the rendering results to the frame buffer. The online data feature analysis module is used to launch another set of computation shaders in parallel to perform online feature analysis on the current frame data state in order to extract preset key data patterns. The analysis results of the key data patterns are then transformed into visual primitives, which are rendered according to the constraints of the two-dimensional template mask and superimposed on the final frame buffer.

9. The intelligent data graphics rapid conversion and analysis system according to claim 8, characterized in that, The Direct Memory Access (DMI) data injection module includes a hardware network interface that supports Converged Ethernet Remote Direct Data Access or Unlimited Bandwidth Protocol. This interface is directly connected to the graphics processor via a high-speed bus of the Peripheral Interconnect Standard and is authorized to directly read and write the graphics processor's video memory. The video memory working area is divided into a previous frame data buffer and a current frame data buffer. The data injection module cyclically decodes newly arriving data packets and writes them into the current frame data buffer.

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