A dye matching intelligent algorithm matching method

Abstract

This invention relates to the field of artificial intelligence middleware scheduling technology, and discloses a dye color matching intelligent algorithm scheduling method, including: acquiring the target spectral tensor obtained from the spectral acquisition front end; extracting the numerical gradient distribution at the inference front end, and dividing the target spectral tensor into high feature entropy segments and low feature entropy segments; matching operator subgraphs of corresponding computing power levels according to different feature entropy segments and reorganizing them to construct a specific inference computation graph to complete forward inference; and compensating for the instruction prefetch time base of the next inference cycle by calculating the time delay offset generated during the computation graph loading process. This invention realizes the adaptive adjustment of the neural network inference topology with the feature density of the input data, and eliminates the scheduling overhead and bus delay jitter caused by the dynamic assembly of operators while ensuring the registration accuracy of the absorption peak frequency band, ensuring that the output frequency of the dye formula vector is adapted to the physical rhythm of the industrial production line.

Description

Technical Field

[0001] This invention belongs to the field of artificial intelligence middleware scheduling technology, and in particular relates to a dye color matching intelligent algorithm scheduling method. Background Technology

[0002] The color matching task in current industrial production increasingly relies on deep learning models to predict dye components. Artificial intelligence middleware is used to deploy pre-trained neural networks at the edge control terminals at the front end of the production line. Traditional middleware architecture adopts a static graph loading mode, which solidifies the operator topology and tensor calculation sequence of the neural network in the storage medium during the system startup phase. The computing unit then iteratively infers based on the input target spectral tensor. This scheduling method, which pre-sets the input features to have equal information density in the spatial dimension, ignores the local sparsity and nonlinear differences exhibited by the spectral signal in different frequency bands. As a result, when the middleware processes spectral frequency bands with gradual reflectance changes, the underlying bus still schedules and runs all the operators, resulting in computing power redundancy and resource mismatch.

[0003] Industrial color matching systems are evolving towards high-frequency continuous color changing and millisecond-level inference latency. The limited storage bandwidth and computing capacity of edge computing nodes constitute physical constraints. Compressing model size through methods such as model quantization or static pruning often comes at the cost of sacrificing the mapping accuracy of absorption peak bands, making it difficult to balance color matching accuracy and inference speed. Middleware lacks dynamic awareness of the feature density of real-time data streams, and the underlying acceleration units operate at full capacity when processing low-information-entropy spectral bands, causing the memory pool level to remain near the overflow threshold. When the input spectral features fluctuate drastically, the rigid operator scheduling mechanism cannot release computing resources in time, resulting in operator flow blockage and loss of timing accuracy, causing color matching instructions to deviate from the production rhythm. For example, Chinese invention patent CN120315902B discloses a... The edge computing scheduling optimization method based on the actor-critic model, although it introduces a reinforcement learning mechanism to dynamically adjust the learning rate to adapt to load fluctuations, relies heavily on the continuous feedback and correction of policy gradients from historical samples. It belongs to the macro-level resource scheduling optimization. However, in the industrial color matching scenario, the characteristic fluctuations of spectral absorption peaks exhibit strong local bursts and physical correlations. This reinforcement learning method based on general load indicators is difficult to capture the transient gradient of the spectral waveform within milliseconds, and it cannot achieve fine-grained topology reorganization at the operator level. Due to the lack of deep deconstruction of the feature density of the input signal, this type of method still generates computational redundancy when processing feature-dense regions, resulting in nonlinear drift of inference latency, which cannot meet the physical synchronization requirements of color matching valves on high-speed production lines.

[0004] Therefore, how to construct an artificial intelligence middleware scheduling method to break the execution inertia of static spectra and enable the operator scheduling of neural networks to generate adaptive dynamic routing and resource hedging according to the local fluctuation gradient of the input spectral tensor has become the technical problem to be solved by this invention. Summary of the Invention

[0005] This invention aims to solve the problem that static inference architectures cannot perceive local feature fluctuations in spectral data, leading to redundant computation of edge operators and jitter in inference latency caused by these fluctuations.

[0006] In this technical solution, a dye color matching intelligent algorithm mixing method includes the following steps:

[0007] Step S101: Obtain the target spectral tensor obtained through serialization processing at the spectral acquisition front end;

[0008] Step S102: Slice the target spectral tensor at the inference front end and extract the waveform components that characterize the numerical gradient distribution. Based on the waveform components, divide the target spectral tensor into high feature entropy segments and low feature entropy segments corresponding to different local information entropy densities.

[0009] Step S103: Based on the high feature entropy segment and the low feature entropy segment, match the corresponding subgraph from the preset operator subgraph corresponding to different computing power levels and reorganize it to construct a specific inference calculation graph for the target spectral tensor. Run the specific inference calculation graph through the scheduling engine of the artificial intelligence middleware to complete the forward inference of the neural network.

[0010] Step S104: Calculate the time delay offset between the real time section and the instruction issuance time section generated by the scheduling engine loading the specific inference computation graph. Based on the time delay offset, compensate the subgraph instruction prefetch trigger time base of the next inference cycle to offset the scheduling overhead generated by computation graph reorganization, so that the output frequency of the artificial intelligence middleware matches the sampling step size of the industrial production line.

[0011] Step S105: Output the dye formulation vector based on the result of forward inference.

[0012] Preferably, step S102 specifically includes: step S1021, using a sliding window to perform numerical truncation on the feature axis of the target spectral tensor, and calculating the absolute value of the first-order gradient of adjacent feature components; step S1022, comparing the absolute value of the first-order gradient with a preset fluctuation threshold, if the absolute value of the first-order gradient continuously exceeds the fluctuation threshold and the feature length reaches a preset proportion, then the corresponding tensor interval is defined as a high feature entropy segment, otherwise it is defined as a low feature entropy segment; wherein, the high feature entropy segment is mapped to a dense convolution operator subgraph loaded with full computing power, and the low feature entropy segment is mapped to a depthwise separable convolution operator subgraph that reduces redundant operator calls.

[0013] Preferably, step S103, during the execution of the specific inference computation graph, further includes: establishing a mapping relationship between tensor lifetime and operator subgraph topology; implementing memory reuse control on intermediate data generated by the computation path in the memory management layer of the artificial intelligence middleware; and overwriting invalid tensor space in real time according to the currently activated computation branch during the execution of the inference task, so as to suppress the peak memory usage of the artificial intelligence middleware in the edge computing node.

[0014] Preferably, the artificial intelligence middleware has a pre-built heterogeneous computing graph pre-compilation framework; in step S103, the operator subgraph is specifically compiled for the underlying acceleration unit of the edge computing node through the heterogeneous computing graph pre-compilation framework so that the underlying instruction set of the operator subgraph is adapted to the computing power distribution of heterogeneous hardware.

[0015] Preferably, the dye formulation vector output in step S105 includes multidimensional feature values ​​corresponding to the color masterbatch concentration, and the output frequency of the dye formulation vector is synchronized with the working frequency of the color matching valve in the industrial production line.

[0016] Preferably, in step S103, the scheduling engine performs dynamic priority arbitration on the inference task of the target spectral tensor based on the task queue priority of the artificial intelligence middleware. If the current task triggers a continuous color change request, the scheduling weight of the specific inference computation graph is increased, and the operator sampling accuracy of the low feature entropy segment is compressed.

[0017] Preferably, before obtaining the target spectral tensor in step S101, the method further includes: monitoring the hardware offset parameters of the spectral acquisition front end, and using a preset calibration operator to shift the original spectral signal obtained by the spectral acquisition front end to a reference line in order to suppress signal noise generated by industrial ambient light.

[0018] Preferably, in step S103, the reorganization process is combined with neural network weight pruning logic: when loading operator subgraphs, the scheduling engine identifies neuron nodes whose weight values ​​are lower than a preset quiescent threshold and blocks the corresponding weight loading path to reduce the bus bandwidth occupation of forward inference.

[0019] Preferably, the artificial intelligence middleware monitors the memory level of the edge computing node; if the memory level exceeds a preset safety threshold, step S103 reduces the topological depth of the specific inference computing graph by retrieving a low-precision operator subgraph to release memory resources.

[0020] Compared with existing technologies, the intelligent algorithm-based dye color matching method of the present invention has the following advantages:

[0021] 1. In the intelligent algorithm for dye color matching, the absolute value of the first-order difference of the target spectral tensor in adjacent feature dimensions is used to characterize the local fluctuation gradient of the signal. This is then used as a trigger condition to implement dynamic routing among multiple pre-compiled subgraphs, enabling the inference topology of the neural network to adaptively adjust with the local information entropy density of the input data. This mechanism significantly reduces redundant operator calls in the spectral flat frequency band while ensuring the color matching accuracy of the absorption peak frequency band. This eliminates the bus bandwidth squeeze when edge hardware processes low-information data at the underlying computational logic level, and solves the mismatch between the computing power requirements of artificial intelligence models and the rigid constraints of hardware resources in industrial edge nodes.

[0022] 2. By establishing a mapping relationship between tensor lifetimes and operator subgraph topologies, differentiated memory reuse control is implemented on intermediate data generated by different computation paths at the inference framework memory management layer. This enables the system to instantly overwrite invalid tensor spaces based on the currently active computation branch during inference task execution. This dynamic memory management strategy works in deep synergy with the data-driven operator scheduling mechanism, suppressing peak memory usage at edge nodes while avoiding uncontrollable time consumption caused by conventional memory reclamation mechanisms, thus improving the system's operational stability under long-term, high-frequency continuous color matching conditions.

[0023] 3. A feedback compensation logic based on execution lag deviation is introduced. The scheduling overhead generated by dynamic reorganization is quantified by calculating the difference between the real clock cross-section of the specific inference computation graph loaded in the underlying computing accelerator and the instruction issuance clock cross-section. Based on this, the subgraph instruction prefetch trigger time base of the next inference cycle is dynamically corrected. This timing hedging mechanism enables the system to maintain a high degree of timing determinism when dealing with nonlinear and dynamically changing inference tasks. It ensures that the output frequency of the generated dye formula vector is adapted to the physical rhythm of the industrial production line and avoids the problem of color matching valve action lag caused by microsecond-level delay jitter caused by dynamic scheduling. Attached Figure Description

[0024] Figure 1 This is an overall flowchart of the intelligent algorithm for dye color matching in this invention;

[0025] Figure 2 This is a structural diagram of the memory reuse control logic of the present invention. Detailed Implementation

[0026] The technical solutions of the embodiments of this application will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of this application are within the scope of protection of this application.

[0027] It should be noted that all directional and positional terms used in this invention, such as: up, down, left, right, front, back, vertical, horizontal, inner, outer, top, bottom, transverse, longitudinal, center, etc., are only used to explain the relative positional relationship and connection between components in a specific state (as shown in the accompanying drawings). They are only for the convenience of describing this invention and do not require that this invention be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention. In addition, the descriptions of "first," "second," etc., in this invention are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated.

[0028] In the description of this invention, unless otherwise explicitly specified and limited, the terms installation, connection, and linking should be interpreted broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections; they can refer to direct connections or indirect connections through an intermediate medium; they can refer to the internal connection of two components. For those skilled in the art, the specific meaning of the above terms in this invention can be understood according to the specific circumstances.

[0029] In the description of this specification, references to the terms "an embodiment," "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example, and the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0030] A dye color matching intelligent algorithm mixing method includes the following steps:

[0031] Step S101: Obtain the target spectral tensor obtained through serialization processing at the spectral acquisition front end;

[0032] Step S102: Slice the target spectral tensor at the inference front end and extract the waveform components that characterize the numerical gradient distribution. Based on the waveform components, divide the target spectral tensor into high feature entropy segments and low feature entropy segments corresponding to different local information entropy densities.

[0033] Step S103: Based on the high feature entropy segment and the low feature entropy segment, match the corresponding subgraph from the preset operator subgraph corresponding to different computing power levels and reorganize it to construct a specific inference calculation graph for the target spectral tensor. Run the specific inference calculation graph through the scheduling engine of the artificial intelligence middleware to complete the forward inference of the neural network.

[0034] Step S104: Calculate the time delay offset between the real time section and the instruction issuance time section generated by the scheduling engine loading the specific inference computation graph. Based on the time delay offset, compensate the subgraph instruction prefetch trigger time base of the next inference cycle to offset the scheduling overhead generated by computation graph reorganization, so that the output frequency of the artificial intelligence middleware matches the sampling step size of the industrial production line.

[0035] Step S105: Output the dye formulation vector based on the result of forward inference.

[0036] Preferably, step S102 specifically includes: step S1021, using a sliding window to perform numerical truncation on the feature axis of the target spectral tensor, and calculating the absolute value of the first-order gradient of adjacent feature components; step S1022, comparing the absolute value of the first-order gradient with a preset fluctuation threshold, if the absolute value of the first-order gradient continuously exceeds the fluctuation threshold and the feature length reaches a preset proportion, then the corresponding tensor interval is defined as a high feature entropy segment, otherwise it is defined as a low feature entropy segment; wherein, the high feature entropy segment is mapped to a dense convolution operator subgraph loaded with full computing power, and the low feature entropy segment is mapped to a depthwise separable convolution operator subgraph that reduces redundant operator calls.

[0037] Preferably, step S103, during the execution of the specific inference computation graph, further includes: establishing a mapping relationship between tensor lifetime and operator subgraph topology; implementing memory reuse control on intermediate data generated by the computation path in the memory management layer of the artificial intelligence middleware; and overwriting invalid tensor space in real time according to the currently activated computation branch during the execution of the inference task, so as to suppress the peak memory usage of the artificial intelligence middleware in the edge computing node.

[0038] Preferably, the artificial intelligence middleware has a pre-built heterogeneous computing graph pre-compilation framework; in step S103, the operator subgraph is specifically compiled for the underlying acceleration unit of the edge computing node through the heterogeneous computing graph pre-compilation framework so that the underlying instruction set of the operator subgraph is adapted to the computing power distribution of heterogeneous hardware.

[0039] Preferably, the dye formulation vector output in step S105 includes multidimensional feature values ​​corresponding to the color masterbatch concentration, and the output frequency of the dye formulation vector is synchronized with the working frequency of the color matching valve in the industrial production line.

[0040] Preferably, in step S103, the scheduling engine performs dynamic priority arbitration on the inference task of the target spectral tensor based on the task queue priority of the artificial intelligence middleware. If the current task triggers a continuous color change request, the scheduling weight of the specific inference computation graph is increased, and the operator sampling accuracy of the low feature entropy segment is compressed.

[0041] Preferably, before obtaining the target spectral tensor in step S101, the method further includes: monitoring the hardware offset parameters of the spectral acquisition front end, and using a preset calibration operator to shift the original spectral signal obtained by the spectral acquisition front end to a reference line in order to suppress signal noise generated by industrial ambient light.

[0042] Preferably, in step S103, the reorganization process is combined with neural network weight pruning logic: when loading operator subgraphs, the scheduling engine identifies neuron nodes whose weight values ​​are lower than a preset quiescent threshold and blocks the corresponding weight loading path to reduce the bus bandwidth occupation of forward inference.

[0043] Preferably, the artificial intelligence middleware monitors the memory level of the edge computing node; if the memory level exceeds a preset safety threshold, step S103 reduces the topological depth of the specific inference computing graph by retrieving a low-precision operator subgraph to release memory resources.

[0044] Example 1: In the front-end edge computing node of a dyeing production line deployed in a high-frequency color-changing industrial site, the technical solution of this invention operates in an industrial control environment with limited computing power. The edge computing node faces millisecond-level inference delay pressure in the high-dimensional nonlinear mapping process of the target color feature parameters. Because the target spectral tensor exhibits local sparsity and nonlinear differences in different bands, the information content of the smooth band is extremely low, while the information content of the absorption peak band is extremely high. Traditional artificial intelligence middleware adopts a static spectrum loading method, which solidifies the operator topology of the neural network during the system startup phase. This causes the computing acceleration unit to still schedule all operators when processing spectral bands with smooth reflectance changes, resulting in computational redundancy and the risk of memory pool overflow. The scheduling engine of the artificial intelligence middleware receives the target spectral tensor after it is collected and serialized by the spectrometer. After acquiring the original one-dimensional spectral sequence, the inference front end reshapes the one-dimensional spectral sequence into a two-dimensional target spectral tensor containing spectral channels and spatial dimension features according to a preset wavelength band interval. In the specific reshaping process, the inference front end uses the running speed of the industrial production line conveyor belt as the time axis reference, and horizontally splices the single-dimensional wavelength reflectance column vectors acquired at continuous sampling moments according to the time sequence. This allows the one-dimensional spectral band data to be horizontally expanded to create a pseudo-spatial coordinate axis representing the physical displacement of the dyeing substrate. This accurately maps the single-point colorimetric signal into a continuous spatiotemporal feature matrix that can be directly processed by a two-dimensional convolution kernel. Based on the signal processing theory that optical reflection signals have high inter-channel redundancy in the flat frequency band, the data tensor corresponding to the low feature entropy band has strong physical correlation in the channel dimension. Depth-separable convolution is used to extract features while maintaining the accuracy of the target chromaticity coordinate regression output value when independently solving spatial and channel features. Local feature evaluation logic is initiated at the inference front end, and the target spectral tensor is extracted... By calculating the sum of the absolute values ​​of the first-order differences in adjacent feature dimensions, a local spectral fluctuation gradient characterizing the degree of local fluctuation in the signal waveform components is generated. The local spectral fluctuation gradient As the underlying operator routing landmark of the middleware, it translates the features of the physical spectral signal into dynamic scheduling instructions for the computational graph, thereby enabling the inference topology of the neural network to evolve in real time with the feature density of the input data.

[0045] When the local spectral fluctuation gradient Exceeding the preset fluctuation threshold When the current feature receptive field is determined to be in a high-dimensional nonlinear band, the scheduling engine triggers the first routing branch, waking up the first pre-compiled subgraph based on dense convolution operators in the pre-compiled operator library from the storage medium. Enter the system memory pool; if the local spectral fluctuation gradient Below the fluctuation threshold If the current information band is determined to be flat, the second routing branch is triggered, waking up the second pre-compiled subgraph compiled based on the depthwise separable convolution operator. This data gradient-based pre-control flow enables adaptive adjustment of operator topology, ensuring registration accuracy in absorption peak frequency bands while eliminating invalid operator calls in smooth frequency bands, thus avoiding mismatch between hardware computing power limitations and algorithm requirements at the underlying computational logic level.

[0046] The scheduling engine is based on the target spectral tensor The timing index will wake up the first precompiled subgraph. With the second precompiled subgraph The algorithm concatenates and constructs a specific inference computation graph for the current input features, which is then sent to the underlying tensor acceleration unit for forward inference. During this concatenation operation, to address the differences in feature map spatial scale and channel dimension between dense convolutional subgraphs and depthwise separable convolutional subgraphs at their boundaries, the scheduling engine dynamically inserts channel-aligned convolutional layers generated by a pre-compiled framework at the boundary topology nodes of the two heterogeneous subgraphs to unify the number of channels. It also calls the tensor filling operator to perform zero-value padding on the output feature matrix of the preceding subgraph according to the receptive field boundary requirements of the subsequent subgraph, ensuring seamless mapping between the memory stride of the feature tensor and the register sliding window of the underlying computation unit during cross-subgraph data flow. To compensate for the scheduling overhead caused by dynamic graph reassembly, the middleware captures the real clock cross-section of the first data block of the specific inference computation graph loaded by the computation accelerator in real time. And combined with the instruction-issued clock section Calculate the execution lag compensation amount ; Execution delay compensation amount The calculation relationships are as follows: ;in, To implement the delayed compensation amount, The real clock section loaded for the first data block; For the clock segment where the scheduling engine issues execution instructions, the scheduling engine utilizes execution lag compensation. The system dynamically adjusts the subgraph instruction prefetching time base for the next inference cycle, eliminating the nonlinear waiting time of the underlying bus caused by dynamic computation graph switching. Simultaneously, the middleware memory management layer establishes a mapping relationship between tensor lifetimes and operator subgraph topologies, overwriting invalid tensor spaces in real-time during inference task execution to suppress peak memory usage. The final generated dye formula vector output frequency is synchronized with the color matching valve operating frequency of the industrial production line, ensuring that color matching instructions are issued in line with the production cycle. This achieves nonlinear voltage reduction of forward inference latency while ensuring memory security for edge devices and controlling bus bandwidth encroachment in the forward inference stage. The scheduling engine, within the tensor acceleration unit, executes neural network weight pruning logic. The system pre-collects the weight distribution variance during the offline model training phase, calculates the static quiescent threshold, and when constructing the specific inference computation graph and loading the weight matrices of each pre-compiled subgraph, the scheduling engine uses a comparator to compare the current weights one by one. The scheduling engine considers the absolute value of node weights and the quiescent threshold. When the absolute value of a specific neuron node weight is lower than the quiescent threshold, the scheduling engine sets the weight-mapped physical storage area as a skip flag in the Tensor Accelerator Unit's memory address mapping table, blocking direct memory access (DMA) read request pulses for the physical storage area. Specifically, the mechanism for blocking DMA read request pulses does not act on discrete individual neuron weights, but is based on a structured pruning strategy. The weight tensor is divided into continuous data blocks aligned with the hardware cache line size. When the absolute values ​​of all weights in a certain data block are lower than the quiescent threshold, the scheduling engine rewrites the discrete collection DMA descriptor linked list of the Tensor Accelerator Unit and removes the descriptor nodes of that continuous physical storage area. This allows the entire invalid zero-value region to be skipped during the bus data transfer phase, avoiding disruption of the underlying multiply-accumulate array's data alignment and instruction prefetch pipeline.

[0047] Example 2: In a dyeing production line verification environment deployed with an industrial-grade edge computing gateway, the verification system was used to dynamically schedule the neural network operator based on the target spectral tensor and to evaluate its real-time performance and memory stability parameters. The edge computing gateway was equipped with a quad-core processor with a clock speed of 2.0 GHz and a tensor acceleration unit with a floating-point operation capability of 4.0 TFLOPS. The system's available memory capacity was set to 2.0 GB. The target spectral tensor data used in the experiment originated from an industrial standard dye spectral database containing 1000 sets of reflectance sequences, covering a spectral band from 380 nm to 780 nm, with a sampling interval of 5 nm. Regarding the fluctuation threshold... The setting is based on the technical consideration of balancing the bus scheduling overhead caused by subgraph switching with the algorithm registration accuracy. If the fluctuation threshold is... If the value is less than 0.15, the scheduling engine will be in the first pre-compiled subgraph. With the second precompiled subgraph The increased frequency of switching between them leads to a larger amount of execution lag compensation. The computational logic continuously occupies instruction cycles, reducing inference real-time performance; if the fluctuation threshold... If the value is higher than 0.45, the second precompiled subgraph with a lower operator density will be called in the spectral absorption peak frequency band. This results in a loss of color matching accuracy; by statistically mapping the distribution characteristics of the sum of the absolute values ​​of the first-order differences of 500 known spectral samples, when the fluctuation threshold... When set to 0.35, the gain from releasing computing resources during subgraph switching is greater than the fixed time consumed by bus scheduling.

[0048] During the verification process, samples using the traditional static graph loading method were designated as the control group, while samples using the method of this invention were designated as the sample group of this invention. Gaussian white noise with a signal-to-noise ratio of 20 dB was superimposed on the signal source at the spectral acquisition front-end to simulate industrial field interference. Data observation results showed that the control group had an average forward inference delay of 18.5 ms and a peak memory level of 1.95 GB when processing target spectral tensors containing high feature entropy bands. The sample group of this invention resolved local spectral fluctuation gradients through a scheduling engine. By guiding operator routing and waking up subgraphs with low operator density in low feature entropy segments, the average forward inference latency is reduced to 8.2ms, the peak memory usage remains constant at 920.0MB, and local spectral fluctuation gradients are minimized. The peak memory usage shows a positive correlation with the peak information density bands, confirming that the evolution state of the operator topology is logically aligned with the input feature density.

[0049] To verify the amount of execution delay compensation To address the timing determinism adjustment, a partially missing control group was set up by removing the execution lag compensation logic, and the request trigger frequency of the target spectrum was set to 50Hz. Experimental data showed that the partially missing control group, due to its inability to correct the scheduling overhead caused by dynamic graph reassembly, experienced a 1.5ms clock drift after 200 consecutive inference cycles, resulting in a longer computation graph loading time. Cross-section of instruction issuance clock The deviations accumulate step by step; the sample group of this invention utilizes the execution lag compensation amount. By adjusting the instruction prefetch trigger time base, the completion cross-sectional deviation of its inference task is consistently below 50.0. To achieve timing synchronization between the inference frequency and the working cycle of the color matching valve, in the pressure verification targeting parameter boundaries, as the waveform complexity of the input signal increases, the local spectral fluctuation gradient... After exceeding the performance inflection point of 0.85, the system automatically enters the full operator scheduling state, at which point the first pre-compiled subgraph... With the scheduling ratio approaching 100% and inference latency and memory usage stabilizing, this nonlinear response characteristic determines the upper limit of computing power allocation for the proposed scheme under extreme nonlinear bands, proving the fluctuation threshold. The subgraph reorganization mechanism has regulatory effectiveness within the fluctuating gradient range of 0.15 to 0.85. Based on the above verification results, this invention uses a local feature evaluation-driven operator routing mechanism in conjunction with execution hysteresis compensation logic. While preserving the accuracy of key band feature mapping, it suppresses memory peaks by dynamically overwriting invalid tensor spaces, making the output frequency of the dye formulation vector adapt to the production mode of industrial production lines, thus solving the latency jitter problem of edge computing nodes under computing power constraints.

[0050] Example 3: This example combines Figures 1 to 2 This section describes a dye color matching intelligent algorithm mixing method, such as... Figure 1 As shown, step S101 acquires the target spectral tensor obtained through serialization processing of the spectral acquisition front end, providing raw signal input data for subsequent feature extraction. Then, step S102 is executed to extract the numerical gradient waveform components of the target spectral tensor at the inference front end, and divide the tensor into high feature entropy segments and low feature entropy segments corresponding to different local information entropy densities. In step S103, the operator subgraphs corresponding to the computing power level are matched and recombined according to the high / low feature entropy segments to construct a specific inference computation graph. The scheduling engine runs to complete the forward inference of the neural network. At the same time, step S104 is executed to calculate the time delay offset generated by the scheduling engine recombining the computation graph, and to compensate for the subgraph instruction prefetch time base of the next cycle to offset the scheduling overhead and match the sampling step size of the industrial production line. Finally, step S105 outputs a dye formula vector containing the color masterbatch concentration feature value to achieve time synchronization with the working frequency of the color matching valve of the industrial production line.

[0051] like Figure 2 As shown, the system uses the currently active computation branch operator to drive the directed acyclic graph reference counting model, identifies inactive address segments of nodes on the computation path, extracts the physical starting address to locate the invalid tensor space storing intermediate data, identifies it as the real-time overwrite region for new input tensors, and establishes a memory reuse control mapping to transfer data to the next level operator node, thereby realizing dynamic reclamation and in-situ overwriting of memory resources during the inference task.

[0052] Example 4: In a digital workshop equipped with continuous dyeing equipment, the artificial intelligence middleware of this invention faces a situation where the intensity of the light source in the production area decreases non-linearly with operating time. When the light source intensity deviation causes the target spectral tensor to... When the global benchmark drifts, the preset fluctuation threshold The inability to capture the information entropy change of the spectral absorption peak triggers the scheduling engine in the first pre-compiled subgraph. With the second precompiled subgraph During the switching process, a judgment deviation occurred, causing computing resources to still schedule dense convolution operators in flat bands. The parameter adaptation module of the artificial intelligence middleware continuously monitors the local spectral fluctuation gradient output by the scheduling engine. Compensation for delayed execution The correlation direction is determined, and the signal-to-noise ratio characteristics of the current input signal are calculated at the inference front end; the parameter adaptation module uses sliding window statistical logic to obtain the local spectral fluctuation gradient of the most recent 100 inference cycles. The mean is defined as the dynamic gradient benchmark. To avoid interference from the light intensity attenuation assessment caused by the spectral differences of different dye formulations during continuous color changes in industrial production lines, the statistical operation of obtaining the most recent 100 inference cycles was limited to the calibration phase during the color change and cleaning intervals. That is, the middleware only collected the pure hardware background signal fluctuations generated when the spectral acquisition front-end was aligned with the standard reference whiteboard, ensuring the extracted local spectral fluctuation gradients were accurately measured. The mean value accurately represents the baseline state of the physical luminescence intensity of the current ambient light source, without any chemical variables related to the concentration of the color masterbatch. When characteristic amplitude compression caused by light source attenuation is detected, the parameter adaptive module adjusts the value based on the dynamic gradient baseline. With preset fluctuation threshold The ratio calculation threshold correction factor Threshold correction factor The calculation relationships are as follows: ;in, This is the threshold correction factor, and its dimension is a pure number; As a dynamic gradient benchmark, its dimensions are the same as... Consistent; To preset the fluctuation threshold, based on the physical sensing model that the signal voltage attenuation of the photoelectric conversion sensor exhibits a linear scaling law under continuous operating conditions, the system applies the above parameters to calculate the ratio quantization and follows the light intensity shift state of the current test environment to preset the fluctuation threshold. These values ​​are taken from fixed reference values ​​generated during the system deployment phase when a standard reflective whiteboard is calibrated.

[0053] The scheduling engine utilizes a threshold correction factor. The current fluctuation threshold is corrected to enable dynamic calibration of operator routing landmarks as they drift with the physical environment, thereby identifying absorption peak bands even under conditions of decreased signal contrast. During operator flow, the scheduling engine uses the operator orchestrator to process the first pre-compiled subgraph. The algorithm decomposes the operator computing power levels and binds the static random access memory addresses inside the tensor acceleration unit to tensor slices. The scheduling engine loads operator weights through low-level address mapping instructions, eliminating data movement on the memory bus. By introducing a threshold correction loop based on dynamic gradient benchmarks, the registration accuracy of operator routing remains above 98.5% in a drift scenario with a 20% decrease in light intensity. The address binding mechanism in the computation graph reorganization process ensures that the system's memory bus utilization is below 65.0% under a 50Hz color change request, solving the problem of threshold failure caused by environmental noise and the resulting computing power oscillation. By mapping changes in the physical environment to logical correction factors within the middleware, the neural network inference process has self-compensation capabilities for non-ideal factors in the production environment.

[0054] Example 5: In the initialization scenario of deploying artificial intelligence middleware to a new type of edge computing node, the system determines the fluctuation threshold based on the background noise characteristics of the physical environment. The initial deviation; the scheduling engine retrieves the spectrometer background noise stream under no-load conditions, and continuously acquires it. The frame is empty, and the second moment of the dimension is calculated to obtain the noise variance term characterizing the inherent fluctuations of the system. The scheduling engine uses the noise variance term. With preset gain coefficient The product is used to set the fluctuation threshold under the current operating condition. The dynamic lower limit; this calibration process enables the middleware's operator routing mechanism to complete in-situ registration based on the electrical characteristics of different optical sensors, eliminating local spectral fluctuation gradients caused by hardware channel differences. Risk of misjudgment.

[0055] When the system encounters fluctuations in instruction pipeline depth due to differences in the microarchitecture of the tensor acceleration unit, the AI ​​middleware reconstructs the mapping relationship between the operator subgraph and the underlying registers during the kernel loading phase; the scheduling engine reads the pipeline depth parameters of the acceleration unit. And combined with the system bus clock frequency To calculate the instruction prefetch offset for a specific hardware architecture Command issued to prefetch offset The calculation relationships are as follows: ;in, Prefetch offset for instruction issuance For pipeline depth parameters, For the clock frequency, the scheduling engine will issue instructions with a prefetch offset. Injection execution delay compensation amount In the initialization sequence, the clock section for correcting instruction issuance is... The baseline alignment logic ensures that the specific inference computation graph maintains physical beat consistency between the inference frequency and the color valve action frequency when deployed across heterogeneous accelerators.

[0056] Example 6: In a system deployment scenario adapted to heterogeneous tensor acceleration chipsets, the system executes an operator graph pre-compilation procedure for underlying hardware primitives to determine the first pre-compiled subgraph. With the second precompiled subgraph The execution kernel function mapping table is used. The operator orchestrator traverses the topology of the operator subgraph, extracts the operator parallelism parameters based on the instruction set width of the acceleration chip, and generates an operator weight tensor layout aligned with the size of the L2 cache line in the storage medium. When the system faces computing power deviations between different batches of chips, the scheduling engine sends a message containing... A sequence of probes for virtual computing tasks is used to monitor the actual throughput of the memory bus and to determine the bus response latency based on the obtained data. The depth of the instruction prefetch queue is adjusted, and the adjustment logic follows the following relationship: ,in, For the instruction prefetch queue depth, The normalization constant is To reduce bus response latency, this pre-probing procedure enables the AI ​​middleware to coordinate inference logic and physical bandwidth when the hardware infrastructure changes. When the computing system enters the memory allocation phase of forward inference, the memory management layer executes memory pool pre-allocation and logical address space mapping procedures. Static buffer boundaries are defined by calculating the maximum concurrency of tensor lifetimes required in the current inference task chain, within the first pre-compiled subgraph. With the second precompiled subgraph During the node splicing process, the memory management layer overwrites the data in place based on the pre-generated operator memory offset mapping table, allowing the intermediate feature map in the inference process to be iterated directly in the preset register address range. This avoids the accumulation of physical memory fragments caused by dynamic memory allocation. The address alignment deviation during the inference computation graph reassembly process is maintained within 64 bytes. Furthermore, under a 72-hour continuous color stress test, the stack level fluctuation of the edge computing node is less than 5.0%, and the artificial intelligence middleware maintains execution determinism in a heterogeneous acceleration environment.

[0057] In adaptation scenarios for ultra-wideband continuous coloring tasks, the AI ​​middleware uses an offline-constructed computational cost mapping matrix to define the feature entropy segment partitioning criteria. Quantization is performed, and the scheduling engine reads the local spectral fluctuation gradient. And retrieve the computing power cost mapping matrix To determine the corresponding computing power level index Computing power level index The judgment logic is as follows: ,in, This is a computing power level index, and its value is a non-negative integer. For local spectral fluctuation gradient, The preset quantization step size has the same dimensions as... Consistency, determine the preset quantization step size During the middleware startup phase, the scheduling engine extracts the total number of layers of the pre-compiled subgraph within the computing power cost mapping matrix M loaded into system memory. It then controls the spectral acquisition front-end to scan a preset standard gradient color chart to capture the maximum spectral fluctuation parameter within the system's extreme range. The scheduling engine calculates the quotient between the maximum spectral fluctuation parameter and the total number of layers of the pre-compiled subgraph, and directly defines and solidifies the resulting quotient as the preset quantization step size. Before the division operation is performed, the scheduling engine pre-extracts the full-scale reference voltage value of the analog-to-digital converter of the industrial spectrometer and normalizes the maximum spectral fluctuation parameter, converting it into a dimensionless coefficient characterizing the relative severity of signal changes. This dimensionless coefficient is then divided by the total number of layers in the pre-compiled subgraph, thereby evenly distributing the global maximum fluctuation margin to each topological depth level of the network. The output dimensionless preset quantization step size is then calculated. This forms a mathematical benchmark for establishing the relative mapping relationship between floating-point operation density and signal fluctuation. This hierarchical mapping mechanism enables the middleware to retrieve the execution kernel function matching a specific floating-point operation density from the pre-compiled operator library based on the fine fluctuation characteristics of the spectral signal, thus realizing fine-grained resource scheduling of the inference graph under complex frequency domain distribution.

[0058] When the system executes invalid tensor space overwrite logic during the forward inference phase, the middleware memory management layer identifies the inactive address range of the current operator node by establishing a tensor reference counting model based on a directed acyclic graph. During the node splicing phase of constructing the specific inference computation graph, the memory management layer extracts the physical starting address of the first inactive tensor. It sets this as the overlapping write address of the input tensor of the next-level operator, thereby achieving high-water level suppression of the memory pool at the underlying hardware level. This in-situ overwrite mechanism enables the middleware to suppress peak memory overhead when processing spectral tensor sequences, ensuring that edge computing nodes do not generate logic hangs caused by stack overflow under the color matching valve action condition.

[0059] The embodiments of this application have been described above with reference to the accompanying drawings. Unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other. This application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit of this application and the scope of protection of this invention, and all of these forms are within the protection scope of this application.

Claims

1. A dye color matching intelligent algorithm mixing method, characterized in that, Includes the following steps: Step S101: Obtain the target spectral tensor obtained through serialization processing at the spectral acquisition front end; Step S102: Slice the target spectral tensor at the inference front end and extract the waveform components that characterize the numerical gradient distribution. Based on the waveform components, divide the target spectral tensor into high feature entropy segments and low feature entropy segments corresponding to different local information entropy densities. Step S103: Based on the high feature entropy segment and the low feature entropy segment, match the corresponding subgraph from the preset operator subgraph corresponding to different computing power levels and reorganize it to construct a specific inference calculation graph for the target spectral tensor. Run the specific inference calculation graph through the scheduling engine of the artificial intelligence middleware to complete the forward inference of the neural network. Step S104: Calculate the time delay offset between the real time section and the instruction issuance time section generated by the scheduling engine loading the specific inference computation graph. Based on the time delay offset, compensate the subgraph instruction prefetch trigger time base of the next inference cycle to offset the scheduling overhead generated by computation graph reorganization, so that the output frequency of the artificial intelligence middleware matches the sampling step size of the industrial production line. Step S105: Output the dye formulation vector based on the result of forward inference.

2. The intelligent algorithm-based dye color matching method according to claim 1, characterized in that, Step S102 specifically includes: Step S1021, using a sliding window to perform numerical truncation on the feature axis of the target spectral tensor, and calculating the absolute value of the first-order gradient of adjacent feature components; Step S1022, comparing the absolute value of the first-order gradient with a preset fluctuation threshold. If the absolute value of the first-order gradient continuously exceeds the fluctuation threshold and the feature length reaches a preset proportion, then the corresponding tensor interval is defined as a high feature entropy segment; otherwise, it is defined as a low feature entropy segment. Among them, the high feature entropy segment is mapped to the dense convolution operator subgraph loaded with full computing power, and the low feature entropy segment is mapped to the depthwise separable convolution operator subgraph that reduces redundant operator calls.

3. The intelligent algorithm-based dye color matching method according to claim 1, characterized in that, Step S103, during the execution of the specific inference computation graph, also includes: establishing a mapping relationship between tensor lifetime and operator subgraph topology; implementing memory reuse control on intermediate data generated by the computation path in the memory management layer of the artificial intelligence middleware; and overwriting invalid tensor space in real time according to the currently activated computation branch during the execution of the inference task, so as to suppress the peak memory usage of the artificial intelligence middleware in the edge computing node.

4. The intelligent algorithm-based dye color matching method according to claim 1, characterized in that, The artificial intelligence middleware has a pre-built heterogeneous computing graph pre-compilation framework; in step S103, the operator subgraph is specifically compiled for the underlying acceleration unit of the edge computing node through the heterogeneous computing graph pre-compilation framework so that the underlying instruction set of the operator subgraph is adapted to the computing power distribution of heterogeneous hardware.

5. The intelligent algorithm-based dye color matching method according to claim 1, characterized in that, The dye formulation vector output in step S105 includes multidimensional feature values ​​corresponding to the color masterbatch concentration, and the output frequency of the dye formulation vector is synchronized with the working frequency of the color matching valve in the industrial production line.

6. The intelligent algorithm-based dye color matching method according to claim 1, characterized in that, In step S103, the scheduling engine performs dynamic priority arbitration on the inference task of the target spectral tensor based on the task queue priority of the artificial intelligence middleware. If the current task triggers a continuous color change request, the scheduling weight of the specific inference computation graph is increased, and the operator sampling accuracy of the low feature entropy segment is compressed.

7. The intelligent algorithm-based dye color matching method according to claim 1, characterized in that, Before obtaining the target spectral tensor in step S101, the method further includes: monitoring the hardware offset parameters of the spectral acquisition front end, and using a preset calibration operator to shift the original spectral signal obtained by the spectral acquisition front end to the baseline in order to suppress signal noise generated by industrial ambient light.

8. The intelligent algorithm-based dye color matching method according to claim 1, characterized in that, In step S103, the reorganization process is combined with neural network weight pruning logic: when loading operator subgraphs, the scheduling engine identifies neuron nodes whose weight values ​​are lower than a preset quiescent threshold and blocks the corresponding weight loading path to reduce the bus bandwidth occupation of forward inference.

9. The intelligent algorithm-based dye color matching method according to claim 1, characterized in that, The artificial intelligence middleware monitors the memory level of the edge computing nodes; if the memory level exceeds the preset safety threshold, step S103 reduces the topological depth of the specific inference computing graph by retrieving the low-precision operator subgraph in order to release memory resources.

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