A display panel and display device

CN122551709APending Publication Date: 2026-08-11TIANMA ADVANCED DISPLAY TECH INST (XIAMEN) CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-06-30
Publication Date
2026-08-11

AI Technical Summary

Technical Problem

[0003]现有显示面板的驱动方案存在实际发光时间偏离目标值,影响低灰阶下的显示均一性

Benefits of technology

[0029]The display panel and display device provided in this embodiment of the invention, through a zone control strategy, use a fixed current intensity in the first grayscale range (high grayscale range) and control the grayscale by adjusting the duration of the driving current (i.e., pulse width modulation) to ensure luminous efficiency in high grayscale; and use a fixed duration in the second grayscale range (low grayscale range) and control the grayscale by adjusting the current intensity of the driving current (i.e., pulse amplitude modulation) to avoid interference caused by excessively high edge transition time due to extremely narrow pulse width, improve display uniformity and color shift performance in low grayscale, thereby improving the display quality of low grayscale while ensuring high grayscale luminous efficiency, and achieving good display effect across the entire grayscale range.

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Abstract

This invention discloses a display panel and a display device. The grayscale of the display panel is divided into at least a first grayscale range and a second grayscale range. The grayscale levels in the first grayscale range are higher than those in the second grayscale range. The first grayscale range includes first and second grayscale levels with different grayscale values. The driving currents corresponding to the first and second grayscale levels have equal current intensities, but unequal durations. The second grayscale range includes third and fourth grayscale levels with different grayscale values. The driving currents corresponding to the third and fourth grayscale levels have unequal current intensities, but equal durations. The display panel and display device provided by this invention, through a zone control strategy, improve the display quality of low grayscale levels while ensuring high grayscale luminous efficiency, achieving a good display effect across the entire grayscale range.
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Description

Technical Field

[0001] This invention relates to the field of display technology, and more particularly to a display panel and display device. Background Technology

[0002] Micro-LED display panels are widely used in various display devices due to their advantages such as high brightness, long lifespan, high energy efficiency, wide color gamut, and fast response speed. To achieve high-performance Micro-LED displays, an active matrix (AM) driving method is typically used, where the driving scheme of the pixel circuit directly affects the display quality.

[0003] Existing display panel driving solutions have a deviation between the actual emission time and the target value, which affects the display uniformity at low grayscale levels. Summary of the Invention

[0004] The present invention provides a display panel and a display device to improve the uniformity of display at low gray levels and improve the display effect.

[0005] According to one aspect of the present invention, a display panel is provided, including a light-emitting element and a pixel driving circuit that outputs a driving current to the light-emitting element; The grayscale of the display panel is at least divided into a first grayscale range and a second grayscale range, wherein the grayscale in the first grayscale range is higher than the grayscale in the second grayscale range. The first grayscale range includes a first grayscale and a second grayscale with different grayscale values. The current intensities of the driving currents corresponding to the first grayscale and the second grayscale are equal, and the durations of the driving currents corresponding to the first grayscale and the second grayscale are not equal. The second grayscale range includes a third grayscale and a fourth grayscale with different grayscale values. The current intensities of the driving currents corresponding to the third grayscale and the fourth grayscale are not equal, and the durations of the driving currents corresponding to the third grayscale and the fourth grayscale are equal.

[0006] Optionally, within the first grayscale range, the duration of the driving current increases as the grayscale level increases; Within the second grayscale range, the current intensity of the driving current increases as the grayscale level increases.

[0007] Optionally, the grayscale also includes a third grayscale interval located between the first grayscale interval and the second grayscale interval; the grayscale in the third grayscale interval is lower than the grayscale in the first grayscale interval and higher than the grayscale in the second grayscale interval. The third grayscale range includes a fifth grayscale and a sixth grayscale with different grayscale levels. The duration of the driving current corresponding to the fifth grayscale and the sixth grayscale are not equal, and the current intensity of the driving current corresponding to the fifth grayscale and the sixth grayscale is not equal.

[0008] Optionally, the gray level difference between the fifth gray level and the sixth gray level is equal to the gray level difference between the first gray level and the second gray level. The difference in duration of the driving current corresponding to the fifth gray level and the sixth gray level is less than the difference in duration of the driving current corresponding to the first gray level and the second gray level.

[0009] Optionally, the difference between the fifth gray level and the sixth gray level is equal to the difference between the third gray level and the fourth gray level; The difference in current intensity between the driving current corresponding to the fifth gray level and the sixth gray level is less than the difference in current intensity between the driving current corresponding to the third gray level and the fourth gray level.

[0010] Optionally, within the third grayscale range, the duration of the driving current increases with the increase of the grayscale, and the current intensity of the driving current increases with the increase of the grayscale.

[0011] Optionally, within the third grayscale range, the rate of change of the duration of the driving current relative to the grayscale is less than the rate of change of the duration relative to the grayscale in the first grayscale range. And / or, Within the third grayscale range, the rate of change of the driving current intensity relative to the grayscale is less than the rate of change of the current intensity relative to the grayscale in the second grayscale range.

[0012] Optionally, the third grayscale interval includes at least two sub-grayscale intervals, and the at least two sub-grayscale intervals include a first sub-grayscale interval and a second sub-grayscale interval, wherein the grayscale in the first sub-grayscale interval is higher than the grayscale in the second sub-grayscale interval. The first sub-grayscale interval includes the seventh and eighth grayscale levels with different grayscale levels, and the second sub-grayscale interval includes the ninth and tenth grayscale levels with different grayscale levels. The gray level difference between the seventh gray level and the eighth gray level is equal to the gray level difference between the ninth gray level and the tenth gray level. The difference in duration of the driving current corresponding to the seventh gray level and the eighth gray level is greater than the difference in duration of the driving current corresponding to the ninth gray level and the tenth gray level. And / or, The difference in current intensity between the driving current corresponding to the seventh gray level and the eighth gray level is less than the difference in current intensity between the driving current corresponding to the ninth gray level and the tenth gray level.

[0013] Optionally, within the first sub-grayscale interval, the rate of change of the duration of the driving current relative to the grayscale is greater than the rate of change of the duration relative to the grayscale in the second sub-grayscale interval. And / or, Within the second sub-grayscale interval, the rate of change of the driving current intensity relative to the grayscale is greater than the rate of change of the current intensity relative to the grayscale within the first sub-grayscale interval.

[0014] Optionally, the grayscale also includes an eleventh grayscale and a twelfth grayscale, wherein the eleventh grayscale is greater than the twelfth grayscale; The duration of the driving current corresponding to the eleventh gray level is greater than or equal to the duration of the driving current corresponding to the twelfth gray level. The current intensity of the driving current corresponding to the eleventh gray level is greater than or equal to the current intensity of the driving current corresponding to the twelfth gray level.

[0015] Optionally, the pixel driving circuit includes a pulse width adjustment module and an amplitude adjustment module electrically connected to the pulse width adjustment module; The pulse width modulation module is electrically connected to the pulse width data signal line that transmits the pulse width modulation data signal; The amplitude adjustment module is electrically connected to the amplitude data signal line that transmits amplitude modulation data signals; Within the first grayscale range, the voltages of the amplitude modulation data signals corresponding to the first grayscale and the second grayscale are equal, while the voltages of the pulse width modulation data signals corresponding to the first grayscale and the second grayscale are not equal. Within the second grayscale range, the voltages of the amplitude modulation data signals corresponding to the third grayscale and the fourth grayscale are not equal, while the voltages of the pulse width modulation data signals corresponding to the third grayscale and the fourth grayscale are equal.

[0016] Optionally, within the first grayscale range, the voltage of the pulse width modulation data signal changes with the grayscale, and the voltage of the amplitude modulation data signal is a first fixed voltage value. Within the second grayscale range, the voltage of the amplitude modulation data signal changes with the grayscale, and the voltage of the pulse width modulation data signal is a second fixed voltage value.

[0017] Optionally, the grayscale also includes a third grayscale interval located between the first grayscale interval and the second grayscale interval; the grayscale in the third grayscale interval is lower than the grayscale in the first grayscale interval and higher than the grayscale in the second grayscale interval. Within the third grayscale range, the voltage of both the pulse width modulation data signal and the amplitude modulation data signal changes with the grayscale level.

[0018] Optionally, the pulse width adjustment module includes a pulse width driving transistor, which is a P-type transistor; The amplitude adjustment module includes an amplitude driving transistor, which is a P-type transistor; The grayscale also includes an eleventh grayscale and a twelfth grayscale, wherein the eleventh grayscale is greater than the twelfth grayscale; The voltage of the amplitude modulation data signal corresponding to the eleventh gray level is less than or equal to the voltage of the amplitude modulation data signal corresponding to the twelfth gray level. The voltage of the pulse width modulation data signal corresponding to the eleventh gray level is greater than or equal to the voltage of the pulse width modulation data signal corresponding to the twelfth gray level.

[0019] Optionally, the pulse width adjustment module includes a pulse width driving transistor and a first capacitor, wherein the first plate of the first capacitor is electrically connected to the gate of the pulse width driving transistor, and the second plate of the first capacitor receives a sweep frequency signal. The amplitude adjustment module includes an amplitude driving transistor and an amplitude emission control transistor. The amplitude emission control transistor, the amplitude driving transistor, and the light-emitting element are connected in series. The gate of the amplitude emission control transistor receives an amplitude emission control signal. Within one driving cycle, the start time of the frequency sweep signal is equal to or later than the start time of the amplitude emission control signal.

[0020] Optionally, the pulse width adjustment module further includes a pulse width light emission control transistor, which is connected in series with the pulse width driving transistor, and the gate of the pulse width light emission control transistor receives a pulse width light emission control signal. The pulse width emission control signal and the amplitude emission control signal are the same signal.

[0021] Optionally, the driving cycle includes a data writing phase and a light emission phase; During the data writing phase, the frequency sweep signal is at a first level; During a portion of the light-emitting phase, the sweep frequency signal jumps from the first level to the second level and then begins to decrease from the second level. The second level is higher than the first level.

[0022] Optionally, the light-emitting element includes a first light-emitting element and a second light-emitting element that emits light of different colors; The second grayscale range corresponding to the first light-emitting element is different from the second grayscale range corresponding to the second light-emitting element.

[0023] Optionally, the upper limit grayscale value of the second grayscale range corresponding to the first light-emitting element is different from the upper limit grayscale value of the second grayscale range corresponding to the second light-emitting element.

[0024] Optionally, the wavelength of the light emitted by the first light-emitting element is greater than the wavelength of the light emitted by the second light-emitting element; The upper limit gray level value of the second gray level range corresponding to the first light-emitting element is less than the upper limit gray level value of the second gray level range corresponding to the second light-emitting element.

[0025] Optionally, the light-emitting element further includes a third light-emitting element, wherein the wavelength of the light emitted by the first light-emitting element is greater than the wavelength of the light emitted by the third light-emitting element, and the wavelength of the light emitted by the third light-emitting element is greater than the wavelength of the light emitted by the second light-emitting element; The upper limit gray level value of the second gray level range corresponding to the third light-emitting element is greater than the upper limit gray level value of the second gray level range corresponding to the second light-emitting element.

[0026] Optionally, the lower limit grayscale value of the first grayscale range corresponding to the first light-emitting element is different from the lower limit grayscale value of the first grayscale range corresponding to the second light-emitting element.

[0027] Optionally, the first light-emitting element is a red light-emitting element, the second light-emitting element is a blue light-emitting element, and the third light-emitting element is a green light-emitting element.

[0028] According to another aspect of the present invention, a display device is provided, comprising the display panel described in the first aspect.

[0029] The display panel and display device provided in this embodiment of the invention, through a zone control strategy, use a fixed current intensity in the first grayscale range (high grayscale range) and control the grayscale by adjusting the duration of the driving current (i.e., pulse width modulation) to ensure luminous efficiency in high grayscale; and use a fixed duration in the second grayscale range (low grayscale range) and control the grayscale by adjusting the current intensity of the driving current (i.e., pulse amplitude modulation) to avoid interference caused by excessively high edge transition time due to extremely narrow pulse width, improve display uniformity and color shift performance in low grayscale, thereby improving the display quality of low grayscale while ensuring high grayscale luminous efficiency, and achieving good display effect across the entire grayscale range.

[0030] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention; Figure 2 for Figure 1 A schematic diagram of the cross-sectional structure along the A-A' direction; Figure 3 This is a schematic diagram of a pixel driving circuit provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of a display panel driver in related technologies; Figure 5 A schematic diagram of the driving of a display panel at a first gray level and a second gray level is provided for an embodiment of the present invention; Figure 6 This invention provides a schematic diagram of the driving operation of a display panel at the third and fourth gray levels, respectively, according to an embodiment of the present invention. Figure 7 A schematic diagram of the driving of a display panel at the fifth and sixth gray levels provided in an embodiment of the present invention; Figure 8 A schematic diagram of the driving of a display panel at the seventh and eighth gray levels, respectively, is provided for an embodiment of the present invention; Figure 9A schematic diagram of the driving of a display panel at the ninth and tenth gray levels, respectively, is provided for an embodiment of the present invention; Figure 10 A schematic diagram of the driving of a display panel at the eleventh and twelfth gray levels, respectively, is provided for an embodiment of the present invention; Figure 11 This is a schematic diagram of the working timing of a display panel provided in an embodiment of the present invention; Figure 12 This is a schematic diagram of the working timing of another display panel provided in an embodiment of the present invention; Figure 13 This is a schematic diagram illustrating the working timing of another display panel provided in an embodiment of the present invention; Figure 14 This is a schematic diagram illustrating the working timing of another display panel provided in an embodiment of the present invention; Figure 15 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention; Figure 16 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention; Figure 17 This is a schematic diagram of another display device provided in an embodiment of the present invention. Detailed Implementation

[0033] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0034] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0035] Figure 1 This invention provides a schematic diagram of the structure of a display panel according to an embodiment of the present invention. Figure 2 for Figure 1 A schematic diagram of the cross-sectional structure along the A-A' direction, as shown below. Figure 1 and Figure 2 As shown, the display panel provided in this embodiment of the invention includes a light-emitting element 10 and a pixel driving circuit 11 that outputs driving current to the light-emitting element 10. The grayscale of the display panel is at least divided into a first grayscale range and a second grayscale range, wherein the grayscale in the first grayscale range is higher than the grayscale in the second grayscale range; the first grayscale range includes a first grayscale and a second grayscale with different grayscale values, the driving current corresponding to the first grayscale and the second grayscale has the same current intensity, and the driving current corresponding to the first grayscale and the second grayscale has different durations. The second grayscale range includes a third grayscale and a fourth grayscale with different grayscale values, the driving current corresponding to the third grayscale and the fourth grayscale has different current intensities, and the driving current corresponding to the third grayscale and the fourth grayscale has the same duration.

[0036] Specifically, the light-emitting element 10 is used to emit light in response to the driving current, and its luminous brightness is related to the current intensity of the driving current flowing through the light-emitting element 10 and the duration of the driving current.

[0037] In some embodiments, the light-emitting element 10 may be a micro-LED or a sub-millimeter light-emitting diode (Mini-LED) to have advantages such as high brightness, long lifespan and high energy efficiency, but it is not limited to these.

[0038] In other embodiments, the light-emitting element 10 may also be an organic light-emitting diode (OLED) or other types of light-emitting devices, and the embodiments of the present invention do not specifically limit this.

[0039] Multiple pixel driving circuits 11 and multiple light-emitting elements 10 are electrically connected to each other. The pixel driving circuit 11 is used to transmit driving current to the light-emitting element 10 under the action of the signal of the driving signal line (such as scan signal line, data signal line, power signal line, etc.) on the display panel, so as to drive the light-emitting element 10 to emit light and control the brightness and grayscale of the light-emitting element 10.

[0040] The light-emitting element 10 and the pixel driving circuit 11 electrically connected to it together constitute the sub-pixel PX of the display panel. Multiple sub-pixels PX can be arranged according to a certain rule. By precisely controlling the brightness of different sub-pixels PX, the display of a complete image can be achieved.

[0041] It should be noted that the arrangement of the multiple pixel driving circuits 11 and the multiple light-emitting elements 10 can be set according to actual needs, and the embodiments of the present invention do not impose specific limitations on this.

[0042] In some embodiments, such as Figure 2 As shown, the pixel driving circuit 11 includes at least one thin-film transistor T disposed on one side of the substrate 20. The thin-film transistor T may include an active layer 1, a gate 2, a source 3, and a drain 4.

[0043] In some embodiments, such as Figure 2 As shown, the gate 2 may include a bottom gate 2a and a top gate 2b to form a dual-gate transistor, thereby reducing the leakage current in the thin-film transistor T and thus reducing the impact of the leakage current on the node potentials in the pixel driving circuit 11, but is not limited thereto.

[0044] In some embodiments, such as Figure 2 As shown, the pixel driving circuit 11 may also include at least one capacitor C, which includes a first electrode c1 and a second electrode c2 disposed opposite to each other.

[0045] The first electrode plate c1 and the top grid 2b can share the same metal film layer structure, which can reduce the number of metal film layers and achieve the purpose of reducing production costs and reducing the thickness of the display panel, but it is not limited to this.

[0046] In some embodiments, such as Figure 2 As shown, along the thickness direction of the display panel, a bottom gate insulating layer 21 can be disposed between the bottom gate 2a and the active layer 1, a gate insulating layer GI can be disposed between the active layer 1 and the top gate 2b, an interlayer dielectric layer IMD can be disposed between the top gate 2b and the first electrode c1, an insulating intermediate layer ILD can be disposed between the first electrode c1 and the source electrode 3, and a first passivation layer PV1, a first planarization layer PLN1, a first connecting metal layer 22, a second planarization layer PLN2, a second connecting metal layer 23 and a second passivation layer PV2 can be disposed sequentially on the side of the source electrode 3 away from the substrate 40, but it is not limited to these.

[0047] In this embodiment of the invention, the pixel driving circuit 11 does not control the brightness of the sub-pixel PX by simply changing the magnitude of the driving current or by simply changing the emission time (duration of the driving current), but adopts a driving method that combines pulse width modulation (PWM) and pulse amplitude modulation (PAM), wherein the sub-pixel PX displays different grayscale brightness by at least changing the emission duration of the sub-pixel PX.

[0048] Figure 3 This is a schematic diagram of a pixel driving circuit provided in an embodiment of the present invention, as shown below. Figure 3As shown, exemplarily, the pixel driving circuit 11 includes a pulse width modulation (PWM) module and an amplitude modulation (PAM) module. The PAM module provides driving current to the light-emitting element 10, controlling the current intensity (i.e., amplitude) of the driving current through pulse amplitude modulation. Specifically, the magnitude of the driving current during light emission is determined by adjusting the relevant PAM signal. The PWM module controls the duration (i.e., pulse width) of the driving current provided by the PAM module to the light-emitting element 10 through pulse width modulation. Specifically, the duration of light emission is determined by adjusting the relevant PWM signal. Pulse amplitude modulation and pulse width modulation work together on the light-emitting element 10 to achieve adjustment of brightness and grayscale. Through this hybrid driving architecture, the advantages of both PAM and PWM can be fully utilized, and appropriate control methods can be adopted under different grayscale conditions to obtain better display effects.

[0049] However, the inventors discovered through research that pulse width modulation (PWM) adjusts the average brightness perceived by the human eye by controlling the duty cycle of the light-emitting element 10 emitting light per unit time. The lower the grayscale, the shorter the required light emission time (i.e., pulse width). When displaying low grayscale images, if the reduction in light emission brightness needs to be achieved by PWM, the duration of the light emission current (i.e., pulse width) will be compressed to an extremely short time.

[0050] Specifically, Figure 4 This is a schematic diagram of a display panel driver in related technologies, such as... Figure 4 As shown, the vertical axis represents the current intensity of the driving current, and the horizontal axis represents the duration of the driving current. The area of ​​each pulse represents the total light energy output by the light-emitting element per unit time, i.e., the brightness perceived by the human eye. With the same number of pulses, a larger pulse area results in higher brightness; a smaller pulse area results in lower brightness. When a brighter grayscale is required, a longer duration of the driving current can be used, resulting in a larger area for each pulse and a higher total light energy output per unit time. When a darker grayscale is required, the duration of the driving current can be shortened.

[0051] When the grayscale is low, the pulse width is compressed to an extremely narrow level. Since the switching action of transistors in the actual circuit requires a certain rise time and fall time, the edge transition time of the extremely narrow pulse increases significantly, causing the actual output light energy to deviate from the target value, resulting in brightness distortion at low grayscale and affecting the display quality at low grayscale. Specifically, this manifests as a decrease in display uniformity and color shift.

[0052] Based on the above-mentioned technical problems, in this embodiment of the invention, the grayscale of the display panel is divided into a first grayscale range and a second grayscale range, the first grayscale range corresponding to a higher grayscale range and the second grayscale range corresponding to a lower grayscale range.

[0053] In this context, grayscale refers to the brightness levels that a sub-pixel (PX) can display. Taking 8-bit data driving as an example, grayscale can include 256 grayscale levels from 0 to 255. A higher grayscale value indicates higher brightness, and a lower grayscale value indicates lower brightness.

[0054] Figure 5 A schematic diagram of the driving of a display panel at a first grayscale and a second grayscale, provided as an embodiment of the present invention, is shown below. Figure 5 As shown, the first gray level and the second gray level are any two different gray level values ​​within the first gray level range. The current intensity of the driving current corresponding to the first gray level and the second gray level is equal. That is, within the first gray level range, the amplitude of the driving current remains the same fixed value for different gray levels.

[0055] In some embodiments, within the first grayscale range (high grayscale range), the driving current is kept at a large amplitude level, which enables the light-emitting element 10 to operate in a high current density range, thereby giving the light-emitting element 10 a high luminous efficiency, which is beneficial to improving the overall energy efficiency of the display panel.

[0056] Furthermore, the durations of the driving current corresponding to the first gray level and the second gray level are not equal. That is, within the first gray level range, the brightness difference between different gray levels is achieved by adjusting the duration of the driving current. Specifically, when the gray level is higher (higher brightness requirement), the duration of the driving current is longer; when the gray level is lower (lower brightness requirement) but still within the first gray level range, the duration of the driving current is correspondingly shorter. Since the duration of the driving current within the first gray level range is relatively long, the proportion of the edge transition time in the entire light emission cycle is controllable and will not significantly affect the light emission accuracy.

[0057] Figure 6 This invention provides a schematic diagram of the driving operation of a display panel at the third and fourth gray levels, as shown in the embodiment of the invention. Figure 6 As shown, the third and fourth gray levels are any two different gray level values ​​within the second gray level range. The current intensities of the driving current corresponding to the third and fourth gray levels are not equal. That is, within the second gray level range, the brightness difference between different gray levels is achieved by adjusting the current intensity of the driving current. Specifically, when the gray level is high (high brightness requirement) but still within the second gray level range, the current intensity of the driving current is larger; when the gray level is low (low brightness requirement), the current intensity of the driving current is correspondingly reduced.

[0058] Furthermore, the duration of the driving current corresponding to the third and fourth gray levels is equal, that is, within the second gray level range, the duration of the driving current remains the same fixed value.

[0059] In some embodiments, within the second grayscale range (low grayscale range), the duration of the driving current is set to a relatively long fixed value to avoid the use of extremely narrow light emission pulses. This allows the proportion of edge transition time in the entire light emission cycle to be controlled within a reasonable range, enabling the light emission time to reach the target value more accurately. This, in turn, improves the display uniformity under low grayscale and reduces color shift caused by light emission time deviation.

[0060] It should be noted that the specific grayscale ranges in the first and second grayscale intervals mentioned above can be flexibly set according to the actual application scenario. For example, the first grayscale interval can correspond to 80% to 100% of the grayscale range, and the second grayscale interval can correspond to 0% to 20% of the grayscale range, but it is not limited to these. The threshold of the grayscale interval can be pre-configured or dynamically adjusted by the driver chip based on the gamma curve of the display panel and the photoelectric characteristics of the light-emitting elements.

[0061] In summary, the display panel provided by this embodiment of the invention uses a zone control strategy. In the first grayscale range (high grayscale range), a fixed current intensity is used, and the grayscale is controlled by adjusting the duration of the driving current (i.e., pulse width modulation) to ensure luminous efficiency at high grayscale levels. In the second grayscale range (low grayscale range), a fixed duration is used, and the grayscale is controlled by adjusting the current intensity of the driving current (i.e., pulse amplitude modulation) to avoid interference caused by excessively high edge transition time due to extremely narrow pulse widths. This improves the display uniformity and color shift performance at low grayscale levels, thereby improving the display quality at low grayscale levels while ensuring high grayscale luminous efficiency, and achieving a good display effect across the entire grayscale range.

[0062] In some embodiments, such as Figure 5 and Figure 6 As shown, the grayscale difference between the first and second grayscale levels is equal to the grayscale difference between the third and fourth grayscale levels. That is, the span of selecting two different grayscale levels (the first and second grayscale levels) within the first grayscale range is the same as the span of selecting two different grayscale levels (the third and fourth grayscale levels) within the second grayscale range.

[0063] The difference in duration between the driving current corresponding to the first and second gray levels is greater than the difference in duration between the driving current corresponding to the third and fourth gray levels. That is, within the first gray level range, the change in duration caused by the same gray level change is relatively large, while within the second gray level range, the change in duration is small or even zero (when the durations corresponding to the third and fourth gray levels are equal). In this case, within the first gray level range, gray level changes are mainly achieved by adjusting the duration of the driving current (i.e., pulse width modulation), while within the second gray level range, the duration remains relatively fixed.

[0064] The difference in current intensity between the driving current corresponding to the third and fourth gray levels is greater than the difference in current intensity between the driving current corresponding to the first and second gray levels. That is, within the second gray level range, the change in current intensity caused by the same gray level change is larger, while within the first gray level range, the change in current intensity is smaller or even zero (when the current intensities corresponding to the first and second gray levels are equal). In this case, within the second gray level range, gray level changes are mainly achieved by adjusting the current intensity of the driving current (i.e., pulse amplitude modulation), while within the first gray level range, the current intensity remains relatively constant.

[0065] With the above settings, the first grayscale range primarily adjusts the duration while keeping the current intensity constant, and the second grayscale range primarily adjusts the current intensity while keeping the duration constant. That is, as the grayscale changes from high to low, the control method of the driving current gradually switches from pulse width modulation to pulse amplitude modulation, thereby adopting the most suitable control method in different grayscale ranges, improving the uniformity of low grayscale display while ensuring high grayscale luminous efficiency.

[0066] In some embodiments, within a first grayscale range, the duration of the driving current has a first rate of change relative to the grayscale; within a second grayscale range, the duration of the driving current has a second rate of change relative to the grayscale, wherein the first rate of change is greater than the second rate of change. That is, within the first grayscale range (higher grayscale range), the duration of the driving current changes with the grayscale at a faster rate; while within the second grayscale range (lower grayscale range), the duration changes with the grayscale at a slower rate, or even approaches zero (i.e., the duration remains essentially constant). In this case, within the first grayscale range, grayscale adjustment is mainly achieved by changing the duration of the driving current (i.e., pulse width modulation).

[0067] Within the second grayscale range, the driving current intensity exhibits a third rate of change relative to the grayscale level; within the first grayscale range, the driving current intensity exhibits a fourth rate of change relative to the grayscale level, with the third rate of change being greater than the fourth. That is, within the lower grayscale range, the driving current intensity changes with the grayscale level at a faster rate; while within the first grayscale range (the higher grayscale range), the driving current intensity changes with the grayscale level at a slower rate, even approaching zero (i.e., the current intensity remains essentially constant). Therefore, within the second grayscale range, grayscale adjustment is primarily achieved by changing the driving current intensity (i.e., pulse amplitude modulation).

[0068] By differentiating the aforementioned rate of change, the adjustment primarily focuses on duration within the first grayscale range, while the adjustment primarily focuses on current intensity within the second grayscale range. This allows for more precise brightness control within their respective grayscale ranges. Simultaneously, the driving current intensity can be maintained at a higher value at high grayscale levels to ensure luminous efficiency, while the driving current duration is kept at a wider range at low grayscale levels to avoid excessive edge transition time that could affect display quality. This balances display performance across the entire grayscale range with overall energy efficiency.

[0069] It should be noted that the above rate of change refers to the degree to which a certain parameter of the driving current (such as duration or current intensity) changes with the gray level, specifically the change in that parameter corresponding to a unit change in gray level.

[0070] Taking the rate of change of the driving current duration relative to the gray level as an example, this rate of change reflects the corresponding change in the duration of the driving current when the gray level changes by a unit gray level value. A larger rate of change means that a small change in the gray level can cause a large adjustment in the duration; a smaller rate of change means that the change in duration when the gray level changes is small or even basically unchanged.

[0071] Similarly, the rate of change of the driving current intensity relative to the gray level reflects the corresponding change in the driving current intensity when the gray level changes by a unit gray level value. The larger this rate of change, the more significant the change in current intensity with gray level; the smaller the rate of change, the weaker the change in current intensity with gray level.

[0072] Optionally, within the first grayscale range, the duration of the driving current increases with the increase of the grayscale; within the second grayscale range, the current intensity of the driving current increases with the increase of the grayscale.

[0073] Specifically, within the high grayscale range corresponding to the first grayscale range, when the grayscale increases, the duration of the driving current is extended accordingly to increase the total light energy output by the light-emitting element 10 per unit time; when the grayscale decreases, the duration of the driving current is shortened accordingly.

[0074] Since the driving current intensity remains constant within the first gray level range, the change in gray level is entirely achieved by increasing or decreasing the duration, which ensures that the light-emitting element 10 operates in a constant high current range under high gray levels and maintains high luminous efficiency.

[0075] Meanwhile, within the low grayscale range corresponding to the second grayscale range, when the grayscale increases, the current intensity of the driving current increases accordingly to increase the instantaneous luminous brightness of the light-emitting element 10; when the grayscale decreases, the current intensity of the driving current decreases accordingly.

[0076] Since the duration of the driving current remains constant within the second grayscale range, the change in grayscale is entirely achieved by the increase or decrease of the current intensity. This avoids the use of extremely narrow current pulses at low grayscale levels, ensuring that the proportion of edge transition time in the entire light emission cycle is controlled within a reasonable range, thus guaranteeing the accuracy of the light emission time at low grayscale levels.

[0077] Furthermore, in this embodiment, the duration of the driving current monotonically increases with increasing gray level within the first gray level range, and the current intensity of the driving current monotonically increases with increasing gray level within the second gray level range. This ensures a monotonically increasing correspondence between gray level and brightness, which is beneficial for precise gray level control. Within any gray level range, an increase in gray level corresponds to an increase in driving current-related parameters (duration or current intensity), thereby ensuring that brightness increases monotonically with gray level and avoiding abnormal phenomena such as gray level reversal or brightness jumps.

[0078] Figure 7 This invention provides a schematic diagram of the driving operation of a display panel at the fifth and sixth gray levels, respectively, as shown in the embodiment of the invention. Figure 7 As shown, optionally, the grayscale also includes a third grayscale interval located between the first grayscale interval and the second grayscale interval. The grayscale in the third grayscale interval is lower than the grayscale in the first grayscale interval and higher than the grayscale in the second grayscale interval. The third grayscale interval includes a fifth grayscale and a sixth grayscale with different grayscale values. The duration of the driving current corresponding to the fifth grayscale and the sixth grayscale are not equal, and the current intensity of the driving current corresponding to the fifth grayscale and the sixth grayscale are not equal.

[0079] Specifically, the third grayscale range is the intermediate grayscale transition range between the first grayscale range (high grayscale range) and the second grayscale range (low grayscale range).

[0080] In this embodiment, the fifth gray level and the sixth gray level are any two different gray level values ​​within the third gray level range. Within the third gray level range (middle gray level transition range), the brightness difference between different gray levels is achieved by simultaneously adjusting the duration of the driving current and adjusting the current intensity of the driving current.

[0081] Specifically, in the third grayscale range (the middle grayscale transition range), when the grayscale increases, the duration of the driving current is extended and the current intensity increases; when the grayscale decreases, the duration of the driving current is shortened and the current intensity decreases.

[0082] By setting a control method that simultaneously adjusts the duration and intensity of the driving current in the third gray-level range, a smooth transition from the first gray-level range (mainly adjusting the duration) to the second gray-level range (mainly adjusting the current intensity) can be achieved.

[0083] As the grayscale changes from high to low, the control method gradually switches from pulse width modulation to pulse amplitude modulation. During the switching process, the two adjustment methods work together to avoid the problem of brightness jump at the grayscale interval switching boundary, and ensure the smoothness and continuity of brightness change across the entire grayscale range.

[0084] In some embodiments, such as Figure 7 As shown, the fifth gray level is greater than the sixth gray level, meaning the fifth gray level is a relatively high gray level value within the third gray level range, and the sixth gray level is a relatively low gray level value within the third gray level range. The duration of the driving current corresponding to the fifth gray level is greater than the duration of the driving current corresponding to the sixth gray level, and the current intensity of the driving current corresponding to the fifth gray level is greater than the current intensity of the driving current corresponding to the sixth gray level.

[0085] At this point, in the third gray level range (middle gray level transition range), when the gray level is high, the duration and current intensity of the driving current are both large; when the gray level is low, the duration and current intensity of the driving current are both small; the duration and current intensity both increase monotonically with the increase of gray level and decrease monotonically with the decrease of gray level.

[0086] With the above settings, a monotonic correspondence can be maintained between gray levels and brightness within the third gray level range, avoiding problems such as gray level inversion or brightness jumps.

[0087] Optionally, the grayscale difference between the fifth and sixth grayscale levels is equal to the grayscale difference between the first and second grayscale levels. The difference in the duration of the driving current corresponding to the fifth and sixth grayscale levels is less than the difference in the duration of the driving current corresponding to the first and second grayscale levels.

[0088] Specifically, the span of two gray levels selected within the third gray level range (such as the fifth and sixth gray levels) is the same as the span of two gray levels selected within the first gray level range (such as the first and second gray levels).

[0089] Within the third grayscale range, the change in duration caused by the same grayscale change is less than the change in duration caused by the same grayscale change in the first grayscale range. Therefore, from the first grayscale range (high grayscale range) to the third grayscale range (middle grayscale transition range), the dominant role of duration in brightness adjustment gradually weakens.

[0090] As mentioned above, in the second grayscale range, the durations of the driving currents corresponding to the third and fourth grayscale levels are equal (i.e., the duration difference is 0). In this embodiment, the durations of the driving currents corresponding to the fifth and sixth grayscale levels are not equal, so their duration difference is greater than zero. Based on the condition that the grayscale differences are equal (i.e., the grayscale difference between the fifth and sixth grayscale levels is equal to the grayscale difference between the first and second grayscale levels, and equal to the grayscale difference between the third and fourth grayscale levels), the difference in the durations of the driving currents corresponding to the fifth and sixth grayscale levels is less than the difference in the durations of the driving currents corresponding to the first and second grayscale levels, and greater than the difference in the durations of the driving currents corresponding to the third and fourth grayscale levels.

[0091] Therefore, from the first gray level range to the third gray level range and then to the second gray level range, as the gray level decreases step by step, the rate of change of duration decreases step by step, which is conducive to achieving a smooth transition from pulse width modulation to pulse amplitude modulation dominance across the entire gray level range.

[0092] Optionally, the difference between the fifth and sixth gray levels is equal to the difference between the third and fourth gray levels. The difference in the driving current intensity corresponding to the fifth and sixth gray levels is less than the difference in the driving current intensity corresponding to the third and fourth gray levels.

[0093] Specifically, the span of two gray levels selected within the third gray level range (such as the fifth and sixth gray levels) is the same as the span of two gray levels selected within the second gray level range (such as the third and fourth gray levels).

[0094] Within the third grayscale range, the change in current intensity caused by the same change in grayscale is less than the change in current intensity caused by the same change in grayscale in the second grayscale range. Therefore, from the second grayscale range (low grayscale range) to the third grayscale range (middle grayscale transition range), the dominant role of current intensity in brightness adjustment gradually weakens.

[0095] As mentioned above, the driving current intensities corresponding to the first and second gray levels are equal (the difference in current intensity is 0), while the driving current intensities corresponding to the fifth and sixth gray levels are not equal (the difference in current intensity is greater than 0). Based on the condition that the gray level differences are equal (i.e., the gray level difference between the fifth and sixth gray levels is equal to the gray level difference between the first and second gray levels, and equal to the gray level difference between the third and fourth gray levels), the difference in the driving current intensities corresponding to the fifth and sixth gray levels is less than the difference in the driving current intensities corresponding to the third and fourth gray levels, and greater than the difference in the driving current intensities corresponding to the first and second gray levels (which is 0).

[0096] Therefore, from the first gray level range to the third gray level range and then to the second gray level range, as the gray level decreases step by step, the rate of change of current intensity increases step by step, which is conducive to achieving a smooth transition from pulse width modulation to pulse amplitude modulation dominance across the entire gray level range.

[0097] Optionally, within the third grayscale range, the duration of the driving current increases with the increase of the grayscale, and the current intensity of the driving current also increases with the increase of the grayscale.

[0098] Specifically, within the third grayscale range (the intermediate grayscale transition range), both duration and current intensity are positively correlated with grayscale. The higher the grayscale, the greater both duration and current intensity; conversely, the lower the grayscale, the less both duration and current intensity. This setting ensures a monotonic correspondence between grayscale and brightness within the third grayscale range, preventing abnormal phenomena such as grayscale reversal or brightness jumps.

[0099] It should be noted that within the third grayscale range, the specific allocation ratio of duration and current intensity can be configured according to actual needs. For example, when the grayscale is close to the first grayscale range (high grayscale range), the change in duration has a larger weight and the change in current intensity has a smaller weight, in order to continue the characteristic of pulse width modulation being the main feature of the high grayscale range; when the grayscale is close to the second grayscale range (low grayscale range), the change in duration has a smaller weight and the change in current intensity has a larger weight, in order to transition to the characteristic of pulse amplitude modulation being the main feature, and to achieve a smooth and continuous change in the control mode from the high grayscale range to the low grayscale range.

[0100] It is understandable that within the third grayscale range, the relationship between duration and current intensity as a function of grayscale can be linear or nonlinear.

[0101] In the implementation of the nonlinear relationship, an appropriate nonlinear mapping curve (e.g., gamma curve) can be set according to the efficiency characteristics of the light-emitting element 10 in different current ranges to more accurately compensate for the photoelectric characteristics of the light-emitting element 10 and improve the gamma correction accuracy of the display panel.

[0102] The specific mapping relationship between duration and current intensity and grayscale can be achieved by looking up a table or by formula calculation. This embodiment of the invention does not impose specific limitations on this.

[0103] Optionally, within the third grayscale range, the duration of the driving current relative to the rate of change of the grayscale is less than the duration of the driving current relative to the grayscale in the first grayscale range.

[0104] And / or, Within the third grayscale range, the rate of change of the driving current intensity relative to the grayscale is less than the rate of change of the current intensity relative to the grayscale in the second grayscale range.

[0105] Specifically, from the first grayscale range (high grayscale range) to the third grayscale range (middle grayscale transition range), the duration of the driving current decreases with the change of grayscale, making the duration of the driving current the main factor in the adjustment of brightness in the first grayscale range, with a large rate of change in duration; after entering the third grayscale range, the rate of change of the duration of the driving current decreases, and its dominant role in brightness adjustment gradually weakens.

[0106] In some embodiments, from the second grayscale range (low grayscale range) to the third grayscale range (middle grayscale transition range), the magnitude of the change in current intensity with grayscale decreases. Therefore, within the second grayscale range, the adjustment is primarily driven by the current intensity of the driving current, resulting in a relatively large rate of change in current intensity. Upon entering the third grayscale range, the rate of change in the current intensity of the driving current decreases, and its dominant role in brightness adjustment gradually weakens.

[0107] Through the differentiated configuration of the above-mentioned rate of change, in the third gray level range, the rate of change of duration relative to gray level is less than that in the first gray level range, and the rate of change of current intensity relative to gray level is less than that in the second gray level range. The adjustment methods of duration and current intensity in the third gray level range work together to undertake part of the brightness adjustment task, thereby forming a smooth transition from pulse width modulation to pulse amplitude modulation.

[0108] The rate of change directly reflects the contribution of the parameter (duration or current intensity) to brightness adjustment within the corresponding grayscale range. A larger rate of change indicates a more significant response of the parameter to grayscale changes and a stronger dominant role in brightness adjustment; a smaller rate of change indicates a weaker regulatory effect. By rationally configuring the rate of change of duration and current intensity relative to grayscale within each grayscale range, the brightness change curve across the entire grayscale range can be precisely controlled, achieving a smoother brightness transition and avoiding brightness jumps or visual discontinuities at grayscale boundary points.

[0109] Figure 8 This invention provides a schematic diagram of the driving operation of a display panel at the seventh and eighth gray levels, respectively, according to an embodiment of the present invention. Figure 9 This invention provides a schematic diagram of the driving operation of a display panel at the ninth and tenth gray levels, respectively, as shown in the embodiment of the invention. Figure 8 and Figure 9As shown, optionally, the third grayscale interval includes at least two sub-grayscale intervals, which include a first sub-grayscale interval and a second sub-grayscale interval. The grayscale level in the first sub-grayscale interval is higher than that in the second sub-grayscale interval. The first sub-grayscale interval includes a seventh and an eighth grayscale level with different grayscale levels, and the second sub-grayscale interval includes a ninth and a tenth grayscale level with different grayscale levels. The grayscale difference between the seventh and eighth grayscale levels is equal to the grayscale difference between the ninth and tenth grayscale levels. The difference in the duration of the driving current corresponding to the seventh and eighth grayscale levels is greater than the difference in the duration of the driving current corresponding to the ninth and tenth grayscale levels. And / or, the difference in the current intensity of the driving current corresponding to the seventh and eighth grayscale levels is less than the difference in the current intensity of the driving current corresponding to the ninth and tenth grayscale levels.

[0110] Specifically, the third grayscale range (mid-grayscale transition range) can be further subdivided into multiple sub-grayscale ranges to achieve finer transition control. The first sub-grayscale range is closer to the first grayscale range (high grayscale range). Within the first sub-grayscale range, the duration adjustment weight is relatively large, while the current intensity adjustment weight is relatively small, to maintain the pulse width modulation-dominated characteristic of the high grayscale range. The second sub-grayscale range is closer to the second grayscale range (low grayscale range). Within the second sub-grayscale range, the duration adjustment weight is relatively small, while the current intensity adjustment weight is relatively large, to gradually transition to the pulse amplitude modulation-dominated characteristic of the low grayscale range.

[0111] like Figure 8 and Figure 9 As shown, two gray levels with the same span (such as the seventh and eighth gray levels in the first gray level interval and the ninth and tenth gray levels in the second gray level interval) are selected in the first and second gray level intervals respectively, so as to compare the variation of the current intensity and duration of the driving current in different gray level intervals under the condition of the same gray level variation.

[0112] Specifically, within the first sub-grayscale interval (the sub-grayscale interval closer to the higher grayscale level), the change in duration caused by the same grayscale change is greater than the change in duration caused by the same grayscale change in the second sub-grayscale interval (the sub-grayscale interval closer to the lower grayscale level). Therefore, as the grayscale level changes from high to low, the magnitude of the change in duration with respect to the grayscale change gradually decreases, and the dominant role of duration in brightness adjustment gradually weakens.

[0113] In some embodiments, within the first sub-grayscale interval (the sub-grayscale interval closer to the higher grayscale side), the change in current intensity caused by the same change in grayscale is less than the change in current intensity caused by the same change in grayscale in the second sub-grayscale interval (the sub-grayscale interval closer to the lower grayscale side). In this case, as the grayscale changes from high to low, the magnitude of the change in current intensity with respect to the grayscale change gradually increases, and the dominant role of current intensity in brightness adjustment gradually strengthens.

[0114] With the above settings, multiple sub-grayscale intervals can be set within the third grayscale interval, and different durations and current intensity variations can be configured within different sub-grayscale intervals, thereby more precisely controlling the transition process from pulse width modulation to pulse amplitude modulation.

[0115] For example, in the first sub-grayscale range (near the higher grayscale side), with the same grayscale change, the difference in the duration of the driving current is larger, while the difference in the current intensity is smaller, making the first sub-grayscale range closer to pulse width modulation (PWM). In the second sub-grayscale range (near the lower grayscale side), with the same grayscale change, the difference in the duration of the driving current is smaller, while the difference in the current intensity is larger, making the second sub-grayscale range closer to pulse amplitude modulation (PAM). Therefore, with the same grayscale change, by gradually adjusting the ratio of the duration and current intensity changes in different sub-grayscale ranges (e.g., gradually transitioning from 4:1 to 1:4), finer and smoother transition control can be achieved, thereby further improving the display effect across the entire grayscale range.

[0116] Optionally, within the first sub-grayscale interval, the duration of the driving current relative to the rate of change of the grayscale is greater than the duration of the driving current relative to the rate of change of the grayscale in the second sub-grayscale interval.

[0117] And / or, Within the second sub-grayscale interval, the rate of change of the driving current intensity relative to the grayscale is greater than the rate of change of the current intensity relative to the grayscale in the first sub-grayscale interval.

[0118] Specifically, within the third grayscale range, from the first sub-grayscale range near the high grayscale side to the second sub-grayscale range near the low grayscale side, the duration decreases gradually with the magnitude of grayscale change, and the dominant role of duration in brightness adjustment gradually weakens.

[0119] In some embodiments, within the third grayscale range, from the first sub-grayscale range near the high grayscale side to the second sub-grayscale range near the low grayscale side, the current intensity increases gradually with the grayscale variation, and the dominant role of the current intensity in brightness adjustment gradually strengthens.

[0120] By differentiating the rates of change as described above, in the first sub-grayscale interval, the rate of change of duration with grayscale is relatively large, while the rate of change of current intensity with grayscale is relatively small, making the first sub-grayscale interval closer to the characteristics dominated by pulse width modulation (PWM). In the second sub-grayscale interval, the rate of change of duration with grayscale is relatively small, while the rate of change of current intensity with grayscale is relatively large, making the second sub-grayscale interval closer to the characteristics dominated by pulse amplitude modulation (PAM). Therefore, by gradually adjusting the ratio of the rates of change of duration and current intensity in different sub-grayscale intervals, a more refined and smooth transition from pulse width modulation-dominated to pulse amplitude modulation-dominated can be achieved, thereby further improving the brightness variation curve across the entire grayscale range and enhancing display quality.

[0121] Figure 10 A schematic diagram of the driving of a display panel at the eleventh and twelfth gray levels, as provided in an embodiment of the present invention, is shown below. Figure 10 As shown, optionally, the grayscale also includes an eleventh grayscale and a twelfth grayscale, wherein the eleventh grayscale is greater than the twelfth grayscale; the duration of the driving current corresponding to the eleventh grayscale is greater than or equal to the duration of the driving current corresponding to the twelfth grayscale; and the current intensity of the driving current corresponding to the eleventh grayscale is greater than or equal to the current intensity of the driving current corresponding to the twelfth grayscale.

[0122] Optionally, the eleventh and twelfth gray levels can be any two different gray level values ​​within the entire gray level range, such as being taken from any gray level range in the first, second, or third gray level range, respectively. This embodiment of the invention does not specifically limit this.

[0123] Among any two different gray levels (such as the eleventh gray level and the twelfth gray level), the duration and current intensity of the driving current corresponding to the higher gray level (such as the eleventh gray level) are not lower than the duration and current intensity corresponding to the lower gray level (such as the twelfth gray level).

[0124] Specifically, when the eleventh and twelfth gray levels are located in the same gray level range, the aforementioned size relationship remains consistent with the corresponding control strategy within that gray level range. For example, when the eleventh and twelfth gray levels are both in the first gray level range, the duration of the driving current corresponding to the eleventh gray level is greater than the duration of the driving current corresponding to the twelfth gray level, while their current intensities are equal; when the eleventh and twelfth gray levels are both in the second gray level range, the current intensity of the driving current corresponding to the eleventh gray level is greater than the current intensity of the driving current corresponding to the twelfth gray level, while their durations are equal; when the eleventh and twelfth gray levels are both in the third gray level range, such as... Figure 10 As shown, the duration and current intensity corresponding to the eleventh gray level are both greater than those corresponding to the twelfth gray level.

[0125] In some embodiments, the above-mentioned magnitude relationship still holds when the eleventh gray level and the twelfth gray level are located in different gray level ranges. That is, the duration and current intensity corresponding to the eleventh gray level are both greater than the duration and current intensity corresponding to the twelfth gray level, thereby ensuring that the gray level and brightness always maintain a monotonically corresponding relationship across the entire gray level range. Specifically, the higher the gray level, the longer the duration and the stronger the current will be, ensuring that the brightness of the display panel monotonically increases with the gray level across the entire gray level range, avoiding abnormal phenomena such as gray level reversal or brightness jumps.

[0126] Optional, such as Figure 3 As shown, the pixel driving circuit 11 includes a pulse width modulation (PWM) module and an amplitude modulation (PAM) module electrically connected to the PWM module. The PWM module is electrically connected to the pulse width data signal line PWMDATA, which transmits the pulse width modulation data signal PWMdata. The PAM module is electrically connected to the amplitude modulation data signal line PAM_DATA, which transmits the amplitude modulation data signal PAM_data. Within the first grayscale range, the voltages of the amplitude modulation data signals PAM_data corresponding to the first and second grayscale levels are equal, while the voltages of the PWM data signals PWMdata corresponding to the first and second grayscale levels are unequal. Within the second grayscale range, the voltages of the amplitude modulation data signals PAM_data corresponding to the third and fourth grayscale levels are unequal, while the voltages of the PWM data signals PWMdata corresponding to the third and fourth grayscale levels are equal.

[0127] Specifically, such as Figure 3 As shown, the pulse width modulation module PWM is electrically connected to the pulse width data signal line PWM_DATA. It is used to receive the pulse width modulation data signal PWMdata provided by the pulse width data signal line PWM_DATA, and control the duration of the drive current according to the pulse width modulation data signal PWMdata, thereby controlling the light emission duration of the light-emitting element 10. It can be understood that by controlling the light emission duration of the light-emitting element 10 (i.e., adjusting the light emission duty cycle of the light-emitting element 10), the brightness of the light emitted by the light-emitting element 10 can be controlled.

[0128] The amplitude adjustment module PAM is electrically connected to the amplitude data signal line PAM_DATA. It is used to receive the amplitude modulation data signal PAM_data provided by the amplitude data signal line PAM_DATA, and control the current intensity of the drive current according to the amplitude modulation data signal PAM_data.

[0129] In some embodiments, such as Figure 3As shown, the amplitude adjustment module PAM may include a first amplitude light emission control transistor PAM_M1, an amplitude data writing transistor PAM_M2, an amplitude driving transistor PAM_M3, an amplitude compensation transistor PAM_M4, an amplitude gate reset transistor PAM_M5, a second amplitude light emission control transistor PAM_M6, an amplitude reset transistor PAM_M7, and an amplitude storage capacitor PAM_C1.

[0130] The amplitude driving transistor PAM_M3 is connected in series between the second power supply line PAM_VDD and the light-emitting element 10. The amplitude driving transistor PAM_M3 can generate a driving current based on the amplitude modulation data signal PAM_data and the second power supply voltage provided by the second power supply line PAM_VDD to drive the light-emitting element 10 to emit light.

[0131] It should be noted that when the amplitude driving transistor PAM_M3 is turned off by the first power supply voltage, if the amplitude driving transistor PAM_M3 is a P-type transistor, the first power supply voltage can be high level; conversely, if the amplitude driving transistor PAM_M3 is an N-type transistor, the first power supply voltage can be low level. This embodiment of the present invention does not impose specific limitations on this.

[0132] An amplitude gate reset transistor PAM_M5 is connected in series between the gate of the second reset signal line PAM_REF and the gate of the amplitude drive transistor PAM_M3. The gate of the amplitude gate reset transistor PAM_M5 receives the third scan signal PAM_s1 provided by the third scan signal line PAM_S1. Under the control of the third scan signal PAM_s1, the amplitude gate reset transistor PAM_M5 is turned on to transmit the second reset signal provided by the second reset signal line PAM_REF to the gate of the amplitude drive transistor PAM_M3, so as to reset the potential of the gate of the amplitude drive transistor PAM_M3.

[0133] Amplitude data writing transistor PAM_M2 is connected in series between amplitude data signal line PAM_DATA and the first terminal of amplitude driving transistor PAM_M3. The gate of amplitude data writing transistor PAM_M2 receives the fourth scan signal PAM_s2 provided by the fourth scan signal line PAM_S2. Under the control of the fourth scan signal PAM_s2, amplitude data writing transistor PAM_M2 is turned on to transmit the amplitude modulation data signal PAM_data provided by amplitude data signal line PAM_DATA to the first terminal of amplitude driving transistor PAM_M3.

[0134] Amplitude compensation transistor PAM_M4 is connected in series between the second terminal of amplitude driving transistor PAM_M3 and the gate of amplitude driving transistor PAM_M3. The gate of amplitude compensation transistor PAM_M4 receives the third scan signal PAM_s1 provided by the third scan signal line PAM_S1. Under the control of the third scan signal PAM_s1, amplitude compensation transistor PAM_M4 is turned on to connect the second terminal of amplitude driving transistor PAM_M3 and the gate of amplitude driving transistor PAM_M3.

[0135] The amplitude data writing transistor PAM_M2 and the amplitude compensation transistor PAM_M4 can be turned on under the control of the same third scan signal PAM_s1 to transmit the amplitude modulation data signal PAM_data provided by the amplitude data signal line PAM_DATA to the gate of the amplitude driving transistor PAM_M3. The threshold voltage of the amplitude driving transistor PAM_M3 is provided to its gate in a self-compensating manner, which can eliminate the influence of the threshold voltage of the amplitude driving transistor PAM_M3 on the magnitude of the driving current it generates.

[0136] The first amplitude emission control transistor PAM_M1 is connected in series between the second power supply line PAM_VDD and the amplitude driving transistor PAM_M3. The gate of the first amplitude emission control transistor PAM_M1 receives the amplitude emission control signal PAM_em provided by the amplitude emission control signal line PAM_EM. Under the control of the amplitude emission control signal PAM_em, the first amplitude emission control transistor PAM_M1 is turned on to transmit the second power supply voltage provided by the second power supply line PAM_VDD to the first terminal of the driving transistor PAM_M3.

[0137] The second amplitude light-emitting control transistor PAM_M6 is connected in series between the amplitude driving transistor PAM_M3 and the anode of the light-emitting element 10. The gate of the second amplitude light-emitting control transistor PAM_M6 receives the amplitude light-emitting control signal PAM_em provided by the amplitude light-emitting control signal line PAM_EM. Under the control of the amplitude light-emitting control signal PAM_em, the second amplitude light-emitting control transistor PAM_M6 is turned on, so that the path between the amplitude driving transistor PAM_M3 and the light-emitting element 10 is connected.

[0138] The first amplitude light emission control transistor PAM_M1 and the second amplitude light emission control transistor PAM_M6 can be turned on under the control of the same amplitude light emission control signal PAM_em, so that the driving current path between the second power line PAM_VDD and the light emission element 10 is connected.

[0139] An amplitude reset transistor PAM_M7 is connected in series with the anode of the light-emitting element 10 and the third reset signal line PAM_INIT. The gate of the amplitude reset transistor PAM_M7 receives the fourth scan signal PAM_s2 provided by the fourth scan signal line PAM_S2. Under the control of the fourth scan signal PAM_s2, the amplitude reset transistor PAM_M7 is turned on to transmit the third reset signal provided by the third reset signal line PAM_INIT to the anode of the light-emitting element 10, so as to reset the potential of the anode of the light-emitting element 10.

[0140] The amplitude storage capacitor PAM_C1 is connected in series between the second power supply line PAM_VDD and the gate of the amplitude driving transistor PAM_M3. It is used to receive the amplitude modulation data signal PAM_data written to the gate of the amplitude driving transistor PAM_M3 and to maintain the potential of the gate of the amplitude driving transistor PAM_M3 so that the amplitude driving transistor PAM_M3 continuously provides a constant driving current.

[0141] In some embodiments, such as Figure 3 As shown, the pulse width modulation module (PWM) may include a first pulse width light emission control transistor (PWM_M1), a pulse width data writing transistor (PWM_M2), a pulse width driving transistor (PWM_M3), a pulse width compensation transistor (PWM_M4), a pulse width gate reset transistor (PWM_M5), a second pulse width light emission control transistor (PWM_M6), and a first capacitor (PWM_C1).

[0142] The pulse width driving transistor PWM_M3 is connected in series between the first power supply line PWM_VDD and the gate of the amplitude driving transistor PAM_M3. It is used to transmit the first power supply voltage provided by the first power supply line PWM_VDD to the gate of the amplitude driving transistor PAM_M3 to control the amplitude driving transistor PAM_M3 to be turned off. This allows control over the conduction time of the amplitude driving transistor PAM_M3, i.e., control over the duration of the driving current, so that the light-emitting element 10 presents the brightness of the corresponding gray level.

[0143] A pulse width gate reset transistor (PWM_M5) is connected in series between the gate of a pulse width drive transistor (PWM_M3) and a first reset signal line (PWM_REF). The gate of PWM_M5 receives a first scan signal (PWM_s1) provided by a first scan signal line (PWM_S1). Under the control of the first scan signal (PWM_s1), PWM_M5 is turned on and transmits the first reset signal provided by the first reset signal line (PWM_REF) to the gate of PWM_M3 to reset the potential of the gate of PWM_M3.

[0144] The pulse width data writing transistor PWM_M2 is connected in series between the pulse width data signal line PWM_DATA and the first terminal of the pulse width driving transistor PWM_M3. The gate of the pulse width data writing transistor PWM_M2 receives the second scan signal PWM_s2 provided by the second scan signal line PWM_S2. Under the control of the second scan signal PWM_s2, the pulse width data writing transistor PWM_M2 is turned on to transmit the pulse width modulation data signal PWMdata provided by the pulse width data signal line PWM_DATA to the first terminal of the pulse width driving transistor PWM_M3.

[0145] The pulse width compensation transistor PWM_M4 is connected in series between the gate and the second terminal of the pulse width driving transistor PWM_M3. The gate of the pulse width compensation transistor PWM_M4 receives the second scan signal PWM_s2 provided by the second scan signal line PWM_S2. Under the control of the second scan signal PWM_s2, the pulse width compensation transistor PWM_M4 is turned on to connect the gate and the second terminal of the pulse width driving transistor PWM_M3.

[0146] Furthermore, the pulse width data writing transistor PWM_M2 and the pulse width compensation transistor PWM_M4 can be turned on under the control of the same second scan signal PWM_s2 to transmit the pulse width modulation data signal PWMdata provided by the pulse width data signal line PWM_DATA to the gate of the pulse width driving transistor PWM_M3. The threshold voltage of the pulse width driving transistor PWM_M3 is provided to its gate in a self-compensating manner, which can reduce or eliminate the impact on display uniformity caused by the different threshold voltages of different pulse width driving transistors PWM_M3 in the display panel.

[0147] The first pulse width emission control transistor PWM_M1 is connected in series between the first power supply line PWM_VDD and the first terminal of the pulse width drive transistor PWM_M3. The gate of the first pulse width emission control transistor PWM_M1 receives the pulse width emission control signal PWM_em provided by the pulse width emission control signal line PWM_EM. Under the control of the pulse width emission control signal PWM_em, the first pulse width emission control transistor PWM_M1 is turned on to transmit the first power supply voltage provided by the first power supply line PWM_VDD to the first terminal of the pulse width drive transistor PWM_M3.

[0148] The second pulse width emission control transistor PWM_M6 is connected in series between the second terminal of the pulse width driving transistor PWM_M3 and the gate of the amplitude driving transistor PAM_M3 in the amplitude adjustment module PAM. The gate of the second pulse width emission control transistor PWM_M6 receives the pulse width emission control signal PWM_em provided by the pulse width emission control signal line PWM_EM. Under the control of the pulse width emission control signal PWM_em, the second pulse width emission control transistor PWM_M6 is turned on, so that the first power supply line PWM_VDD and the gate of the amplitude driving transistor PAM_M3 transmit the first power supply voltage provided by the first power supply line PWM_VDD to the gate of the amplitude driving transistor PAM_M3, and control the amplitude driving transistor PAM_M3 to be turned off, thereby controlling the duration for which the amplitude adjustment module PAM provides the drive current.

[0149] The first capacitor PWM_C1 is connected in series between the sweep signal line SWEEP and the gate of the pulse width driving transistor PWM_M3. The first capacitor PWM_C1 is used to receive the pulse width modulation data signal PWMdata written to the gate of the pulse width driving transistor PWM_M3 and to maintain the potential of the gate of the pulse width driving transistor PWM_M3.

[0150] The SWEEP signal line provides the sweep signal, which can be in the form of a triangular wave. For example, the sweep signal can linearly decrease from a high level to a low level, or linearly increase from a low level to a high level. When the pulse of the sweep signal is applied to the first capacitor PWM_C1, the potential on the other plate of the first capacitor PWM_C1 (the plate connected to the gate of the pulse width driving transistor PWM_M3) changes synchronously due to the bootstrap effect of PWM_C1. That is, the pulse change of the sweep signal can be reflected in the potential of the gate of the pulse width driving transistor PWM_M3 through the first capacitor PWM_C1, and the potential of the gate of the pulse width driving transistor PWM_M3 changes synchronously and linearly.

[0151] Figure 11 This is a schematic diagram of the working timing of a display panel provided in an embodiment of the present invention, as shown below. Figure 11 As shown, optionally, the operation of the pixel driving circuit 11 may include, but is not limited to, a first reset stage t1, a first data writing stage t2, a second reset stage t3, a second data writing stage t4, and a light emission stage t5.

[0152] In the first reset phase t1, the third scan signal PAM_s1 provided by the third scan signal line PAM_S1 controls the amplitude gate reset transistor PAM_M5 to turn on, and the second reset signal provided by the second reset signal line PAM_REF is transmitted to the gate of the amplitude drive transistor PAM_M3 through the amplitude gate reset transistor PAM_M5, so that the potential of the gate of the amplitude drive transistor PAM_M3 is the same as the potential of the second reset signal.

[0153] During the first data writing phase t2, the fourth scan signal PAM_s2 provided by the fourth scan signal line PAM_S2 controls the conduction of the amplitude data writing transistor PAM_M2 and the amplitude compensation transistor PAM_M4. The amplitude modulation data signal PAM_data provided by the amplitude data signal line PAM_DATA is written to the gate of the amplitude driving transistor PAM_M3. The gate potential of the amplitude driving transistor PAM_M3 also includes the self-compensating threshold voltage of the amplitude driving transistor PAM_M3, which can eliminate the influence of the threshold voltage of the amplitude driving transistor PAM_M3 on the current intensity of the generated drive current.

[0154] Meanwhile, during the first data writing stage t2, optionally, the fourth scan signal PAM_s2 provided by the fourth scan signal line PAM_S2 controls the amplitude reset transistor PAM_M7 to turn on, so as to transmit the third reset signal provided by the third reset signal line PAM_INIT to the anode of the light-emitting element 10, thereby resetting the potential of the anode of the light-emitting element 10.

[0155] In the second reset phase t3, the first scan signal PWM_s1 provided by the first scan signal line PWM_S1 controls the pulse width gate reset transistor PWM_M5 to turn on, and the first reset signal provided by the first reset signal line PWM_REF is transmitted to the gate of the pulse width drive transistor PWM_M3 through the pulse width gate reset transistor PWM_M5, so that the potential of the gate of the pulse width drive transistor PWM_M3 is the same as the potential of the first reset signal.

[0156] During the second data writing phase t4, the second scan signal PWM_s2 provided by the second scan signal line PWM_S2 controls the conduction of the pulse width data writing transistor PWM_M2 and the pulse width compensation transistor PWM_M4. The pulse width modulation data signal PWMdata provided by the pulse width data signal line PWM_DATA is written to the gate of the pulse width driving transistor PWM_M3. The gate potential of the pulse width driving transistor PWM_M3 also includes the threshold voltage of the self-compensating pulse width driving transistor PWM_M3, which can reduce or eliminate the impact on display uniformity caused by the different threshold voltages of different pulse width driving transistors PWM_M3 in the display panel.

[0157] During the light emission stage t5, the amplitude emission control signal PAM_em provided by the amplitude emission control signal line PAM_EM controls the first amplitude emission control transistor PAM_M1 and the second amplitude emission control transistor PAM_M6 to turn on. Similarly, the pulse width emission control signal PWM_em provided by the pulse width emission control signal line PWM_EM controls the first pulse width emission control transistor PWM_M1 and the second pulse width emission control transistor PWM_M6 to turn on. The voltage value of the sweep signal sweep provided by the sweep signal line SWEEP changes linearly, and this change is reflected in the gate of the pulse width drive transistor PWM_M3 through the bootstrap effect of the first capacitor PWM_C1, causing the gate potential of the pulse width drive transistor PWM_M3 to change synchronously.

[0158] Taking the pulse width driver transistor PWM_M3, which uses a P-type transistor, as an example, the sweep signal can be linearly reduced from a high level to a low level.

[0159] When the pulse width driving transistor PWM_M3 is in the off state, the first power supply voltage provided by the first power supply line PWM_VDD will not be transmitted to the gate of the amplitude driving transistor PAM_M3. The amplitude driving transistor PAM_M3 generates a driving current based on the amplitude data signal provided by the amplitude data signal line PAM_DATA and the second power supply voltage provided by the second power supply line PAM_VDD, so that the light-emitting element 10 emits light.

[0160] Furthermore, as the sweep signal decreases linearly, the gate potential of the pulse width driving transistor PWM_M3 decreases synchronously. When the gate potential of the pulse width driving transistor PWM_M3 changes to be equal to or less than the source potential (i.e., the first power supply voltage provided by the first power supply line PWM_VDD), the pulse width driving transistor PWM_M3 is turned on, thereby transmitting the first power supply voltage provided by the first power supply line PWM_VDD to the gate of the amplitude driving transistor PAM_M3, causing the amplitude driving transistor PAM_M3 to be turned off. The amplitude driving transistor PAM_M3 no longer provides driving current to the light-emitting element 10, thereby causing the light-emitting element 10 to stop emitting light.

[0161] Understandably, the voltage of the amplitude modulation data signal PAM_data determines the gate potential of the amplitude driving transistor PAM_M3. During the first data writing phase t2, the amplitude modulation data signal PAM_data provided by the amplitude data signal line PAM_DATA is written to the gate of the amplitude driving transistor PAM_M3 via the turned-on amplitude data writing transistor PAM_M2 and amplitude compensation transistor PAM_M4, thus self-compensating the threshold voltage of the amplitude driving transistor PAM_M3. At this time, the amplitude storage capacitor PAM_C1 stores this voltage and maintains the gate potential of the amplitude driving transistor PAM_M3 during the light-emitting phase t5. The amplitude driving transistor PAM_M3 generates a driving current based on its gate potential and the second power supply voltage provided by the second power supply line PAM_VDD. The magnitude of the driving current is determined by its gate-source voltage. Specifically, different voltages of the amplitude modulation data signal PAM_data result in different gate potentials of the amplitude driving transistor PAM_M3, thereby generating driving currents of different intensities to drive the light-emitting element 10 to exhibit different brightness levels. Taking a P-type transistor as an example, the lower the voltage of the amplitude modulation data signal PAM_data, the higher the gate-source voltage of the amplitude driving transistor PAM_M3, and the greater the current intensity of the driving current generated.

[0162] The voltage of the pulse width modulation data signal PWMdata determines the initial potential of the gate of the pulse width driving transistor PWM_M3. During the second data writing phase t4, the pulse width modulation data signal PWMdata provided by the pulse width data signal line PWM_DATA is written to the gate of the pulse width driving transistor PWM_M3 via the turned-on pulse width data writing transistor PWM_M2 and pulse width compensation transistor PWM_M4, thus self-compensating the threshold voltage of the pulse width driving transistor PWM_M3. At this time, the first capacitor PWM_C1 stores this voltage and maintains the potential of the gate of the pulse width driving transistor PWM_M3 during the light-emitting phase t5. The higher the voltage of the pulse width modulation data signal PWMdata, the higher the initial potential of the gate of the pulse width driving transistor PWM_M3 (taking a P-type transistor as an example). This initial potential, together with the voltage change of the sweep signal sweep coupled to the gate through the first capacitor PWM_C1, determines the moment when the pulse width driving transistor PWM_M3 switches from the off state to the on state. Specifically, during the linear decrease of the sweep signal from high to low level, the gate potential of the pulse width driving transistor PWM_M3 decreases synchronously through the coupling effect of the first capacitor PWM_C1. The higher the voltage of the pulse width modulation data signal PWM_data, the higher the initial gate potential, the longer the time required for the gate potential to drop to the turn-off threshold, and the longer the pulse width driving transistor PWM_M3 remains in the off state. Correspondingly, the amplitude driving transistor PAM_M3 remains on and provides driving current to the light-emitting element 10 for a longer period of time, i.e., the duration of the driving current is longer. Conversely, the lower the voltage of the pulse width modulation data signal PWM_data, the lower the initial gate potential, the shorter the time required for the gate potential to drop to the turn-off threshold, the earlier the pulse width driving transistor PWM_M3 turns on, the earlier the amplitude driving transistor PAM_M3 turns off, and the shorter the duration of the driving current.

[0163] Based on the above driving principle, in this embodiment, within the first grayscale range, the voltages of the amplitude modulation data signal PAM_data corresponding to the first and second grayscale levels are equal, while the voltages of the pulse width modulation data signal PWM_data corresponding to the first and second grayscale levels are not equal. That is, within the first grayscale range (high grayscale range), the voltage of the amplitude modulation data signal PAM_data remains constant, and the current intensity of the driving current generated by the amplitude driving transistor PAM_M3 remains constant; however, the voltage of the pulse width modulation data signal PWM_data varies with the grayscale level. The higher the voltage of the pulse width modulation data signal PWM_data, the higher the initial potential of the gate of the pulse width driving transistor PWM_M3, and the longer the duration of the driving current. Therefore, within the first grayscale range (high grayscale range), the brightness difference between different grayscale levels is achieved by adjusting the duration of the driving current by changing the voltage of the pulse width modulation data signal PWM_data, keeping the current intensity constant. This helps the light-emitting element 10 operate in the high-current range, thereby improving luminous efficiency.

[0164] Within the second grayscale range, the voltages of the amplitude modulation data signals PAM_data corresponding to the third and fourth grayscale levels are unequal, while the voltages of the pulse width modulation data signals PWM_data corresponding to the third and fourth grayscale levels are equal. That is, within the second grayscale range (low grayscale range), the voltage of the pulse width modulation data signal PWM_data remains constant, the initial potential of the gate of the pulse width driving transistor PWM_M3 remains unchanged, and the duration of the driving current is constant. However, the voltage of the amplitude modulation data signal PAM_data varies with different grayscale levels. This voltage change causes a change in the gate potential of the amplitude driving transistor PAM_M3, resulting in driving currents of varying intensities. Therefore, within the second grayscale range (low grayscale range), the brightness difference between different grayscale levels is achieved by adjusting the driving current intensity by changing the voltage of the amplitude modulation data signal PAM_data, while maintaining a constant duration. This allows the proportion of the edge transition time of the light-emitting enable signal in the entire light-emitting cycle to be controllable, improving the display effect at low grayscale levels.

[0165] It should be noted that, Figure 3 An exemplary circuit structure of 13T2C (i.e., including 13 transistors and 2 capacitors) is illustrated, but it is not limited thereto. In other embodiments, the pixel driving circuit 11 may also adopt other circuit structures, such as the 17T3C circuit structure, etc. The embodiments of the present invention do not specifically limit this.

[0166] Optionally, within the first grayscale range, the voltage of the pulse width modulation data signal PWM_data varies with the grayscale level, while the voltage of the amplitude modulation data signal PAM_data remains at a first fixed voltage value. Within the second grayscale range, the voltage of the amplitude modulation data signal PAM_data varies with the grayscale level, while the voltage of the pulse width modulation data signal PWM_data remains at a second fixed voltage value.

[0167] Specifically, within the first grayscale range (high grayscale range), the voltage of the pulse width modulation data signal PWM_data varies according to the grayscale level. The higher the grayscale, the higher the voltage of the PWM_data signal and the longer the duration of the driving current; conversely, the lower the grayscale, the lower the voltage of the PWM_data signal and the shorter the duration of the driving current. Meanwhile, the voltage of the amplitude modulation data signal PAM_data remains at a fixed first voltage value, ensuring that the current intensity of the driving current generated by the amplitude driving transistor PAM_M3 remains constant. Therefore, within the first grayscale range (high grayscale range), brightness adjustment is entirely achieved by the voltage variation of the PWM_data signal, i.e., by changing the duration of the driving current to adjust the grayscale.

[0168] It is understood that the first fixed voltage value is a constant voltage provided to the gate of the amplitude driving transistor PAM_M3 in the first gray level range (high gray level range). This voltage determines the current intensity of the driving current in the high gray level range. The first fixed voltage value can be set according to the actual needs of the display panel and the electro-optical characteristics of the light-emitting element 10.

[0169] In some embodiments, the first fixed voltage value should ensure that the current intensity of the driving current generated by the amplitude driving transistor PAM_M3 is within the efficient operating range of the light-emitting element 10 (e.g., Micro-LED). Since Micro-LEDs have high external quantum efficiency in the high current density range, setting the first fixed voltage value within an appropriate range allows the light-emitting element 10 to operate in a high-efficiency range within the first grayscale range (high grayscale range), which is beneficial for improving the overall energy efficiency of the display panel.

[0170] In some embodiments, the selection of the first fixed voltage value should also be coordinated with the voltage range of the pulse width modulation data signal PWM_data to ensure that the brightness of the light-emitting element 10 can cover the requirements of all gray levels in the first gray level range within a wider pulse width adjustment range.

[0171] It is understood that the specific value of the first fixed voltage varies depending on the specifications of the display panel. This embodiment of the invention does not impose a specific limitation on this. Those skilled in the art can set it according to the electro-optic characteristic curve of the light-emitting element 10 and the required brightness range.

[0172] Furthermore, within the second grayscale range (low grayscale range), the voltage of the amplitude modulation data signal PAM_data varies accordingly based on the target grayscale. Specifically, the higher the grayscale, the greater the voltage change in PAM_data to generate a larger drive current; conversely, the lower the grayscale, the less the drive current. Meanwhile, the voltage of the pulse width modulation data signal PWM_data remains at a second fixed voltage value, ensuring a constant initial potential at the gate of the pulse width driving transistor PWM_M3 and a constant duration of the drive current. Therefore, within the second grayscale range (low grayscale range), brightness adjustment is entirely achieved through voltage variations in the amplitude modulation data signal PAM_data, i.e., adjusting the grayscale by changing the intensity of the drive current.

[0173] It is understood that the second fixed voltage value is a constant voltage supplied to the gate of the pulse width driving transistor PWM_M3 within the second grayscale range (low grayscale range), and this voltage determines the duration of the driving current within the low grayscale range. The second fixed voltage value can be set according to the actual needs of the display panel and the electro-optical characteristics of the light-emitting element 10.

[0174] In some embodiments, the second fixed voltage value should keep the duration of the driving current at a relatively long fixed value to avoid an excessively high proportion of edge transition time due to excessively narrow pulse width, thereby ensuring the accuracy of the emission time and the uniformity of the display at low gray levels.

[0175] In some embodiments, the selection of the second fixed voltage value should also be matched with the voltage range of the amplitude modulation data signal PAM_data to ensure that the brightness of the light-emitting element 10 can cover the requirements of all gray levels in the second gray level range within a wider current intensity adjustment range.

[0176] Furthermore, the selection of the second fixed voltage value can be coordinated with the first fixed voltage value. For example, at the boundary between the first and second grayscale ranges, by appropriately configuring the first and second fixed voltage values, the brightness variation can be kept smooth and continuous.

[0177] It is understood that the specific value of the second fixed voltage varies depending on the specifications of the display panel. This embodiment of the invention does not impose a specific limitation on this. Those skilled in the art can set it according to the electro-optic characteristic curve of the light-emitting element 10 and the required brightness range.

[0178] In some embodiments, the grayscale also includes a third grayscale interval located between the first and second grayscale intervals. The grayscale levels in the third grayscale interval are lower than those in the first grayscale interval and higher than those in the second grayscale interval. That is, the third grayscale interval corresponds to the mid-grayscale range (mid-grayscale transition interval). The third grayscale interval includes a fifth and a sixth grayscale level with different grayscale levels. The voltages of the pulse width modulation data signals PWM_data corresponding to the fifth and sixth grayscale levels are not equal, and the voltages of the amplitude modulation data signals PAM_data corresponding to the fifth and sixth grayscale levels are also not equal. In other words, within the third grayscale interval (mid-grayscale transition interval), the brightness difference between different grayscale levels is simultaneously achieved by changing the voltages of both the pulse width modulation data signal PWM_data and the amplitude modulation data signal PAM_data.

[0179] Optionally, the grayscale also includes a third grayscale interval located between the first and second grayscale intervals. The grayscale levels in the third grayscale interval are lower than those in the first grayscale interval and higher than those in the second grayscale interval. Within the third grayscale interval, the voltage of both the pulse width modulation data signal PWM_data and the amplitude modulation data signal PAM_data changes with the grayscale level.

[0180] Specifically, the third grayscale interval corresponds to the mid-grayscale transition range. Within this interval, the voltages of both the pulse width modulation (PWM) data signal and the amplitude modulation (PAM) data signal change with the grayscale level. In other words, within this interval, the brightness difference between different grayscale levels is achieved by simultaneously altering the voltages of both the PWM and PAM signals. Specifically, when the grayscale level increases, the PWM voltage increases to prolong the duration of the drive current, while the PAM voltage changes accordingly to increase the drive current intensity. Conversely, when the grayscale level decreases, the PWM voltage decreases to shorten the duration of the drive current, while the PAM voltage changes accordingly to decrease the drive current intensity.

[0181] The control method, which simultaneously adjusts the voltages of the pulse width modulation (PWM) data signal and the amplitude modulation (PAM) data signal in the third grayscale range, achieves a smooth transition from the first grayscale range (primarily adjusting duration) to the second grayscale range (primarily adjusting current intensity). Understandably, as the grayscale level decreases, the control method gradually switches from being primarily pulse width modulation to being primarily pulse amplitude modulation. During this switching process, the two adjustment methods work together to avoid brightness jumps at the grayscale range transition boundaries, ensuring the smoothness and continuity of brightness changes across the entire grayscale range.

[0182] Optionally, the pulse width modulation (PWM) module includes a pulse width driving transistor PWM_M3, which is a P-type transistor. The amplitude modulation (PAM) module includes an amplitude driving transistor PAM_M3, which is also a P-type transistor. The grayscale also includes an eleventh grayscale and a twelfth grayscale, with the eleventh grayscale being greater than the twelfth grayscale. The voltage of the amplitude modulation data signal PAM_data corresponding to the eleventh grayscale is less than or equal to the voltage of the amplitude modulation data signal PAM_data corresponding to the twelfth grayscale. Similarly, the voltage of the pulse width modulation data signal PWM_data corresponding to the eleventh grayscale is greater than or equal to the voltage of the pulse width modulation data signal PWM_data corresponding to the twelfth grayscale.

[0183] The relevant descriptions of the pulse width driving transistor PWM_M3 and the amplitude driving transistor PAM_M3 can be found in any of the above embodiments, and will not be repeated here.

[0184] In this embodiment, both the pulse width driving transistor PWM_M3 and the amplitude driving transistor PAM_M3 are P-type transistors. A P-type transistor can be understood as a P-channel metal-oxide-semiconductor field-effect transistor (PMOS). The magnitude of its conduction current is related to the gate-source voltage. The lower the gate voltage, the greater the source-gate voltage difference, and the greater the current intensity of the driving current.

[0185] Therefore, in the amplitude modulation module PAM, the lower the voltage of the amplitude modulation data signal PAM_data, the greater the current intensity of the drive current generated by the amplitude driving transistor PAM_M3, and the higher the luminous brightness; conversely, the higher the voltage of the amplitude modulation data signal PAM_data, the smaller the current intensity of the drive current, and the lower the luminous brightness. Thus, the higher the grayscale, the lower the voltage of the amplitude modulation data signal PAM_data (to increase the current intensity of the drive current), and the lower the grayscale, the higher the voltage of the amplitude modulation data signal PAM_data (to decrease the current intensity of the drive current). In other words, the voltage of the amplitude modulation data signal PAM_data is negatively correlated with the grayscale.

[0186] In the pulse width modulation (PWM) module, the initial potential of the gate of the PWM drive transistor PWM_M3 is determined by the voltage of the PWM_data pulse width modulation data signal. The higher the voltage of the PWM_data pulse width modulation data signal, the higher the initial potential of the gate. This means the sweep signal, coupled through the first capacitor PWM_C1, takes longer to lower the gate potential to the turn-off threshold, resulting in a longer time for the PWM_M3 pulse width modulation data signal to remain in the off state, and consequently, a longer duration of the drive current and higher luminous intensity. Conversely, the lower the voltage of the PWM_data pulse width modulation data signal, the shorter the duration of the drive current and the lower the luminous intensity. Therefore, a higher grayscale level corresponds to a higher voltage of the PWM_data pulse width modulation data signal (to prolong the duration of the drive current), and a lower grayscale level corresponds to a lower voltage of the PWM_data pulse width modulation data signal (to shorten the duration of the drive current). In other words, the voltage of the PWM_data pulse width modulation data signal is positively correlated with the grayscale level.

[0187] Based on the characteristics of the P-type transistors, when driving the display panel, for higher gray levels (eleventh gray level), a lower amplitude modulation data signal (PAM_data) voltage and a higher pulse width modulation data signal (PWM_data) voltage are used; for lower gray levels (twelfth gray level), a higher amplitude modulation data signal (PAM_data) voltage and a lower pulse width modulation data signal (PWM_data) voltage are used. This ensures higher brightness at high gray levels and lower brightness at low gray levels, and the brightness changes monotonically with the gray level, which is beneficial for precise control of the gray level.

[0188] It should be noted that the embodiments of the present invention use P-type transistors as an example for illustration, but the technical solution of the present invention is not limited to this. In other embodiments, the transistors in the pixel driving circuit 11 can also be N-type transistors or other types of transistors, only needing to adjust the positive and negative proportional logic relationship between the voltage of each control signal and the gray level accordingly.

[0189] Figure 12This is a schematic diagram of the operating timing of another display panel provided in an embodiment of the present invention, as shown below. Figure 11 and Figure 12 As shown, optionally, the pulse width modulation (PWM) module includes a pulse width driving transistor PWM_M3 and a first capacitor PWM_C1. The first plate of the first capacitor PWM_C1 is electrically connected to the gate of the pulse width driving transistor PWM_M3, and the second plate of the first capacitor PWM_C1 receives the sweep signal sweep. The amplitude modulation (PAM) module includes an amplitude driving transistor PAM_M3 and an amplitude emission control transistor PAM_M16. The amplitude emission control transistor PAM_M16, the amplitude driving transistor PAM_M3, and the light-emitting element 10 are connected in series. The gate of the amplitude emission control transistor PAM_M16 receives the amplitude emission control signal PAM_em. Within one driving cycle, the start time T1 of the sweep signal sweep is equal to or later than the start time T2 of the amplitude emission control signal PAM_em.

[0190] Through the coupling effect of the first capacitor PWM_C1, the voltage change of the sweep signal sweep can be coupled to the gate of the pulse width drive transistor PWM_M3, thereby controlling the cutoff time of the pulse width drive transistor PWM_M3 and thus controlling the duration of the drive current.

[0191] The amplitude emission control transistor PAM_M16 is turned on or off under the control of the amplitude emission control signal PAM_em to control the on / off state of the path of the drive current flowing to the light-emitting element 10. The amplitude emission control transistor PAM_M16 may include at least one of a first amplitude emission control transistor PAM_M1 and a second amplitude emission control transistor PAM_M6. For example, as... Figure 3 As shown, the first amplitude emission control transistor PAM_M1 is connected in series between the second power supply line PAM_VDD and the amplitude driving transistor PAM_M3, and the second amplitude emission control transistor PAM_M6 is connected in series between the amplitude driving transistor PAM_M3 and the light-emitting element 10. The first amplitude emission control transistor PAM_M1 and the second amplitude emission control transistor PAM_M6 are simultaneously turned on under the control of the amplitude emission control signal PAM_em, so that the driving current path between the second power supply line PAM_VDD and the light-emitting element 10 is connected, but this is not the only limitation.

[0192] Furthermore, the start time T2 of the amplitude emission control signal PAM_em refers to the moment when the amplitude emission control signal PAM_em switches from the disabled level to the enabled level (for example, for a P-type transistor, it is the falling edge moment), that is, the moment when the emission stage begins.

[0193] The start time T1 of the sweep signal refers to the moment when the sweep signal begins to change (e.g., it starts to decrease linearly from a high level).

[0194] In this embodiment, by setting the start time T1 of the sweep signal to be no earlier than the start time T2 of the amplitude emission control signal PAM_em, a minimum emission time can be forcibly guaranteed after the emission stage t5 begins. Thus, even if the grayscale corresponding to the pulse width modulation data signal PWM_data is extremely low, attempting to compress the duration of the drive current to an extremely narrow range, the gate potential of the pulse width driving transistor PWM_M3 will not change since the sweep signal has not yet started to change. Therefore, the PWM_M3 will not be triggered to turn on, and the amplitude driving transistor PAM_M3 will remain on during this time period (e.g., t0), and the light-emitting element 10 will continue to emit light. This effectively avoids the problem of the drive current duration being compressed to an excessively narrow range or even approaching zero due to the low voltage of the pulse width modulation data signal PWM_data, ensuring that a minimum emission pulse width exists in each drive cycle, thereby improving the display uniformity and reliability at low grayscale levels.

[0195] It should be noted that the driving cycle refers to the time required for the pixel driving circuit 11 to complete one complete data writing and light emission driving process. Within one driving cycle, the pixel driving circuit 11 includes at least a data writing phase (such as the first data writing phase t2 and the second data writing phase t4) and a light emission phase t5. In the data writing phase, the pixel driving circuit 11 receives data signals (including pulse width modulation data signal PWMdata and amplitude modulation data signal PAM_data) and resets, writes, and performs threshold compensation on the gate potentials of the driving transistors (such as the pulse width driving transistor PWM_M3 and the amplitude driving transistor PAM_M3). In the light emission phase t5, the pixel driving circuit 11 outputs a driving current to the light-emitting element 10 according to the written data signal, causing the light-emitting element 10 to emit light.

[0196] The driving cycle can correspond to the frame cycle of the display panel (i.e., the time of one frame of image), or other cycle division methods can be adopted according to the actual driving architecture. This embodiment of the invention does not make specific limitations on this.

[0197] In some embodiments, such as Figure 11 As shown, the start time T1 of the sweep signal SWEEP is equal to the start time T2 of the amplitude emission control signal PAM_EM. That is, the moment when the sweep signal SWEEP begins to change (e.g., linearly decreasing from a high level) is the same as the moment when the amplitude emission control signal PAM_EM switches from an inactive level to an enabled level. The sweep signal SWEEP begins to change at the same time as the emission phase begins.

[0198] In some embodiments, such as Figure 12 As shown, the start time T1 of the sweep signal SWEEP can also be later than the start time T2 of the amplitude emission control signal PAM_EM. That is, the amplitude emission control signal PAM_EM switches to the enable level first, and after the emission stage t5 starts, the sweep signal SWEEP starts to change after a certain delay. At this time, during the time period between the start time T2 of the amplitude emission control signal PAM_EM and the start time T1 of the sweep signal SWEEP (i.e., the duration of stage t0), since the sweep signal SWEEP has not yet started to change, the gate potential of the pulse width driving transistor PWM_M3 will not change, and the pulse width driving transistor PWM_M3 will not be triggered to turn on. The amplitude driving transistor PAM_M3 remains in the on state during this time period (i.e., the duration of stage t0), and the light-emitting element 10 continues to emit light. This time period (i.e., the duration of stage t0) is the forced minimum emission pulse width.

[0199] It is understood that the greater the time difference (i.e., the duration of the t0 stage) between the start time T1 of the sweep signal and the start time T2 of the amplitude emission control signal PAM_em, the longer the forced minimum emission pulse width. The specific value of this time difference can be set according to the actual needs of the display panel, and this embodiment of the invention does not impose specific limitations on it.

[0200] Optional, such as Figure 3 , Figure 11 and Figure 12 As shown, the pulse width modulation module PWM also includes a pulse width emission control transistor PWM_M16, which is connected in series with the pulse width driving transistor PWM_M3. The gate of the pulse width emission control transistor PWM_M16 receives the pulse width emission control signal PWM_em; the pulse width emission control signal PWM_em and the amplitude emission control signal PAM_em are the same signal.

[0201] The pulse width emission control transistor PWM_M16 may include at least one of a first pulse width emission control transistor PWM_M1 and a second pulse width emission control transistor PWM_M6. For example, as shown... Figure 3 As shown, the first pulse width emission control transistor PWM_M1 is connected in series between the first power supply line PWM_VDD and the first terminal of the pulse width driving transistor PWM_M3, and the second pulse width emission control transistor PWM_M6 is connected in series between the second terminal of the pulse width driving transistor PWM_M3 and the gate of the amplitude driving transistor PAM_M3. The first pulse width emission control transistor PWM_M1 and the second pulse width emission control transistor PWM_M6 are simultaneously turned on under the control of the pulse width emission control signal PWM_em, so that the path between the first power supply line PWM_VDD and the gate of the amplitude driving transistor PAM_M3 is connected.

[0202] In this embodiment, the pulse width emission control signal PWM_em and the amplitude emission control signal PAM_em are the same signal. That is, the pulse width emission control transistor PWM_M16 and the amplitude emission control transistor PAM_M16 are controlled by the same emission control signal and are turned on or off at the same time.

[0203] By setting the pulse width emission control signal PWM_em and the amplitude emission control signal PAM_em to the same signal, both signals can be generated and provided by the same scan drive circuit. This reduces the number of scan drive circuits or simplifies their structure. Furthermore, the PWM_em and PAM_em signals can be transmitted using the same signal line, further reducing the number of signal lines in the display panel and lowering wiring complexity.

[0204] It should be noted that the pulse width emission control signal PWM_em and the amplitude emission control signal PAM_em are the same signal, meaning that they have the same waveform, the same amplitude, and the same timing. The pulse width emission control signal PWM_em and the amplitude emission control signal PAM_em can be provided by the same signal line or by different signal lines but maintain the same timing relationship.

[0205] It is understandable that the pulse width emission control signal line PWM_em and the amplitude emission control signal line PAM_em can be connected to the same signal source (such as a scanning drive circuit), or the pulse width emission control signal line PWM_em and the amplitude emission control signal line PAM_em are physically the same signal line.

[0206] Figure 13 This is a schematic diagram illustrating the working timing of another display panel provided in an embodiment of the present invention. Figure 14 This is a schematic diagram illustrating the operating timing of another display panel provided in an embodiment of the present invention, as shown below. Figure 13 and Figure 14 As shown, optionally, the driving cycle includes a data writing phase and a light emission phase t5. During the data writing phase, the sweep signal sweep is at a first level V1. During a portion of the light emission phase t5, the sweep signal sweep jumps from the first level V1 to a second level V2, and then begins to decline from the second level V2. The second level V2 is higher than the first level V1.

[0207] The data writing stage (such as the first data writing stage t2 and the second data writing stage t4) is used to write data signals (such as pulse width modulation data signal PWMdata and amplitude modulation data signal PAM_data) to the pixel driving circuit 11, and the light emission stage t5 is used to drive the light emission element 10 to emit light according to the written data signals.

[0208] During the data writing phase, the sweep frequency signal SWEEP is at the first level V1. For example, as shown... Figure 13 and Figure 14 As shown, taking the pixel driving circuit 11 using a P-type transistor as an example, the first level V1 can be a low level (e.g., ground voltage or negative voltage). Under this first level V1, the sweep frequency signal SWEEP does not trigger an additional change in the gate potential of the pulse width driving transistor PWM_M3, so as to ensure that the gate potential of the pulse width driving transistor PWM_M3 can be accurately written when data is written.

[0209] During a portion of the light-emitting phase t5, the sweep signal SWEEP transitions from the first level V1 to the second level V2, and then begins to decline from V2. V2 can be high. The sweep signal SWEEP transitions from the first level V1 (low level) to the second level V2 (high level) and then declines linearly from high. This transition couples the sweep signal SWEEP to the gate of the pulse width driver transistor PWM_M3 via the first capacitor PWM_C1, momentarily raising the gate potential of PWM_M3 from its initial write level to a higher starting level. Subsequently, the sweep signal SWEEP declines linearly from V2, and the gate potential of PWM_M3 declines synchronously. Because the gate starting potential is raised, the time required for the potential to drop to the turn-off threshold is longer, meaning the time PWM_M3 remains in the off state is extended. Correspondingly, the duration of the drive current is extended, and the light-emitting time increases.

[0210] With the above settings, the sweep frequency signal SWEEP changes from one level to the next and then decreases during the light emission stage t5, which increases the adjustment range of the driving current duration, allowing for a longer adjustment range and thus improving the freedom of grayscale adjustment. Simultaneously, during the data writing stage, the sweep frequency signal SWEEP remains at the first level V1, ensuring that data writing is not affected by the change in the sweep frequency signal SWEEP, thereby improving the accuracy of data writing.

[0211] In some embodiments, when writing image data to the display panel, the driver chip can first determine the grayscale range to which the current grayscale to be displayed belongs. If the grayscale to be displayed belongs to the first grayscale range, the driver chip sets the amplitude modulation data signal to a fixed value and changes the duration of the driving current by adjusting the pulse width modulation data signal to achieve the desired grayscale display. If the grayscale to be displayed belongs to the second grayscale range, the driver chip sets the pulse width modulation data signal to a fixed value and changes the current intensity of the driving current by adjusting the amplitude modulation data signal to achieve the desired grayscale display.

[0212] The above process can be achieved by configuring the gamma correction circuit or grayscale mapping table in the driver chip, pre-storing the amplitude modulation data and pulse width modulation data corresponding to each grayscale in the lookup table, and directly calling them during actual display to ensure real-time performance and accuracy, but it is not limited to this.

[0213] Figure 15 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention, such as... Figure 15 As shown, optionally, the light-emitting element 10 includes a first light-emitting element 101 and a second light-emitting element 102 that emit light of different colors. The second grayscale range corresponding to the first light-emitting element 101 is different from the second grayscale range corresponding to the second light-emitting element 102.

[0214] Specifically, the light-emitting element 10 includes a first light-emitting element 101 and a second light-emitting element 102 that emit different colors of light, enabling color display. For example, the first light-emitting element 101 can be a red light-emitting element emitting red light, and the second light-emitting element 102 can be a blue light-emitting element emitting blue light. Furthermore, the light-emitting element 10 may also include a green light-emitting element emitting green light. The red, green, and blue light-emitting elements together constitute a complete RGB pixel unit to achieve full-color display, but it is not limited to this.

[0215] Among them, the luminous efficiency and color deviation characteristics of different colored light-emitting elements 10 vary with current, and the human eye has different sensitivities to different colors.

[0216] In this embodiment, by setting different grayscale range division thresholds for light-emitting elements 10 of different colors, each light-emitting element 10 of different colors can adopt corresponding driving control methods within its own suitable grayscale range according to its own electro-optical characteristics. This allows light-emitting elements 10 of different colors to work in their respective high-efficiency ranges as much as possible throughout the grayscale range, thereby improving the uniformity of low grayscale display while improving the overall energy efficiency and color performance of the display panel.

[0217] Optionally, the upper limit grayscale value of the second grayscale range corresponding to the first light-emitting element 101 is different from the upper limit grayscale value of the second grayscale range corresponding to the second light-emitting element 102.

[0218] The upper limit gray level value of the second gray level range refers to the highest gray level value in the second gray level range (low gray level range). That is, the low gray level range is entered from the gray level value below (including the gray level value) and the driving mode is mainly based on pulse amplitude modulation.

[0219] The larger the upper grayscale value, the wider the driving mode of the light-emitting element 10 of that color is mainly pulse amplitude modulation. The smaller the upper grayscale value, the narrower the driving mode of the light-emitting element 10 of that color is mainly pulse amplitude modulation.

[0220] In this embodiment, by setting different upper grayscale values ​​for the second grayscale range for different colored light-emitting elements 10, the low grayscale range of the control mode based on pulse amplitude modulation can be determined according to the electro-optical characteristics of each colored light-emitting element 10 and the visual sensitivity of the human eye. This allows each colored light-emitting element 10 to adopt the most suitable driving mode within its appropriate grayscale range, thereby improving the overall display effect and energy efficiency of the display panel.

[0221] Optionally, the wavelength of the light emitted by the first light-emitting element 101 is greater than the wavelength of the light emitted by the second light-emitting element 102. The upper limit gray level value of the second gray level range corresponding to the first light-emitting element 101 is less than the upper limit gray level value of the second gray level range corresponding to the second light-emitting element 102.

[0222] For example, the first light-emitting element 101 can be a red light-emitting element and the second light-emitting element 102 can be a blue light-emitting element. The wavelength of the red light emitted by the red light-emitting element (about 620 nm to 750 nm) is greater than the wavelength of the blue light emitted by the blue light-emitting element (about 450 nm to 495 nm), but it is not limited to this.

[0223] In this embodiment, the upper limit gray level value of the second gray level range (low gray level range) corresponding to the first light-emitting element 101 is relatively small, and the upper limit gray level value of the second gray level range (low gray level range) corresponding to the second light-emitting element 102 is relatively large. That is, the range of the second gray level range of the first light-emitting element 101 is relatively small, and the range of the second gray level range of the second light-emitting element 102 is relatively large.

[0224] In some embodiments, the first light-emitting element 101 with a longer wavelength (such as a red light-emitting element) has a relatively high and stable external quantum efficiency at low current density, and can maintain good luminous efficiency and color performance at low driving current. Therefore, the first light-emitting element 101 can fix the current intensity of the driving current at a relatively small value in the high grayscale range (i.e., the first grayscale range) to make full use of the high efficiency advantage of the first light-emitting element 101 at low current, so that the first light-emitting element 101 operates near the optimal efficiency point in the high grayscale range, thereby improving the overall energy efficiency of the display panel.

[0225] However, if the current intensity fixed in the first grayscale range is already relatively low, then the space for further adjusting the current intensity in the lower grayscale range (second grayscale range) is relatively limited. Within the limited current adjustment range, the number of grayscale levels that can be divided is constrained. Therefore, if the second grayscale range is too large (i.e., it contains too many grayscale levels), the change in current intensity between adjacent grayscale levels will be too small, resulting in insufficient brightness differences between grayscale levels and affecting the display effect of the image at low grayscale levels.

[0226] Therefore, in this embodiment, the range of the second grayscale interval corresponding to the first light-emitting element 101 (such as a red light-emitting element) is set to be relatively small, so that the first light-emitting element 101 adopts a driving mode mainly based on pulse amplitude modulation in a small low grayscale range. Thus, within a limited current intensity adjustment range, only a few grayscale levels need to be covered, so that each grayscale level can be allocated a sufficient current change amplitude, ensuring that the brightness difference between each grayscale in the second grayscale interval is sufficiently obvious, and improving the display effect of the image under low grayscale.

[0227] In some embodiments, the second light-emitting element 102 with a shorter wavelength (such as a blue light-emitting element) has a lower external quantum efficiency at low current densities and exhibits a more significant wavelength drift (color shift) problem, while it has a higher external quantum efficiency and purer color at higher current densities. Therefore, the second light-emitting element 102 can fix the driving current intensity at a relatively large value in the high grayscale range (i.e., the first grayscale range), so that the blue light-emitting element operates in the high current, high efficiency range in the high grayscale range, ensuring luminous efficiency and color stability.

[0228] The first grayscale interval has a relatively large fixed current intensity, so in the lower grayscale interval (second grayscale interval), the current intensity has sufficient downward adjustment space to cover a wider grayscale range. Furthermore, since the second light-emitting element 102 has low efficiency at low currents, if the second grayscale interval is too small (i.e., it only switches to pulse amplitude modulation at extremely low grayscale levels), the current intensity needs to decrease drastically within a narrow grayscale range, which may result in insufficiently smooth brightness changes between grayscale levels and excessively drastic color shifts.

[0229] Therefore, in this embodiment, the range of the second grayscale interval corresponding to the second light-emitting element 102 (such as the blue light-emitting element) is set to be relatively large. That is, when the blue light-emitting element is at a relatively high grayscale, it switches to the driving mode mainly based on pulse amplitude modulation adjustment. It covers more grayscale levels within a sufficient current intensity adjustment range, so that the change of current intensity is more gradual and each grayscale level can be allocated an appropriate amount of current change. This ensures that the brightness change in the second grayscale interval is smoother, and the color shift change is more gradual and controllable, which is beneficial to improving the display effect at low grayscale.

[0230] Optionally, the light-emitting element 10 further includes a third light-emitting element 103. The wavelength of the light emitted by the first light-emitting element 101 is greater than the wavelength of the light emitted by the third light-emitting element 103, and the wavelength of the light emitted by the third light-emitting element 103 is greater than the wavelength of the light emitted by the second light-emitting element 102. The upper limit gray level value of the second gray level range corresponding to the third light-emitting element 103 is greater than the upper limit gray level value of the second gray level range corresponding to the second light-emitting element 102.

[0231] For example, the first light-emitting element 101 is a red light-emitting element, the third light-emitting element 103 is a green light-emitting element, and the second light-emitting element 102 is a blue light-emitting element. The red light emitted by the red light-emitting element has a wavelength (approximately 620 nm to 750 nm) that is greater than the green light emitted by the green light-emitting element (approximately 495 nm to 570 nm), and the green light emitted by the green light-emitting element has a wavelength greater than the blue light emitted by the blue light-emitting element (approximately 450 nm to 495 nm), but is not limited to these.

[0232] In this embodiment of the invention, the upper limit gray level value of the second gray level interval of the second light-emitting element 102 and the third light-emitting element 103 is greater than the upper limit gray level value of the second gray level interval of the first light-emitting element 101 and the second light-emitting element 102, so that the range of the second gray level interval of the second light-emitting element 102 is greater than the range of the second gray level interval of the first light-emitting element 101 and the second light-emitting element 102.

[0233] In some embodiments, the human eye has a high visual sensitivity to the emitted color of the second light-emitting element 102, so even small deviations in the color at low grayscale levels have a significant impact on human perception. Therefore, setting the second grayscale range (low grayscale range) of the second light-emitting element 102 to a larger extent allows it to employ a driving method primarily based on pulse amplitude modulation within a wider grayscale range, thereby maximizing the uniformity and accuracy of the second light-emitting element 102 display at low grayscale levels.

[0234] Optionally, the lower limit grayscale value of the first grayscale range corresponding to the first light-emitting element 101 is different from the lower limit grayscale value of the first grayscale range corresponding to the second light-emitting element 102.

[0235] The lower limit grayscale value of the first grayscale range refers to the lowest grayscale value in the first grayscale range (high grayscale range). That is, from this grayscale value upwards (including this grayscale value) into the high grayscale range, a driving method primarily based on pulse width modulation is used. The smaller the lower limit grayscale value, the wider the grayscale range for which the light-emitting element 10 of that color uses a driving method primarily based on pulse width modulation. Conversely, the larger the lower limit grayscale value, the narrower the grayscale range for which the light-emitting element 10 of that color uses a driving method primarily based on pulse width modulation.

[0236] In this embodiment, by setting different lower limit grayscale values ​​for the first grayscale range for different colored light-emitting elements 10, the high grayscale range of the control mode based on pulse width modulation can be determined according to the electro-optical characteristics of each colored light-emitting element 10 and the visual sensitivity of the human eye. This allows each colored light-emitting element 10 to adopt the most suitable driving mode within its appropriate grayscale range, thereby improving the overall display effect and energy efficiency of the display panel.

[0237] Optionally, the first light-emitting element 101 is a red light-emitting element, the second light-emitting element 102 is a blue light-emitting element, and the third light-emitting element 103 is a green light-emitting element.

[0238] The red, green, and blue light-emitting elements together form a complete RGB pixel unit to achieve full-color display.

[0239] Based on the differentiated range divisions of the above embodiments, in this embodiment, the ranges of the second grayscale range (low grayscale range) for the red, green, and blue light-emitting elements, from largest to smallest, are: green light-emitting element > blue light-emitting element > red light-emitting element. That is, the upper limit grayscale value of the second grayscale range (low grayscale range) for the green light-emitting element is the largest, followed by the blue light-emitting element, and the red light-emitting element is the smallest.

[0240] Among these, the human eye has the highest visual sensitivity to green light, and even slight deviations in green display at low grayscale levels have the greatest impact on human perception. Therefore, setting the second grayscale range (low grayscale range) of the green light-emitting element to its maximum allows it to preferentially employ a driving method based on pulse amplitude modulation within a wider grayscale range. This can largely ensure the uniformity of green display at low grayscale levels, thereby improving the overall low grayscale image quality.

[0241] Red light-emitting elements have relatively high and stable external quantum efficiency at low current densities. The second grayscale range (low grayscale range) of the red light-emitting element is set to the minimum. In the first grayscale range (high grayscale range), the driving mode is mainly based on pulse width modulation. Its fixed current value can be set to a small value to take advantage of its high efficiency under low current. Within the limited current intensity adjustment range of the second grayscale range, only a few grayscale levels need to be covered, thereby ensuring that the brightness difference between each grayscale is significant enough.

[0242] Blue light-emitting elements exhibit low external quantum efficiency and significant wavelength drift (color shift) at low current densities, while achieving higher efficiency and purer colors at higher current densities. Therefore, the second grayscale range (low grayscale range) of blue light-emitting elements is set relatively large (between green and red), resulting in smoother current intensity changes within this range. This ensures smoother brightness variations and more controlled color shift, ultimately improving display performance at low grayscale levels.

[0243] By dividing the light-emitting elements of different colors into different ranges as described above, each light-emitting element can adopt the corresponding driving control method within a suitable grayscale range according to its own electro-optical characteristics and human visual characteristics. This improves the uniformity of low grayscale display and white balance performance while taking into account the luminous efficiency of each color light-emitting element and optimizing the overall performance of the display panel.

[0244] It should be noted that the above embodiments use the example of the low grayscale range of the red, green, and blue light-emitting elements, which is described in descending order as green > blue > red, but are not limited to this. The relationship between the luminous efficiency of the light-emitting element 10 and the wavelength is not fixed. The efficiency of the light-emitting element 10 manufactured under different material systems and different process conditions may vary with the change in current.

[0245] For example, in certain material systems, the low-current efficiency of red light-emitting elements may not be significantly higher than that of blue light-emitting elements; or under other process conditions, the efficiency characteristics of green light-emitting elements may change. Therefore, the specific size relationship of the second grayscale range (low grayscale range) of each of the red, green, and blue light-emitting elements can be flexibly set according to the actual light-emitting materials, device structures, process conditions, and specific performance requirements of the display panel. This embodiment of the invention does not impose specific limitations on this.

[0246] In actual product design, the inflection point of efficiency change with current can be determined by testing the electro-optic characteristic curves of each color light-emitting element 10. Based on this, appropriate grayscale range division thresholds can be set for each color light-emitting element so that each color light-emitting element can work in its own high-efficiency range, while taking into account the display uniformity and white balance performance under low grayscale.

[0247] Based on the same inventive concept, embodiments of the present invention also provide a display device. Figure 16 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention, such as... Figure 16 As shown, the display device 50 includes the display panel 51 described in any embodiment of the present invention. Therefore, the display device 50 provided by the embodiments of the present invention has the technical effects of the technical solutions in any of the above embodiments. The explanations of the same or corresponding structures and terms as described in the above embodiments will not be repeated here.

[0248] Figure 17 This is a schematic diagram of another display device provided in an embodiment of the present invention, such as... Figure 17 As shown, the display device provided in this embodiment of the invention can be a splicing display device, such as a borderless splicing display device. The splicing display device includes at least two of the above-mentioned display panels 51, so as to be suitable for large-screen display devices with display functions.

[0249] At least two display panels 51 may be arranged along the first direction X, or at least two display panels 51 may be arranged along the second direction Y, but are not limited thereto. This embodiment of the invention does not make specific limitations in this regard.

[0250] The display device 50 provided in this embodiment of the invention can be Figure 16 The phone shown can also be Figure 17 The splicing display device shown can also be any electronic product with display function, including but not limited to the following categories: television, laptop, desktop monitor, tablet computer, digital camera, smart bracelet, smart glasses, vehicle display, medical equipment, industrial control equipment, touch interactive terminal, commercial large screen, AR / VR micro display, etc. The embodiments of the present invention do not make any special limitations on this.

[0251] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0252] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A display panel, characterized in that, It includes a light-emitting element and a pixel driving circuit that outputs a driving current to the light-emitting element; The grayscale of the display panel is at least divided into a first grayscale range and a second grayscale range, wherein the grayscale in the first grayscale range is higher than the grayscale in the second grayscale range. The first grayscale range includes a first grayscale and a second grayscale with different grayscale values. The current intensities of the driving currents corresponding to the first grayscale and the second grayscale are equal, and the durations of the driving currents corresponding to the first grayscale and the second grayscale are not equal. The second grayscale range includes a third grayscale and a fourth grayscale with different grayscale values. The current intensities of the driving currents corresponding to the third grayscale and the fourth grayscale are not equal, and the durations of the driving currents corresponding to the third grayscale and the fourth grayscale are equal.

2. The display panel according to claim 1, characterized in that, Within the first grayscale range, the duration of the driving current increases as the grayscale level increases; Within the second grayscale range, the current intensity of the driving current increases as the grayscale level increases.

3. The display panel according to claim 1, characterized in that, The grayscale also includes a third grayscale interval located between the first grayscale interval and the second grayscale interval; the grayscale in the third grayscale interval is lower than the grayscale in the first grayscale interval and higher than the grayscale in the second grayscale interval. The third grayscale range includes a fifth grayscale and a sixth grayscale with different grayscale levels. The duration of the driving current corresponding to the fifth grayscale and the sixth grayscale are not equal, and the current intensity of the driving current corresponding to the fifth grayscale and the sixth grayscale is not equal.

4. The display panel according to claim 3, characterized in that, The gray level difference between the fifth gray level and the sixth gray level is equal to the gray level difference between the first gray level and the second gray level. The difference in duration of the driving current corresponding to the fifth gray level and the sixth gray level is less than the difference in duration of the driving current corresponding to the first gray level and the second gray level.

5. The display panel according to claim 3, characterized in that, The difference between the fifth gray level and the sixth gray level is equal to the difference between the third gray level and the fourth gray level. The difference in current intensity between the driving current corresponding to the fifth gray level and the sixth gray level is less than the difference in current intensity between the driving current corresponding to the third gray level and the fourth gray level.

6. The display panel according to claim 3, characterized in that, Within the third grayscale range, the duration of the driving current increases with the increase of the grayscale, and the current intensity of the driving current also increases with the increase of the grayscale.

7. The display panel according to claim 3, characterized in that, Within the third grayscale range, the rate of change of the duration of the driving current relative to the grayscale is less than the rate of change of the duration relative to the grayscale in the first grayscale range. And / or, Within the third grayscale range, the rate of change of the driving current intensity relative to the grayscale is less than the rate of change of the current intensity relative to the grayscale in the second grayscale range.

8. The display panel according to claim 3, characterized in that, The third grayscale interval includes at least two sub-grayscale intervals, and the at least two sub-grayscale intervals include a first sub-grayscale interval and a second sub-grayscale interval, wherein the grayscale in the first sub-grayscale interval is higher than the grayscale in the second sub-grayscale interval. The first sub-grayscale interval includes the seventh and eighth grayscale levels with different grayscale levels, and the second sub-grayscale interval includes the ninth and tenth grayscale levels with different grayscale levels. The gray level difference between the seventh gray level and the eighth gray level is equal to the gray level difference between the ninth gray level and the tenth gray level. The difference in duration of the driving current corresponding to the seventh gray level and the eighth gray level is greater than the difference in duration of the driving current corresponding to the ninth gray level and the tenth gray level. And / or, The difference in current intensity between the driving current corresponding to the seventh gray level and the eighth gray level is less than the difference in current intensity between the driving current corresponding to the ninth gray level and the tenth gray level.

9. The display panel according to claim 8, characterized in that, Within the first sub-grayscale interval, the rate of change of the duration of the driving current relative to the grayscale is greater than the rate of change of the duration of the driving current relative to the grayscale in the second sub-grayscale interval. And / or, Within the second sub-grayscale interval, the rate of change of the driving current intensity relative to the grayscale is greater than the rate of change of the current intensity relative to the grayscale within the first sub-grayscale interval.

10. The display panel according to claim 1, characterized in that, The grayscale also includes an eleventh grayscale and a twelfth grayscale, wherein the eleventh grayscale is greater than the twelfth grayscale; The duration of the driving current corresponding to the eleventh gray level is greater than or equal to the duration of the driving current corresponding to the twelfth gray level. The current intensity of the driving current corresponding to the eleventh gray level is greater than or equal to the current intensity of the driving current corresponding to the twelfth gray level.

11. The display panel according to claim 1, characterized in that, The pixel driving circuit includes a pulse width adjustment module and an amplitude adjustment module electrically connected to the pulse width adjustment module; The pulse width modulation module is electrically connected to the pulse width data signal line that transmits the pulse width modulation data signal; The amplitude adjustment module is electrically connected to the amplitude data signal line that transmits amplitude modulation data signals; Within the first grayscale range, the voltages of the amplitude modulation data signals corresponding to the first grayscale and the second grayscale are equal, while the voltages of the pulse width modulation data signals corresponding to the first grayscale and the second grayscale are not equal. Within the second grayscale range, the voltages of the amplitude modulation data signals corresponding to the third grayscale and the fourth grayscale are not equal, while the voltages of the pulse width modulation data signals corresponding to the third grayscale and the fourth grayscale are equal.

12. The display panel according to claim 11, characterized in that, Within the first grayscale range, the voltage of the pulse width modulation data signal changes with the grayscale, and the voltage of the amplitude modulation data signal is a first fixed voltage value. Within the second grayscale range, the voltage of the amplitude modulation data signal changes with the grayscale, and the voltage of the pulse width modulation data signal is a second fixed voltage value.

13. The display panel according to claim 11, characterized in that, The grayscale also includes a third grayscale interval located between the first grayscale interval and the second grayscale interval; the grayscale in the third grayscale interval is lower than the grayscale in the first grayscale interval and higher than the grayscale in the second grayscale interval. Within the third grayscale range, the voltage of both the pulse width modulation data signal and the amplitude modulation data signal changes with the grayscale level.

14. The display panel according to claim 11, characterized in that, The pulse width adjustment module includes a pulse width driving transistor, which is a P-type transistor. The amplitude adjustment module includes an amplitude driving transistor, which is a P-type transistor; The grayscale also includes an eleventh grayscale and a twelfth grayscale, wherein the eleventh grayscale is greater than the twelfth grayscale; The voltage of the amplitude modulation data signal corresponding to the eleventh gray level is less than or equal to the voltage of the amplitude modulation data signal corresponding to the twelfth gray level. The voltage of the pulse width modulation data signal corresponding to the eleventh gray level is greater than or equal to the voltage of the pulse width modulation data signal corresponding to the twelfth gray level.

15. The display panel according to claim 11, characterized in that, The pulse width adjustment module includes a pulse width driving transistor and a first capacitor. The first plate of the first capacitor is electrically connected to the gate of the pulse width driving transistor, and the second plate of the first capacitor receives a sweep frequency signal. The amplitude adjustment module includes an amplitude driving transistor and an amplitude emission control transistor. The amplitude emission control transistor, the amplitude driving transistor, and the light-emitting element are connected in series. The gate of the amplitude emission control transistor receives an amplitude emission control signal. Within one driving cycle, the start time of the frequency sweep signal is equal to or later than the start time of the amplitude emission control signal.

16. The display panel according to claim 15, characterized in that, The pulse width adjustment module further includes a pulse width light emission control transistor, which is connected in series with the pulse width driving transistor, and the gate of the pulse width light emission control transistor receives a pulse width light emission control signal. The pulse width emission control signal and the amplitude emission control signal are the same signal.

17. The display panel according to claim 15, characterized in that, The driving cycle includes a data writing phase and a light emission phase; During the data writing phase, the frequency sweep signal is at a first level; During a portion of the light-emitting phase, the sweep frequency signal jumps from the first level to the second level and then begins to decrease from the second level. The second level is higher than the first level.

18. The display panel according to claim 1, characterized in that, The light-emitting element includes a first light-emitting element and a second light-emitting element that emits light of different colors; The second grayscale range corresponding to the first light-emitting element is different from the second grayscale range corresponding to the second light-emitting element.

19. The display panel according to claim 18, characterized in that, The upper limit gray level value of the second gray level range corresponding to the first light-emitting element is different from the upper limit gray level value of the second gray level range corresponding to the second light-emitting element.

20. The display panel according to claim 18, characterized in that, The wavelength of the light emitted by the first light-emitting element is greater than the wavelength of the light emitted by the second light-emitting element; The upper limit gray level value of the second gray level range corresponding to the first light-emitting element is less than the upper limit gray level value of the second gray level range corresponding to the second light-emitting element.

21. The display panel according to claim 20, characterized in that, The light-emitting element further includes a third light-emitting element, wherein the wavelength of the light emitted by the first light-emitting element is greater than the wavelength of the light emitted by the third light-emitting element, and the wavelength of the light emitted by the third light-emitting element is greater than the wavelength of the light emitted by the second light-emitting element; The upper limit gray level value of the second gray level range corresponding to the third light-emitting element is greater than the upper limit gray level value of the second gray level range corresponding to the second light-emitting element.

22. The display panel according to claim 18, characterized in that, The lower limit grayscale value of the first grayscale interval corresponding to the first light-emitting element is different from the lower limit grayscale value of the first grayscale interval corresponding to the second light-emitting element.

23. The display panel according to claim 21, characterized in that, The first light-emitting element is a red light-emitting element, the second light-emitting element is a blue light-emitting element, and the third light-emitting element is a green light-emitting element.

24. A display device, characterized in that, Includes the display panel according to any one of claims 1-23.