Driving circuit of display panel, driving method thereof and display device

Abstract

This application discloses a driving circuit, driving method, and display device for a display panel. The driving circuit includes a timing controller, a register, and a gamma voltage generator. The timing controller outputs grayscale voltage data and a control signal. The register is connected to the timing controller via an I2C bus and stores the grayscale voltage data output by the timing controller. The gamma voltage generator is connected to the register and receives the grayscale voltage data stored in the register from the timing controller under the control signal, and outputs a gamma voltage. By setting up a register, this application avoids the timing controller directly outputting grayscale voltage data to the gamma voltage generator, thereby preventing the gamma voltage generator from outputting a gamma voltage based on incorrect grayscale voltage data and preventing erroneous data from taking effect.

Description

Technical Field

[0001] This application relates to the field of optical imaging technology, and in particular to a driving circuit for a display panel, a driving method thereof, and a display device. Background Technology

[0002] As the mainstream display panel, LCD panels primarily process display data through a timing controller mounted on the driver circuit board. The grayscale voltage data is then transmitted to a gamma voltage generator, which selects the corresponding gamma voltage to output to the data lines based on the grayscale voltage data. The driver circuit board typically also includes a power supply circuit to provide power signals to the timing controller and gamma voltage generator.

[0003] Currently, timing controllers and gamma voltage generators are typically connected via an I2C bus. However, under variable refresh rate mode, the different frame blank times at different refresh rates cause transmission problems such as misidentification during the transmission of grayscale voltage data from the timing controller to the gamma voltage generator, resulting in screen flickering due to abnormal gamma voltage. Therefore, those skilled in the art urgently need a technical solution to address these issues. Summary of the Invention

[0004] The purpose of this application is to provide a driving circuit for a display panel, a driving method thereof, and a display device. By setting a temporary register, the timing controller is prevented from directly outputting grayscale voltage data to the gamma voltage generator, thereby preventing the gamma voltage generator from outputting gamma voltage based on incorrect grayscale voltage data and preventing erroneous data from taking effect.

[0005] This application discloses a driving circuit for a display panel. The driving circuit includes a timing controller, a register, and a gamma voltage generator. The timing controller is used to output grayscale voltage data and control signals. The register is connected to the timing controller via an I2C bus and is used to store the grayscale voltage data output by the timing controller. The gamma voltage generator is connected to the register and is used to receive the grayscale voltage data stored in the register from the timing controller under the action of the control signals and output a gamma voltage.

[0006] Optionally, the register is located outside the gamma voltage generator, and the register is connected to the gamma voltage generator via a parallel port; the grayscale voltage data includes at least two bytes of data, the control signal includes a first control signal, and the timing controller outputs the first control signal to the register; when the register receives the first control signal, it transmits the two bytes of grayscale voltage data in the register to the gamma voltage generator in parallel within a preset time.

[0007] Optionally, the temporary register is a digital latch, and the preset time is one clock cycle; after the timing controller sends grayscale voltage data to the digital latch, it outputs a first control signal to the digital latch.

[0008] Optionally, the temporary register includes a storage register located inside the gamma voltage generator; the gamma voltage generator also includes a working register for storing grayscale voltage data input to the gamma voltage generator; wherein, the timing controller is connected to the storage register via an I2C bus, and the storage register and the working register are connected in parallel; the grayscale voltage data includes at least two bytes of data, the control signal includes a second control signal, and the timing controller outputs the second control signal to the gamma voltage generator; when the gamma voltage generator receives the second control signal, it transmits the two bytes of grayscale voltage data in the storage register to the working register in parallel within a preset time.

[0009] Optionally, the gamma voltage generator further includes a reference voltage generation unit, a switching unit, and a grayscale voltage generation unit. The reference voltage generation unit is used to divide the power supply terminal voltage applied from the external power supply unit through at least 10 series resistors. The switching unit cooperates with the reference voltage generation unit and has multiple switching elements. The grayscale voltage generation unit has at least 64 series resistors and is used to re-divide the voltage output from the switching unit according to the grayscale voltage data from the working register to output a gamma voltage.

[0010] Optionally, a frame time of the display panel includes a display period and a blank period, wherein the length of the blank period is different at different refresh rates; the timing controller outputs the control signal during the blank period, and during the blank period, the grayscale voltage data is transmitted in parallel from the temporary register to the working register of the gamma voltage generator.

[0011] Optionally, the display panel includes a fixed refresh rate display mode and a variable refresh rate display mode; when the display panel is in the fixed refresh rate display mode, the timing controller directly transmits grayscale voltage data to the gamma voltage generator; when the display panel is in the variable refresh rate display mode, the timing controller transmits grayscale voltage data to the temporary register.

[0012] This application discloses a driving method for a driving circuit of a display panel, wherein the driving circuit of the display panel is as described above, and the driving method includes: When the display panel is in variable refresh rate display mode, the timing controller transmits grayscale voltage data to the register; When the display panel enters a blank period, the gamma voltage generator receives grayscale voltage data stored in the register output from the timing controller; The frame time of the display panel includes a display period and a blank period.

[0013] Optionally, when the display panel is in a variable refresh rate display mode, the step of the timing controller transmitting grayscale voltage data to the register includes: Arrange the priority of multiple grayscale voltage data, where the data in the grayscale voltage data that has a carry or a back in two bytes has the first priority; When the duration of the detected blank period is less than the threshold, the data of the first priority is first transferred to the temporary storage.

[0014] This application also discloses a display device, including a display panel and a driving circuit for the display panel as described above, the driving circuit being used to drive the display panel to operate.

[0015] This application uses a temporary register to receive grayscale voltage data output by the timing controller. Since this register does not directly affect the gamma voltage generator's output gamma voltage, the transmission can occur at any time within a frame period, thus avoiding data transmission problems caused by varying frame blank periods during refresh rate switching. When the timing controller outputs a control signal, the gamma voltage generator receives the grayscale voltage data temporarily stored in the register and outputs a gamma voltage based on this data. By using a temporary register, this application avoids the timing controller directly outputting grayscale voltage data to the gamma voltage generator, preventing transmission problems such as misidentification during the transmission of grayscale voltage data to the gamma voltage generator due to varying frame blank periods at different refresh rates. This prevents the gamma voltage generator from outputting a gamma voltage based on incorrect grayscale voltage data, thus preventing erroneous data from taking effect. Attached Figure Description

[0016] The accompanying drawings, which form part of the specification, are used to provide a further understanding of the embodiments of this application and illustrate the implementation methods of this application, together with the textual description, to explain the principles of this application. Obviously, the drawings described below are merely some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings without creative effort. In the drawings: Figure 1 This is a schematic diagram of a display panel according to an embodiment of this application; Figure 2This is a schematic diagram of the driving circuit of the display panel according to the first embodiment of this application; Figure 3 This is a schematic diagram of the display period and frame blank period of the variable refresh rate in this application; Figure 4 This is a schematic diagram of the gamma voltage generator of this application; Figure 5 This is a schematic diagram of the driving circuit of the display panel according to the second embodiment of this application; Figure 6 This is a schematic diagram of the driving method of the display panel driving circuit of this application; Figure 7 This is a schematic diagram of the display device of this application.

[0017] Among them, 100 is the drive circuit; 110 is the timing controller; 120 is the temporary register; 121 is the digital latch; 122 is the storage register; 130 is the gamma voltage generator; 131 is the working register; 132 is the reference voltage generation unit; 133 is the switching unit; 134 is the grayscale voltage generation unit; Data is the grayscale voltage data; Control_1 is the first control signal; Control_2 is the second control signal; 200 is the display device; and 210 is the display panel. Detailed Implementation

[0018] It should be understood that the terminology, specific structural and functional details used herein are merely for describing particular embodiments and are representative. However, this application may be implemented in many alternative forms and should not be construed as being limited to the embodiments set forth herein.

[0019] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating relative importance or implying the number of technical features indicated. Therefore, unless otherwise stated, a feature specified as "first" or "second" may explicitly or implicitly include one or more of that feature; "multiple" means two or more. Furthermore, terms such as "upper," "lower," "left," "right," "vertical," and "horizontal," indicating orientation or positional relationships, are based on the orientation or relative positional relationships shown in the accompanying drawings and are only for the purpose of simplifying the description of this application, not indicating that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as limiting this application. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0020] The present application will now be described in detail with reference to the accompanying drawings and optional embodiments.

[0021] Figure 1This is a schematic diagram of a display panel according to an embodiment of this application. Figure 2 This is a schematic diagram of the driving circuit of the display panel according to the first embodiment of this application. See also Figures 1 to 2 As shown, this application discloses a driving circuit 100 for a display panel. The driving circuit 100 includes a timing controller 110, a temporary register 120, and a gamma voltage generator 130. The timing controller 110 is used to output grayscale voltage data Data and a control signal. The temporary register 120 is connected to the timing controller 110 via an I2C bus and is used to store the grayscale voltage data Data output by the timing controller 110. The gamma voltage generator 130 is connected to the temporary register 120 and is used to receive the grayscale voltage data Data stored in the temporary register 120 from the timing controller 110 under the action of the control signal and output a gamma voltage.

[0022] This application uses a temporary register 120 to receive grayscale voltage data Data output by the timing controller 110. Since the temporary register 120 does not directly affect the gamma voltage output by the gamma voltage generator 130, this process can occur at any time within a frame period, thus avoiding data transmission problems caused by the varying lengths of the frame blank periods during refresh rate switching. When the timing controller 110 outputs a control signal, the gamma voltage generator 130 receives the grayscale voltage data Data temporarily stored in the temporary register 120 and outputs a gamma voltage based on this data. This application avoids the timing controller 110 directly outputting grayscale voltage data Data to the gamma voltage generator 130 by setting a temporary register 120. This avoids transmission problems such as misidentification during the transmission of grayscale voltage data Data from the timing controller 110 to the gamma voltage generator 130 due to different frame blank periods at different refresh rates. This prevents the gamma voltage generator 130 from outputting gamma voltage based on incorrect grayscale voltage data Data and prevents erroneous data from taking effect.

[0023] In this embodiment, a frame time of the display panel includes a display period and a blank period. The display period (Active) is the time it takes for all scan lines to scan once per frame, during which the corresponding data voltage is assigned to the pixel electrode of each sub-pixel. The blank period, also known as the frame blank period (V-Blank), refers to the remaining time within a frame excluding the display period. During the frame blank period, all scan lines stop scanning. When the refresh rate changes, the corresponding frame time also changes. For example, as the refresh rate increases, the corresponding frame time decreases. However, when the clock signal remains constant, the display period is limited by the different scan times for each scan line, making the duration of the display period constant. Therefore, the duration of the blank period varies with the refresh rate. That is, the length of the blank period is different at different refresh rates; the higher the refresh rate, the shorter the blank period. When the duration of the blank period changes, if the duration is insufficient when the timing controller 110 outputs grayscale voltage data Data to the gamma voltage generator 130, only half of the grayscale voltage data Data will be transmitted, such as one byte of data. The gamma voltage generator 130 will directly output gamma voltage based on this half data, resulting in screen flickering due to abnormal gamma voltage.

[0024] Specifically, as display panel refresh rate requirements increase, users have found that due to the unpredictability of display panels, the graphics processing unit (GPU) requires different rendering times for different scenes. If the monitor's refresh rate is locked, when the GPU's frame rate exceeds the monitor's refresh rate, the GPU will send more than one frame within one refresh cycle (one frame), causing screen tearing. Conversely, when the GPU's frame rate is lower than the monitor's refresh rate, the monitor will repeatedly display old frames after frame switching when no new frames are available, resulting in visual stuttering. This led to the development of variable refresh rate (Fresync) technology. Its main function is to determine the monitor's refresh rate based on the actual readiness time of each frame output by the GPU. After the GPU finishes rendering a frame, it immediately sends a signal to the monitor indicating that a new frame is ready via an adaptive synchronization protocol in the interface. Upon receiving this signal, the monitor immediately ends the current frame's V-Blank period and begins the display period for a new frame.

[0025] However, for LCD panels, frequent changes in refresh rate result in varying lengths of frame blank periods at different refresh rates, leading to different leakage times of pixel voltage through thin-film transistors. For example, at high refresh rates, the frame blank period is shorter, resulting in less pixel voltage leakage; at low refresh rates, the frame blank period is longer, resulting in more pixel voltage leakage. This causes the same grayscale to display different brightness levels at different refresh rates, thus causing screen flicker.

[0026] Figure 3 This is a schematic diagram illustrating the display period and frame blank period of the variable refresh rate in this application. See also... Figure 3 As shown, the display period is called Active, and the frame blanking period is called V-Blank; the sum of the two is one frame time. Especially during frequent switching between high and low refresh rates, such as when the previous frame is displayed at a 144Hz refresh rate and the next frame needs to switch to 48Hz, the frame blanking period becomes longer at 48Hz, leading to severe leakage in the pixel electrodes, resulting in decreased brightness, which the human eye will noticeably perceive as the screen darkening. Conversely, when the next frame is at a high refresh rate, the frame blanking period becomes shorter; for example, at 70Hz, leakage is less than at 48Hz, the brightness decrease is less, and the screen will appear brighter again. Therefore, with frequent refresh rate switching, this alternating bright and dark appearance causes screen flickering.

[0027] To address this, a V-Blanking Gamma Compensation (VGC) algorithm is introduced. This algorithm compensates for gamma voltage during frame blank periods. Specifically, by setting nodes at different time positions within the frame blank period, the timing controller 110 can dynamically adjust the gamma voltage output by the gamma voltage generator at the corresponding node in each frame. By outputting the compensated gamma voltage, the attenuation of screen brightness at low refresh rates is compensated. Different gamma voltage compensation values ​​are matched to different frame blank period lengths. Generally, the longer the frame blank period, the larger the corresponding gamma voltage compensation value, thus achieving brightness compensation.

[0028] Generally, the VGC algorithm is activated when the refresh rate change exceeds a certain threshold. For example, if the refresh rate change exceeds 7Hz (e.g., a change from 120Hz to 127Hz), the VGC algorithm will be activated. In this case, the grayscale voltage data Data needs to be output to the gamma voltage generator 130 so that the gamma voltage is output as a compensated value based on the grayscale voltage data Data. In this application, the grayscale voltage data Data corresponds to the aforementioned gamma voltage compensation value, and the gamma voltage generator 130 outputs the compensated gamma voltage based on this compensation value.

[0029] Specifically, the gamma voltage is typically composed of 10 bits of data. During the process of the timing controller 110 outputting grayscale voltage data Data to the gamma voltage generator 130, the I2C protocol is used to transmit data in 8-bit bytes. Therefore, the grayscale voltage data Data includes at least two bytes of data. For example, the two bytes corresponding to grayscale voltage data Data of 255 are 0000 0000 1111 1111. If, due to changes in the frame blank period, only one byte of data, such as 0000 0000, is transmitted to the gamma voltage generator 130, the gamma voltage generator 130 will output the gamma voltage corresponding to grayscale 0, resulting in a significant difference from the gamma voltage corresponding to grayscale 255. This large change in gamma voltage causes the screen to flicker.

[0030] When 256 grayscale levels require compensation at different refresh rates, if a 1-bit offset occurs, the grayscale voltage data Data becomes 255. The two bytes of data change from 0000 0001 0000 0000 to 0000 0000 1111 1111. During this 255 grayscale transmission process, if only one byte of grayscale data voltage is received by the gamma voltage generator 130 (e.g., 00000000), the gamma voltage generator 130 will output the gamma voltage corresponding to the grayscale voltage data Data being 0000 00000000 0000. This results in a significant difference from the gamma voltage corresponding to 256 grayscale levels, causing the screen to flicker due to the large change in gamma voltage.

[0031] Therefore, this application sets up a temporary register 120, with the timing controller 110 connected to the temporary register 120 via I2C, and the temporary register 120 connected to the gamma voltage generator 130 via a parallel port. Under the action of the control signal, both bytes of grayscale voltage data Data are simultaneously transmitted to the gamma voltage generator 130 via the parallel port. This avoids the situation where only one byte of grayscale voltage data Data is transmitted to the gamma voltage generator 130 during I2C transmission.

[0032] Specifically, the timing controller 110 outputs the control signal during the blank period, and during the blank period, the grayscale voltage data Data is transmitted in parallel by the temporary register 120 to the working register 131 of the gamma voltage generator 130.

[0033] Figure 4 This is a schematic diagram of the gamma voltage generator of this application, see [link / reference]. Figure 4As shown, the gamma voltage generator 130 includes a reference voltage generation unit 132, a switching unit 133, a working register 131, and a grayscale voltage generation unit 134. The reference voltage generation unit 132 is used to divide the power signal applied from an external power supply circuit through at least 10 series resistors and output multiple levels of reference voltage dividers, providing a basis for selectable voltage levels for the subsequent switching unit 133, such as 14 gamma voltage levels. The switching unit 133 cooperates with the reference voltage generation unit 132 and has multiple switching elements. The switching unit 133 selects a specific level of the reference voltage divider output by the reference voltage generation unit 132 and transmits it to the grayscale voltage generation unit 134. The working register 131 stores the grayscale voltage data Data input to the gamma voltage generator 130 and controls the number of switching units 133 that are turned on based on the grayscale voltage data Data. The grayscale voltage generation unit 134, having at least 64 series resistors, is used to reclassify the voltage output from the switching unit 133 based on the grayscale voltage data Data from the working register 131 to output a gamma voltage. This gamma voltage typically has 63 to 255 gamma levels.

[0034] In this embodiment, the grayscale voltage data Data in the temporary register 120 is transferred to the working register 131 under the action of the control signal, thereby controlling the grayscale voltage generation unit 134 to output the corresponding gamma voltage. When the refresh rate of the display panel changes, the timing controller 110 calculates the gamma voltage compensation value, i.e., the grayscale voltage data Data, according to the duration of the frame blank period. This data is temporarily stored in the temporary register 120. When the frame blank period is enabled, the working register 131 in the gamma voltage generator 130 is controlled to receive the grayscale voltage data Data. The working register 131 outputs a new switching control signal according to the new compensation value, controlling the switching unit 133 to select different reference voltage dividers. The grayscale voltage generation unit 134 performs fine voltage division on the new reference voltage and outputs the compensated gamma voltage, realizing dynamic adjustment of the gamma voltage during refresh rate switching and eliminating flicker.

[0035] In another embodiment, considering that the transmission of grayscale voltage data Data mainly occurs in dynamic refresh rate display, this embodiment can control its temporary register 120 to be used only when the refresh rate changes.

[0036] The display panel includes a fixed refresh rate display mode and a variable refresh rate display mode, where the fixed refresh rate display mode means that the refresh rate remains constant.

[0037] When the display panel is in fixed refresh rate display mode, the timing controller 110 directly transmits the grayscale voltage data Data to the gamma voltage generator 130. This is because no gamma voltage compensation is required for fixed refresh rate display. Generally, gamma voltage compensation is not needed during frame blank periods. Therefore, in fixed refresh rate display mode, the temporary register 120 can be controlled to not participate in operation, allowing the timing controller 110 to be directly connected to the working register 131 of the gamma voltage generator 130.

[0038] When the display panel is in variable refresh rate display mode, the timing controller 110 transmits grayscale voltage data Data to the temporary register 120. By setting an additional switch, the timing controller 110 is disconnected from the working register 131 of the gamma voltage generator 130, preventing the timing controller 110 from directly transmitting the grayscale voltage data Data to the working register 131. In this case, the timing controller 110 transmits the grayscale voltage data Data to the working register 131 through the temporary register 120.

[0039] See also Figure 2 As shown, in this embodiment, the temporary register 120 can be located outside the gamma voltage generator 130.

[0040] Specifically, the temporary register 120 is located outside the gamma voltage generator 130, and the temporary register 120 and the gamma voltage generator 130 are connected via a parallel port. The control signal includes a first control signal Control_1, which is output by the timing controller 110 to the temporary register 120. When the temporary register 120 receives the first control signal Control_1, it transmits two bytes of grayscale voltage data Data in parallel to the gamma voltage generator 130 within a preset time. The grayscale voltage data Data includes at least two bytes of data.

[0041] In this process, the timing controller 110 sends two bytes of data sequentially via the I2C bus, which are received and stored by the temporary register 120, without being directly transferred to the working register 131 of the gamma voltage generator 130. After the timing controller 110 has sent the two bytes of grayscale voltage data Data, it outputs the first control signal Control_1 to the temporary register 120. Upon receiving the first control signal Control_1, the temporary register 120, within a very short preset time, writes the complete two bytes of data stored internally into the working register 131 of the gamma voltage generator 130 in one go via the parallel bus.

[0042] For the gamma voltage generator 130, after processing by the temporary register 120, two bytes of data are transmitted in parallel to the working register 131, changing the values ​​of the two bytes simultaneously, which is almost equivalent to taking effect at the same time. Even with internal response speed limitations, the duration of intermediate error states is extremely short, much shorter than the on-time of a single scan line on the display panel. Therefore, it is imperceptible to the human eye, thus improving the flickering phenomenon.

[0043] The temporary register 120 is a digital latch 121, and the preset time is one clock cycle; after the timing controller 110 sends grayscale voltage data Data to the digital latch 121, it outputs a first control signal Control_1 to the digital latch 121.

[0044] The timing controller 110 is connected to the digital latch 121 via an I2C bus, and the digital latch 121 is connected to the working register 131 via a parallel port. That is, the digital latch generates grayscale voltage data and stores it in the working register 131 of the gamma voltage generator 130. The digital latch 121 has an internal temporary register for storing two bytes of grayscale voltage data (Data).

[0045] Figure 5 This is a schematic diagram of the driving circuit of the display panel according to the second embodiment of this application. See also: Figure 5 As shown, the other structures of this embodiment are the same as those in the first embodiment above. The difference is that the temporary register 120 in this embodiment can be disposed inside the gamma voltage generator 130.

[0046] Specifically, the temporary register 120 includes a storage register 122, which is located inside the gamma voltage generator 130; the gamma voltage generator 130 also includes a working register 131, which is used to store grayscale voltage data Data input to the gamma voltage generator 130; wherein, the timing controller 110 is connected to the storage register 122 via an I2C bus, and the storage register 122 and the working register 131 are connected in parallel.

[0047] The control signal includes a second control signal Control_2. The timing controller 110 outputs the second control signal Control_2 to the gamma voltage generator 130. When the gamma voltage generator 130 receives the second control signal Control_2, it transmits two bytes of grayscale voltage data Data in the storage register 122 to the working register 131 in parallel within a preset time.

[0048] In this embodiment, the temporary register 120 can be a storage register 122, which is located inside the gamma voltage generator 130 and connected to the working register 131 via a parallel bus. The working register 131 directly connects to and drives the grayscale voltage generation unit 134, whose output gamma voltage determines the brightness of each sub-pixel on the display panel. Generally, any modification to the working register 131 will immediately have an effect on the display panel screen. The storage register 122 is a storage unit physically isolated from the working register 131, connected to the timing controller 110 via an I2C bus interface, and is specifically used to receive new configuration data, i.e., grayscale voltage data (Data), sent by the timing controller 110. During this process, even if the value of the storage register 122 is modified, it will not affect the current screen display.

[0049] In one specific embodiment, the second control signal Control_2 can be a one-byte command. For example, a one-byte command is added after the two bytes of grayscale voltage data Data, and the first two bytes of grayscale voltage data Data are transferred to the working register 131 only after the storage register 122 receives the last byte of command.

[0050] When the timing controller 110 transmits the grayscale voltage signal of three bytes of data and the second control signal Control_2 to the storage register 122 via the I2C bus, the data in the working register 131 remains unchanged during this process. Even if the writing speed of the timing controller 110 is very slow, and the I2C bus is interrupted, the screen of its display panel will not experience flickering caused by intermediate state error voltages generated during the writing process. After the storage register 122 receives the second control signal Control_2, the control logic of the gamma voltage generator 130 generates a clock pulse. On the rising edge of this pulse, the contents of all storage registers 122 are simultaneously and in parallel transmitted to the corresponding working registers 131. Thus, in a very short time, the entire gamma voltage curve (which may involve dozens of working registers 131) completes a transition without intermediate states. The screen instantly switches from the gamma characteristics of the previous frame to the gamma characteristics of the next frame. All relevant parameters are updated at the same instant, ensuring consistency between nodes of the gamma curve and avoiding color or brightness distortion caused by asynchronous updates. This fundamentally eliminates the intermediate state caused by writing to the working register 131 in stages, thus solving the root cause of the flickering problem.

[0051] It is understandable that the number of storage registers 122 can be equal to the number of working registers 131. In the display panel driving circuit 100, the number of its working registers 131 is generally related to the data lines or the resolution of the display panel.

[0052] Figure 6 This is a schematic diagram illustrating the driving method of the display panel driving circuit of this application. See also... Figure 6 As shown, this application also discloses a driving method for a driving circuit of a display panel. The driving circuit can be the driving circuit 100 in any of the above embodiments, and the driving method includes: S110: When the display panel is in variable refresh rate display mode, the timing controller transmits grayscale voltage data to the register; S120: When the display panel enters a blank period, the gamma voltage generator receives grayscale voltage data stored in the register output from the timing controller. The frame time of the display panel includes a display period and a blank period. The temporary register 120 can be a digital latch 121 or a storage register 122.

[0053] In this embodiment, by driving the temporary register 120 to work in the variable refresh rate display mode, the temporary register 120 is used as a buffer circuit to prevent intermediate erroneous data from taking effect directly in the working register 131, which would cause screen flickering.

[0054] In one embodiment, data containing a carry or a borrow in two bytes is preferentially transferred to the working register 131.

[0055] Specifically, data that involves carry or carry in grayscale voltage data (Data) refers to data that involves carry or carry between two bytes.

[0056] For example, at a fixed refresh rate, the grayscale voltage data Data corresponding to the base grayscale 255 is 0000 0000 11111111. However, at a variable refresh rate, different compensation values ​​are applied to the frame blank periods corresponding to different refresh rates. When the compensation value is added, the grayscale voltage data Data will have carry or carry-over data. For example, if 255 is carried over, the corresponding grayscale voltage data Data is 0000 0001 0000 0000. If a byte transmission error occurs at this time, only the first byte 0000 0001 is directly transmitted to the working register 131 by the timing controller 110. The working register 131 will only output the error voltage based on the first byte, that is, the grayscale voltage data Data will be output as 0000 0001 1111 1111, which is significantly different from the original data 0000 0000 1111 1111, thus causing screen flickering. The main reason for this is that the carry or borrow relationship between the two bytes causes the high byte to increase or decrease. Once the transmission is interrupted, the difference in the value of the high byte will cause display abnormalities. When the frame blank period is short, even less than the minimum transmission time of the grayscale voltage data Data, if the transmission time of the second byte overlaps with the display period, there is a high probability that the second byte has not yet been transmitted to the working register 131, but the working register 131 has already output the gamma voltage based on the data of the previous byte. This can easily cause display problems. Of course, in addition to the above situations, there are also a few occasional cases that cause the grayscale voltage data Data to not be completely transmitted. The temporary register 120 in this embodiment can also solve the corresponding situation, which will not be described in detail here.

[0057] Among them, the grayscale voltage data Data has the highest priority if there is a carry or a backspace between two bytes of data.

[0058] Step S110 includes: S111: Prioritize multiple grayscale voltage data, where data in grayscale voltage data with a carry or a backspace between two bytes has the highest priority. S112: When the duration of the blank period is less than the threshold, the data of the first priority is first transferred to the temporary storage.

[0059] In this embodiment, when grayscale voltage data Data is transmitted during the display period, if the grayscale voltage data Data is directly transmitted to the working register 131, it will take effect immediately. If the first byte of data transmitted differs from the actual gamma voltage to be displayed by more than 3 grayscale values, its flickering phenomenon is easily noticeable to the human eye, thus causing flickering.

[0060] Generally, the display time period and frame blank time period at different refresh rates can be calculated based on the total horizontal pixels (H_Total), the total vertical lines (V_Total), the effective horizontal pixels (H_Active), the effective vertical lines (V_Active), and the current frame rate.

[0061] For example, with a QHD 100Hz refresh rate, where H_Total=2640, V_Total=1600, H_Active=2560, and V_Active=1440, and each frame lasts 1 / 100 = 10ms, and the number of V-Blanks is 1600 - 1440 = 160, then the Vblank time is 10 * 160 / 1600 = 1ms. That is, at 100Hz, the transmitted data needs to be completed within 1ms after 9ms from the start of each frame.

[0062] If the current transmission frame rate is ( Reaching 105Hz, with Freesync enabled, H_Total will not change, and V_Total at 105Hz can be calculated. According to... V_Total2 = 1524 can be calculated.

[0063] Each frame duration = 1 / 105 = 9.5ms, and the number of V-Blanks = 1524 - 1440 = 84; therefore, the V-blank time is 9.5 * 84 / 1524 = 0.52ms. This means that at 105Hz, the transmitted data needs to be completed within 0.5ms after approximately 9ms from the start of each frame. It can be seen that as the frame rate increases, the V-blank time is compressed due to the reduced frame duration, thus significantly reducing the data transmission time.

[0064] The duration of the frame blanking period for each frame can be confirmed in the timing controller 110. Gamma voltage updates are performed immediately after the start of each frame blanking period, ensuring that the update operation time is less than the shortest frame blanking period. If the update operation takes longer than the current frame blanking period, the timing controller 110 needs to calculate data that might cause anomalies, such as data with carry or borrow between two bytes. This portion of data is transmitted first, and then the data with the smallest gamma voltage change is updated during the display period. Because the data change is very small, even if the update is performed during the display period, the human eye will not perceive flickering.

[0065] Figure 7 This is a schematic diagram of the display device of this application, see [link / reference]. Figure 7As shown, this application also discloses a display device 200, which includes a display panel 210 and a driving circuit 100 for the display panel in any of the above embodiments. The driving circuit 100 is used to drive the display panel 210 to operate. The driving circuit 100 generally also includes a data driver and a scan driver. The data driver is used to provide grayscale voltage to the display panel through a gamma voltage generation unit, and the scan driver provides scan signals to each scan line of the display panel.

[0066] It should be noted that the inventive concept of this application can form many embodiments, but due to the limited space of the application documents, they cannot all be listed. Therefore, without conflict, the embodiments described above or the technical features can be arbitrarily combined to form new embodiments. After the embodiments or technical features are combined, the original technical effect will be enhanced.

[0067] The above description, in conjunction with specific optional embodiments, provides a further detailed explanation of this application and should not be construed as limiting the specific implementation of this application to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of this application, and all such modifications or substitutions should be considered within the scope of protection of this application.

Claims

1. A driving circuit for a display panel, characterized in that, include: A timing controller is used to output grayscale voltage data and control signals; A temporary register, connected to the timing controller via an I2C bus, is used to store grayscale voltage data output by the timing controller. as well as A gamma voltage generator, connected to the temporary register, is used to receive grayscale voltage data stored in the temporary register from the timing controller and output gamma voltage under the action of the control signal.

2. The driving circuit for the display panel according to claim 1, characterized in that, The temporary register is located outside the gamma voltage generator, and the temporary register is connected to the gamma voltage generator via a parallel port. The grayscale voltage data includes at least two bytes of data, the control signal includes a first control signal, and the timing controller outputs the first control signal to the register; When the register receives the first control signal, it transmits two bytes of grayscale voltage data in parallel to the gamma voltage generator within a preset time.

3. The driving circuit for the display panel according to claim 2, characterized in that, The temporary register is a digital latch, and the preset time is one clock cycle; After sending grayscale voltage data to the digital latch, the timing controller outputs a first control signal to the digital latch.

4. The driving circuit for the display panel according to claim 1, characterized in that, The temporary register includes a storage register, which is located inside the gamma voltage generator; The gamma voltage generator is also equipped with a working register, which is used to store grayscale voltage data input to the gamma voltage generator. The timing controller is connected to the storage register via an I2C bus, and the storage register and the working register are connected in parallel. The grayscale voltage data includes at least two bytes of data, the control signal includes a second control signal, and the timing controller outputs the second control signal to the gamma voltage generator; When the gamma voltage generator receives the second control signal, it transmits two bytes of grayscale voltage data in the storage register to the working register in parallel within a preset time.

5. The driving circuit for the display panel according to claim 4, characterized in that, The gamma voltage generator also includes: A reference voltage generation unit is used to divide the power supply terminal voltage applied from an external power supply unit by at least 10 series resistors; A switching unit, which cooperates with the reference voltage generating unit, and has multiple switching elements; A grayscale voltage generation unit, having at least 64 series resistors, is used to re-divide the voltage output from the switching unit based on grayscale voltage data from the working register unit to output a gamma voltage.

6. The driving circuit for the display panel according to claim 1, characterized in that, One frame of the display panel includes a display period and a blank period, wherein the length of the blank period varies at different refresh rates; The timing controller outputs the control signal during the blank period. During the blank period, the grayscale voltage data is transmitted in parallel from the temporary register to the working register of the gamma voltage generator.

7. The driving circuit for the display panel according to claim 1, characterized in that, The display panel includes a fixed refresh rate display mode and a variable refresh rate display mode; When the display panel is in a fixed refresh rate display mode, the timing controller directly transmits the grayscale voltage data to the gamma voltage generator; When the display panel is in variable refresh rate display mode, the timing controller transmits grayscale voltage data to the register.

8. A driving method for a driving circuit of a display panel, characterized in that, The driving circuit of the display panel as described in any one of claims 1 to 7, wherein the driving method comprises: When the display panel is in variable refresh rate display mode, the timing controller transmits grayscale voltage data to the register; When the display panel enters a blank period, the gamma voltage generator receives grayscale voltage data stored in the register output from the timing controller; The frame time of the display panel includes a display period and a blank period.

9. The driving method for the driving circuit of the display panel according to claim 8, characterized in that, When the display panel is in variable refresh rate display mode, the step of the timing controller transmitting grayscale voltage data to the register includes: Arrange the priority of multiple grayscale voltage data, where the data in the grayscale voltage data that has a carry or a back in two bytes has the first priority; When the duration of the detected blank period is less than the threshold, the data of the first priority is first transferred to the temporary storage.

10. A display device, characterized in that, It includes a display panel and a driving circuit for the display panel as described in any one of claims 1 to 7, the driving circuit being used to drive the display panel to operate.

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