Interface protection circuit suitable for e-sports display system

Abstract

This application relates to an interface protection circuit suitable for e-sports display systems. The interface protection circuit for e-sports display systems includes: a port and a discharge module. The discharge module includes several suppression units, each of which is electrically connected to the port. Each suppression unit includes a first pin and a TVS diode. The first pin is electrically connected to the port, and the TVS diode is electrically connected to the first pin. The solution provided by this application can suppress the damage of electric arcs to the circuit, thereby protecting the circuit.

Description

Technical Field

[0001] This invention relates to the field of circuit design technology, and in particular to an interface protection circuit suitable for e-sports display systems. Background Technology

[0002] In related technologies, when a device is powered on, the moment the HDMI interface connects to / disconnects from the device port, a potential difference is created in the gap between the pins of the hot-swappable interface, leading to air breakdown and an electric arc. The damage from the arc can cause partial melting or denting of the HDMI interface pins, and the instantaneous energy of the arc can break down the main control chip, causing the differential signal recognition function to fail. Summary of the Invention

[0003] The purpose of this invention is to overcome the shortcomings of the prior art and provide an interface protection circuit suitable for e-sports display systems, which can suppress the damage of electric arc to the circuit and thus protect the circuit.

[0004] The objective of this invention is achieved through the following technical solution: The first aspect of this application provides an interface protection circuit suitable for e-sports display systems, comprising: a port; a discharge module including a plurality of suppression units, each of the suppression units being electrically connected to the port, the suppression unit including a first pin and a TVS diode, the first pin being electrically connected to the port, and the TVS diode being electrically connected to the first pin.

[0005] It also includes a coupling module, which includes capacitors CT1, CT2, CT3, and CT4. The suppression unit also includes a second pin, a third pin, a fourth pin, and a fifth pin. The first end of capacitor CT1 is electrically connected to the second pin, the first end of capacitor CT2 is electrically connected to the third pin, the first end of capacitor CT3 is electrically connected to the fourth pin, and the first end of capacitor CT4 is electrically connected to the fifth pin.

[0006] It also includes an HDMI chip, which is electrically connected to the second terminal of capacitor CT1, the second terminal of capacitor CT2, the second terminal of capacitor CT3 and the second terminal of capacitor CT4, respectively.

[0007] The number of the first pin is 4.

[0008] The number of TVS diodes is 8.

[0009] The port is an HDMI port.

[0010] Compared with the prior art, the present invention has at least the following advantages: When an electric arc occurs at the port, the high voltage generated by the arc instantly breaks down the rated value. The built-in TVS diode quickly switches to a low-resistance state at a speed of microseconds to conduct, releasing the energy of the arc to ground in the form of current. At the same time, it clamps the voltage of the differential signal, effectively limiting the peak value of the transient voltage and protecting the equipment from overvoltage burnout caused by the arc entering the circuit. Attached Figure Description

[0011] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly described below.

[0012] Figure 1 This is a circuit diagram of an interface protection circuit suitable for an e-sports display system according to an embodiment of the present invention; Figure 2 This is a circuit diagram of the suppression unit in one embodiment of the present invention. Detailed Implementation

[0013] Embodiments of this application will now be described in more detail with reference to the accompanying drawings. While embodiments of this application are shown in the drawings, it should be understood that this application may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided to make this application more thorough and complete, and to fully convey the scope of this application to those skilled in the art.

[0014] It should be understood that although the terms "first," "second," "third," etc., may be used in this application to describe various information, this information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, without departing from the scope of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0015] Unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0016] When the device is powered on, the moment the HDMI interface connects to / disconnects from the device port, a potential difference is created in the gap between the pins of the hot-swappable interface, which can lead to air breakdown and generate an electric arc. The damage from the arc can cause partial melting or denting of the HDMI interface pins. At the same time, the instantaneous energy of the arc can break down the main control chip, causing the differential signal recognition function to fail.

[0017] To address the aforementioned issues, this application provides an interface protection circuit suitable for e-sports display systems, which can suppress the damage of electric arcs to the circuit, thereby protecting the circuit.

[0018] The technical solutions of the embodiments of this application are described in detail below with reference to the accompanying drawings.

[0019] See Figure 1 and Figure 2 An interface protection circuit suitable for e-sports display systems includes: a port and a discharge module. The discharge module includes several suppression units, each of which is electrically connected to the port. Each suppression unit includes a first pin and a TVS diode. The first pin is electrically connected to the port, and the TVS diode is electrically connected to the first pin.

[0020] It should be noted that there are two suppression units, U20 and U21, with four pins on the first side and eight TVS diodes, with two TVS switches on each channel. The port is an HDMI port. Further, pins 1, 3, 4, 6, 7, 9, 10, and 12 of the port transmit TMDS differential signals for audio data. Since there is a voltage difference between the differential signals, shielded ground lines 2, 5, 8, and 11 are provided between each group of differential signals. This provides a tightly coupled ground return path for signal transmission, reduces the return loop area, improves signal transmission integrity, reduces radiated emissions, and enhances anti-interference capabilities, thereby further suppressing electromagnetic interference. In complex power supply environments, the power phases between electronic devices differ. When the HDMI interface is plugged in or unplugged from the cable harness, a potential voltage difference is created, causing an arc phenomenon due to the breakdown of the air gap. The TMDS differential signals input from the input unit are connected to pins 1, 2, 4, and 5 of the suppression units U20 and U21, respectively, and the arc is discharged through a four-channel ultra-low capacitance TVS protection diode array. During normal operation, the built-in TVS diode presents a high-impedance state, limiting the differential signal. When an arc occurs at the HDMI interface, the high voltage generated by the arc instantly breaks down to the rated value. The built-in TVS diode rapidly switches to a low-impedance state within microseconds, turning on and releasing the arc energy to ground in the form of current. At the same time, it clamps the voltage of the differential signal, effectively limiting the transient voltage peak and protecting the device from overvoltage burnout caused by the arc entering the circuit.

[0021] See Figure 1In one embodiment, the system further includes a coupling module, which includes capacitors CT1, CT2, CT3, and CT4. The suppression unit also includes a second pin, a third pin, a fourth pin, and a fifth pin. The first end of capacitor CT1 is electrically connected to the second pin, the first end of capacitor CT2 is electrically connected to the third pin, the first end of capacitor CT3 is electrically connected to the fourth pin, and the first end of capacitor CT4 is electrically connected to the fifth pin.

[0022] It should be noted that there are two coupling modules. The remaining pin numbers are capacitors CT5, CT6, CT7, and CT8, which are electrically connected to the corresponding pins. The second pin is NC1, the third pin is NC2, the fourth pin is NC3, and the fifth pin is NC4. Further, after the suppression units U20 and U21 release the arc to ground, the output is sent to the coupling module via pins 6, 7, 9, and 10. The function of the coupling module is to block the arc and isolate the DC bias, preventing the arc from being input into the main control unit and guiding the suppression unit to prevent the main control chip from being damaged by the instantaneous energy of the arc. Simultaneously, the coupling module can suppress the DC potential difference between the transmitting and receiving ends of the HDMI interface, ensuring that the differential signal is transmitted only in AC form. Based on the capacitor's characteristic of blocking DC and passing AC, the DC component in the differential signal is blocked from entering the main control chip, allowing only the AC video / audio data to pass through. The coupling unit itself forms a high-pass filter for the overall circuit. According to the capacitive reactance formula Xc=1 / 2Πfc, it presents high impedance to low-frequency signals, effectively preventing low-frequency noise from mixing into the TMDS differential signal. This ensures that only high-frequency valid data signals pass through, avoiding low-frequency noise from occupying bandwidth or causing baseline drift.

[0023] See Figure 1 In one embodiment, the device also includes an HDMI chip, which is electrically connected to the second terminals of capacitors CT1, CT2, CT3, and CT4, respectively.

[0024] It should be noted that the TMDS differential signal output by the coupling module is transmitted to the pins of the HDMI chip, converting the TMDS signal into parallel data, which is then transmitted to the SOC core module in the TCON board.

[0025] The solution of this application has been described in detail above with reference to the accompanying drawings. In the above embodiments, the descriptions of each embodiment have different focuses; for parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments. Those skilled in the art should also understand that the actions and modules involved in the specification are not necessarily essential to this application. Furthermore, it is understood that the steps in the method of this application embodiment can be adjusted, combined, and deleted according to actual needs, and the modules in the device of this application embodiment can be combined, divided, and deleted according to actual needs.

[0026] The various embodiments of this application have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical application, or improvement of the technology in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. An interface protection circuit suitable for e-sports display systems, characterized in that, include: port; The discharge module includes several suppression units, each of which is electrically connected to the port. Each suppression unit includes a first pin and a TVS diode. The first pin is electrically connected to the port, and the TVS diode is electrically connected to the first pin.

2. The interface protection circuit for e-sports display systems according to claim 1, characterized in that, It also includes a coupling module, which includes capacitors CT1, CT2, CT3, and CT4. The suppression unit also includes a second pin, a third pin, a fourth pin, and a fifth pin. The first end of capacitor CT1 is electrically connected to the second pin, the first end of capacitor CT2 is electrically connected to the third pin, the first end of capacitor CT3 is electrically connected to the fourth pin, and the first end of capacitor CT4 is electrically connected to the fifth pin.

3. The interface protection circuit for e-sports display systems according to claim 2, characterized in that, It also includes an HDMI chip, which is electrically connected to the second terminal of capacitor CT1, the second terminal of capacitor CT2, the second terminal of capacitor CT3 and the second terminal of capacitor CT4, respectively.

4. The interface protection circuit for e-sports display systems according to claim 1, characterized in that, The number of the first pin is 4.

5. The interface protection circuit for e-sports display systems according to claim 1, characterized in that, The number of TVS diodes is 8.

6. The interface protection circuit for e-sports display systems according to claim 1, characterized in that, The port is an HDMI port.

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