A negative level auxiliary circuit and power supply

Abstract

This invention discloses a negative-level auxiliary circuit and power supply, relating to the field of power supply technology. The negative-level auxiliary circuit includes: a charging switch, a charging auxiliary module, a first resistor, a first capacitor, a discharging switch, a discharging auxiliary module, and a second capacitor. When the square wave signal is a high-level signal, the charging switch is turned on, and the discharging switch is turned off. The charging switch, in conjunction with the charging auxiliary module, charges and stores energy in the first capacitor. When the square wave signal is a low-level signal, the discharging switch is turned on, and the charging switch is turned off. The discharging switch, in conjunction with the discharging auxiliary module, discharges the first capacitor. The discharging auxiliary module outputs a negative power supply through the negative terminal of the second capacitor. Compared with traditional circuits, this application has the advantages of low cost and simplified design, and can be flexibly combined with existing power supply circuits.

Description

Technical Field

[0001] This invention relates to the field of power supply technology, and in particular to a negative level auxiliary circuit and power supply. Background Technology

[0002] Uninterruptible power supplies (UPS), inverters, solar chargers, and other power-type electrical equipment are becoming increasingly common. These products require auxiliary power supplies to provide power to the main control chip, sampling circuits, and drive circuits. Most designs choose flyback isolated power supplies paired with multiple DC-DC circuits to transform the battery voltage to output +12V, +5V, +3.3V, etc., for power supply. Alternatively, some non-isolated products directly transform the battery voltage through multiple DC-DC circuits to output the aforementioned auxiliary voltages. Since some sampling circuits and drive circuits require ±12V for power supply, in isolated power supply systems, if chips on both the primary and secondary sides require ±12V, two sets of ±12V are needed. The aforementioned auxiliary power supply typically needs to add a -12V output, but existing solutions for outputting negative voltages (such as -12V) have disadvantages such as design complexity and high cost. 1. Isolated flyback auxiliary power supply: For systems that use isolated flyback output as the auxiliary power supply, each additional -12V output voltage requires an additional set of windings in the flyback isolation transformer, as well as the simultaneous addition of linear regulator chips, diodes, capacitors, dummy loads, etc., resulting in a significant increase in cost. 2. Non-isolated DC-DC auxiliary power supply: When using a non-isolated DC-DC converter as an auxiliary power supply, it is necessary to add the negative voltage required by the output of the Buck-Boost type DC-DC circuit. This requires the addition of a DC-DC control chip, energy storage inductor, diode, capacitor, etc., which also increases the cost significantly and makes the design more complex. Summary of the Invention

[0003] The purpose of this invention is to provide a negative level auxiliary circuit and power supply, which has the advantages of low cost and simple design, and can be flexibly used in conjunction with existing power supply circuits.

[0004] To solve the above-mentioned technical problems, the present invention adopts the following technical solution: One aspect of this invention provides a negative-level auxiliary circuit, comprising: a charging switch, a charging auxiliary module, a first resistor, and a first capacitor. The charging switch is turned on when it receives a high-level signal. One end of the charging switch is connected to a positive power supply through the first resistor, and the other end of the charging switch is connected to the positive terminal of the first capacitor. The negative terminal of the first capacitor is connected to a first terminal of the charging auxiliary module, and the second terminal of the charging auxiliary module is connected to a first ground point. A discharge switch, a discharge auxiliary module, and a second capacitor are also included. The discharge switch is turned on when it receives a low-level signal. One end of the discharge switch is connected to the other end of the charging switch and the positive terminal of the first capacitor, and the other end of the discharge switch is connected to a first ground point. The second terminal of the discharge auxiliary module is connected to the negative terminal of the first capacitor and the first terminal of the charging auxiliary module. The first terminal of the discharge auxiliary module outputs a negative power supply through the negative terminal of the second capacitor, and the positive terminal of the second capacitor is connected to a first ground point. Finally, a second resistor is provided, with the control terminals of the charging switch and the discharge switch connected to one end of the second resistor. The other end of the second resistor is used to receive a square wave signal.

[0005] In some embodiments, the charging switch uses a first NPN transistor, the discharging switch uses a PNP transistor, the collector of the first NPN transistor is connected to the positive power supply through the first resistor, the emitter of the first NPN transistor is connected to the positive terminal of the first capacitor and the emitter of the PNP transistor, the collector of the PNP transistor is connected to a first ground point, and the bases of the first NPN transistor and the PNP transistor are connected to one end of the second resistor.

[0006] In some embodiments, the negative level auxiliary circuit further includes a second NPN transistor, a third resistor, and a fourth resistor. The base of the second NPN transistor receives a square wave signal through the third resistor. The collector of the second NPN transistor is connected to the other end of the second resistor and one end of the fourth resistor. The other end of the fourth resistor is connected to a positive power supply. The emitter of the second transistor is connected to a first ground point.

[0007] In some embodiments, the charging auxiliary module includes a first NMOS transistor, a fifth resistor, and a sixth resistor, and the discharging auxiliary module includes a second NMOS transistor, a seventh resistor, and an eighth resistor. The source of the first NMOS transistor is connected to the negative terminal of the first capacitor, one end of the fifth resistor, and the drain of the second NMOS transistor. The other end of the fifth resistor is connected to the gate of the first NMOS transistor and one end of the sixth resistor. The drain of the first NMOS transistor is connected to a first ground. The gate of the second NMOS transistor is connected to one end of the seventh resistor and one end of the eighth resistor. The other end of the eighth resistor is connected to the negative terminal of the second capacitor and the source of the second NMOS transistor. The source of the second NMOS transistor outputs a negative power supply. The other end of the sixth resistor is used to receive a level signal opposite to the square wave signal, and the other end of the seventh resistor is used to receive a level signal the same as the square wave signal.

[0008] In some embodiments, the negative level auxiliary circuit further includes a third optocoupler and a ninth resistor. The light-emitting input terminal of the third optocoupler is connected to one end of the fourth resistor, and the other end of the fourth resistor is connected to a second power supply. The light-emitting output terminal of the third optocoupler is connected to the collector of the second NPN transistor, and the emitter of the second NPN transistor is connected to a second ground. The light-receiving input terminal of the third optocoupler is connected to the other end of the second resistor and one end of the ninth resistor, and the other end of the ninth resistor is connected to a positive power supply. The light-receiving output terminal of the third optocoupler is connected to a first ground.

[0009] In some embodiments, the negative level auxiliary circuit further includes a first optocoupler and a second optocoupler. The light-emitting input terminal of the first optocoupler is connected to one end of the second resistor, the light-emitting output terminal of the first optocoupler is connected to the base of the first NPN transistor, the light-receiving output terminal of the first optocoupler is connected to the other end of the sixth resistor, the light-emitting input terminal of the second optocoupler is connected to the base of the PNP transistor, the light-emitting output terminal of the second optocoupler is connected to one end of the second resistor, and the light-receiving output terminal of the second optocoupler is connected to the other end of the seventh resistor.

[0010] In some embodiments, the negative level auxiliary circuit further includes a first optocoupler and a second optocoupler. The light-emitting input terminal of the second optocoupler is connected to the light-emitting output terminal of the third optocoupler. The light-emitting output terminal of the second optocoupler is connected to the collector of the second NPN transistor. The light-receiving output terminal of the second optocoupler is connected to the other end of the seventh resistor. The light-emitting input terminal of the first optocoupler is connected to the positive power supply through the first resistor. The light-emitting output terminal of the first optocoupler is connected to the collector of the first NPN transistor. The light-receiving output terminal of the first optocoupler is connected to the other end of the sixth resistor.

[0011] In some embodiments, the charging auxiliary module includes a first diode, and the discharging auxiliary module includes a second diode. The anode of the first diode is connected to the cathode of the first capacitor and the cathode of the second diode. The cathode of the first diode is connected to a first ground point, and the anode of the second diode outputs a negative power supply through the output terminal of the negative terminal of the second capacitor.

[0012] In some embodiments, the negative level auxiliary circuit further includes a square wave circuit, which includes a comparator, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, and a third capacitor. The inverting input terminal of the comparator is connected to one end of the third capacitor and one end of the twelfth resistor. The other end of the third capacitor is connected to a second ground. The other end of the twelfth resistor is connected to the output terminal of the comparator, one end of the fourteenth resistor, one end of the fifteenth resistor, and one end of the thirteenth resistor. The other end of the fourteenth resistor is connected to a second power supply. The other end of the thirteenth resistor is connected to the non-inverting input terminal of the comparator, one end of the tenth resistor, and one end of the eleventh resistor. The other end of the tenth resistor is connected to a second ground. The other end of the eleventh resistor is connected to a second power supply. The other end of the fifteenth resistor outputs a square wave signal.

[0013] One aspect of this invention provides an auxiliary power supply, including the negative-level auxiliary circuit described above.

[0014] According to an embodiment of the present invention, a negative-level auxiliary circuit and power supply have at least the following advantages: Compared with traditional circuits, the present application has the advantages of low cost and simplified design. In the present application, when the charging auxiliary module uses a first NMOS transistor, a fifth resistor, and a sixth resistor, and the discharging auxiliary module uses a second NMOS transistor, a seventh resistor, and an eighth resistor, the circuit has low power loss, low voltage loss, and good performance; when the charging auxiliary module uses a first diode and the discharging auxiliary module uses a second diode, the cost is even lower. The circuit of the present application uses industry-standard components, which are convenient to procure, low in cost, and can be flexibly combined with existing power supply circuits.

[0015] It should be understood that the above general description and the following detailed description are merely exemplary and do not limit this disclosure. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 A simplified schematic diagram of the negative level auxiliary circuit; Figure 2 This is a schematic diagram of the negative level auxiliary circuit in the second embodiment; Figure 3 This is a schematic diagram of the negative level auxiliary circuit according to a preferred embodiment of this application; Figure 4 This is a schematic diagram of the negative level auxiliary circuit in the fourth embodiment; Figure 5 This is a schematic diagram of the negative level auxiliary circuit in the fifth embodiment. Detailed Implementation

[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] The terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first," "second," or "third" may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0020] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "connection," "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0021] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided so that the description of this disclosure will be more complete and fully convey the concept of the exemplary embodiments to those skilled in the art. The drawings are merely illustrative of this disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted.

[0022] The technical solutions of the embodiments of this application are briefly described below: According to some embodiments, such as Figure 1 As shown, this application provides a negative level auxiliary circuit, the negative level auxiliary circuit comprising: The system includes a charging switch, a charging auxiliary module, a first resistor R1, and a first capacitor C1. The control terminal of the charging switch is turned on when it receives a high-level signal. One end of the charging switch is connected to the positive power supply +12VB through the first resistor R1, and the other end of the charging switch is connected to the positive terminal of the first capacitor C1. The negative terminal of the first capacitor C1 is connected to the first terminal of the charging auxiliary module, and the second terminal of the charging auxiliary module is connected to the first ground point BAT-. The system includes a discharge switch, a discharge auxiliary module, and a second capacitor C2. The control terminal of the discharge switch is turned on when it receives a low-level signal. One end of the discharge switch is connected to the other end of the charging switch and the positive terminal of the first capacitor C1. The other end of the discharge switch is connected to the first location BAT-. The second end of the discharge auxiliary module is connected to the negative terminal of the first capacitor C1 and the first end of the charging auxiliary module. The first end of the discharge auxiliary module outputs a negative power supply -12VB through the negative terminal of the second capacitor C2. The positive terminal of the second capacitor C2 is connected to the first location BAT-. The second resistor R2 is connected to one end of the control terminals of the charging switch and the discharging switch, while the other end of the second resistor R2 is used to receive square wave signals.

[0023] The working principle of the above embodiment is as follows: when the square wave signal is a high-level signal, the charging switch is turned on and the discharging switch is turned off. The charging switch, together with the charging auxiliary module, charges and stores energy in the first capacitor C1.

[0024] When the square wave signal is a low-level signal, the discharge switch is turned on and the charging switch is turned off. The discharge switch, together with the discharge auxiliary module, discharges the first capacitor C1. The discharge auxiliary module outputs a negative power supply of -12VB through the negative terminal of the second capacitor C2.

[0025] Compared to traditional circuits, this application has the advantages of low cost and simplified design, and can be flexibly used in conjunction with existing power supply circuits.

[0026] The following is in conjunction with the appendix to this instruction manual. Figures 1 to 5 The preferred embodiments of this disclosure will be further described in detail below.

[0027] According to some embodiments, such as Figure 1 As shown, the charging switch uses an NPN transistor QN1, and the discharging switch uses a PNP transistor QP. Their specific connection method is as follows. The collector of the first NPN transistor QN1 is connected to the positive power supply through the first resistor R1. The emitter of the first NPN transistor is connected to the positive terminal of the first capacitor C1 and the emitter of the PNP transistor QP. The collector of the PNP transistor is connected to the first ground point BAT-. The bases of the first NPN transistor QN1 and the PNP transistor are connected to one end of the second resistor R2.

[0028] The working principle of the above embodiment is as follows: when the square wave signal is a high-level signal, the first NPN transistor QN1 is turned on and the PNP transistor QP is turned off. The first NPN transistor QN1, together with the charging auxiliary module, charges and stores energy for the first capacitor C1.

[0029] When the square wave signal is a low-level signal, the PNP transistor QP is turned on, and the first NPN transistor QN1 is turned off. The PNP transistor QP, together with the discharge auxiliary module, discharges the first capacitor C1. The discharge auxiliary module outputs a negative power supply of -12VB through the negative terminal of the second capacitor C2.

[0030] The charging switch and discharging switch can also be devices with switching functions such as MOSFETs, and this application does not limit them.

[0031] According to some embodiments, such as Figure 2 As shown, the negative level auxiliary circuit also includes a second NPN transistor QN2, a third resistor R3, and a fourth resistor R4, and their specific connection method is as follows. The base of the second NPN transistor QN2 receives a square wave signal through the third resistor R3. The collector of the second NPN transistor QN2 is connected to the other end of the second resistor R2 and one end of the fourth resistor R4. The other end of the fourth resistor R4 is connected to the positive power supply +12VB. The emitter of the second transistor QN2 is connected to the first ground point BAT-.

[0032] Furthermore, such as Figure 2 As shown, the charging auxiliary module includes a first NMOS transistor Q11, a fifth resistor R5, and a sixth resistor R6, while the discharging auxiliary module includes a second NMOS transistor Q12, a seventh resistor R7, and an eighth resistor R8. Their specific connection methods are as follows: The source of the first NMOS transistor Q11 is connected to the negative terminal of the first capacitor C1, one end of the fifth resistor R5, and the drain of the second NMOS transistor. The other end of the fifth resistor R5 is connected to the gate of the first NMOS transistor Q11 and one end of the sixth resistor R6. The drain of the first NMOS transistor Q11 is connected to the first ground point BAT-. The gate of the second NMOS transistor Q12 is connected to one end of the seventh resistor R7 and one end of the eighth resistor R8. The other end of the eighth resistor R8 is connected to the negative terminal of the second capacitor C2 and the source of the second NMOS transistor Q12. The source of the second NMOS transistor Q12 outputs a negative power supply -12VB. The other end of the sixth resistor R6 is used to receive a level signal opposite to the square wave signal, and the other end of the seventh resistor R7 is used to receive a level signal the same as the square wave signal.

[0033] The working principle of the above embodiment is as follows: when the square wave signal is a low-level signal, the second NPN transistor QN2 is cut off, the first NPN transistor QN1 is turned on, and the PNP transistor QP is cut off. Simultaneously, the gate of the first NMOS transistor Q11 receives a high-level signal opposite to the square wave signal through the sixth resistor R6, turning on the first NMOS transistor Q11. The gate of the second NMOS transistor Q12 receives a low-level signal identical to the square wave signal through the seventh resistor R7, turning off the second NMOS transistor Q12. The first NPN transistor QN1, in conjunction with the first NMOS transistor Q11, charges and stores energy in the first capacitor.

[0034] When the square wave signal is high, the second NPN transistor QN2 is turned on, the first NPN transistor QN1 is turned off, and the PNP transistor QP is turned on. Simultaneously, the gate of the first NMOS transistor Q11 receives a low-level signal opposite to the square wave signal through the sixth resistor R6, causing Q11 to turn off. The gate of the second NMOS transistor Q12 receives a high-level signal identical to the square wave signal through the seventh resistor R7, causing Q12 to turn on. The PNP transistor QP, in conjunction with the second NMOS transistor Q12, discharges the first capacitor. The source of the second NMOS transistor Q12 outputs a negative power supply of -12VB through the negative terminal of the second capacitor C2.

[0035] The second capacitor C2 is used for filtering and energy storage.

[0036] According to some embodiments, such as Figure 3 As shown, the negative level auxiliary circuit also includes a third optocoupler U3 and a ninth resistor R9, and their specific connection method is as follows. The light-emitting input terminal of the third optocoupler U3 is connected to one end of the fourth resistor R4, and the other end of the fourth resistor R4 is connected to the second power supply +12V. The light-emitting output terminal of the third optocoupler U3 is connected to the collector of the second NPN transistor QN2, and the emitter of the second NPN transistor QN2 is connected to the second ground GND. The light-receiving input terminal of the third optocoupler U3 is connected to the other end of the second resistor R2 and one end of the ninth resistor R9, and the other end of the ninth resistor R9 is connected to the positive power supply +12V. The light-receiving output terminal of the third optocoupler U3 is connected to the first ground BAT-.

[0037] According to some embodiments, such as Figure 3 As shown, the negative level auxiliary circuit also includes a first optocoupler U1 and a second optocoupler U2. In some embodiments, their specific connection methods are as follows: The light-emitting input terminal of the first optocoupler U1 is connected to one end of the second resistor R2, the light-emitting output terminal of the first optocoupler U1 is connected to the base of the first NPN transistor QN1, the light-receiving output terminal of the first optocoupler U1 is connected to the other end of the sixth resistor R6, the light-emitting input terminal of the second optocoupler U2 is connected to the base of the PNP transistor QP, the light-emitting output terminal of the second optocoupler U2 is connected to one end of the second resistor R2, and the light-receiving output terminal of the second optocoupler U2 is connected to the other end of the seventh resistor R7.

[0038] The working principle of the above embodiment is as follows: when the square wave signal is a low-level signal, the second NPN transistor QN2 is cut off, the third optocoupler U3 is cut off, and the first optocoupler U1 is turned on, outputting a high-level signal at its light-receiving side output terminal. The first NPN transistor QN1 is turned on, the second optocoupler U2 is cut off, and the PNP transistor QP is cut off. Simultaneously, the gate of the first NMOS transistor Q11 receives the high-level signal output from the light-receiving side of the first optocoupler U1 through the sixth resistor R6. The first NMOS transistor Q11 is turned on, and the second NMOS transistor Q12 is cut off. The first NPN transistor QN1, in conjunction with the first NMOS transistor Q11, charges and stores energy in the first capacitor C1.

[0039] When the square wave signal is high, the second NPN transistor QN2 is turned on, the third optocoupler U3 is turned on, the first optocoupler U1 is turned off, the first NPN transistor QN1 is turned off, the second optocoupler U2 is turned on, and the PNP transistor QP is turned on, outputting a high-level signal at its light-receiving side. Simultaneously, the first NMOS transistor Q11 is turned off, and the gate of the second NMOS transistor Q12 receives the high-level signal output from the light-receiving side of the second optocoupler U2 through the seventh resistor R7, turning on the second NMOS transistor Q12. The PNP transistor QP, in conjunction with the second NMOS transistor Q12, discharges the first capacitor C1, and the source of the second NMOS transistor Q12 outputs a negative power supply of -12VB through the negative terminal of the second capacitor.

[0040] According to some embodiments, such as Figure 4As shown, the negative level auxiliary circuit also includes a first optocoupler U1 and a second optocoupler U2. In some other embodiments, in addition to the above connection method, other connection methods can be used. The specific connection methods after modification are as follows. The light-emitting input terminal of the second optocoupler U2 is connected to the light-emitting output terminal of the third optocoupler U3. The light-emitting output terminal of the second optocoupler U2 is connected to the collector of the second NPN transistor QN2. The light-receiving output terminal of the second optocoupler U2 is connected to the other end of the seventh resistor R7. The light-emitting input terminal of the first optocoupler U1 is connected to the positive power supply +12VB through the first resistor R1. The light-emitting output terminal of the first optocoupler U1 is connected to the collector of the first NPN transistor QN1. The light-receiving output terminal of the first optocoupler U1 is connected to the other end of the sixth resistor R6.

[0041] The working principle of the above embodiment is as follows: when the square wave signal is a low-level signal, the second NPN transistor QN2 is cut off, the third optocoupler U3 and the second optocoupler U2 are cut off, the first NPN transistor QN1 is turned on, the PNP transistor QP is cut off, the first optocoupler U1 is turned on, and its light-receiving side outputs a high-level signal; at the same time, the gate of the first NMOS transistor Q11 receives the high-level signal output from the light-receiving side of the first optocoupler U1 through the sixth resistor R6, the first NMOS transistor Q11 is turned on, and the second NMOS transistor Q12 is cut off. The first NPN transistor QN1, in conjunction with the first NMOS transistor Q11, charges and stores energy in the first capacitor C1.

[0042] When the square wave signal is high, the second NPN transistor QN2 is turned on, as are the third optocoupler U3 and the second optocoupler U2. The output terminal of the light-receiving side of the second optocoupler U2 outputs a high-level signal, the first NPN transistor QN1 is turned off, the first optocoupler U1 is turned off, and the PNP transistor QP is turned on. Simultaneously, the first NMOS transistor is turned off, and the gate of the second NMOS transistor Q12 receives the high-level signal output from the light-receiving side of the second optocoupler U2 through the seventh resistor R7, turning on the second NMOS transistor Q12. The PNP transistor QP, in conjunction with the second NMOS transistor Q12, discharges the first capacitor, and the source of the second NMOS transistor Q12 outputs a negative power supply of -12VB through the negative terminal of the second capacitor C2.

[0043] According to some embodiments, such as Figure 5 As shown, the charging auxiliary module includes a first diode D1, and the discharging auxiliary module includes a second diode D2. Their specific connection method is as follows: The positive terminal of the first diode D1 is connected to the negative terminal of the first capacitor C1 and the negative terminal of the second diode D2. The negative terminal of the first diode D1 is connected to the first ground point BAT-. The positive terminal of the second diode D2 outputs a negative power supply -12VB through the negative terminal of the second capacitor C2.

[0044] The working principle of the above embodiment is as follows: when the square wave signal is a low level signal, the second NPN transistor QN2 is cut off, the first NPN transistor QN1 is turned on, the PNP transistor QP is cut off, and the first NPN transistor QN1, together with the first diode D1, charges and stores energy in the first capacitor C1.

[0045] When the square wave signal is a high-level signal, the second NPN transistor QN2 is turned on, the first NPN transistor QN1 is turned off, and the PNP transistor QP is turned on. The PNP transistor QP, together with the second diode D2, discharges the first capacitor C1. The positive terminal of the second diode D2 outputs a negative power supply of -12VB through the negative terminal of the second capacitor C2.

[0046] In this application, when the charging auxiliary module uses a first NMOS transistor Q11, a fifth resistor R5, and a sixth resistor R6, and the discharging auxiliary module uses a second NMOS transistor Q12, a seventh resistor R7, and an eighth resistor R8, the circuit exhibits low power loss, low voltage loss, and good performance. Using a first diode D1 in the charging auxiliary module and a second diode D2 in the discharging auxiliary module further reduces cost. The choice between using a MOS transistor or a diode depends on actual requirements. A combination of MOS transistors and resistors is used when better performance and lower losses are needed; a diode is sufficient when lower cost is required.

[0047] According to some embodiments, such as Figure 3 or Figure 4 As shown, the negative level auxiliary circuit also includes a square wave circuit, which includes comparator U1A, tenth resistor R10, eleventh resistor R11, twelfth resistor R12, thirteenth resistor R13, fourteenth resistor R14, fifteenth resistor R15, and third capacitor C3. Its specific connection method is as follows: The inverting input of comparator U1A is connected to one end of the third capacitor C3 and one end of the twelfth resistor R12. The other end of the third capacitor C3 is connected to the second ground GND. The other end of the twelfth resistor R12 is connected to the output of comparator U1A, one end of the fourteenth resistor R14, one end of the fifteenth resistor R15, and one end of the thirteenth resistor R13. The other end of the fourteenth resistor R14 is connected to the second power supply +12V. The other end of the thirteenth resistor R13 is connected to the non-inverting input of comparator U1A, one end of the tenth resistor R10, and one end of the eleventh resistor R11. The other end of the tenth resistor R10 is connected to the second ground GND. The other end of the eleventh resistor R11 is connected to the second power supply +12V. The other end of the fifteenth resistor R15 outputs a square wave signal.

[0048] According to some embodiments, this application provides an auxiliary power supply, including the negative level auxiliary circuit described above.

[0049] In the description of the above embodiments, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0050] Although this disclosure has been described with reference to several typical embodiments, it should be understood that the terminology used is descriptive and exemplary, and not restrictive. Because this disclosure can be embodied in many forms without departing from the spirit or substance of this application, it should be understood that the above embodiments are not limited to any of the foregoing details, but should be interpreted broadly within the spirit and scope defined by the appended claims. Therefore, all variations and modifications falling within the scope of the claims or their equivalents should be covered by the appended claims.

Claims

1. A negative level assist circuit, characterized by, The negative level auxiliary circuit includes: The system includes a charging switch, a charging auxiliary module, a first resistor, and a first capacitor. The control terminal of the charging switch is turned on when it receives a high-level signal. One end of the charging switch is connected to a positive power supply through the first resistor, and the other end of the charging switch is connected to the positive terminal of the first capacitor. The negative terminal of the first capacitor is connected to the first terminal of the charging auxiliary module, and the second terminal of the charging auxiliary module is connected to a first ground point. The system includes a discharge switch, a discharge auxiliary module, and a second capacitor. The discharge switch is turned on when it receives a low-level signal. One end of the discharge switch is connected to the other end of the charging switch and the positive terminal of the first capacitor. The other end of the discharge switch is connected to a first location. The second end of the discharge auxiliary module is connected to the negative terminal of the first capacitor and the first end of the charging auxiliary module. The first end of the discharge auxiliary module outputs a negative power supply through the negative terminal of the second capacitor. The positive terminal of the second capacitor is connected to the first location. The second resistor is connected to one end of the control terminal of the charging switch and the control terminal of the discharging switch, and the other end of the second resistor is used to receive square wave signals.

2. The negative level assist circuit of claim 1, wherein, The charging switch uses a first NPN transistor, and the discharging switch uses a PNP transistor. The collector of the first NPN transistor is connected to the positive power supply through the first resistor. The emitter of the first NPN transistor is connected to the positive terminal of the first capacitor and the emitter of the PNP transistor. The collector of the PNP transistor is connected to the first ground point. The bases of the first NPN transistor and the PNP transistor are connected to one end of the second resistor.

3. The negative level assist circuit of claim 2, wherein, The negative level auxiliary circuit also includes a second NPN transistor, a third resistor, and a fourth resistor. The base of the second NPN transistor receives a square wave signal through the third resistor. The collector of the second NPN transistor is connected to the other end of the second resistor and one end of the fourth resistor. The other end of the fourth resistor is connected to the positive power supply. The emitter of the second transistor is connected to the first ground point.

4. The negative level auxiliary circuit according to claim 3, characterized in that, The charging auxiliary module includes a first NMOS transistor, a fifth resistor, and a sixth resistor. The discharging auxiliary module includes a second NMOS transistor, a seventh resistor, and an eighth resistor. The source of the first NMOS transistor is connected to the negative terminal of the first capacitor, one end of the fifth resistor, and the drain of the second NMOS transistor. The other end of the fifth resistor is connected to the gate of the first NMOS transistor and one end of the sixth resistor. The drain of the first NMOS transistor is connected to a first ground point. The gate of the second NMOS transistor is connected to one end of the seventh resistor and one end of the eighth resistor. The other end of the eighth resistor is connected to the negative terminal of the second capacitor and the source of the second NMOS transistor. The source of the second NMOS transistor outputs a negative power supply. The other end of the sixth resistor is used to receive a level signal opposite to the square wave signal. The other end of the seventh resistor is used to receive a level signal the same as the square wave signal.

5. The negative level auxiliary circuit according to claim 4, characterized in that, The negative level auxiliary circuit further includes a third optocoupler and a ninth resistor. The light-emitting input terminal of the third optocoupler is connected to one end of the fourth resistor, and the other end of the fourth resistor is connected to a second power supply. The light-emitting output terminal of the third optocoupler is connected to the collector of the second NPN transistor, and the emitter of the second NPN transistor is connected to a second ground. The light-receiving input terminal of the third optocoupler is connected to the other end of the second resistor and one end of the ninth resistor, and the other end of the ninth resistor is connected to a positive power supply. The light-receiving output terminal of the third optocoupler is connected to a first ground.

6. The negative level auxiliary circuit according to claim 4 or 5, characterized in that, The negative level auxiliary circuit further includes a first optocoupler and a second optocoupler. The light-emitting input terminal of the first optocoupler is connected to one end of the second resistor, the light-emitting output terminal of the first optocoupler is connected to the base of the first NPN transistor, and the light-receiving output terminal of the first optocoupler is connected to the other end of the sixth resistor. The light-emitting input terminal of the second optocoupler is connected to the base of the PNP transistor, the light-emitting output terminal of the second optocoupler is connected to one end of the second resistor, and the light-receiving output terminal of the second optocoupler is connected to the other end of the seventh resistor.

7. The negative level auxiliary circuit according to claim 5, characterized in that, The negative level auxiliary circuit further includes a first optocoupler and a second optocoupler. The light-emitting input terminal of the second optocoupler is connected to the light-emitting output terminal of the third optocoupler. The light-emitting output terminal of the second optocoupler is connected to the collector of the second NPN transistor. The light-receiving output terminal of the second optocoupler is connected to the other end of the seventh resistor. The light-emitting input terminal of the first optocoupler is connected to the positive power supply through the first resistor. The light-emitting output terminal of the first optocoupler is connected to the collector of the first NPN transistor. The light-receiving output terminal of the first optocoupler is connected to the other end of the sixth resistor.

8. The negative level auxiliary circuit according to claim 2, characterized in that, The charging auxiliary module includes a first diode, and the discharging auxiliary module includes a second diode. The positive terminal of the first diode is connected to the negative terminal of the first capacitor and the negative terminal of the second diode. The negative terminal of the first diode is connected to a first ground point, and the positive terminal of the second diode outputs negative power through the negative terminal of the second capacitor.

9. The negative level auxiliary circuit according to claim 1, characterized in that, The negative level auxiliary circuit also includes a square wave circuit, which includes a comparator, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, and a third capacitor. The inverting input of the comparator is connected to one end of the third capacitor and one end of the twelfth resistor. The other end of the third capacitor is connected to a second ground. The other end of the twelfth resistor is connected to the output of the comparator, one end of the fourteenth resistor, one end of the fifteenth resistor, and one end of the thirteenth resistor. The other end of the fourteenth resistor is connected to a second power supply. The other end of the thirteenth resistor is connected to the non-inverting input of the comparator, one end of the tenth resistor, and one end of the eleventh resistor. The other end of the tenth resistor is connected to a second ground. The other end of the eleventh resistor is connected to a second power supply. The other end of the fifteenth resistor outputs a square wave signal.

10. An auxiliary power supply, characterized in that, Includes the negative level auxiliary circuit as described in any one of claims 1 to 9.

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