A DCDC active absorption circuit with delay circuit control, switching power supply and control method thereof

Abstract

This invention discloses a DC-DC active snubber circuit with delay circuit control, a switching power supply, and a control method thereof. The DC-DC active snubber circuit includes a snubber switch, a snubber capacitor, and a unique delay control single circuit. This delay control single circuit receives a PWM signal from, for example, an MCU and can automatically generate a drive signal with precise turn-on delay and turn-off advance characteristics to control the snubber switch. In a switching power supply using this active snubber circuit, the voltage spike energy generated by the secondary-side synchronous rectifier when it is turned off is first stored in the snubber capacitor and then fed back to the output under the drive of the control signal, effectively suppressing voltage stress and improving efficiency. This invention does not require an additional PWM port on the MCU, is low in cost, highly reliable, and achieves efficient energy absorption and feedback.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, specifically to a voltage stress suppression technology for the secondary-side synchronous rectifier circuit of a switching power supply (especially an isolated DC-DC converter), and more particularly to an integrated active absorption circuit, a switching power supply and its control method controlled by a hardware delay circuit. Background Technology

[0002] In high-voltage DC-DC isolation conversion applications, synchronous rectification technology is commonly used on the secondary side to improve efficiency. However, due to the high-speed switching action of the primary-side power switch and the inherent parasitic inductance of the transformer and PCB circuitry, a large voltage stress spike will be induced across the drain and source of the secondary-side synchronous rectifier diode (SR-MOS) during hard turn-off. If this voltage spike is not suppressed, it can easily exceed the safe operating area of ​​the SR-MOS, leading to overvoltage damage and severely affecting the long-term reliability of the converter.

[0003] To address this challenge, the industry commonly employs active absorption or clamping circuits. However, traditional solutions typically rely on a microcontroller (MCU) to provide one or more additional, precisely timed PWM control signals to drive the auxiliary switching transistors in the absorption circuit. In increasingly complex multiphase or interleaved parallel power supply architectures, the hardware PWM output port resources of the MCU are often severely limited. Replacing this with a higher-specification MCU with more PWM ports not only significantly increases system material costs but also introduces additional software adaptation, debugging work, and potential risks. Therefore, there is an urgent need for a secondary voltage spike suppression solution that can eliminate the reliance on additional MCU PWM ports without sacrificing control accuracy and efficiency. Summary of the Invention

[0004] The technical problem to be solved by this invention is to overcome the above-mentioned shortcomings of the prior art and provide a DC-DC active absorption circuit with delay circuit control and a switching power supply control method. The core concept of this invention is: to use a hardware delay control single circuit composed entirely of passive components to directly process the existing primary-side PWM drive signal to generate a drive signal with precise delay and advance, which is used to control an active absorption circuit with an innovative topology, enabling it to autonomously complete the complete process of "peak energy absorption-temporary storage-lossless feedback", thereby achieving effective suppression and energy recovery of the turn-off voltage spike of the secondary-side synchronous rectifier without occupying any additional PWM resources of the MCU.

[0005] The first objective of this invention is to provide a DC-DC active snubber circuit with delay circuit control for use in isolated DC-DC converters. This circuit innovatively integrates an active snubber network and a delay circuit into a conventional structure comprising a first synchronous rectifier Q1, a second synchronous rectifier Q2, and a filter inductor. The active snubber network consists of auxiliary switches Q3 and Q4 and snubber capacitors. Its key connection lies in a cross-parallel configuration, allowing Q4 to form an effective peak energy transfer and clamping path with the first synchronous rectifier Q1, and Q3 to form a cross-parallel connection with the second synchronous rectifier Q2. The delay circuit consists of basic passive components such as resistors, capacitors, and diodes. Its input is connected to the PWM signal of the primary-side main switch, and its output drives the gates of the first snubber switch Q3 and the second snubber switch Q4, respectively. This delay circuit can shape the waveform of the input PWM signal, outputting a drive waveform with a fixed "turn-on delay" relative to the rising edge and a fixed "turn-off advance" relative to the falling edge of the input signal.

[0006] Secondly, the present invention provides a switching power supply including the aforementioned active snubber circuit with delay circuit control for DC-DC converters. This switching power supply, by integrating the active snubber circuit of the first aspect of the present invention, can effectively suppress the turn-off voltage spikes of the secondary-side synchronous rectifier. Specifically, by cross-connecting the snubber switching transistor with the two secondary-side synchronous rectifiers and cooperating with the snubber capacitor, separate absorption and energy feedback of positive and negative half-cycle voltage spikes are achieved, resulting in an ingenious structure and high efficiency.

[0007] Thirdly, the present invention also provides a control method for a DC-DC active absorption circuit with delay circuit control, comprising: receiving a PWM drive signal of the main switch in the primary-side circuit; generating a drive signal for driving the first absorption switch Q3 and the second absorption switch Q4 based on the PWM drive signal; the turn-on of the drive signal has a set turn-on delay relative to the rising edge of the PWM drive signal, and its turn-off has a set turn-off advance relative to the falling edge of the PWM drive signal; controlling the corresponding absorption switch through the drive signal such that: at the instant the synchronous rectifier is turned off, the corresponding absorption switch is turned on through its body diode to transfer the voltage spike energy to the absorption capacitor unit for storage; after the turn-on delay time, the corresponding absorption switch is driven to be fully turned on to release the stored energy to the output terminal; before the turn-off advance time, the corresponding absorption switch is driven to be turned off in advance.

[0008] Beneficial effects

[0009] Compared with the prior art, the present invention has the following significant advantages:

[0010] 1. Achieve fully hardware-based control, freeing up MCU resources: The core control timing of this invention is generated by a simple RC charge-discharge delay circuit, completely eliminating the dependence on additional PWM ports and software resources of the microcontroller MCU. This offers significant cost and design advantages in power supply systems with limited MCU interface resources, multiple outputs, or complex control.

[0011] 2. Effectively clamping spikes and significantly improving reliability: Through precise timing control, the active absorption circuit can start immediately when the SR-MOS is turned off, effectively absorbing and clamping its drain-source voltage spikes, keeping the voltage stress within a safe range, thereby greatly improving the long-term operational reliability of the power switch and even the entire converter.

[0012] 3. Achieve energy recovery and improve overall efficiency: Unlike conventional dissipative absorption circuits such as RCD clamping, this invention temporarily stores the absorbed peak energy in a capacitor and releases it back to the load during the main power transmission stage, realizing partial energy recovery and reuse, which helps to improve the overall conversion efficiency of the converter.

[0013] 4. Precise and reliable control, strong system robustness: The delay time is determined by the resistor and capacitor parameters, which are stable and unaffected by software risks such as MCU program crashes or interrupt delays. The pure hardware implementation ensures the accuracy of timing control and anti-interference capabilities, making the system more stable and reliable. Attached Figure Description

[0014] Figure 1 The diagram shows the overall circuit schematic of a DC-DC converter used in a preferred embodiment of the present invention, where the dashed box shows the specific connection and composition of the active absorption circuit and the delay circuit.

[0015] Figures 2 to 8 for Figure 1 The circuit shown is illustrated with a schematic diagram of its operating modes and corresponding current paths at seven key time points from t0 to t6 during a complete operating cycle.

[0016] Figure 9 This is a waveform diagram showing the timing relationship between the PWM drive signal of the primary-side main switch and the control signal generated by the delay circuit for driving the absorption switch.

[0017] Figure 10 This is a schematic diagram of a delay circuit according to an embodiment of the present invention. Detailed Implementation

[0018] The technical solution of the present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0019] The accompanying drawings are for illustrative purposes only and are schematic diagrams, not actual images. They should not be construed as limiting the scope of this patent. To better illustrate the embodiments of the present invention, some parts in the drawings may be omitted, enlarged, or reduced, and do not represent the actual dimensions of the product. It is understandable to those skilled in the art that some well-known structures and their descriptions may be omitted in the drawings.

[0020] In the accompanying drawings of the embodiments of the present invention, the same or similar reference numerals correspond to the same or similar components. In the description of the present invention, it should be understood that if terms such as "upper," "lower," "left," "right," "inner," and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, they are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the terms used to describe positional relationships in the drawings are only for illustrative purposes and should not be construed as limiting the present patent. For those skilled in the art, the specific meaning of the above terms can be understood according to the specific circumstances.

[0021] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0022] Example 1:

[0023] Reference Figure 1 This embodiment details a DC-DC active absorption circuit with delay circuit control. Its main power topology employs a widely used symmetrical half-bridge structure, but the scope of protection of this invention is not limited to this; it is also applicable to other isolated topologies such as full-bridge and LLC resonant circuits that require suppression of voltage stress on the secondary-side synchronous rectifier diodes.

[0024] The main power circuit includes: Primary circuit: A full-bridge inverter circuit composed of four N-channel MOSFETs Q5, Q6, Q7, and Q8: Upper bridge arm: MOSFETs Q5 and Q7, controlled by drive signals PWMA and PWMB respectively; Lower bridge arm: MOSFETs Q6 and Q8, controlled by drive signals PWMB and PWMA respectively; the two sets of drive signals PWMA and PWMB are complementary, controlling the on / off state of the bridge arms through alternating conduction to achieve the conversion of DC to high-frequency AC. Transformer T1: Provides electrical isolation and energy transfer. Secondary circuit: Includes a first synchronous rectifier Q1, a second synchronous rectifier Q2, a filter inductor L1, and an output filter capacitor C3. The sources of the first synchronous rectifier Q1 and the second synchronous rectifier Q2 are connected to the output negative terminal Vout-. The filter inductor L1 is connected between the center tap of the secondary winding of transformer T and the output positive terminal Vout+.

[0025] The active absorption circuit specifically includes: a first absorption switch Q3 and a second absorption switch Q4, preferably an N-channel MOSFET. The absorption capacitor unit uses a first absorption capacitor C1 and a second absorption capacitor C2 connected in parallel.

[0026] The first common terminal of the parallel-connected first absorption capacitor C1 and the second absorption capacitor C2 is simultaneously connected to the drain of the first absorption switch Q3 and the drain of the second absorption switch Q4. The second common terminal of the parallel-connected first absorption capacitor C1 and the second absorption capacitor C2 is simultaneously connected to the output terminal Vout+. The drain of the first synchronous rectifier Q1 is connected to the source of the second absorption switch Q4. The drain of the second synchronous rectifier Q2 is connected to the source of the first absorption switch Q3.

[0027] To drive the first absorption switch Q3 and the second absorption switch Q4, two delay circuits with identical structures and complementary input signals are required. Taking the delay circuit controlling the second absorption switch Q4 as an example (the delay circuit controlling the first absorption switch Q3 has the exact same structure, with the input signal being MCU_PWMB), the delay circuit achieves precise timing in pure hardware and includes a first resistor R1, a second resistor R2, a capacitor C4, and a diode D1. The first terminal of the first resistor R1 serves as the signal input terminal, connected to the PWM drive signal MCU_PWMA of the primary side transistor Q5. This signal is directly generated by the existing MCU or controller, requiring no additional PWM port. The second terminal of the first resistor R1 is connected to the cathode of the diode D1. The anode of the diode D1 serves as the drive signal output terminal, connected to the gate of the second absorption switch Q4 through the drive circuit. The capacitor C4 is connected between the anode (output terminal) of the diode D1 and system ground (GND). The second resistor R2 is connected between the first terminal (input terminal) of the first resistor R1 and the anode (output terminal) of the diode D1.

[0028] Working principle of the delay circuit: When the MCU_PWMA signal transitions from low to high (rising edge), the high level charges capacitor C4 through the first resistor R1 and the second resistor R2. Since the voltage across capacitor C4 cannot change abruptly, the output voltage rises slowly and exponentially until it reaches the gate turn-on threshold voltage Vgs(th) of Q4. The time from the rising edge of MCU_PWMA to the drive signal reaching Vgs(th) is the "turn-on delay time" (corresponding to...). Figure 9 During the period from t1 to t2. When the MCU_PWMA signal transitions from high to low (falling edge), the charge stored in capacitor C4 discharges rapidly through the fast path formed by diode D1 and the second resistor R2, causing the output voltage to drop rapidly to a low level. This causes Q4 to turn off earlier than the falling edge of the MCU_PWMA signal itself; this time difference is called the "turn-off advance time" (corresponding to the time between t1 and t2). Figure 9 (between t3 and t4).

[0029] By precisely selecting the parameter values ​​of the first resistor R1, the second resistor R2, and the capacitor C4, the required turn-on delay and turn-off advance time can be set independently and flexibly, thus perfectly matching the main power conversion timing.

[0030] The working principle of this invention within a complete working cycle is as follows: Please refer to... Figures 2 to 8 The seven key modes shown and Figure 9 Taking the timing waveform as an example to illustrate the process of suppressing the turn-off spike of the first synchronous rectifier Q1, the workflow of this embodiment within one switching cycle (times t0 to t6) is explained in detail:

[0031] At time t0, such as Figure 2 As shown, the first synchronous rectifier Q1 is hard-turned off, and the body diode of the second absorption switch Q4 freewheels. The inductor current of the filter inductor is initially negative and gradually decreases. The body diodes of the primary side MOSFET Q5 and MOSFET Q8 are turned on, providing conditions for the primary side to be soft-turned on at time t1. The peak energy generated on the first synchronous rectifier Q1 is stored in the first absorption capacitor C1 and the second absorption capacitor C2, which reduces the stress peak of the first synchronous rectifier Q1 and stores this part of the energy, which is then transferred to the output terminal.

[0032] At time t1, such as Figure 3 As shown, the primary-side MOSFET Q5 and MOSFET Q8 are soft-turned on, the primary-side current gradually increases, and the filter inductor current gradually decreases from negative current to 0.

[0033] At time t2, such as Figure 4As shown, the second absorption switch Q4 is soft-turned on, the clamping capacitor discharges, and energy is transferred to the output side. At this time, the primary side also transfers energy to the secondary side, and the inductor current continues to increase from 0.

[0034] At time t3, the second absorption switch Q4 is hard-turned off, and energy is transferred from the primary side to the secondary side, causing the inductor current to continue to increase.

[0035] At time t4, the primary side MOSFET Q5 and MOSFET Q8 are hard turned off, the inductor current freewheels, the body diode of the first synchronous rectifier Q1 is turned on, and the inductor current begins to decrease.

[0036] At time t5, such as Figure 7 As shown, the SRB is soft-turned on, and the inductor current continues to decrease to 0;

[0037] At time t6, the inductor current is equal to 0. At this time, the first synchronous rectifier diodes Q1 and Q2 are turned on, and the inductor current continues to decrease.

[0038] The process of suppressing the turn-off spike of the second synchronous rectifier Q2 is executed by the first absorption switch Q3 and its corresponding delay circuit unit (with PWMB as the input signal). Its working principle is completely symmetrical to the process of the first synchronous rectifier Q1 turning off.

[0039] Example 2:

[0040] This embodiment provides a control method for a DC-DC active absorption circuit with delay circuit control, applied to the aforementioned delay circuit, including the following steps:

[0041] S1. Receive the PWM drive signal of the main switch in the primary circuit;

[0042] S2. Based on the PWM drive signal, generate a drive signal for driving the first absorption switch Q3 and the second absorption switch Q4; the turn-on of the drive signal has a set turn-on delay relative to the rising edge of the PWM drive signal, and its turn-off has a set turn-off advance relative to the falling edge of the PWM drive signal.

[0043] S3. Control the absorption switch transistor through the drive signal so that:

[0044] At the instant the synchronous rectifier diodes Q1 and Q2 are turned off, the corresponding absorption switch diodes Q3 and Q4 are turned on through their body diodes, transferring the voltage spike energy to the first absorption capacitor C1 and the second absorption capacitor C2 for storage.

[0045] After the turn-on delay time, the absorption switches Q3 and Q4 are fully turned on to release the stored energy to the output terminal.

[0046] Before the turn-off advance time, drive the corresponding absorption switches Q3 and Q4 to turn off in advance.

[0047] As can be seen from the detailed description of the preferred embodiment and working principle of the specific circuit above, the technical solution provided by this invention, through a combination of a sophisticated hardware connection topology and an innovative purely passive delay circuit, perfectly achieves efficient suppression and energy recovery of the turn-off voltage spike of the secondary synchronous rectifier without relying on additional PWM port resources of the MCU. This solution is low-cost, timing-accurate, and reliable, and has significant industrial application value.

[0048] The above are merely preferred embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A DC-DC active absorption circuit with delay circuit control, applied to an isolated DC-DC converter, the converter comprising a primary-side circuit, a transformer T, and a secondary-side circuit, the secondary-side circuit comprising at least a filter inductor, a first synchronous rectifier Q1, and a second synchronous rectifier Q2; characterized in that, It also includes an active absorption circuit and a delay circuit; the active absorption circuit includes a first absorption switch Q3, a second absorption switch Q4, and an absorption capacitor unit, wherein the first absorption switch Q3 is connected in parallel with the second synchronous rectifier Q2, and the second absorption switch Q4 is connected in parallel with the first synchronous rectifier Q1, for absorbing the voltage stress spikes generated when the first synchronous rectifier Q1 and the second synchronous rectifier Q2 are turned off, respectively; one end of the absorption capacitor unit is connected to the first end of both the first absorption switch Q3 and the second absorption switch Q4, for storing the energy of the voltage stress spike; the input terminal of the delay circuit is connected to the P-terminal of at least one main switch in the primary circuit. The output of the delay circuit is connected to the control terminals of the first absorption switch Q3 and the second absorption switch Q4, respectively, based on the PWM drive signal. The delay circuit is configured to: at the instant the corresponding synchronous rectifier is turned off, use the body diode of the first absorption switch Q3 or the second absorption switch Q4 to conduct, and transfer the voltage spike energy generated during the turn-off to the absorption capacitor unit for storage; after the turn-on delay time ends, drive the first absorption switch Q3 or the second absorption switch Q4 to fully conduct, and release the energy stored in the absorption capacitor unit to the output terminal of the secondary circuit.

2. The DC-DC active absorption circuit with delay circuit control according to claim 1, characterized in that, The absorption capacitor unit includes a first absorption capacitor C1 and a second absorption capacitor C2 connected in parallel.

3. The DC-DC active absorption circuit with delay circuit control according to claim 2, characterized in that, The source of the first synchronous rectifier Q1 and the source of the second synchronous rectifier Q2 are both connected to the output terminal Vout-. One end of the filter inductor L1 is connected to the secondary winding of the transformer T, and the other end is connected to the output terminal Vout+. The first common terminal of the absorption capacitor unit is connected to the drain of both the first absorption switch Q3 and the second absorption switch Q4. The second common terminal of the absorption capacitor unit is connected to the output terminal Vout+. The drain of the second synchronous rectifier Q2 is connected to the source of the first absorption switch Q3, and the drain of the first synchronous rectifier Q1 is connected to the source of the second absorption switch Q4.

4. The DC-DC active absorption circuit with delay circuit control according to any one of claims 1 to 3, characterized in that, The delay circuit consists of a resistor, a capacitor, and a diode; the delay circuit is configured to: in response to the rising edge of the PWM drive signal, charge the capacitor through the resistor to generate a turn-on delay of the drive signal; and in response to the falling edge of the PWM drive signal, discharge the capacitor through the diode and the resistor to generate an earlier turn-off of the drive signal.

5. The DC-DC active absorption circuit with delay circuit control according to claim 4, characterized in that, The delay circuit includes a first resistor R1, a second resistor R2, a capacitor C4, and a diode D1; the first end of the first resistor R1 serves as the signal input terminal of the delay circuit, and the second end of the first resistor R1 is connected to the negative terminal of the diode D1; the positive terminal of the diode D1 serves as the signal output terminal of the delay circuit; one end of the capacitor C4 is connected to the positive terminal of the diode D1, and the other end is grounded; the second resistor R2 is connected between the first end of the first resistor R1 and the positive terminal of the diode D1.

6. The DC-DC active absorption circuit with delay circuit control according to any one of claims 1 to 3, characterized in that, The turn-on delay time corresponds to the period from the soft turn-on of the primary-side main switch to the period before the active absorption circuit begins to feed energy back to the output. The turn-off advance time corresponds to the period of time during which the active absorption circuit stops feeding energy before the primary-side main switch is turned off.

7. A switching power supply, characterized in that, Includes a DC-DC active snubber circuit with delay circuit control as described in any one of claims 1 to 6.

8. A control method for a DC-DC active absorption circuit with delay circuit control as described in any one of claims 1 to 6, characterized in that, The method applied to the delay circuit includes the following steps: S1, receiving the PWM drive signal of the main switch in the primary circuit; S2, generating a drive signal for driving the first absorption switch Q3 and the second absorption switch Q4 based on the PWM drive signal; the turn-on of the drive signal has a set turn-on delay relative to the rising edge of the PWM drive signal, and its turn-off has a set turn-off advance relative to the falling edge of the PWM drive signal; S3, controlling the corresponding absorption switch through the drive signal so that: at the instant the synchronous rectifier is turned off, the corresponding absorption switch is turned on through its body diode to transfer the voltage spike energy to the absorption capacitor unit for storage; after the turn-on delay time, the corresponding absorption switch is driven to be fully turned on to release the stored energy to the output terminal; before the turn-off advance time, the corresponding absorption switch is driven to be turned off in advance.

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