A sensorless synchronous rectification control method and system for LLC resonant converter
Patent Information
- Application Number
- CN202611046790.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-15
- Publication Date
- 2026-09-18
- Estimated Expiration
- 2046-07-15
AI Technical Summary
[0006]本发明所要解决的技术问题在于:克服现有高精度时域模型表达式繁杂、计算量大而难以在低成本微控制器中实时运行,与现有简化模型忽略寄生参数而导致同步整流时刻预测偏差之间的矛盾,提供一种既计入关键寄生参数、又便于实时实现的简化时域分析模型;针对计入寄生参数后工作模式分布发生变化、尤其是轻载下出现的多次振荡传能模式,提供可靠的在线模式识别与边界判定方法,避免因模式误判而导致同步整流管出现多次冗余开关;提供一种无需专用于同步整流检测的传感器、由数字控制器及其内部硬件逻辑直接生成驱动信号的实现方式,以兼顾控制精度、抗干扰能力与系统集成度
[0017]本发明的有益效果至少包括:本发明借助计入寄生参数的简化时域模型,同步整流管的开通、关断时刻预测更为准确;特别是在低于谐振频率区域的轻载工况下,
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Figure CN122553735B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of power electronics technology, specifically to a sensorless synchronous rectification control method and system for LLC resonant converters. Background Technology
[0002] LLC resonant converters, with their wide-range soft-switching and high efficiency, are widely used in high-frequency, high-current-density applications such as server power supplies, communication power supplies, and on-board charging. Under low-voltage, high-current output conditions, employing synchronous rectification technology and replacing rectifier diodes with low-on-resistance metal-oxide-semiconductor field-effect transistors (MOSFETs) is a key method to further reduce secondary-side conduction losses and improve overall efficiency. The core of synchronous rectification control lies in accurately determining the turn-on and turn-off times of the synchronous rectifier diodes, ensuring that their conduction range matches the natural flow range of the secondary-side current. Any deviation in timing determination will increase the freewheeling losses of the body diode and may even lead to mis-conduction during reverse current periods, resulting in shoot-through risk.
[0003] Existing synchronous rectification control methods can be divided into three categories according to the detection method. The current detection method directly detects the secondary current and turns off the synchronous rectifier at its zero-crossing point. While the principle is straightforward, it requires large, costly current transformers with significant inherent losses in high-current applications, limiting dynamic response and making it difficult to adapt to high-frequency LLC converters. The voltage detection method controls the switching of the synchronous rectifier by monitoring its drain-source voltage and comparing it with a set threshold. This method is simple and low-cost, and has become a common solution for mainstream synchronous rectification control chips. However, it has inherent drawbacks such as light-load turn-off delay, susceptibility to parasitic parameter interference, and a narrow detection window.
[0004] Sensorless methods, which indirectly determine the optimal switching timing of synchronous rectifier diodes using predictive models or algorithms, require no additional detection components and have strong noise immunity, making them a research hotspot in recent years. However, these methods face challenges such as strong model dependence, limited reliability under dynamic operating conditions, and the difficulty in balancing accuracy and complexity. Specifically, models based on the fundamental frequency approximation in the frequency domain can only guarantee accuracy when the switching frequency is close to the resonant frequency; while high-precision time-domain models are accurate, their complex expressions and heavy computational burden make them difficult to run in real time on low-cost microcontrollers; and existing simplified time-domain models often ignore parasitic parameters such as transformer leakage inductance, winding parasitic capacitance, and synchronous rectifier junction capacitance, resulting in significant prediction deviations in high-voltage and high-current applications, especially in light-load and capacitive operating regions.
[0005] Therefore, it is evident that establishing a simplified synchronous rectification control model and method that can accurately incorporate key parasitic parameters and facilitate real-time implementation by digital controllers, and accurately identifying complex operating modes and their boundaries after incorporating parasitic parameters, as well as achieving smooth switching between modes, remains an urgent problem to be solved in this field. Summary of the Invention
[0006] The technical problem to be solved by this invention is to overcome the contradiction between the complex expressions and large computational load of existing high-precision time-domain models, which make them difficult to run in real time on low-cost microcontrollers, and the prediction deviation of synchronous rectification timing caused by the neglect of parasitic parameters in existing simplified models. This invention provides a simplified time-domain analysis model that both incorporates key parasitic parameters and is easy to implement in real time. Furthermore, it provides a reliable online mode recognition and boundary determination method to address the changes in the distribution of operating modes after incorporating parasitic parameters, especially the multiple oscillating energy transfer modes that occur under light loads, thus avoiding multiple redundant switching of the synchronous rectifier tube due to mode misjudgment. Finally, it provides an implementation method that eliminates the need for a dedicated sensor for synchronous rectification detection, allowing the digital controller and its internal hardware logic to directly generate drive signals, thereby balancing control accuracy, anti-interference capability, and system integration.
[0007] To address the aforementioned technical problems, this invention provides a sensorless synchronous rectification control method for an LLC resonant converter, the method comprising the following steps: Step S1: For the LLC resonant converter, establish a simplified time-domain analysis model including parasitic parameters: the distributed parasitic parameters in the converter are equivalent to the equivalent parasitic inductance connected in series in the preceding resonant network. and the equivalent parasitic capacitance connected in parallel across the transformer magnetizing inductance Based on the conduction states of the primary and secondary switching transistors, half a switching cycle is divided into the P stage of positive energy transmission, the O stage of no energy transmission oscillation, and the N stage of negative energy transmission. Step S2: Real-time sampling of input voltage Output voltage and output current Calculate the normalized switching frequency and normalized output power And based on this, identify the current operating mode of the converter; Step S3: Based on the simplified time-domain analysis model, calculate the turn-on time of the synchronous rectifier tube according to the stage sequence corresponding to the identified current operating mode. and shutdown time ; Step S4: The digital controller uses the primary-side switch signal as a reference and determines the activation time accordingly. and shutdown time Generate the drive signal for the synchronous rectifier tube.
[0008] Preferably, the equivalent parasitic inductance described in step S1 satisfy: ; in For the primary leakage inductance of the transformer, For secondary side leakage, For magnetizing inductance, The transformer turns ratio; The equivalent parasitic capacitance Determined according to the following equivalence relationship: ; ; in The equivalent winding capacitance of the transformer after conversion is derived from the parasitic capacitance of the transformer winding. , Capacitance between primary and secondary windings Sure, The equivalent junction capacitance of the synchronous rectifier MOSFET; and the equivalent inductance of the resonant network of the P-stage and N-stage is... , For a resonant inductor, the corresponding resonant angular frequency is , It is a resonant capacitor.
[0009] Preferably, the simplified time-domain expression for the P stage or the N stage is: ; ; ; in , and The resonant current at the start of the P-stage or N-stage, respectively. Resonant capacitor voltage and excitation current The initial value; For time; stage coefficient The value is either 0 or 1, indicating whether an excitation voltage is applied to the primary side. The value is +1 or -1, with +1 in the P stage and -1 in the N stage.
[0010] Preferably, the resonant current in the O-stage Resonant capacitor voltage Excitation current With equivalent parasitic capacitance voltage The simplified time-domain expression is: ; ; ; ; ; ; ; ; ; ; ; ; ; ; in , , These are the excitation currents at the start of stage O. Resonant capacitor voltage With equivalent parasitic capacitance voltage initial value, and For voltage and current coefficients, and These are the high-frequency resonant angular frequencies and the low-frequency resonant angular frequencies.
[0011] Preferably, the operating mode in step S2 is determined in the following manner: When the normalized switching frequency When the value is less than 1, the converter is determined to be operating in the BRR region below the resonant frequency; when the normalized switching frequency is less than 1, the converter is determined to be operating in the BRR region below the resonant frequency. When the value is not less than 1, the converter is determined to be operating in the region above the resonant frequency (ARR). Within the defined frequency range, according to the normalized output power The specific operating mode is determined by comparing the results with the predetermined mode boundary values within the region: within the BRR, when If the value is less than the boundary value between OPO mode and OPOPO mode, it is determined to be OPO mode; otherwise, it is determined to be OPO mode. Within the ARR, when If the value is less than the boundary value between OPO mode and NOP mode, it is determined to be OPO mode; otherwise, it is determined to be NOP mode. in , For switching frequency, It is the resonant frequency.
[0012] Preferably, the OPOPO mode has a phase sequence of a first O phase, a first P phase, a second O phase, a second P phase, and a third O phase that appear sequentially within the half-switching cycle; in steps S3 and S4, when the identified operating mode is the OPOPO mode, the digital controller calculates the turn-on and turn-off times of the synchronous rectifier tube using the second P phase as the main energy transmission phase, and generates a drive signal for the synchronous rectifier tube accordingly, so that the synchronous rectifier tube remains off in the first P phase and is only enabled and turned on in the second P phase.
[0013] Preferably, in step S3, for each identified operating mode, based on its stage sequence, and in conjunction with the simplified time-domain analysis model and the continuity, waveform symmetry, and power balance constraints of stage transitions, a set of equations concerning the duration of each stage is established, and solved through approximation to obtain the equations used to calculate the activation time. and shutdown time The analytical expression; the approximation process includes approximating the current in phase O as constant or linearly varying.
[0014] Preferably, the identification of the operating mode in step S2 is based on a pre-stored mode boundary: the mode boundary is determined by offline simulation and obtained by fitting a polynomial or exponential function, and its fitting expression is pre-stored in the digital controller; during online operation, the digital controller will calculate the normalized switching frequency in real time. With the normalized output power Substitute the fitted expression into the equation, evaluate and compare the results to determine the current working mode.
[0015] Preferably, step S4 includes: capturing the rising and falling edges of the primary-side switching signal by a configurable logic block within the digital controller; and delaying the falling edge signal by the turn-off time. An intermediate signal is then obtained; the intermediate signal is then delayed by the activation time. The synchronous rectifier is driven by a combination of logic gates; the turn-off time of the synchronous rectifier is synchronized with the falling edge of the primary-side switch signal, so that the synchronous rectifier is turned off in the negative energy transfer phase in the N-stage operating mode.
[0016] This invention also provides a sensorless synchronous rectification control system for an LLC resonant converter, including an LLC resonant converter main circuit and a digital controller; the LLC resonant converter main circuit includes an input-side switching transistor and a resonant inductor. and resonant capacitor The system comprises a resonant network, a transformer, and a secondary rectifier circuit consisting of synchronous rectifier diodes; the digital controller is configured to execute the above method, and the digital controller generates the drive signal for the synchronous rectifier diodes through its internal configurable logic blocks.
[0017] The beneficial effects of this invention include at least the following: By utilizing a simplified time-domain model that incorporates parasitic parameters, the prediction of the turn-on and turn-off times of the synchronous rectifier is more accurate; especially under light load conditions below the resonant frequency region, 1) This invention identifies the OPO mode of multiple oscillations and energy transfer and performs synchronous rectification only during the main energy transfer stage, thus avoiding multiple switching actions caused by equivalent parasitic capacitance oscillations. 2) After reasonable simplification of the fourth-order O-stage, the approximate analytical solution of the synchronous rectification time can be calculated in real time on a general-purpose digital signal controller without the need for a high-performance processor or a large lookup table. 3) This invention eliminates the need for external detection circuits such as current transformers and voltage comparators used for synchronous rectification detection, thus eliminating noise sensitivity points and false triggering in analog detection. The drive signal is generated by a configurable logic block based on the primary side signal and after hardware delay, ensuring precise timing. 4) The core modeling and control process is not limited to a specific topology and can be extended to various LLC derivative topologies such as full-bridge and half-bridge. Attached Figure Description
[0018] Figure 1 This is a schematic diagram of the main circuit structure of the half-bridge three-level LLC resonant converter according to an embodiment of the present invention; Figure 2 This is a flowchart of the sensorless synchronous rectification control algorithm of the present invention; Figure 3 The key operating waveforms for four typical operating modes within half a switching cycle are shown, where (a) is OPO mode, (b) is OPOPO mode, (c) is NOP mode, and (d) is OPO mode. Figure 4 Generate a logic block diagram for synchronous rectification drive signals based on configurable logic blocks. Detailed Implementation
[0019] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present invention.
[0020] The method of this invention is applicable to LLC resonant converters, especially to series half-bridge three-level LLC resonant converters with high-voltage input and low-voltage high-current output, whose main circuit is as follows: Figure 1 As shown, it includes: the input side is controlled by a switching transistor. , , , With input voltage divider capacitor , The structure consists of a series half-bridge three-level circuit; composed of a resonant inductor. With resonant capacitor The resonant network formed; transformer Its turns ratio is :1:1, Magnetizing inductance is To meet the requirements of low-voltage, high-current output, the transformer adopts a multi-secondary-side parallel structure; and uses synchronous rectifier tubes. , (Their junction capacitances are respectively) , ) and output filter capacitor The secondary-side rectifier circuit is constructed. The control system, with a digital controller at its core, is responsible for sampling and calculating the input and output quantities, and uses its internal configurable logic blocks to generate the synchronous rectification drive signal in pure hardware. The overall control flow of this invention is as follows: Figure 2 As shown, it includes the following steps.
[0021] Step S1: For the LLC resonant converter, establish a simplified time-domain analysis model including parasitic parameters: the distributed parasitic parameters in the converter are equivalent to the equivalent parasitic inductance connected in series in the preceding resonant network. and the equivalent parasitic capacitance connected in parallel across the transformer magnetizing inductance Based on the conduction states of the primary and secondary switching transistors, half a switching cycle is divided into the P stage of positive energy transmission, the O stage of no energy transmission oscillation, and the N stage of negative energy transmission.
[0022] First, a simplified time-domain analysis model incorporating parasitic parameters is established. This considers the primary leakage inductance of the transformer under high-frequency, high-current conditions. Secondary side leakage sensation Winding parasitic capacitance and Inter-winding capacitance between primary and secondary windings and synchronous rectifier junction capacitance The influence of distributed parasitic parameters on the resonance process is not negligible. This invention equates these distributed parameters to two lumped parameters: the equivalent parasitic inductance connected in series in the preceding resonant network. and the magnetizing inductor connected in parallel to the transformer Equivalent parasitic capacitance at both ends The equivalent parasitic inductance is calculated and synthesized from the primary and secondary leakage inductances, satisfying the following: ; The equivalent parasitic capacitance is determined by the converted equivalent winding capacitance of the transformer and the junction capacitance of the synchronous rectifier diode, and satisfies: ; ; In the formula This refers to the equivalent winding capacitance of the transformer after conversion. Similarly... The equivalent junction capacitance of the synchronous rectifier MOSFET. Let be the transformer turns ratio. After introducing the equivalent parasitic inductance, the equivalent inductance of the preceding resonant network is the sum of the resonant inductance and the equivalent parasitic inductance, i.e. The corresponding resonant angular frequency is .
[0023] Based on the above equivalence, and according to the conduction states of the primary and secondary switches, half a switching cycle is divided into three stages: the P stage with positive energy transfer, the O stage with no energy transfer and only parasitic elements participating in the oscillation, and the N stage with negative energy transfer. In the P and N stages, the voltage of the transformer secondary winding is clamped by the output voltage, the circuit is a second-order system, and its resonant current... Resonant capacitor voltage and excitation current The time-domain expression is: ; ; ; In the formula , and The resonant current at the start of the P-stage or N-stage, respectively. Resonant capacitor voltage and excitation current The initial value; , These are the input and output voltages, and the stage coefficient, respectively. This characterizes whether an excitation voltage is applied to the resonant network from the primary side; it is set to 1 when an excitation voltage is applied and 0 when no excitation voltage is applied. It represents the direction of energy transfer, taking +1 in the P stage of forward energy transfer and -1 in the N stage of reverse energy transfer.
[0024] During phase O, the synchronous rectifier is turned off, and the equivalent parasitic capacitance... When the circuit resonates, it becomes a fourth-order system, and its response includes high-frequency resonant angular frequencies. With low-frequency resonant angular frequency The two components are used, but the high-frequency component has a small amplitude and fast decay, so it has little impact on the judgment of the stage transition time and is therefore ignored in the modeling. Only the low-frequency component is used to approximate the resonant current of stage O. Resonant capacitor voltage Excitation current With equivalent parasitic capacitance voltage This yields the simplified time-domain expression: ; ; ; ; Among them, the low-frequency resonant angular frequency is determined by Determined, the intermediate variables are respectively , , , The voltage and current coefficients C and D are determined by the initial conditions at the start of this stage, and are as follows: ; ; coefficient , .
[0025] Step S2: Real-time sampling of input voltage Output voltage and output current Calculate the normalized switching frequency and normalized output power This allows the current operating mode of the converter to be identified.
[0026] Specifically, the digital controller samples the input voltage in real time. Output voltage With output current Based on this, the normalized switching frequency is calculated. With normalized output power This allows for the identification of the converter's current operating mode. The expression for calculating the normalized variable is as follows: ; ; in, Output power, equivalent impedance .
[0027] After taking parasitic parameters into account, the converter's operating mode changes from and The four modes are jointly determined, primarily including the OPO and OPOPO modes located below the resonant frequency region (denoted as BRR), and the NOP and OPO modes located above the resonant frequency region (denoted as ARR). The key waveforms of these four modes within half a switching cycle are as follows: Figure 3 As shown. Pattern recognition is performed in two steps: first, the frequency region is determined based on the relationship between the normalized switching frequency and 1; when... When the value is less than 1 (i.e., the switching frequency is lower than the resonant frequency), it is determined to be BRR. It is determined to be ARR when the value is not less than 1 (i.e., the switching frequency is not lower than the resonant frequency), where... , For switching frequency, The resonant frequency is then used; subsequently, within the determined frequency region, the specific mode is determined based on the comparison between the normalized output power and the pre-stored mode boundary values of that region: within the BRR, when If the value is less than the boundary value between OPO and OPO modes, it is determined to be OPO mode; otherwise, it is determined to be OPO mode. Within ARR, when... If the value is less than the boundary value between OPO mode and NOP mode, it is determined to be OPO mode; otherwise, it is determined to be NOP mode.
[0028] The mode boundaries (i.e., decision thresholds) used to distinguish adjacent modes are calibrated offline and pre-stored in the controller. The calibration method is as follows: covering the entire input voltage and load range... - In the plane, circuit simulation scanning is used to determine the actual transition trajectories between adjacent modes. Then, least-squares fitting is performed on these trajectories. The boundary between OPO modes in the region below the resonant frequency is fitted using a polynomial function, while the boundary between OPO modes and NOP modes in the region above the resonant frequency is fitted using an exponential function. The coefficient of determination is used to evaluate the goodness of fit. The coefficients of the resulting fitted expression are pre-written into the controller's storage. During online operation, the controller only needs to process the real-time calculated... and By substituting the corresponding boundary expressions into the evaluation and comparison, the mode determination can be completed with minimal computational overhead, without the need for a large two-dimensional lookup table.
[0029] Step S3: Based on the simplified time-domain analysis model, calculate the turn-on time of the synchronous rectifier tube according to the stage sequence corresponding to the identified current operating mode. and shutdown time .
[0030] Specifically, in this step, for the identified operating mode, based on its stage sequence, combined with the aforementioned simplified time-domain analysis model, and supplemented by constraints such as continuous current and voltage at the transition time between adjacent stages, symmetrical waveform within half a cycle, and energy balance within one switching cycle, a system of equations regarding the duration of each stage is established. Then, through appropriate approximation (e.g., approximating the slowly changing current in stage O as constant or linearly changing), the system of equations is solved to finally obtain the synchronous rectifier diode turn-on time. With shutdown time The parsing expression.
[0031] It should be noted that the above solution method is consistent for the three operating modes: OPO, OPOPO, and NOP. In any mode, the synchronous rectifier is only enabled and turned on during the P stage, which transmits the main energy. Therefore, the core of the solution boils down to determining the turn-on and turn-off times of this main energy transmission P stage. The phase angle corresponding to the former is converted to the turn-on time of the synchronous rectifier, and the phase angle corresponding to the latter is converted to its turn-off time. Both are generated based on the primary-side switching signal. The only difference between the three modes is their stage sequence: OPO is OPO, OPOPO is OPOPO, and NOP is NOP. The resulting equations for the duration of each stage differ slightly in the number of terms and boundary conditions, but the simplified time-domain analysis model and approximate solution approach are completely consistent. Given that the OPO mode has the most complex phase sequence and its derivation process covers all the steps required by the other two modes, the following only uses the OPO mode as an example to give a complete set of equations and an approximate solution process. The OPO and NOP modes can be obtained by the same method, and will not be described in detail in this embodiment. For the OPO mode which contains only a single energy transfer P stage, the synchronous rectifier is turned on throughout the P stage, and its turn-on and turn-off times can be degenerate from the above set of equations. For the NOP mode which contains a reverse energy transfer N stage, it is necessary to ensure that the synchronous rectifier remains off during the N stage. This constraint is achieved by synchronizing the turn-off time with the falling edge of the primary side in step S4.
[0032] Taking the OPOPO mode as an example, it is a special operating mode that occurs under light load conditions below the resonant frequency region. This is due to the equivalent parasitic capacitance... Due to its existence, the converter alternates between the O and P phases multiple times within half a switching cycle, sequentially experiencing the first O phase, the first P phase, the second O phase, the second P phase, and the third O phase. Its key waveforms are as follows: Figure 3 As shown in (b) above. The physical processes of each stage are as follows: In the first stage, the primary-side switching transistor... , With the secondary winding on and both synchronous rectifier diodes off, the secondary winding voltage has not yet reached the output clamping level, resulting in the equivalent parasitic capacitance. With resonant inductor Magnetizing inductor The two components resonate together, causing the circuit to exhibit fourth-order characteristics. The secondary current freewheels through the body diode of the synchronous rectifier. The voltage on the plate oscillates from its initial value, and the duration of this phase is from... The charging process determines; when After the voltage rises to the positive clamping level, it enters the first P stage. The body diode of the synchronous rectifier turns on, the secondary winding voltage is clamped by the output voltage, and energy is transferred to the load through the transformer. However, because... Due to its oscillating characteristics, the P-phase is extremely short and transmits limited energy. When the resonant current drops to equal the excitation current again and the secondary current crosses zero, the first P-phase ends and the second O-phase begins. It re-enters resonance, its voltage continues to oscillate, and the primary current continues to... Charge and discharge; when After the voltage reaches the clamping level again, the circuit enters the second P stage, which is the main energy transfer stage within half a switching cycle. This stage lasts for a relatively long time and transfers most of the output energy. When the resonant current is equal to the excitation current again, the second P stage ends, and the circuit enters the third O stage, which continues until the end of half a cycle. Then, it enters the symmetrical operation process of the second half cycle.
[0033] The key characteristic of the OPOPO model is that it is composed of: The first P-stage caused by oscillation is extremely short in duration and transmits limited energy. If the synchronous rectifier is turned on during this stage, it not only contributes little to the efficiency improvement but also increases drive losses due to the additional switching action and may even disrupt the control logic. Therefore, the synchronous rectification strategy of this invention keeps the synchronous rectifier off during the first P-stage, with only its body diode handling the brief freewheeling current. The drive signal of the synchronous rectifier is only enabled during the second P-stage, which is the main energy transmission stage, allowing it to conduct load current with low on-resistance instead of the body diode. This significantly reduces rectification losses without adding unnecessary switching actions.
[0034] Regarding the calculation of conduction time, considering the unique phase sequence of the OPOPO mode, and combining the time-domain expressions of the P and O phases with constraints such as the continuity of current and voltage at the transition time of adjacent phases, waveform symmetry within half a cycle, and energy balance, a set of equations about the duration of each phase is established and solved after reasonable approximations. The specific derivation is as follows.
[0035] First, determine the initial conditions: Unlike the OPO mode, the excitation current slope in the last O stage of the OPO mode is no longer approximately zero. Therefore, assume that the excitation current maintains a linear change in the last O stage and the slope is the same as that in the P stage, and approximate the angle corresponding to the last O stage as π / If -π, then the initial conditions, such as the normalized resonant capacitor voltage and resonant current, at the beginning of the first and last O stages can be uniformly expressed as: ; Inductance ratio , , and These are the normalized switching frequency, normalized output power, and normalized input voltage, respectively. and These are the normalized resonant capacitor voltage and resonant current at the start of the first O phase, respectively. and These are the normalized resonant capacitor voltage and resonant current at the start of the third O phase, respectively.
[0036] Secondly, the total phase angle from the start of the cycle to the end of phase P is defined as follows: It can be represented by the following piecewise function: ; The middle angle and The definition is as follows: ; Furthermore, to avoid the synchronous rectifier diodes turning on erroneously in the first P stage, the starting conditions for the second P stage need to be determined: Assuming that the discharge current of the equivalent parasitic capacitance is approximately zero at the beginning of the second P stage, the normalized resonant capacitor voltage at that moment can be obtained from Kirchhoff's voltage law as follows: ; Based on this definition, the total phase angle from the start of the period to the start of the second P phase is defined. That is, the angle corresponding to the moment when synchronous rectification is turned on, which is determined by simultaneously solving the P-stage time-domain equations and the above initial conditions. It can be solved by the following formula: ; Among auxiliary variables and Represented as: ; ; The unknown current in the above formula With voltage It can be represented as: ; Ultimately, the turn-on time of the synchronous rectifier tube in OPO mode With shutdown time They are respectively: ; Both are based on the primary-side switching signal and are generated by configurable logic blocks after corresponding delays.
[0037] Step S4: The digital controller uses the primary-side switch signal as a reference and determines the activation time. and shutdown time Generate the drive signal for the synchronous rectifier tube.
[0038] In this step, the synchronous rectification drive signal is generated by the configurable logic block (CLB) inside the digital controller in a purely hardware logic manner, and is output after programmable delay and dead-time processing, using the primary-side switching signal as the timing reference. Specifically, the primary-side complementary switching signals S1 (S2) and S4 (S3) are received through the configurable logic block. First, the rising and falling edge pulses of the switching signals are extracted by the edge capture module. Then, the captured edge pulses are input to the pulse delay module for delay processing to generate the turn-off delay time. The delayed signal enters a logic operation module composed of NAND gates and RS flip-flops. The falling edge delayed signal of the primary-side lower transistor S4 (S3) is used to set the S terminal of the RS flip-flop, and the falling edge delayed signal of the primary-side upper transistor S1 (S2) is used to reset the R terminal of the RS flip-flop, thus synthesizing a preliminary synchronous rectification timing signal. Finally, this timing signal is ANDed with the primary-side switching signal, and then further delayed by the turn-on delay module. The final synchronous rectification drive signal Q2(Q1) is obtained, and its signal generation logic is as follows: Figure 4 As shown. It is important to note that this invention ensures that the turn-off time of the synchronous rectifier is strictly synchronized with the falling edge of the primary-side switching signal, thereby guaranteeing that the synchronous rectifier can reliably turn off during the negative energy transfer phase in operating modes including NOP and other N-stage modes, avoiding misleading turn-on by reverse current. Since both calculation and logical judgment are performed at the hardware level, the driving timing is precise, the anti-interference capability is strong, and it does not occupy the processor's real-time interrupt resources.
[0039] Examples and Experimental Verification In one specific embodiment of the present invention, a series half-bridge three-level LLC resonant converter with an input voltage of 875V to 1150V and a rated output power of 3kW is used as an example. Its input side consists of switching transistors... to With voltage divider capacitor , To construct a three-level structure, the transformer uses a turns ratio of... The 1:1 dual-secondary-side parallel structure uses two secondary windings, each driving a synchronous rectifier diode. Digital control is implemented by a digital signal controller, with mode determination and synchronous rectification time calculation performed within its core. The synchronous rectification drive signal is generated in pure hardware by its internal configurable logic block. In this half-bridge three-level topology, the aforementioned stage coefficients... The specific determination is based on the switch state: when , Conductive and , Take 1 when turned off, when , Turn off and , When the circuit is on, the value is 0.
[0040] In the threshold calibration, taking the synchronous rectifier tube used in this embodiment as an example, its output capacitance is approximately 1800pF, and the equivalent parasitic capacitance calculated according to the aforementioned equivalent relationship is approximately 22.58pF; polynomial fitting is used at the OPO and OPOPO mode boundaries in the BRR region to obtain the following boundary function: ; The polynomial fitting determination coefficient of the fitted expression is 0.9969, indicating that the fitted curve closely matches the boundary obtained from the simulation, and can be quickly evaluated online to determine the pattern.
[0041] To illustrate the necessity of accurately identifying the OPO mode in the light load region, a simulation analysis was conducted on the case where the synchronous rectification timing is calculated uniformly according to the OPO mode without identifying the OPO mode: in this case, the synchronous rectifier tube will turn on and off twice within one switching cycle, increasing switching and drive losses.
[0042] Simulations show that, under light load conditions with an input of 875V, the deviation between the synchronous rectification turn-on time obtained by OPO processing and the ideal turn-on time is approximately 0.3 to 0.8 μs, with a relative error of... The absolute error of the synchronous rectification duty cycle obtained by OPO processing is approximately 5% to 15% compared to that obtained by OPO processing. This is particularly significant in the light load region, exceeding 10% at most, where the body diode conduction time increases by approximately 0.2 to 0.5 μs, resulting in additional conduction losses.
[0043] Experimental verification was conducted on the aforementioned prototype. Under steady-state conditions, experimental results for the four operating modes showed that the conduction range of the synchronous rectifier tube basically coincided with the natural flow range of the secondary current. Furthermore, in OPOPO mode, the synchronous rectifier tube indeed conducts only in the second P phase and remains off in the first P phase. Under dynamic conditions such as sudden load changes and sudden input voltage changes, the output voltage remained stable, the synchronous rectification timing smoothly switched with the operating conditions, and it operated without errors. Regarding efficiency, at the typical OPOPO operating point of 900V input and 148W output (corresponding to approximately 0.05 normalized output power), the measured efficiency without distinguishing modes was approximately 93.5%, while after using the OPOPO mode control of this invention, it was approximately 94.7%, an improvement of approximately 1.2 percentage points. In the light load range with lower rated power, the efficiency loss due to not recognizing OPOPO was approximately 0.5% to 1.5%. These results verify the control accuracy and efficiency advantages of this invention in the light load range.
[0044] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described; only preferred embodiments of the present invention are illustrated. The descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the present invention. As long as the combination of these technical features does not contradict each other, it should be considered within the scope of this specification.
[0045] It should be noted that those skilled in the art can make various modifications and improvements without departing from the inventive concept, and these all fall within the scope of protection of this invention. Therefore, the scope of protection of this invention should be determined by the appended claims.
Claims
1. A sensorless synchronous rectification control method for an LLC resonant converter, characterized in that, The method includes the following steps: Step S1: For the LLC resonant converter, establish a simplified time-domain analysis model including parasitic parameters: the distributed parasitic parameters in the converter are equivalent to the equivalent parasitic inductance connected in series in the preceding resonant network. and the equivalent parasitic capacitance connected in parallel across the transformer magnetizing inductance Based on the conduction states of the primary and secondary switching transistors, half a switching cycle is divided into the P stage of positive energy transmission, the O stage of no energy transmission oscillation, and the N stage of negative energy transmission. Step S2: Real-time sampling of input voltage Output voltage and output current Calculate the normalized switching frequency and normalized output power And based on this, identify the current operating mode of the converter; Step S3: Based on the simplified time-domain analysis model, calculate the turn-on time of the synchronous rectifier tube according to the stage sequence corresponding to the identified current operating mode. and shutdown time ; Step S4: The digital controller uses the primary-side switch signal as a reference and determines the activation time accordingly. and shutdown time Generate the drive signal for the synchronous rectifier tube.
2. The method according to claim 1, characterized in that, The equivalent parasitic inductance described in step S1 satisfy: ; in For the primary leakage inductance of the transformer, For secondary side leakage, For magnetizing inductance, The transformer turns ratio; The equivalent parasitic capacitance Determined according to the following equivalence relationship: ; ; in The equivalent winding capacitance of the transformer after conversion is derived from the parasitic capacitance of the transformer winding. , Capacitance between primary and secondary windings Sure, The equivalent junction capacitance of the synchronous rectifier MOSFET; and the equivalent inductance of the resonant network of the P-stage and N-stage. , For a resonant inductor, the corresponding resonant angular frequency is... , It is a resonant capacitor.
3. The method according to claim 2, characterized in that, The simplified time-domain expression for the P stage or the N stage is: ; ; ; in , and The resonant current at the start of the P-stage or N-stage, respectively. Resonant capacitor voltage and excitation current The initial value; For time; stage coefficient The value is either 0 or 1, indicating whether an excitation voltage is applied to the primary side. The value is +1 or -1, with +1 in the P stage and -1 in the N stage.
4. The method according to claim 3, characterized in that, The resonant current in phase O Resonant capacitor voltage Excitation current With equivalent parasitic capacitance voltage The simplified time-domain expression is: ; ; ; ; ; ; ; ; ; ; ; ; ; ; in , , These are the excitation currents at the start of stage O. Resonant capacitor voltage With equivalent parasitic capacitance voltage initial value, and For voltage and current coefficients, and These are the high-frequency resonant angular frequencies and the low-frequency resonant angular frequencies.
5. The method according to claim 1, characterized in that, The operating mode described in step S2 is determined as follows: When the normalized switching frequency When the value is less than 1, the converter is determined to be operating in the BRR region below the resonant frequency; when the normalized switching frequency is less than 1, the converter is determined to be operating in the BRR region below the resonant frequency. When the value is not less than 1, the converter is determined to be operating in the region above the resonant frequency (ARR). Within the defined frequency range, according to the normalized output power The specific operating mode is determined by comparing the results with the predetermined mode boundary values within the region: within the BRR, when If the value is less than the boundary value between OPO mode and OPOPO mode, it is determined to be OPO mode; otherwise, it is determined to be OPO mode. Within the ARR, when If the value is less than the boundary value between OPO mode and NOP mode, it is determined to be OPO mode; otherwise, it is determined to be NOP mode. in , For switching frequency, It is the resonant frequency.
6. The method according to claim 5, characterized in that, The OPOPO mode has a phase sequence of a first O phase, a first P phase, a second O phase, a second P phase, and a third O phase that appear sequentially within half a switching cycle; in steps S3 and S4, when the identified operating mode is the OPOPO mode, the digital controller calculates the turn-on and turn-off times of the synchronous rectifier tube using the second P phase as the main energy transmission phase, and generates a drive signal for the synchronous rectifier tube accordingly, so that the synchronous rectifier tube remains off in the first P phase and is only enabled and turned on in the second P phase.
7. The method according to claim 1, characterized in that, In step S3, for each identified operating mode, based on its stage sequence, and combining the simplified time-domain analysis model with the continuity, waveform symmetry, and power balance constraints of stage transitions, a set of equations regarding the duration of each stage is established. These equations are then solved through approximation to obtain the equations used to calculate the activation time. and shutdown time The analytical expression; the approximation process includes approximating the current in phase O as constant or linearly varying.
8. The method according to claim 5, characterized in that, The identification of the operating mode in step S2 is based on a pre-stored mode boundary: the mode boundary is determined by offline simulation and obtained by fitting a polynomial or exponential function, and its fitting expression is pre-stored in the digital controller; during online operation, the digital controller will calculate the normalized switching frequency in real time. With the normalized output power Substitute the fitted expression into the equation, evaluate and compare the results to determine the current working mode.
9. The method according to claim 1, characterized in that, Step S4 includes: capturing the rising and falling edges of the primary-side switching signal by a configurable logic block inside the digital controller; and delaying the falling edge signal by the turn-off time. An intermediate signal is then obtained; the intermediate signal is then delayed by the activation time. The synchronous rectifier is driven by a combination of logic gates; the turn-off time of the synchronous rectifier is synchronized with the falling edge of the primary-side switch signal, so that the synchronous rectifier is turned off in the negative energy transfer phase in the N-stage operating mode.
10. A sensorless synchronous rectification control system for an LLC resonant converter, characterized in that, It includes an LLC resonant converter main circuit and a digital controller; the LLC resonant converter main circuit includes an input-side switching transistor and a resonant inductor. and resonant capacitor The resonant network, transformer, and secondary rectifier circuit composed of synchronous rectifier tubes constitute the structure; the digital controller is configured to perform the method as described in any one of claims 1 to 9, and the digital controller generates the drive signal for the synchronous rectifier tubes through its internal configurable logic blocks.
Citation Information
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