Phase-locked loop based down-conversion circuit, down-conversion processing method and electronic device

Abstract

This invention provides a downconversion circuit, a downconversion processing method, and an electronic device based on a phase-locked loop (PLL). The downconversion circuit includes: a PLL chip, comprising a first input terminal for receiving an external radio frequency (RF) signal and a second input terminal for receiving a feedback signal, wherein the feedback signal includes the output frequency of a local voltage-controlled oscillator (VCO); and a local VCO, the output terminal of which is connected to the second input terminal of the PLL chip. The PLL chip uses an internal locking mechanism to enable the output frequency of the local VCO to track the external RF signal, thereby achieving downconversion processing of the external RF signal. This invention effectively simplifies the downconversion architecture and reduces component costs.

Description

Technical Field

[0001] This invention relates to the field of frequency conversion technology, and in particular to a downconversion circuit, downconversion processing method, and electronic device based on a phase-locked loop. Background Technology

[0002] Downconversion is a core function in communication receivers and frequency measurement equipment. Its purpose is to convert high-frequency radio frequency signals (such as the GHz band) to lower intermediate frequencies or baseband frequencies, which facilitates subsequent amplification, filtering, digitization and other processing.

[0003] According to relevant technologies, current downconversion often employs a traditional superheterodyne architecture. This traditional architecture uses a mixer to multiply the RF signal and the local oscillator signal, generating sum and difference frequency components, which are then filtered to obtain the intermediate frequency (IF) signal. This approach requires a mixer and an independent IF source, resulting in complex circuitry, numerous components, high cost, and high power consumption. Alternatively, a zero-IF or direct downconversion architecture can be used, setting the IF frequency to equal the carrier frequency to directly downconvert the RF signal to baseband. While this simplifies IF processing, it still cannot eliminate the need for a mixer and introduces inherent problems such as IF leakage, DC offset, and even-order distortion.

[0004] Therefore, finding a simplified downconversion architecture and reducing component costs has become a current research hotspot. Summary of the Invention

[0005] This invention provides a downconversion circuit, downconversion processing method, and electronic device based on a phase-locked loop (PLL) to solve the defects of existing downconversion processing, which requires the use of a mixer, has complex circuits, and is costly. It effectively simplifies the downconversion architecture and reduces component costs.

[0006] This invention provides a downconversion circuit based on a phase-locked loop (PLL). The downconversion circuit includes: a PLL chip, comprising a first input terminal for receiving an external radio frequency (RF) signal and a second input terminal for receiving a feedback signal, wherein the feedback signal includes the output frequency of a local voltage-controlled oscillator (VCO); and a local VCO, the output terminal of which is connected to the second input terminal of the PLL chip. The PLL chip uses an internal locking mechanism to enable the output frequency of the local VCO to track the external RF signal, thereby achieving downconversion processing of the external RF signal.

[0007] According to a phase-locked loop (PLL)-based downconversion circuit provided by the present invention, the PLL chip further includes a voltage-controlled output terminal, a frequency-phase detector, and a charge pump, wherein the voltage-controlled output terminal is connected to the control terminal of the local voltage-controlled oscillator (VCO). The PLL chip achieves the following method to enable the output frequency of the local VCO to track the external radio frequency (RF) signal through an internal locking mechanism: the frequency-phase detector compares the phase difference between the external RF signal input to the first input terminal and the output frequency of the local VCO input to the second input terminal; based on the phase difference, the charge pump outputs a voltage signal and / or current signal matching the phase difference; the voltage signal and / or current signal are transmitted to the control terminal of the local VCO through the voltage-controlled output terminal, and the output frequency of the local VCO is adjusted according to the voltage signal and / or current signal based on the control terminal, so that the output frequency of the local VCO tracks the external RF signal.

[0008] According to the present invention, a downconversion circuit based on a phase-locked loop is provided, the downconversion circuit further includes a loop filter, wherein the loop filter is connected between the voltage-controlled output terminal of the phase-locked loop chip and the control terminal of the local voltage-controlled oscillator.

[0009] According to the present invention, a downconversion circuit based on a phase-locked loop is provided, wherein the phase-locked loop chip includes an RF phase-locked loop chip having an external first input terminal.

[0010] According to the present invention, a downconversion circuit based on a phase-locked loop is provided, wherein the local voltage-controlled oscillator includes any one or more of the following: a voltage-controlled crystal oscillator, a temperature-compensated voltage-controlled crystal oscillator, a voltage-controlled oscillator, a chip that relies on analog frequency conversion or digital frequency conversion function, and components that rely on analog frequency conversion or digital frequency conversion function.

[0011] According to the present invention, a downconversion circuit based on a phase-locked loop is provided, wherein the external radio frequency signal and the output frequency of the local voltage-controlled oscillator have a preset fixed frequency division ratio, wherein the preset fixed frequency division ratio is greater than or equal to 1.

[0012] The present invention also provides a downconversion processing method, which is applied to any of the downconversion circuits based on phase-locked loops described in the present invention. The method includes: connecting an external radio frequency signal to the first input terminal of a phase-locked loop chip; and using the internal locking mechanism of the phase-locked loop chip to make the output frequency of a local voltage-controlled oscillator track the external radio frequency signal, so as to realize downconversion processing of the external radio frequency signal.

[0013] According to a downconversion processing method provided by the present invention, the output frequency of a local voltage-controlled oscillator tracks an external radio frequency signal through the internal locking mechanism of the phase-locked loop (PLL) chip to achieve downconversion processing of the external radio frequency signal. This is achieved in the following manner: the phase difference between the external radio frequency signal input to the first input terminal and the output frequency of the local voltage-controlled oscillator input to the second input terminal of the PLL chip is compared using a phase-frequency discriminator of the PLL chip; based on the phase difference, a voltage signal and / or current signal matching the phase difference is output by a charge pump of the PLL chip; the voltage signal and / or current signal are transmitted to the control terminal of the local voltage-controlled oscillator through the voltage-controlled output terminal of the PLL chip, and the output frequency of the local voltage-controlled oscillator is adjusted according to the voltage signal and / or current signal based on the control terminal, so that the output frequency of the local voltage-controlled oscillator tracks the external radio frequency signal to achieve downconversion processing of the external radio frequency signal.

[0014] The present invention also provides a downconversion processing device, characterized in that the downconversion processing device is applied to any of the downconversion circuits based on phase-locked loops as described in any one of the claims, the device comprising: an access module for accessing an external radio frequency signal to the first input terminal of a phase-locked loop chip; and a processing module for enabling the output frequency of a local voltage-controlled oscillator to track the external radio frequency signal through the internal locking mechanism of the phase-locked loop chip, thereby realizing downconversion processing of the external radio frequency signal.

[0015] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the downconversion processing method as described above.

[0016] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the down-conversion processing method as described above.

[0017] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the downconversion processing method as described above.

[0018] This invention provides a downconversion circuit, downconversion processing method, and electronic device based on a phase-locked loop (PLL). The downconversion circuit includes: a PLL chip with a first input terminal for receiving external radio frequency (RF) signals and a second input terminal for receiving feedback signals, wherein the feedback signal includes the output frequency of a local voltage-controlled oscillator (VCO); and a local VCO, the output terminal of which is connected to the second input terminal of the PLL chip. The PLL chip uses an internal locking mechanism to enable the output frequency of the local VCO to track the external RF signal, thereby achieving downconversion processing of the external RF signal. This invention effectively simplifies the downconversion architecture and reduces component costs. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0020] Figure 1 This is a schematic diagram of the downconverter circuit based on a phase-locked loop provided by the present invention.

[0021] Figure 2 This is a schematic diagram illustrating how the phase-locked loop chip provided by the present invention enables the output frequency of the local voltage-controlled oscillator to track the external radio frequency signal through an internal locking mechanism.

[0022] Figure 3 This is a schematic diagram of an application scenario for the downconversion circuit based on a phase-locked loop provided by the present invention.

[0023] Figure 4 This is a flowchart illustrating the down-conversion processing method provided by the present invention.

[0024] Figure 5 This is a schematic diagram of the downconversion processing device provided by the present invention.

[0025] Figure 6 This is a schematic diagram of the structure of the electronic device provided by the present invention.

[0026] Figure label: 100: Downconverter circuit based on phase-locked loop; 110: Phase-locked loop chip; 120: Local voltage-controlled oscillator; 1101: First input terminal; 1102: Second input terminal; 1201: Output terminal of the local voltage-controlled oscillator. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0028] The phase-locked loop (PLL)-based downconversion circuit provided by this invention connects the first input terminal of the PLL chip to an external RF input and the second input terminal to the output of a local voltage-controlled oscillator. This completely overturns the conventional use of PLL chips, reshaping the PLL chip from a "frequency generator" to a "frequency tracker," achieving a downconversion architecture that eliminates the need for a mixer, simplifying the circuit and reducing costs.

[0029] Figure 1 This is a schematic diagram of the downconverter circuit based on a phase-locked loop provided by the present invention.

[0030] The following will combine Figure 1 The structure of the downconverter circuit based on phase-locked loop provided by the present invention will be described.

[0031] In an exemplary embodiment of the present invention, combined with Figure 1 As can be seen, the downconverter circuit 100 based on phase-locked loop may include a phase-locked loop chip 110 and a local voltage-controlled oscillator 120. Each module will be described in detail below.

[0032] The phase-locked loop chip 110 may include a first input terminal 1101 for receiving external radio frequency signals and a second input terminal 1102 for receiving feedback signals, wherein the feedback signals include the output frequency of a local voltage-controlled oscillator; The output terminal 1201 of the local voltage-controlled oscillator is connected to the second input terminal 1102 of the phase-locked loop chip 110. The phase-locked loop chip 110 uses an internal locking mechanism to enable the output frequency of the local voltage-controlled oscillator 120 to track the external radio frequency signal, thereby achieving down-conversion processing of the external radio frequency signal.

[0033] In one embodiment, the phase-locked loop chip 110 (which may be denoted as U13) may be a TI LMX2492 PLL chip, which has a first input terminal 1101 (i.e., the VCO_Pin terminal, usually labeled VCO), a second input terminal 1102 (Fin terminal), and a voltage-controlled output terminal (CPout terminal). The first input terminal 1101 is used to receive an external radio frequency signal RF_in from an antenna or preamplifier output, the frequency of which may be, for example, 2.4 GHz.

[0034] In another embodiment, the local voltage-controlled oscillator 120 (which can be represented as VCO1) uses a commercially available voltage-controlled oscillator module. The output terminal 1201 of the local voltage-controlled oscillator is connected to the second input terminal 1102 (Fin terminal) of the phase-locked loop chip U13. The voltage-controlled output terminal (CPout terminal) of the phase-locked loop chip 110 can be connected to the control terminal of the local voltage-controlled oscillator 120 after passing through a second-order passive loop filter composed of resistors and capacitors. The reference input terminal (OSCin terminal) of the phase-locked loop chip 110 can be connected to a 10MHz temperature-compensated crystal oscillator (TCXO) to provide a reference clock for the internal frequency and phase detector of the chip.

[0035] In application, the external radio frequency signal directly enters the first input terminal 1101 of the phase-locked loop (PLL) chip 110, and the output of the local voltage-controlled oscillator (VCO) 120 (e.g., with an initial free oscillation frequency of approximately 10MHz) enters the second input terminal 1102 of the PLL chip 110. The phase-frequency discriminator inside the PLL chip 110 compares the phase difference between the VCO signal and the Fin signal. The charge pump outputs a corresponding current pulse based on the phase difference. This current is smoothed into a DC voltage by a loop filter and then controls the oscillation frequency of the local VCO 120. The loop eventually locks, causing the output frequency of the local VCO 120 to track the external radio frequency signal, thus achieving down-conversion processing of the external radio frequency signal. In other words, the adjusted output frequency of the local VCO 120 is the down-converted signal.

[0036] Traditional downconversion requires a mixer. This embodiment completely eliminates the need for a mixer by revolutionizing the use of the phase-locked loop chip 110, achieving architectural simplification. In this embodiment, the mixer and its associated filtering and matching circuits are omitted, significantly reducing costs.

[0037] This invention provides a downconversion circuit based on a phase-locked loop (PLL), comprising: a PLL chip, including a first input terminal for receiving an external radio frequency (RF) signal and a second input terminal for receiving a feedback signal, wherein the feedback signal includes the output frequency of a local voltage-controlled oscillator (VCO); and a local VCO, the output terminal of which is connected to the second input terminal of the PLL chip. The PLL chip uses an internal locking mechanism to enable the output frequency of the local VCO to track the external RF signal, thereby achieving downconversion processing of the external RF signal. This invention effectively simplifies the downconversion architecture and reduces component costs.

[0038] Figure 2 This is a schematic diagram illustrating how the phase-locked loop chip provided by the present invention enables the output frequency of the local voltage-controlled oscillator to track the external radio frequency signal through an internal locking mechanism.

[0039] The following will combine Figure 2The process by which the phase-locked loop chip provided by the present invention enables the output frequency of the local voltage-controlled oscillator to track the external radio frequency signal through an internal locking mechanism is described.

[0040] In an exemplary embodiment of the present invention, the phase-locked loop chip 110 further includes a voltage-controlled output terminal, a frequency and phase detector, and a charge pump, wherein the voltage-controlled output terminal is connected to the control terminal of the local voltage-controlled oscillator 120; combined with Figure 2 As can be seen, the phase-locked loop chip can make the output frequency of the local voltage-controlled oscillator track the external radio frequency signal through the internal locking mechanism, which may include steps 210 to 230. Each step will be described below.

[0041] In step 210, the phase difference between the external radio frequency signal input to the first input terminal and the output frequency of the local voltage-controlled oscillator input to the second input terminal is compared by a frequency and phase detector.

[0042] In one embodiment, the phase-locked loop chip 110 has a first input terminal 1101, a second input terminal 1102, a reference input terminal (OSCin), and a voltage-controlled output terminal (CPout). The chip integrates a frequency-phase detector (PFD) and a charge pump. During application, the PFD compares in real time the external radio frequency signal RF_in input to the first input terminal (VCO_Pin) and the output signal (corresponding to the output frequency) of the local voltage-controlled oscillator 120 input to the second input terminal (Fin). The PFD detects the phase difference between these two signals; it can be understood that when the frequencies are different, this phase difference changes over time, which is equivalent to frequency difference information.

[0043] In step 220, based on the phase difference, a voltage signal and / or current signal matching the phase difference is output by a charge pump.

[0044] In one embodiment, the charge pump can output a voltage and / or current signal that matches the phase difference detected by a phase detector. For example, if the output signal of the local voltage-controlled oscillator 120 lags behind the external radio frequency signal, the charge pump outputs a positive current pulse; if the output signal of the local voltage-controlled oscillator 120 leads the external radio frequency signal, the charge pump outputs a negative current pulse; if the phase difference is zero (locked state), the charge pump outputs a high-impedance state with no net current output.

[0045] In step 230, the voltage signal and / or current signal are transmitted to the control terminal of the local voltage-controlled oscillator through the voltage-controlled output terminal, and the output frequency of the local voltage-controlled oscillator is adjusted according to the voltage signal and / or current signal based on the control terminal, so that the output frequency of the local voltage-controlled oscillator tracks the external radio frequency signal.

[0046] In another embodiment, the phase-locked loop chip 110 directly transmits the voltage and / or current signals output by the charge pump to the control terminal of the local voltage-controlled oscillator 120 via its voltage-controlled output terminal (CPout). The control terminal of the local voltage-controlled oscillator 120 adjusts its oscillation frequency in real time based on the received voltage and / or current signals: when the control voltage increases, the output frequency of the local voltage-controlled oscillator 120 increases; when the control voltage decreases, the output frequency of the local voltage-controlled oscillator 120 decreases.

[0047] Through the aforementioned continuous comparison → output → adjustment closed-loop process, the output frequency of the local voltage-controlled oscillator 120 is continuously corrected until its frequency and phase match the external radio frequency signal RF_in. At this point, the loop is locked, achieving precise tracking of the local voltage-controlled oscillator's output frequency to the external radio frequency signal. This output frequency signal is the output signal after down-conversion processing.

[0048] In this embodiment, by using the frequency and phase detector and charge pump inside the phase-locked loop (PLL) chip in reverse, with an external radio frequency signal as the reference input and the output of the local voltage-controlled oscillator (VCO) as the feedback input, and by directly controlling the local VCO using the charge pump output, the technical constraint of relying on a mixer in traditional down-conversion is completely eliminated. In this embodiment, the PLL chip itself acts as a "comparator + controller," greatly simplifying the circuit structure.

[0049] Figure 3 This is a schematic diagram of an application scenario for the downconversion circuit based on a phase-locked loop provided by the present invention.

[0050] The following will combine Figure 3 The application process of the phase-locked loop-based downconversion circuit provided by this invention will be described.

[0051] In one embodiment, combined with Figure 3 As can be seen, the downconversion circuit based on a phase-locked loop (PLL) includes a PLL chip U13 and a local voltage-controlled oscillator (VCO) X1. The PLL chip U13 has a first input terminal (VCO terminal), a second input terminal (Fin terminal), and a voltage-controlled output terminal (CPout terminal). The output terminal of the local VCO X1 is connected to the second input terminal (Fin terminal) of the PLL chip U13. The first input terminal (VCO terminal) of the PLL chip U13 is used to input an external radio frequency (RF) signal RF_in. The VCO output terminal (CPout terminal) of the PLL chip U13 is directly connected to the control terminal of the local VCO X1. Through an internal locking mechanism, the PLL chip U13 enables the output frequency of the local VCO X1 to track the external RF signal RF_in, thus achieving downconversion.

[0052] In yet another embodiment, the phase-locked loop-based downconversion circuit further includes a loop filter (corresponding to...). Figure 3The content within the dashed box in the diagram is connected between the voltage-controlled output terminal of the phase-locked loop chip U13 and the control terminal of the local voltage oscillator X1.

[0053] During application, the external RF signal RF_in is input to the VCO input of the phase-locked loop (PLL) chip U13; the output of the local voltage-controlled oscillator (VCO) X1 is input to the Fin input of the PLL chip U13; the phase-frequency detector (PFD) inside the PLL chip U13 compares the phase difference between the VCO input signal (RF_in) and the Fin input signal (U13 output); based on the phase difference, the charge pump outputs the corresponding current / voltage signal; the charge pump output controls the oscillation frequency of the local VCO X1 through a loop filter; the output of the local VCO X1 is adjusted so that its phase gradually approaches the RF_in signal; when the output frequency and phase of the local VCO X1 are consistent with the RF_in signal, the loop is locked; the output of the local VCO X1 is the down-converted signal.

[0054] In another exemplary embodiment of the present invention, the downconverter circuit 100 further includes a loop filter, wherein the loop filter is connected between the voltage-controlled output terminal of the phase-locked loop chip 110 and the control terminal of the local voltage-controlled oscillator 120.

[0055] In one embodiment, a loop filter can be connected between the voltage-controlled output terminal of the phase-locked loop chip 110 and the control terminal of the local voltage-controlled oscillator 120. The loop filter can be a second-order passive low-pass filter structure, consisting of a series resistor and a parallel capacitor, or a third-order or higher-order active filter, depending on actual needs.

[0056] During application, when the charge pump inside the phase-locked loop chip 110 outputs a current pulse signal that varies with the phase difference, this current pulse first enters the loop filter. The loop filter integrates and smooths the current pulse, filtering out high-frequency components and switching noise, converting it into a smooth, continuous DC voltage signal. This smoothed DC voltage signal is then applied to the control terminal of the local voltage-controlled oscillator 120, thereby controlling the output frequency of the local voltage-controlled oscillator 120.

[0057] In yet another exemplary embodiment of the present invention, the phase-locked loop chip may include an radio frequency phase-locked loop chip having an external first input terminal.

[0058] In one embodiment, a radio frequency phase-locked loop (PLL) chip with an external first input terminal refers to a PLL chip specifically designed for signal processing within the radio frequency frequency range. Its chip package has an independent input pin that can be directly connected to external radio frequency signals. This pin is directly connected to one input terminal of a frequency and phase detector inside the chip, unlike conventional PLL chips where this pin only serves as the output or feedback channel of the internal VCO.

[0059] In this embodiment, an RF phase-locked loop chip with an external first input terminal is used. The first input terminal is specially designed with wide bandwidth, low noise, and high input impedance, which can directly access external RF signals with frequencies up to several GHz or even tens of GHz without additional pre-amplification, buffering, or frequency division circuits, thereby simplifying circuit design and reducing noise and distortion introduced by the signal chain.

[0060] In another exemplary embodiment of the present invention, the local voltage-controlled oscillator may include any one or more of the following: a voltage-controlled crystal oscillator, a temperature-compensated voltage-controlled crystal oscillator, a voltage-controlled oscillator, a chip that relies on analog frequency conversion or digital frequency conversion function, and a component that relies on analog frequency conversion or digital frequency conversion function.

[0061] In one embodiment, the local voltage-controlled oscillator can be a voltage-controlled crystal oscillator (VCXO), a temperature-compensated crystal oscillator (TCXO), a voltage-controlled oscillator (VCO), or a numerically controlled oscillator (NCO). Components relying on analog or digital frequency conversion functions can include a digital frequency converter (DDS), a phase micrometer, etc., and the local voltage-controlled oscillator can also be a frequency source with voltage-controlled characteristics. In this embodiment, the specific form of the local voltage-controlled oscillator is not limited.

[0062] In another exemplary embodiment of the present invention, the external radio frequency signal and the output frequency of the local voltage-controlled oscillator have a preset fixed division ratio, which is greater than or equal to 1. Specifically, when the frequency range of the external radio frequency signal is 10MHz to 10GHz, the output frequency range of the local voltage-controlled oscillator can be approximately 10MHz.

[0063] As described above, this invention provides a downconversion circuit based on a phase-locked loop (PLL). The downconversion circuit includes: a PLL chip, comprising a first input terminal for receiving external radio frequency (RF) signals and a second input terminal for receiving feedback signals, wherein the feedback signal includes the output frequency of a local voltage-controlled oscillator (VCO); and a local VCO, the output terminal of which is connected to the second input terminal of the PLL chip. The PLL chip uses an internal locking mechanism to enable the output frequency of the local VCO to track the external RF signal, thereby achieving downconversion processing of the external RF signal. This invention effectively simplifies the downconversion architecture and reduces component costs.

[0064] Based on the same inventive concept, the present invention also provides a down-conversion processing method. Figure 4 This is a flowchart illustrating the down-conversion processing method provided by the present invention. The following will combine... Figure 4 The process of the downconversion processing method provided by the present invention will be described.

[0065] In yet another exemplary embodiment of the present invention, the down-conversion processing method can be applied to a down-conversion circuit based on a phase-locked loop, combined with... Figure 4 As can be seen, the downconversion processing method may include steps 410 to 420, and each step will be described below.

[0066] In step 410, an external radio frequency signal is connected to the first input terminal of the phase-locked loop chip.

[0067] In step 420, the output frequency of the local voltage-controlled oscillator is made to track the external radio frequency signal through the internal locking mechanism of the phase-locked loop chip, so as to realize the down-conversion processing of the external radio frequency signal.

[0068] In one embodiment, the high-frequency radio frequency signal to be processed (e.g., a GHz band signal from an antenna, preamplifier, or frequency source) can be directly connected to the first input terminal of the phase-locked loop (PLL) chip. This first input terminal is a pin on the PLL chip specifically designed for receiving external signals, and it is directly connected to the circuit without passing through any mixer or prescaler.

[0069] Furthermore, upon receiving an external radio frequency (RF) signal, the phase-locked loop (PLL) chip activates its internal closed-loop tracking mechanism. The integrated phase-frequency detector (PFD) within the PLL chip continuously compares the phase (or frequency) difference between two input signals: one from the external RF signal at the first input terminal, and the other from the output signal of the local voltage-controlled oscillator (VCO) at the second input terminal. Based on the phase difference, the charge pump within the PLL chip outputs a corresponding voltage and / or current signal. This signal is output via the voltage-controlled output terminal of the PLL chip and applied directly or after passing through a loop filter to the control terminal of the local VCO. The local VCO adjusts its output frequency in real time according to the control voltage, ensuring that the frequency and phase of its output signal continuously approximate the external RF signal.

[0070] After a closed-loop negative feedback automatic adjustment process, the loop eventually enters a locked state. In the locked state, the output frequency of the local voltage-controlled oscillator precisely tracks the frequency of the external radio frequency signal (the two frequencies are equal and the phase difference is constant). At this point, the down-converted signal can be obtained from the output of the local voltage-controlled oscillator.

[0071] In this embodiment, the frequency conversion process, which originally required a mixer, is replaced by the frequency tracking function of the phase-locked loop chip. The output signal of the local voltage-controlled oscillator is synchronized with the external RF signal in frequency, thus enabling subsequent operations such as counting, demodulation, or measurement. Compared to traditional solutions that must use a mixer, this method achieves down-conversion without requiring a mixer at all.

[0072] In another exemplary embodiment of the present invention, the output frequency of the local voltage-controlled oscillator tracks the external radio frequency signal through the internal locking mechanism of the phase-locked loop chip, thereby achieving down-conversion processing of the external radio frequency signal. This can be achieved in the following manner: The phase-locked loop chip uses a frequency and phase detector to compare the phase difference between the external radio frequency signal input to the first input terminal and the output frequency of the local voltage-controlled oscillator input to the second input terminal of the phase-locked loop chip. Based on the phase difference, the charge pump of the phase-locked loop chip outputs a voltage signal and / or current signal that matches the phase difference; The voltage signal and / or current signal are transmitted to the control terminal of the local voltage-controlled oscillator through the voltage-controlled output terminal of the phase-locked loop chip. Based on the control terminal, the output frequency of the local voltage-controlled oscillator is adjusted according to the voltage signal and / or current signal, so that the output frequency of the local voltage-controlled oscillator tracks the external radio frequency signal, thereby realizing the down-conversion processing of the external radio frequency signal.

[0073] In one embodiment, the phase-locked loop (PLL) chip has a first input terminal, a second input terminal, a reference input terminal (OSCin), and a voltage-controlled output terminal (CPout). The chip integrates a phase-frequency detector (PFD) and a charge pump. During application, the PFD compares in real time the external radio frequency signal RF_in input to the first input terminal (VCO_Pin) and the output signal (corresponding to the output frequency) of the local voltage-controlled oscillator input to the second input terminal (Fin). The PFD detects the phase difference between these two signals; it can be understood that when the frequencies are different, this phase difference changes over time, which is equivalent to frequency difference information.

[0074] Furthermore, based on the phase difference detected by the phase-frequency discriminator, the charge pump outputs a voltage and / or current signal that matches the phase difference. The phase-locked loop chip transmits the voltage and / or current signal output by the charge pump directly to the control terminal of the local voltage-controlled oscillator (VCO) through its voltage-controlled output (CPout). The control terminal of the local VCO adjusts its oscillation frequency in real time according to the received voltage and / or current signals.

[0075] Through the continuous comparison → output → adjustment closed-loop process described above, the output frequency of the local voltage-controlled oscillator is continuously corrected until its frequency and phase match the external radio frequency signal RF_in. At this point, the loop is locked, achieving precise tracking of the local voltage-controlled oscillator's output frequency to the external radio frequency signal. This output frequency signal is the output signal after down-conversion processing.

[0076] As described above, the downconversion processing method provided by this invention completely eliminates the need for a mixer by fundamentally changing the usage of phase-locked loop (PLL) chips, thus achieving architectural simplification. Only one PLL chip, one local voltage-controlled oscillator, and a small number of external components are required to achieve downconversion of high-frequency external RF signals, drastically reducing the number of components.

[0077] The down-conversion processing apparatus provided by the present invention is described below. The down-conversion processing apparatus described below can be referred to in correspondence with the down-conversion processing method described above.

[0078] Figure 5 This is a schematic diagram of the downconversion processing device provided by the present invention.

[0079] The following will combine Figure 5 The structure of the downconversion processing device provided by the present invention will be described.

[0080] In an exemplary embodiment of the present invention, the downconversion processing device can be applied to a downconversion circuit based on a phase-locked loop. Combined with... Figure 5 As can be seen, the downconversion processing device may include an access module 510 and a processing module 520, and each module will be described in detail below.

[0081] The access module 510 can be configured to connect an external radio frequency signal to the first input terminal of the phase-locked loop chip. The processing module 520 can be configured to enable the output frequency of the local voltage-controlled oscillator to track the external radio frequency signal through the internal locking mechanism of the phase-locked loop chip, so as to achieve down-conversion processing of the external radio frequency signal.

[0082] In an exemplary embodiment of the present invention, the processing module 520 may implement the following method to enable the output frequency of the local voltage-controlled oscillator to track the external radio frequency signal through the internal locking mechanism of the phase-locked loop chip, thereby achieving down-conversion processing of the external radio frequency signal: The phase-locked loop chip uses a frequency and phase detector to compare the phase difference between the external radio frequency signal input to the first input terminal and the output frequency of the local voltage-controlled oscillator input to the second input terminal of the phase-locked loop chip. Based on the phase difference, the charge pump of the phase-locked loop chip outputs a voltage signal and / or current signal that matches the phase difference; The voltage signal and / or current signal are transmitted to the control terminal of the local voltage-controlled oscillator through the voltage-controlled output terminal of the phase-locked loop chip. Based on the control terminal, the output frequency of the local voltage-controlled oscillator is adjusted according to the voltage signal and / or current signal, so that the output frequency of the local voltage-controlled oscillator tracks the external radio frequency signal, thereby realizing the down-conversion processing of the external radio frequency signal.

[0083] Figure 6 An example is a schematic diagram of the physical structure of an electronic device, such as... Figure 6 As shown, the electronic device may include: a processor 610, a communication interface 620, a memory 630, and a communication bus 640, wherein the processor 610, the communication interface 620, and the memory 630 communicate with each other through the communication bus 640. The processor 610 can call logic instructions in the memory 630 to execute a downconversion processing method. The downconversion processing method is applied to any of the phase-locked loop-based downconversion circuits described above. The method includes: connecting an external radio frequency signal to the first input terminal of the phase-locked loop chip; and using the internal locking mechanism of the phase-locked loop chip to make the output frequency of the local voltage-controlled oscillator track the external radio frequency signal, thereby realizing the downconversion processing of the external radio frequency signal.

[0084] Furthermore, the logical instructions in the aforementioned memory 630 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0085] On the other hand, the present invention also provides a computer program product, which includes a computer program that can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the downconversion processing method provided by the above methods. The downconversion processing method is applied to any of the phase-locked loop-based downconversion circuits described in any one of the above methods. The method includes: connecting an external radio frequency signal to the first input terminal of a phase-locked loop chip; and using the internal locking mechanism of the phase-locked loop chip to make the output frequency of a local voltage-controlled oscillator track the external radio frequency signal, so as to realize the downconversion processing of the external radio frequency signal.

[0086] In another aspect, the present invention also provides a non-transitory computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the downconversion processing method provided by the above methods. The downconversion processing method is applied to any of the phase-locked loop-based downconversion circuits described in any one of the claims. The method includes: connecting an external radio frequency signal to a first input terminal of a phase-locked loop chip; and using the internal locking mechanism of the phase-locked loop chip to make the output frequency of a local voltage-controlled oscillator track the external radio frequency signal, thereby realizing downconversion processing of the external radio frequency signal.

[0087] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0088] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0089] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A phase-locked loop based frequency down conversion circuit, characterized by, The down-conversion circuit comprises: a phase-locked loop chip comprising a first input end for receiving an external radio frequency signal and a second input end for receiving a feedback signal, wherein the feedback signal comprises an output frequency of a local voltage-controlled oscillator; a local voltage-controlled oscillator, an output end of the local voltage-controlled oscillator being connected to the second input end of the phase-locked loop chip, wherein the phase-locked loop chip makes the output frequency of the local voltage-controlled oscillator track the external radio frequency signal through an internal locking mechanism to realize down-conversion processing of the external radio frequency signal.

2. The phase-locked loop based frequency down conversion circuit of claim 1, wherein, The phase-locked loop chip further comprises a voltage-controlled output end, a frequency and phase discriminator, and a charge pump, wherein the voltage-controlled output end is connected to a control end of the local voltage-controlled oscillator; the phase-locked loop chip makes the output frequency of the local voltage-controlled oscillator track the external radiofrequency signal through the internal locking mechanism in the following manner: the frequency and phase discriminator compares a phase difference between the external radio frequency signal input to the first input end and the output frequency of the local voltage-controlled oscillator input to the second input end; the charge pump outputs a voltage signal and / or a current signal matched with the phase difference based on the phase difference; the voltage signal and / or the current signal are transmitted to the control end of the local voltage-controlled oscillator through the voltage-controlled output end, and the output frequency of the local voltage-controlled oscillator is adjusted based on the control end according to the voltage signal and / or the current signal, so that the output frequency of the local voltage-controlled oscillator tracks the external radio frequency signal.

3. The phase-locked loop based frequency down conversion circuit of claim 2, wherein, The down-conversion circuit further comprises a loop filter, wherein the loop filter is connected between the voltage-controlled output end of the phase-locked loop chip and the control end of the local voltage-controlled oscillator.

4. The phase-locked loop based frequency down conversion circuit of any one of claims 1 to 3, wherein, The phase-locked loop chip comprises a radio frequency phase-locked loop chip with an external first input end.

5. The phase-locked loop based frequency down conversion circuit of any one of claims 1 to 3, wherein, The local voltage-controlled oscillator comprises any one or several of a voltage-controlled crystal oscillator, a temperature-compensated voltage-controlled crystal oscillator, a voltage-controlled oscillator, a chip relying on an analog frequency conversion or digital frequency conversion function, and a component relying on an analog frequency conversion or digital frequency conversion function.

6. The phase-locked loop based frequency down conversion circuit of claim 1, wherein, The external radio frequency signal and the output frequency of the local voltage-controlled oscillator have a preset fixed frequency division ratio, and the preset fixed frequency division ratio is greater than or equal to 1.

7. A down-conversion processing method, characterized by, The down-conversion processing method is applied to the phase-locked loop-based down-conversion circuit according to any one of claims 1 to 6, and the method comprises: inputting an external radio frequency signal to a first input end of a phase-locked loop chip; making an output frequency of a local voltage-controlled oscillator track the external radio frequency signal through an internal locking mechanism of the phase-locked loop chip to realize down-conversion processing of the external radio frequency signal.

8. The down-conversion processing method of claim 7, wherein, The making of the output frequency of the local voltage-controlled oscillator track the external radio frequency signal through the internal locking mechanism of the phase-locked loop chip to realize the down-conversion processing of the external radio frequency signal is realized in the following manner: a frequency and phase discriminator of the phase-locked loop chip compares a phase difference between the external radio frequency signal input to the first input end and the outputfrequency of the local voltage-controlled oscillator input to a second input end of the phase-locked loop chip; output a voltage signal and / or a current signal matched with the phase difference through a charge pump of the phase-locked loop chip; transmit the voltage signal and / or the current signal to a control terminal of a local voltage-controlled oscillator through a voltage-controlled output terminal of the phase-locked loop chip, and adjust an output frequency of the local voltage-controlled oscillator based on the control terminal according to the voltage signal and / or the current signal, so that the output frequency of the local voltage-controlled oscillator tracks the external radio frequency signal, thereby realizing down-conversion processing of the external radio frequency signal.

9. An electronic device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, The processor realizes the down-conversion processing method according to any one of claims 7 to 8 when executing the computer program.

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