A high-bandwidth high-precision weak current preamplifier circuit

Abstract

This invention discloses a high-bandwidth, high-precision weak current pre-conversion circuit. It constructs a composite amplifier circuit by integrating a differential pair amplifier circuit with an integrated operational amplifier. The composite amplifier circuit amplifies the signal under test and suppresses common-mode signals through precisely matched transistor branches, thereby reducing the impact of DC offset and low-frequency noise from the integrated operational amplifier on the measurement front end. Because the front end provides additional feedforward gain, the composite amplifier circuit achieves a higher bandwidth, exceeding the bandwidth of the integrated operational amplifier itself. The detection circuit system, composed of the composite amplifier circuit and the feedback gain network, ultimately reaches a stable operating equilibrium point under negative feedback. The measured current signal is converted into a voltage signal output through the transimpedance feedback network.

Description

Technical Field

[0001] This invention belongs to the field of electronic measurement technology, and more specifically, relates to a high-bandwidth, high-precision weak current pre-conversion circuit. Background Technology

[0002] With the continuous development of precision measurement technology and the demand for weak signal detection, high-precision measurement of current signals with extremely small amplitudes and wide frequency ranges is often required in fields such as semiconductor device testing, biomedical detection, photoelectric detection, and high-end instrumentation. Especially in high-speed electronic systems and radio frequency applications, the current signal under test not only has an amplitude as low as μA or even nA, but may also contain broadband components ranging from DC to hundreds of megahertz. This places even more stringent requirements on the bandwidth, noise performance, and stability of the detection circuit.

[0003] Traditional current detection techniques mainly include current-to-voltage conversion methods based on transimpedance amplification and integration detection methods based on the principle of charge accumulation. Transimpedance amplification utilizes a feedback resistor to achieve a linear conversion from current to voltage, offering a wide frequency response range. However, it is susceptible to operational amplifier noise and thermal noise from the feedback resistor when measuring weak currents. Integration methods detect signals by integrating the input current, effectively suppressing random noise and improving measurement resolution. However, their response speed is slow, making them unsuitable for real-time measurement of high-frequency or broadband signals.

[0004] In existing technologies, transimpedance amplifier circuits are mostly constructed directly using integrated operational amplifier chips. While this approach offers advantages such as simple structure, ease of implementation, and good consistency, it still has significant limitations in high-bandwidth and high-precision weak current detection applications. Firstly, to ensure good stability under different operating conditions and across a wide frequency range, a unity-gain stable integrated operational amplifier is typically required. However, its gain-bandwidth product is limited. To achieve broadband detection at the 100 MHz level, ultra-high-speed integrated operational amplifiers with gain-bandwidth products exceeding 500 MHz are usually needed. The input bias current of such op-amps is typically in the μA range, and the offset voltage is typically in the mV range. In weak current detection applications, these non-ideal parameters are amplified by the transimpedance gain and may be directly superimposed on the output, introducing significant DC errors and low-frequency drift, severely affecting measurement accuracy. Especially in current detection scenarios at the nano-nA or even pA level, the input bias current is much larger than the measured signal itself, leading to significant systematic deviations in the measurement results. Summary of the Invention

[0005] The purpose of this invention is to overcome the shortcomings of the prior art and provide a high-bandwidth, high-precision weak current pre-conversion circuit to solve the problem that when using a single integrated operational amplifier to build a transimpedance amplifier circuit in the prior art, it is difficult to simultaneously consider bandwidth, noise and measurement accuracy in the process of achieving a hundred-megabit wideband detection.

[0006] To achieve the above-mentioned objectives, the present invention provides a high-bandwidth, high-precision weak current pre-conversion circuit, characterized in that it comprises: a differential pair transistor amplifier circuit, an input stage bias constant current source circuit, a high-speed integrated operational amplifier, and a transimpedance feedback gain circuit.

[0007] The differential pair amplifier circuit includes two JFETs Q1 and Q2, two transistors Q3 and Q4, and two bias resistors R. C1 R C2 In this configuration, the gate of Q1 is connected to one end of the transimpedance feedback gain network, and the two are superimposed to form terminal A, which is the input terminal of the current to be measured. The drain of Q1 is connected to the emitter of Q3, and the source of Q1 is connected to the output terminal of the input stage bias constant current source circuit, which is the drain of Q5. The gate of Q2 is grounded, the drain of Q2 is connected to the emitter of Q4, and the source of Q2 is connected to the output terminal of the input stage bias constant current source circuit, which is the drain of Q5. The base of Q3 is connected to the base of Q4, and the collector of Q3 is connected to the bias resistor R. C1 The collector of Q4 is connected to the positive input terminal of operational amplifier U1, and a bias resistor R is connected to the negative input terminal. C2 The bias resistor R is connected to the inverting input of U1. C1 R C2 The other end is connected to the power supply V. CC ;

[0008] The input stage bias constant current source circuit includes a JFET transistor Q5, a regulating resistor R3, and an operational amplifier U2. The gate of Q5 is connected to the output of operational amplifier U2, and the drain of Q5 serves as the output of the input stage bias constant current source circuit, connected to the sources of Q1 and Q2 respectively. The source of Q5 is connected to the inverting inputs of R3 and U2 respectively. The other end of R3 is connected to the power supply V. EE The positive input terminal of U2 is connected to the power supply V. CC Its inverting input terminal is connected to the source of Q5 and R3; at this time, the voltage difference across R3 is a fixed value, and the constant current source current value I is determined by the selected resistance value of R3. S This provides a stable quiescent operating current for the differential pair amplifier circuit;

[0009] The transimpedance feedback gain circuit includes a feedback resistor R. f and feedback capacitor C f C f Connect both ends to R f The two ends are in parallel, and the feedback resistor R is... fOne end is connected to the gate of Q1, and the other end is connected to the output terminal of U1. The current to be measured is I. in The voltage value is converted to V1 by a transimpedance feedback gain network.

[0010] When R c After the resistance value is set, the bias constant current source circuit outputs I. S Flow through load resistor R c A voltage V is generated at the input terminal of U1. od As the current to be measured is input, the gate voltage of Q1 gradually increases, that is, the input differential voltage V... id Increase, and thus V od The rise in voltage causes the output voltage of operational amplifier U1 to increase, which in turn increases the gate-source voltage of transistor Q1 through feedback control, thus reducing V. id The voltage value eventually stabilizes at the gate voltage of Q1. As the transconductance gm1 of Q1 increases, the voltage at the positive input terminal of operational amplifier U1 decreases at the gate voltage value of Q1. The transimpedance feedback gain network feeds back the voltage value at terminal A to the output terminal of U1, making the output voltage value V2 of U1 equal to the gate voltage value of Q1. V2 and the output voltage value V1 of the transimpedance feedback gain network are superimposed to form the voltage Vout at terminal B.

[0011] The objective of this invention is achieved as follows:

[0012] This invention discloses a high-bandwidth, high-precision weak current pre-conversion circuit. It integrates a differential pair amplifier circuit with an integrated operational amplifier to form a composite amplifier circuit. This composite amplifier circuit amplifies the signal under test and suppresses common-mode signals through precisely matched transistor branches, thereby reducing the impact of DC offset and low-frequency noise from the downstream integrated operational amplifier on the measurement front end. Because the front end provides additional feedforward gain, the composite amplifier circuit achieves a higher bandwidth, exceeding the bandwidth of the integrated operational amplifier itself. The detection circuit system, composed of the composite amplifier circuit and the feedback gain network, ultimately reaches a stable operating equilibrium point under negative feedback. The measured current signal is converted into a voltage signal output through the transimpedance feedback network.

[0013] Meanwhile, the high-bandwidth, high-precision weak current pre-conversion circuit of the present invention also has the following beneficial effects:

[0014] (1) By constructing a composite amplifier circuit through a two-stage cascaded structure, the total gain of the circuit is improved, so that the composite amplifier circuit can obtain better frequency response characteristics and the actual operating bandwidth of the system is higher than that of the traditional transimpedance amplifier method.

[0015] (2) The input terminal of the composite amplifier circuit adopts a JFET transistor to achieve ultra-high input impedance. The input leakage current is only on the order of fA~pA, and the system can distinguish smaller currents to be measured.

[0016] (3) By using a differential pair amplifier circuit, the equivalent mismatch voltage at the input of the composite amplifier circuit is reduced to the order of μV or even nV, and the absolute increment with temperature change is extremely limited, thereby achieving the overall ultra-low temperature drift of the system and improving the long-term stability and temperature stability of the measurement system.

[0017] (4) The differential pair amplifier circuit provides a voltage gain of tens to hundreds of times, which significantly attenuates the circuit noise when it is referred to the input terminal, thereby improving the detection accuracy of weak current. Attached Figure Description

[0018] Figure 1 This is a high-bandwidth, high-precision weak current pre-conversion circuit diagram of the present invention;

[0019] Figure 2 yes Figure 1 The schematic diagram of the composite amplifier circuit is shown below;

[0020] Figure 3 This is a schematic diagram of the error of a high-bandwidth, high-precision AC / DC weak current detection circuit.

[0021] Figure 4 This is a schematic diagram of the noise model of a high-bandwidth, high-precision AC / DC weak current detection circuit. Detailed Implementation

[0022] The specific embodiments of the present invention will now be described with reference to the accompanying drawings to enable those skilled in the art to better understand the invention. It should be particularly noted that in the following description, detailed descriptions of known functions and designs that might obscure the main content of the invention will be omitted here.

[0023] Example

[0024] In this embodiment, as Figure 1 As shown, the present invention provides a high-bandwidth, high-precision weak current pre-conversion circuit, comprising: a differential pair transistor amplifier circuit, an input stage bias constant current source circuit, a high-speed integrated operational amplifier, and a transimpedance feedback gain circuit.

[0025] The differential pair amplifier circuit includes two JFETs Q1 and Q2, two transistors Q3 and Q4, and two bias resistors R. C1 R C2 In this configuration, the gate of Q1 is connected to one end of the transimpedance feedback gain network, and the two are superimposed to form terminal A, which is the input terminal of the current to be measured. The drain of Q1 is connected to the emitter of Q3, and the source of Q1 is connected to the output terminal of the input stage bias constant current source circuit, which is the drain of Q5. The gate of Q2 is grounded, the drain of Q2 is connected to the emitter of Q4, and the source of Q2 is connected to the output terminal of the input stage bias constant current source circuit, which is the drain of Q5. The base of Q3 is connected to the base of Q4, and the collector of Q3 is connected to the bias resistor R.C1 The collector of Q4 is connected to the positive input terminal of operational amplifier U1, and a bias resistor R is connected to the negative input terminal. C2 The bias resistor R is connected to the inverting input of U1. C1 R C2 The other end is connected to the power supply V. CC The differential pair amplifier circuit is placed between the input terminal and the high-speed integrated operational amplifier to reduce the impact of non-ideal factors such as the input bias current and offset voltage of the high-speed integrated operational amplifier on the weak input current signal.

[0026] The input stage bias constant current source circuit includes a JFET transistor Q5, a regulating resistor R3, and an operational amplifier U2. The gate of Q5 is connected to the output of operational amplifier U2, and the drain of Q5 serves as the output of the input stage bias constant current source circuit, connected to the sources of Q1 and Q2 respectively. The source of Q5 is connected to the inverting inputs of R3 and U2 respectively. The other end of R3 is connected to the power supply V. EE The positive input terminal of U2 is connected to the power supply V. CC Its inverting input terminal is connected to the source of Q5 and R3; at this time, the voltage difference across R3 is a fixed value, and the constant current source current value I is determined by the selected resistance value of R3. S This provides a stable quiescent operating current for the differential pair amplifier circuit;

[0027] The transimpedance feedback gain circuit includes a feedback resistor R. f and feedback capacitor C f C f Connect both ends to R f The two ends are in parallel, and the feedback resistor R is... f One end is connected to the gate of Q1, and the other end is connected to the output terminal of U1. The current to be measured is I. in The voltage value is converted to V1 by a transimpedance feedback gain network.

[0028] When R c After the resistance value is set, the bias constant current source circuit outputs I. S Flow through load resistor R c A voltage V is generated at the input terminal of U1. od As the current to be measured is input, the gate voltage of Q1 gradually increases, that is, the input differential voltage V... id Increase, and thus V od The rise in voltage causes the output voltage of operational amplifier U1 to increase, which in turn increases the gate-source voltage of transistor Q1 through feedback control, thus reducing V. idThe voltage value eventually stabilizes at the gate voltage of Q1. As the transconductance gm1 of Q1 increases, the voltage at the positive input of operational amplifier U1 decreases at the gate voltage of Q1. The transimpedance feedback gain network feeds back the voltage value at terminal A to the output of U1, making the output voltage V2 of U1 equal to the gate voltage of Q1. V2 and the output voltage V1 of the transimpedance feedback gain network are superimposed to form the voltage V at terminal B. out .

[0029] In this embodiment, the composite amplifier circuit consists of a differential pair amplifier circuit, an input stage bias constant current source circuit, and a high-speed integrated operational amplifier. The input stage basic amplifier circuit mainly includes a differential pair amplifier circuit and a constant current source circuit. The differential pair amplifier circuit is composed of a common-source common-base amplifier circuit. The bias current I provided by the constant current source circuit... S Flow through load resistor R C Forming a differential voltage V od The backend integrated operational amplifier monitors V od With output voltage V out This drives the entire feedback loop to work.

[0030] Ideally, the output voltage is:

[0031] ;

[0032] Figure 2 The diagram shows a composite amplifier circuit. The output current i of the first-stage common-source amplifier circuit is... Q1d No load resistor R C Instead of converting it to voltage, it directly outputs current to the second-stage common-base amplifier circuit, therefore i Q1d = i Q3e This causes the output voltage of the common-source amplifier stage to be clamped by the base of the transistor, reducing the voltage gain and thus the Miller effect. The bandwidth f of the common-source common-base amplifier circuit is calculated as follows:

[0033] ;

[0034] For an N-stage cascaded amplifier, its gain-bandwidth product is GBW = A. total ×f T ,in f T The cutoff frequency of the N-stage cascaded amplifier:

[0035] ;

[0036] Among them, f N This is the cutoff frequency of each stage of the circuit. The bandwidth f of the operational amplifier in open-loop mode. olThe bandwidth is narrower, much smaller than that of the preceding differential pair amplifier circuit, therefore f T ≈f ol The total bandwidth of an N-stage cascaded amplifier is not significantly correlated with the bandwidth of the first-stage differential pair amplifier; rather, it is directly related to the total gain of the N-stage cascaded amplifier. A higher gain results in better frequency response. The gain of the common-source common-base amplifier circuit is:

[0037] ;

[0038] Among them, R Z The source negative feedback resistor is typically tens to hundreds of Ω, R C Typically ranging from kΩ to tens of kΩ, the transconductance g of a high-frequency JFET m Typically ranging from mS to tens of mS, its absolute value is much greater than 1, and the total gain A of the composite amplifier... total Increase. At this point, the gain-bandwidth product GBW of the composite amplifier circuit is:

[0039] ;

[0040] Figure 3 The diagram shows the error of a high-bandwidth, high-precision AC / DC weak current detection circuit. Q1 generates a small leakage current at its gate, which is equal to the measured input current I. in Together through the resistance R f This current is converted into a voltage signal, therefore it can be considered as the input leakage current i of the IV conversion circuit. bm The error voltage caused by the asymmetry in the parameters of the basic input amplifier circuit is mainly reflected in the input stage of the IV conversion circuit. That is, there is an inherent voltage difference between the gate voltages of Q1 and Q2. Since the gate of Q2 is grounded, this voltage difference is mainly reflected in the gate of Q1, i.e., the mismatch voltage V. OSm .

[0041] The input signal to be measured enters through the gate of the JFET transistor; therefore, the input resistance of the composite amplifier is equal to the gate resistance R. G Usually 10 12 ~10 15 Ω, then i bm Typically in the range of fA to pA, the input leakage current i in the IV amplifier circuit can be reduced by selecting a JFET with a larger input impedance. bm .

[0042] V OSm It mainly consists of three parts: the voltage difference V at the input terminal caused by inconsistencies due to tube manufacturing process issues. Osm1 The inconsistency in the bias currents of the two symmetrical branches is converted into a voltage difference V at the input terminal. Osm2 And the error term of the back-end integrated operational amplifier itself is converted into the voltage difference V at the input terminal.Osm3 Offset voltage V Osm =V Osm1 +V Osm2 +V Osm3 Among them, V Osm1 and V Osm2 Errors can be reduced by selecting highly matched components and improving the matching degree of symmetrical branches in circuit design. Osm3 The offset voltage V of the IV conversion circuit OSm The main source of error is selected from transconductance g. m Larger JFET transistors can effectively reduce their impact.

[0043] ;

[0044] ;

[0045] ;

[0046] The temperature drift in differential pair amplifier circuits mainly stems from the mismatch caused by temperature variations in the differential pair transistor parameters, including transconductance. The temperature coefficients of core parameters such as threshold voltage and gain differ. When the two transistors are perfectly symmetrical in terms of manufacturing process, their parameters change in the same direction and amplitude with temperature. The differential structure can effectively suppress common-mode drift, and theoretically, the equivalent temperature drift at the input terminal approaches zero. However, under actual manufacturing conditions, unavoidable slight differences will introduce mismatch, resulting in a difference in the temperature drift of the two transistor parameters. Its value is much smaller than the absolute change in a single tube. If an ideal constant current source... =2 mA, the nominal current of each branch is 1 mA, assuming the drift of the constant current source is determined by resistance, the temperature coefficient of resistance is typically 100 ppm / ℃, and the temperature rise... This caused the constant current source to drift by 0.5%, that is... The current becomes 2.01 mA, and ideally, the current in each branch should be 1.005 mA. In reality, due to the transistor asymmetry, the current in the left branch becomes 1.0052 mA, and the current in the right branch becomes 1.0048 mA. However, these drifts cancel each other out at the differential output, resulting in a net drift of only 0.4 μA, or an equivalent drift of 0.208 μV / ℃. The temperature drift of the back-end integrated operational amplifier mainly stems from the temperature drift of its own offset voltage. The typical temperature drift of an operational amplifier is generally 5~20 μV / ℃. The estimated range of the front-end differential amplifier gain is... After conversion, the lowest temperature drift at the input of the composite amplifier is 0.05 μV / ℃.

[0047] Figure 4A schematic diagram of a noise model for a high-bandwidth, high-precision AC / DC weak current detection circuit, including: differential pair transistor noise. Bias resistor noise Noise of integrated operational amplifier U1 Transimpedance Rf noise and constant current source noise Among them, the bias current source noise current is directly superimposed on the drain current of the input JFET. When its magnitude and direction are the same, it is regarded as common-mode noise and is suppressed due to the high CMRR characteristics, so it can be ignored.

[0048] When the noise source is represented as an equivalent input stage, it needs to be divided by its noise gain. The total noise of the IV conversion circuit is:

[0049] ;

[0050] It can be seen that the noise of the input stage JFET pair is the main noise source, and its performance directly determines the noise level of the entire system. In the design process, it is necessary to select JFET pairs with high transconductance and low noise figure as the input stage, and reasonably allocate the gain and set the static operating point to optimize the noise performance.

[0051] Although the illustrative specific embodiments of the present invention have been described above to enable those skilled in the art to understand the invention, it should be understood that the invention is not limited to the scope of the specific embodiments. For those skilled in the art, various changes are obvious as long as they are within the spirit and scope of the invention as defined and determined by the appended claims, and all inventions utilizing the concept of the present invention are protected.

Claims

1. A high-bandwidth high-precision weak current preamplifier circuit, characterized in that, Comprise: Differential pair amplifier circuit, input stage bias constant current source circuit, high-speed integrated operational amplifier, transimpedance feedback gain circuit; The differential pair amplifier circuit includes two JFETs Q1 and Q2, two transistors Q3 and Q4, and two bias resistors R. C1 R C2 In this configuration, the gate of Q1 is connected to one end of the transimpedance feedback gain network, and the two are superimposed to form terminal A, which is the input terminal of the current to be measured. The drain of Q1 is connected to the emitter of Q3, and the source of Q1 is connected to the output terminal of the input stage bias constant current source circuit, which is the drain of Q5. The gate of Q2 is grounded, the drain of Q2 is connected to the emitter of Q4, and the source of Q2 is connected to the output terminal of the input stage bias constant current source circuit, which is the drain of Q5. The base of Q3 is connected to the base of Q4, and the collector of Q3 is connected to the bias resistor R. C1 The collector of Q4 is connected to the positive input terminal of operational amplifier U1, and a bias resistor R is connected to the negative input terminal. C2 The bias resistor R is connected to the inverting input of U1. C1 R C2 The other end is connected to the power supply V. CC ; The input stage bias constant current source circuit includes a JFET transistor Q5, a regulating resistor R3, and an operational amplifier U2. The gate of Q5 is connected to the output terminal of operational amplifier U2, and the drain of Q5 serves as the output terminal of the input stage bias constant current source circuit, connected to the sources of Q1 and Q2 respectively. The source of Q5 is connected to the inverting input terminals of R3 and U2 respectively. The other end of R3 is connected to the power supply V. EE The positive input terminal of U2 is connected to the power supply V. CC Its inverting input terminal is connected to the source of Q5 and R3; at this time, the voltage difference across R3 is a fixed value, and the constant current source current value I is determined by the selected resistance value of R3. S This provides a stable quiescent operating current for the differential pair amplifier circuit; The transimpedance feedback gain circuit includes a feedback resistor R. f and feedback capacitor C f C f Connect both ends to R f The two ends are in parallel, and the feedback resistor R is... f One end is connected to the gate of Q1, and the other end is connected to the output terminal of U1. The current to be measured is I. in The voltage value is converted to V1 by a transimpedance feedback gain network. When R c After the resistance value is set, the bias constant current source circuit outputs I. S Flow through load resistor R c A voltage V is generated at the input terminal of U1. od As the current to be measured is input, the gate voltage of Q1 gradually increases, that is, the input differential voltage V... id Increase, and thus V od The rise in voltage causes the output voltage of operational amplifier U1 to increase, which in turn increases the gate-source voltage of transistor Q1 through feedback control, thus reducing V. id The voltage value eventually stabilizes at the gate voltage of Q1. As the transconductance gm1 of Q1 increases, the voltage at the positive input terminal of operational amplifier U1 decreases at the gate voltage value of Q1. The transimpedance feedback gain network feeds back the voltage value at terminal A to the output terminal of U1, making the output voltage value V2 of U1 equal to the gate voltage value of Q1. V2 and the output voltage value V1 of the transimpedance feedback gain network are superimposed to form the voltage Vout at terminal B.

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