A millimeter wave full-digital integrated phase-shifting and amplitude-modulating circuit

Abstract

This invention discloses a millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit, belonging to the field of electronic circuit design technology. It includes a quadrature signal generation circuit, an input matching circuit, a fully digitally controlled stacked three-mode vector synthesizer, and an output matching circuit connected in sequence. Equal-amplitude phase control unit, a first equal-phase amplitude control unit, and a second equal-phase amplitude control unit are connected to the vector synthesizer respectively. This invention achieves amplitude and phase control by selecting the current path through the switching characteristics of transistors and then performing vector synthesis, realizing the integration of phase shifting and amplitude modulation, improving chip area utilization efficiency, and conforming to the development trend of chip miniaturization and high integration.

Description

Technical Field

[0001] This invention relates to the field of electronic circuit design technology, and in particular to a millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit. Background Technology

[0002] To meet the demands of high-speed, low-latency, and high-capacity communication, fifth-generation mobile communication technology (5G) and future B5G / 6G systems are expanding into the millimeter-wave band. The millimeter-wave band (30-300 GHz) possesses abundant spectrum resources, capable of supporting data transmission rates of gigabits per second. However, as the frequency increases, free-space path loss increases significantly, and atmospheric absorption and rain attenuation become more pronounced, posing a severe challenge to the link budget of millimeter-wave systems. To overcome this physical bottleneck, phased array technology has become a core solution for millimeter-wave communication systems. Phased array antennas arrange multiple radiating elements according to a specific pattern and use phase shifters to precisely control the phase of the signal in each element, achieving electronically controlled beam scanning and shaping. This results in a high-gain, narrow-beam radiation pattern, effectively compensating for path loss and improving the system's equivalent isotropic radiated power and received signal-to-noise ratio. In a typical phased array transceiver front end, each channel requires two independent functional modules, a phase shifter and an attenuator, to work together. The phase shifter is used to adjust the phase of the signal to achieve beam pointing control, while the attenuator is used to adjust the amplitude of the signal to achieve amplitude weighting, sidelobe suppression, or gain equalization between channels.

[0003] Currently, millimeter-wave phase shifters are mainly classified into three types: switching phase shifters, reflective phase shifters, and vector modulation phase shifters. Switching phase shifters achieve phase delay by switching transmission lines of different lengths or artificial transmission lines with different topologies. Their advantages include simple structure, good linearity, and insensitivity to power supply voltage. However, their disadvantages include a larger chip area, phase shift accuracy limited by the parasitic parameters of the switching devices, and higher insertion loss in the millimeter-wave band. Reflective phase shifters utilize 3dB quadrature couplers combined with variable reactance loads to achieve phase changes in the reflection coefficient. These phase shifters can achieve a wide bandwidth, but typically require complex bias circuitry. Vector modulation phase shifters are one of the most widely used structures. Their basic principle is to decompose the input signal into orthogonal I / Q signals, control the amplitude (including polarity reversal) of each signal separately, and then obtain the desired output phase through vector synthesis. They have significant advantages such as high phase shift accuracy, flexible control, and ease of digital integration. However, the bandwidth performance of vector modulation phase shifters is mainly limited by the bandwidth of the quadrature signal generation circuit. Although traditional RC-CR polyphase filters have a small area, a single-stage PPF can only achieve precise quadrature at a single frequency point, resulting in a narrow bandwidth and high loss. Quadrature all-pass filters are sensitive to load impedance and have high design complexity. 3dB quadrature couplers, such as Lange couplers or branch line couplers, have lower losses, but they have a large area and limited quadrature bandwidth.

[0004] Amplitude control is typically achieved using attenuators, which are mainly divided into two categories: passive attenuators and active attenuators. Passive attenuators use T-type, π-type, or bridge T-type resistor networks and control the attenuation through switching. Their advantages include good linearity and no DC power consumption. However, the parasitic effects of the switching devices can introduce amplitude modulation errors and additional parasitic phase shifts at high frequencies. Active amplitude modulation circuits use variable gain amplifiers to achieve amplitude adjustment and have gain compensation capabilities, but they have poorer linearity and higher DC power consumption.

[0005] In existing phased array transceiver designs, phase shifters and attenuators are two independent functional modules connected in series in the signal link. This discrete architecture has several prominent problems. First, the chip area utilization is low. In large-scale phased array systems, each channel requires an independent phase shifter and attenuator, leading to a sharp increase in the total chip area, which is not conducive to achieving low-cost, miniaturized terminal applications. Second, cascading loss and noise accumulation are significant issues. Cascading the two modules introduces additional insertion loss, directly worsening the noise figure of the receiving channel and the output power of the transmitting channel, requiring more amplifier stages for compensation, further increasing power consumption and area. Third, parasitic interaction effects cannot be ignored. When independent phase shifters and attenuators are cascaded, their input and output impedance matching may affect each other, causing the actual synthesized performance to deviate from the design value, increasing the complexity of system calibration. In addition, from the perspective of process platform, high-performance millimeter-wave phased array front-ends are currently mostly implemented using compound semiconductor processes such as GaAs or GaN. These processes have advantages such as high breakdown voltage and low substrate loss, but they are expensive and difficult to meet the requirements of low cost and large-scale mass production for 5G commercial use. In contrast, CMOS technology has significant advantages such as small feature size, high integration, low power consumption, high yield, and mass production capability, making it an ideal platform for low-cost millimeter-wave systems. However, CMOS technology has higher substrate loss and lower Q value of passive devices, which places higher demands on circuit design.

[0006] In summary, there is an urgent need for a novel circuit structure that can integrate phase shifting and amplitude modulation on a CMOS process platform. This structure should ensure wide bandwidth and high precision while improving chip area utilization efficiency, reducing system cost and calibration complexity, thereby promoting the large-scale commercial deployment of millimeter-wave phased array technology in 5G and future communication systems. Summary of the Invention

[0007] The technical problem to be solved by the present invention is to overcome the shortcomings of the prior art and provide a millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit, which can integrate phase-shift and amplitude modulation functions into a circuit structure to improve chip area utilization efficiency.

[0008] To solve the above-mentioned technical problems, the present invention adopts the following technical solution:

[0009] According to the present invention, a millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit includes, in sequence, an orthogonal signal generation circuit, an input matching circuit, a fully digitally controlled stacked three-mode vector synthesizer, and an output matching circuit; and an equal-amplitude phase control unit, a first equal-phase amplitude control unit, and a second equal-phase amplitude control unit, respectively connected to the vector synthesizer; wherein...

[0010] The quadrature signal generation circuit is used to convert the input differential signal into a differential quadrature signal, which is then output to the vector synthesizer via the input matching circuit.

[0011] A vector synthesizer is used to weight and synthesize differential orthogonal signals, and the resulting output signal is output through an output matching circuit.

[0012] An equal-amplitude phase control unit is used to control the phase of the output signal while keeping the amplitude of the vector synthesizer's output signal constant.

[0013] The first phase amplitude control unit is used to coarsely adjust the amplitude of the output signal in large steps while keeping the phase of the output signal of the vector synthesizer constant.

[0014] The second phase amplitude control unit is used to finely adjust the amplitude of the output signal in small steps while keeping the phase of the output signal of the vector synthesizer constant.

[0015] As a further optimization scheme for the millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit described in this invention, coarse adjustment with a large step size refers to a step size greater than or equal to 2dB.

[0016] As a further optimization scheme for the millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit described in this invention, fine adjustment with small steps refers to a step size not exceeding 0.5dB.

[0017] As a further optimization scheme of the millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit described in this invention, the quadrature signal generation circuit is a passive structure with two-port input and four-port output. The quadrature differential signals generated by the quadrature signal generation circuit satisfy the relationship that the signal amplitude is the same and the phase difference is 90° within the working frequency band.

[0018] As a further optimization scheme for the millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit described in this invention, the quadrature signal generation circuit is composed of a differential microstrip line coupler and a multiphase filter cascaded together.

[0019] As a further optimization scheme for the millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit described in this invention, the vector synthesizer includes N parallel vector synthesis units with the same structure but different sizes, a thirteenth NMOS transistor, and a fourteenth NMOS transistor;

[0020] The I-channel current output terminals of N vector synthesis units are connected to the drain of the thirteenth NMOS transistor, and the Q-channel current output terminals of N vector synthesis units are connected to the drain of the fourteenth NMOS transistor. The sources of the thirteenth and fourteenth NMOS transistors are grounded. The gate of the thirteenth NMOS transistor is connected to the I-channel bias voltage, and the gate of the fourteenth NMOS transistor is connected to the Q-channel bias voltage.

[0021] Each vector synthesis unit includes a stacked current control circuit for I-channel and a stacked current control circuit for Q-channel. The stacked current control circuit for I-channel and the stacked current control circuit for Q-channel have the same structure.

[0022] The stacked current regulation circuit of the I-channel includes a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a ninth NMOS transistor, a tenth NMOS transistor, and a first inverter. The sources of the first and second NMOS transistors are connected to the drain of the ninth NMOS transistor. The sources of the third and fourth NMOS transistors are connected to the drain of the tenth NMOS transistor. The gates of the first and fourth NMOS transistors are connected to the positive terminal of the differential input signal. The gates of the second and third NMOS transistors are connected to the negative terminal of the differential input signal. The drains of the first and third NMOS transistors are connected to the positive terminal of the differential output signal. The drains of the second and fourth NMOS transistors are connected to the negative terminal of the differential output signal. The sources of the ninth and tenth NMOS transistors are connected to the drain of the thirteenth NMOS transistor. The gate of the ninth NMOS transistor is connected to the input terminal of the first inverter, and the gate of the tenth NMOS transistor is connected to the output terminal of the first inverter.

[0023] The stacked current regulation circuit of the Q-path includes a fifth NMOS transistor, a sixth NMOS transistor, a seventh NMOS transistor, an eighth NMOS transistor, an eleventh NMOS transistor, a twelfth NMOS transistor, and a second inverter. The sources of the fifth and sixth NMOS transistors are connected and then connected to the drain of the eleventh NMOS transistor. The sources of the seventh and eighth NMOS transistors are connected and then connected to the drain of the twelfth NMOS transistor. The gates of the fifth and eighth NMOS transistors are connected and then connected to the positive terminal of the differential input signal. The gates of the sixth and seventh NMOS transistors are connected and then connected to the negative terminal of the differential input signal. The drains of the fifth and seventh NMOS transistors are connected and then connected to the positive terminal of the differential output signal. The drains of the sixth and eighth NMOS transistors are connected and then connected to the negative terminal of the differential output signal. The sources of the eleventh and twelfth NMOS transistors are connected and then connected to the drain of the fourteenth NMOS transistor. The gate of the eleventh NMOS transistor is connected to the input terminal of the second inverter, and the gate of the twelfth NMOS transistor is connected to the output terminal of the second inverter.

[0024] As a further optimization scheme for the millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit described in this invention, the constant-amplitude phase control unit includes K parallel current-to-analog converters with identical structures but different sizes, a bias circuit, and fifteenth and sixteenth NMOS transistors; wherein...

[0025] The current-to-analog converter unit includes a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a fifth PMOS transistor, a sixth PMOS transistor, a seventh PMOS transistor, a third inverter, and a fourth inverter. The sources of the first, second, and fourth PMOS transistors are connected to the power supply voltage VDD. The gate of the first PMOS transistor is connected to the drain of the eighth PMOS transistor. The drain of the first PMOS transistor is connected to the sources of the third and fifth PMOS transistors, respectively. Control signals are input to the gates of the second and seventh PMOS transistors. The third inverter and the fourth inverter are connected. The output of the third inverter is connected to the gate of the sixth PMOS transistor, and the fourth inverter is connected to the gate of the fourth PMOS transistor. The drain of the second PMOS transistor is connected to the gate of the third PMOS transistor and the source of the sixth PMOS transistor. The drain of the fourth PMOS transistor is connected to the gate of the fifth PMOS transistor and the source of the seventh PMOS transistor. The drain of the third PMOS transistor is connected to the drain of the fifteenth NMOS transistor. The drain of the fifth PMOS transistor is connected to the drain of the sixteenth NMOS transistor. The drains of the sixth PMOS transistor and the seventh PMOS transistor are connected to the gate of the ninth PMOS transistor.

[0026] The bias circuit includes an eighth PMOS transistor, a ninth PMOS transistor, a first resistor, a second resistor, a seventeenth NMOS transistor, and an eighteenth NMOS transistor. The source of the eighth PMOS transistor and the source of the ninth PMOS transistor are connected to the power supply voltage VDD. The gate and drain of the eighth PMOS transistor are connected to the drain of the seventeenth NMOS transistor, and the gate and drain of the ninth PMOS transistor are connected to the drain of the eighteenth NMOS transistor. The gate of the seventeenth NMOS transistor and the gate of the eighteenth NMOS transistor are connected to the power supply voltage through the first resistor. The source of the seventeenth NMOS transistor and the source of the eighteenth NMOS transistor are connected to ground through the second resistor.

[0027] The drains of the K current-to-analog converter units are combined and then connected to the drains of the fifteenth and sixteenth NMOS transistors. The sources of the fifteenth and sixteenth NMOS transistors are connected to ground. The gate and drain of the fifteenth NMOS transistor are connected. The gate of the fifteenth NMOS transistor provides the I-path bias voltage for the vector synthesis unit. The gate and drain of the sixteenth NMOS transistor are connected. The gate of the sixteenth NMOS transistor provides the Q-path bias voltage for the vector synthesis unit.

[0028] The constant amplitude phase control unit achieves phase control by adjusting the ratio of the I-channel and Q-channel currents of the vector synthesizer using K-bit binary code.

[0029] As a further optimization scheme of the millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit described in this invention, the first equal-phase amplitude control unit is composed of N-bit binary code, and achieves coarse amplitude adjustment by controlling the first inverter and the second inverter.

[0030] As a further optimization scheme of the millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit described in this invention, the second equal-phase amplitude control unit achieves fine amplitude adjustment by regulating the bias voltage of the first, second, third, fourth, fifth, sixth, seventh, and eighth NMOS transistors.

[0031] As a further optimization scheme of the millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit described in this invention, both the input matching circuit and the output matching circuit are transformer structures, and impedance matching is achieved through the coupling of the primary coil and the secondary coil.

[0032] Compared with the prior art, the present invention, employing the above technical solution, has the following technical effects:

[0033] (1) The present invention provides an integrated structure of ultra-wideband phase-shift amplitude modulation, which can cover multiple 5G frequency bands. The integration can effectively improve the chip area utilization efficiency.

[0034] (2) The present invention maintains the independence of phase shifting and amplitude modulation functions in the integrated phase-shifting amplitude modulation circuit structure, and can achieve amplitude modulation in a range of more than 16 dB and phase shifting in a range of 360°;

[0035] (3) The present invention is based on CMOS integrated circuit technology and has the advantages of small size, low power consumption, high integration, mass production and low cost. It is particularly suitable for low cost and low power consumption applications in fifth generation mobile communication. Attached Figure Description

[0036] Figure 1 This is a schematic diagram of the overall structure of the millimeter-wave phase-shift amplitude modulation integrated circuit;

[0037] Figure 2 This is a schematic diagram of a vector synthesizer;

[0038] Figure 3 This is a schematic diagram of a digital-to-analog converter circuit.

[0039] Figure 4a This is a diagram showing the control results of the first equal-phase amplitude control unit;

[0040] Figure 4b This is a diagram showing the control results of the second equal-phase amplitude control unit;

[0041] Figure 4c This is a diagram showing the control results of the equal-amplitude phase control unit.

[0042] The reference numerals in the figure are explained as follows:

[0043] 301, 302, 303, 304, 305, 306, 307, 308, 309, 310, 311, 312, 313, and 314 represent the first, second, third, fourth, fifth, sixth, seventh, eighth, ninth, tenth, eleventh, twelfth, thirteenth, and fourteenth NMOS transistors, respectively; 315 and 316 represent the first and second inverters, respectively.

[0044] 501, 502, 503, 504, 505, 506, 507, 510, and 511 represent the first, second, third, fourth, fifth, sixth, seventh, eighth, and ninth PMOS transistors, respectively; 508, 509, 513, and 514 represent the fifteenth, sixteenth, seventeenth, and eighteenth NMOS transistors, respectively; 516 and 517 represent the third and fourth inverters, respectively; and 512 and 515 represent the first and second resistors, respectively. Detailed Implementation

[0045] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be described in detail below with reference to the accompanying drawings and specific embodiments.

[0046] Example 1:

[0047] like Figure 1 As shown, the millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit provided by this invention includes an orthogonal signal generation circuit, an input matching circuit, a fully digitally controlled stacked three-mode vector synthesizer, an output matching circuit, and an equal-amplitude phase control unit. The vector synthesizer has three control modes implemented by different control circuits or methods: an equal-amplitude phase control unit, a first equal-phase amplitude control unit, and a second equal-phase amplitude control unit. It is worth noting that this is a fully differential structure, which offers better common-mode noise immunity, better matching and symmetry compared to a single-ended structure, and can suppress power supply and ground disturbances. Figure 2 It is a fully CNC stacked three-mode vector synthesizer. Figure 3 It is a digital-to-analog converter, and the two are the core components of the millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit.

[0048] The quadrature signal generation circuit consists of a differential microstrip line coupler and a polyphase filter cascaded together. The differential microstrip line coupler is implemented using two layers of metal in CMOS integrated circuit technology. Utilizing the quarter-wavelength property of the microstrip transmission line, it generates a 90° phase difference. The polyphase filter then compensates for the narrow bandwidth limitation of the microstrip line coupler, widening the orthogonal frequency band. The polyphase filter can generate four phases: 90°, 180°, 270°, and 360°. To ensure that the signal travels approximately the same length along the line, the polyphase filter should employ a symmetrical structural design to improve phase accuracy.

[0049] Both the input and output matching circuits are transformer structures, utilizing the top two metal layers of CMOS integrated circuit technology to achieve mutual coupling between the primary and secondary coils, thereby achieving impedance matching.

[0050] A fully CNC stacked three-mode vector synthesizer consists of N vector synthesis units with identical structures but different sizes, and two MOS transistors at the tail. Figure 2 As shown, in the vector synthesis unit, the first NMOS transistor 301, the second NMOS transistor 302, the third NMOS transistor 303, the fourth NMOS transistor 304, the fifth NMOS transistor 305, the sixth NMOS transistor 306, the seventh NMOS transistor 307, and the eighth NMOS transistor 308 amplify and control the current of the I and Q paths. The ninth NMOS transistor 309, the tenth NMOS transistor 310, the eleventh NMOS transistor 311, the twelfth NMOS transistor 302, and the first inverter 315 and the second inverter 316 regulate the current paths of the I and Q paths, respectively. The thirteenth NMOS transistor 313 and the fourteenth NMOS transistor 314 regulate the I and Q currents after the N paths are combined. To achieve different amplitude modulation step requirements, the transistors in the N vector synthesis units have different sizes. In the vector synthesis unit, the control signals and the first and second inverters ensure that the two control signals in the circuit are always inverted, thereby achieving the purpose of outputting signals with the same amplitude but opposite polarities. In a vector synthesis unit, the amplitudes of the I and Q signals are always the same, but their polarities can be the same or opposite. An N-bit vector synthesizer is obtained by connecting N vector synthesis units in parallel. Each vector synthesis unit generates an I-channel current and a Q-channel current. The total I-channel current is obtained by vector addition of the N I-channel currents, which can be called the effective I-channel current value, denoted as IQ. eff Similarly, the effective current Q of the Q-path can be obtained. eff The amplitude and phase of the total current can be expressed as:

[0051]

[0052]

[0053] This vector synthesizer has three control modes, each implemented by different control circuits or methods: an equal-amplitude phase control unit, a first equal-phase amplitude control unit, and a second equal-phase amplitude control unit. The first equal-phase amplitude control unit achieves coarse amplitude adjustment using N-bit binary code. The second equal-phase amplitude control unit achieves fine amplitude adjustment by changing the bias voltages of the first to eighth NMOS transistors on the top layer of the vector synthesizer stack. When the vector synthesizer operates in equal-phase amplitude control unit mode, although the currents in the I and Q paths change, their ratio remains constant. Therefore, the phase angle of the total current obtained according to the parallelogram law is fixed; only the amplitude changes.

[0054] Figure 2 In the diagram, Gain Tuning represents amplitude modulation, Phase Tuning represents phase modulation, and the I_bias of the thirteenth NMOS transistor is the bias voltage. Figure 3 The gate of the fifteenth NMOS transistor 508 is given, in Figure 3 This is denoted as To_I_bias; similarly, the Q_bias of the fourteenth NMOS transistor is the bias voltage, derived from... Figure 3 The gate of the sixteenth NMOS transistor 509 is given, in Figure 3 This is denoted as To_Q_bias. Ieff is the effective current of the I-channel, and Qeff is the effective current of the Q-channel.

[0055] The constant-amplitude phase control unit circuit uses a digital-to-analog converter to control the ratio of the I-channel and Q-channel currents of the vector synthesizer, thereby achieving phase control. For example... Figure 3As shown, the equal-amplitude phase control unit circuit consists of K current-to-analog converters, a bias circuit, and a fifteenth NMOS transistor 508 and a sixteenth NMOS transistor 509 connected at the end after the current-to-analog converters are combined. The first PMOS transistor 501, the second PMOS transistor 502, the third PMOS transistor 503, the fourth PMOS transistor 504, the fifth PMOS transistor 505, the sixth PMOS transistor 506, and the seventh PMOS transistor 507 constitute the current-to-analog converter. The eighth PMOS transistor 510, the ninth PMOS transistor 511, the seventeenth NMOS transistor 513, the eighteenth NMOS transistor 514, and the first resistor 512 and the second resistor 515 constitute the bias circuit. In the K current-to-analog converters, the PMOS transistors are designed with different sizes, and the current flowing through them is proportional to their size. Each current-to-analog converter includes an inverter for path control, achieving the effect of selecting only one path (I or Q) while the other path is necessarily turned off. Therefore, the total current of the digital-to-analog converter is constant, and equal-amplitude phase control is achieved by controlling the current flow to either the I or Q path. The fifteenth and sixteenth NMOS transistors at the tail of the digital-to-analog controller provide bias voltages to the thirteenth and fourteenth NMOS transistors at the tail of the vector synthesizer, respectively.

[0056] Figure 4a This is a diagram showing the control results of the first equal-phase amplitude control unit; Figure 4b This is a diagram showing the control results of the second equal-phase amplitude control unit; Figure 4c This is a diagram showing the control results of the constant amplitude phase control unit. It illustrates the amplitude control (coarse adjustment) and phase control effects of this invention. This invention can achieve amplitude modulation over a range exceeding 16 dB (with a coarse adjustment range of 14 dB and a step size of 2 dB, and a fine adjustment range exceeding 2 dB and a step size of less than 0.1 dB) and phase shifting over a 360° range, demonstrating that the design possesses the capability to achieve wideband, integrated amplitude and phase modulation, showcasing its deployment potential in millimeter-wave 5G applications.

[0057] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit, characterized in that, It includes, in sequence, an orthogonal signal generation circuit, an input matching circuit, a fully numerically controlled stacked three-mode vector synthesizer, and an output matching circuit; and an equal-amplitude phase control unit, a first equal-phase amplitude control unit, and a second equal-phase amplitude control unit, each connected to the vector synthesizer; wherein, The quadrature signal generation circuit is used to convert the input differential signal into a differential quadrature signal, which is then output to the vector synthesizer via the input matching circuit. A vector synthesizer is used to weight and synthesize differential orthogonal signals, and the resulting output signal is output through an output matching circuit. An equal-amplitude phase control unit is used to control the phase of the output signal while keeping the amplitude of the vector synthesizer's output signal constant. The first phase amplitude control unit is used to coarsely adjust the amplitude of the output signal in large steps while keeping the phase of the output signal of the vector synthesizer constant. The second phase amplitude control unit is used to finely adjust the amplitude of the output signal in small steps while keeping the phase of the output signal of the vector synthesizer constant.

2. The millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit according to claim 1, characterized in that, Large step size coarse adjustment means a step size greater than or equal to 2dB.

3. The millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit according to claim 1, characterized in that, Fine-tuning with small steps refers to steps not exceeding 0.5dB.

4. The millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit according to claim 1, characterized in that, The quadrature signal generation circuit is a passive structure with two-port input and four-port output. The quadrature differential signals generated by the quadrature signal generation circuit satisfy the relationship that the signal amplitude is the same and the phase difference is 90° within the working frequency band.

5. The millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit according to claim 1, characterized in that, The quadrature signal generation circuit is composed of a differential microstrip line coupler and a polyphase filter cascaded together.

6. The millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit according to claim 1, characterized in that, The vector synthesizer includes N parallel vector synthesis units with identical structures but different sizes, a thirteenth NMOS transistor, and a fourteenth NMOS transistor; The I-channel current output terminals of N vector synthesis units are connected to the drain of the thirteenth NMOS transistor, and the Q-channel current output terminals of N vector synthesis units are connected to the drain of the fourteenth NMOS transistor. The sources of the thirteenth and fourteenth NMOS transistors are grounded. The gate of the thirteenth NMOS transistor is connected to the I-channel bias voltage, and the gate of the fourteenth NMOS transistor is connected to the Q-channel bias voltage. Each vector synthesis unit includes a stacked current control circuit for I-channel and a stacked current control circuit for Q-channel. The stacked current control circuit for I-channel and the stacked current control circuit for Q-channel have the same structure. The stacked current regulation circuit of the I-channel includes a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a ninth NMOS transistor, a tenth NMOS transistor, and a first inverter. The sources of the first and second NMOS transistors are connected to the drain of the ninth NMOS transistor. The sources of the third and fourth NMOS transistors are connected to the drain of the tenth NMOS transistor. The gates of the first and fourth NMOS transistors are connected to the positive terminal of the differential input signal. The gates of the second and third NMOS transistors are connected to the negative terminal of the differential input signal. The drains of the first and third NMOS transistors are connected to the positive terminal of the differential output signal. The drains of the second and fourth NMOS transistors are connected to the negative terminal of the differential output signal. The sources of the ninth and tenth NMOS transistors are connected to the drain of the thirteenth NMOS transistor. The gate of the ninth NMOS transistor is connected to the input terminal of the first inverter, and the gate of the tenth NMOS transistor is connected to the output terminal of the first inverter. The stacked current regulation circuit of the Q-path includes a fifth NMOS transistor, a sixth NMOS transistor, a seventh NMOS transistor, an eighth NMOS transistor, an eleventh NMOS transistor, a twelfth NMOS transistor, and a second inverter. The sources of the fifth and sixth NMOS transistors are connected and then connected to the drain of the eleventh NMOS transistor. The sources of the seventh and eighth NMOS transistors are connected and then connected to the drain of the twelfth NMOS transistor. The gates of the fifth and eighth NMOS transistors are connected and then connected to the positive terminal of the differential input signal. The gates of the sixth and seventh NMOS transistors are connected and then connected to the negative terminal of the differential input signal. The drains of the fifth and seventh NMOS transistors are connected and then connected to the positive terminal of the differential output signal. The drains of the sixth and eighth NMOS transistors are connected and then connected to the negative terminal of the differential output signal. The sources of the eleventh and twelfth NMOS transistors are connected and then connected to the drain of the fourteenth NMOS transistor. The gate of the eleventh NMOS transistor is connected to the input terminal of the second inverter, and the gate of the twelfth NMOS transistor is connected to the output terminal of the second inverter.

7. The millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit according to claim 1, characterized in that, The equal-amplitude phase control unit includes K parallel current-to-analog converters with identical structures but different sizes, a bias circuit, and the fifteenth and sixteenth NMOS transistors; among which, The current-to-analog converter unit includes a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a fifth PMOS transistor, a sixth PMOS transistor, a seventh PMOS transistor, a third inverter, and a fourth inverter. The sources of the first, second, and fourth PMOS transistors are connected to the power supply voltage VDD. The gate of the first PMOS transistor is connected to the drain of the eighth PMOS transistor. The drain of the first PMOS transistor is connected to the sources of the third and fifth PMOS transistors, respectively. Control signals are input to the gates of the second and seventh PMOS transistors. The third inverter and the fourth inverter are connected. The output of the third inverter is connected to the gate of the sixth PMOS transistor, and the fourth inverter is connected to the gate of the fourth PMOS transistor. The drain of the second PMOS transistor is connected to the gate of the third PMOS transistor and the source of the sixth PMOS transistor. The drain of the fourth PMOS transistor is connected to the gate of the fifth PMOS transistor and the source of the seventh PMOS transistor. The drain of the third PMOS transistor is connected to the drain of the fifteenth NMOS transistor. The drain of the fifth PMOS transistor is connected to the drain of the sixteenth NMOS transistor. The drains of the sixth PMOS transistor and the seventh PMOS transistor are connected to the gate of the ninth PMOS transistor. The bias circuit includes an eighth PMOS transistor, a ninth PMOS transistor, a first resistor, a second resistor, a seventeenth NMOS transistor, and an eighteenth NMOS transistor. The source of the eighth PMOS transistor and the source of the ninth PMOS transistor are connected to the power supply voltage VDD. The gate and drain of the eighth PMOS transistor are connected to the drain of the seventeenth NMOS transistor, and the gate and drain of the ninth PMOS transistor are connected to the drain of the eighteenth NMOS transistor. The gate of the seventeenth NMOS transistor and the gate of the eighteenth NMOS transistor are connected to the power supply voltage through the first resistor. The source of the seventeenth NMOS transistor and the source of the eighteenth NMOS transistor are connected to ground through the second resistor. The drains of the K current-to-analog converter units are combined and then connected to the drains of the fifteenth and sixteenth NMOS transistors. The sources of the fifteenth and sixteenth NMOS transistors are connected to ground. The gate and drain of the fifteenth NMOS transistor are connected. The gate of the fifteenth NMOS transistor provides the I-path bias voltage for the vector synthesis unit. The gate and drain of the sixteenth NMOS transistor are connected. The gate of the sixteenth NMOS transistor provides the Q-path bias voltage for the vector synthesis unit. The constant amplitude phase control unit achieves phase control by adjusting the ratio of the I-channel and Q-channel currents of the vector synthesizer using K-bit binary code.

8. A millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit according to claim 6, characterized in that, The first equal-phase amplitude control unit is composed of N bits of binary code and achieves coarse amplitude adjustment by controlling the first inverter and the second inverter.

9. A millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit according to claim 6, characterized in that, The second phase amplitude control unit achieves fine amplitude adjustment by regulating the bias voltages of the first, second, third, fourth, fifth, sixth, seventh, and eighth NMOS transistors.

10. A millimeter-wave fully digitally controlled integrated phase-shift amplitude modulation circuit according to claim 1, characterized in that, Both the input matching circuit and the output matching circuit are transformer structures, and impedance matching is achieved through the coupling of the primary coil and the secondary coil.

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