Synchronous Transceiver RF Switch Matrix and Its Control Method

Abstract

This invention relates to a synchronous transmit / receive RF switch matrix and its control method, comprising a control unit, a transmit switch array, a receive switch array, and N shared RF port modules. Each shared RF port module includes a shared RF port and a transmit / receive isolation network integrated within the shared RF port. This isolation network ensures an isolation of at least 60 dB between the transmit and receive connections when the shared RF port is configured for simultaneous transmit and receive. The transmit and receive switch arrays can be independently controlled and can flexibly route signals to any of the shared RF ports. This invention, through an integrated port design and a high-isolation composite network, enables a single physical port to synchronously transmit and receive RF signals, while significantly improving channel isolation, reducing insertion loss, simplifying port layout, and adapting to the requirements of wideband, multi-channel, and high-speed switching RF systems.

Description

Technical Field

[0001] This invention relates to the field of radio frequency testing technology, and in particular to a synchronous transmit / receive radio frequency switch matrix and its control method. Background Technology

[0002] With the rapid development of 5G communication, radar detection, and the Internet of Things, modern RF systems place higher demands on the port density, integration, and real-time bidirectional communication capabilities of test equipment. In the field of RF testing, traditional RF switch matrices generally adopt a port-based independent transmit / receive architecture, where the transmit and receive channels each correspond to independent physical ports. While this architecture has simple control logic, in multi-channel dense array scenarios, it leads to a significant increase in the number of system ports, resulting in bulky equipment and significantly increased wiring complexity, severely restricting the miniaturization and integration of test equipment.

[0003] To address the port multiplexing issue, some duplex systems in the industry have attempted to introduce circulators or directional couplers in conjunction with independent switches to achieve shared transmit and receive capabilities. However, these solutions suffer from numerous insurmountable drawbacks in practical applications:

[0004] First, there is low port utilization and limited integration. The port-based transceiver architecture results in significant waste of hardware resources and cannot meet the needs of high-density integrated devices. At the same time, conventional switch matrices lack dedicated high-isolation topologies for simultaneous transceiver operations. When multiple points operate in parallel, the high-power RF signal from the transmit channel is easily transmitted to the weak signal link of the receive channel through parasitic coupling or crosstalk at common nodes, leading to receive link saturation, signal distortion, and even damage to sensitive receiver devices.

[0005] Secondly, there are issues with RF performance degradation and duplex mode limitations. Existing solutions generally suffer from insufficient transmit-receive isolation, raising the noise floor of the transmitted signal and directly reducing the receiver's sensitivity and dynamic range. Furthermore, due to the numerous cascaded switching matrix devices and long RF paths, signal insertion loss accumulates significantly, especially in high-frequency bands such as Sub-6GHz and millimeter waves, where attenuation further worsens the system's transmit power and receive signal-to-noise ratio. More importantly, limited by device characteristics, existing solutions are mostly time-division duplex (TDD) or frequency-division duplex (FDD), unable to achieve true synchronous full-duplex communication on the same physical port under the same time-frequency resources. This makes it difficult to meet the core requirements of cutting-edge fields such as Information-Integrated Communication and Sensing (ISAC), real-time radar detection, and high-speed wireless communication.

[0006] For example, in some existing switch matrix logic, such as Figure 1As shown, port P1 can only be connected to expansion ports S1-S8, but not to expansion ports S9-S16; similarly, port P2 can only be connected to expansion ports S9-S16. This fixed and inflexible port mapping relationship further exacerbates the rigidity of resource scheduling, making it impossible to achieve arbitrary and efficient selection of conduction between dual ports and expansion ports through reasonable configuration of switch connections, thus failing to meet the stringent requirements of high-performance RF systems for dynamic resource scheduling. Summary of the Invention

[0007] The purpose of this invention is to provide a synchronous transmit / receive radio frequency switch matrix and its control method to solve the technical problems of low port utilization, poor transmit / receive isolation, inability to achieve synchronous transmit / receive at the same end, and high insertion loss in existing switch matrices.

[0008] To achieve the above objectives, the present invention provides a synchronous transceiver radio frequency switch matrix, comprising a control module, a transmit switch array, a receive switch array, and N shared radio frequency port modules, where N is an integer greater than or equal to 2. Both the transmit switch array and the receive switch array are connected to the control module; wherein,

[0009] The shared radio frequency port module includes a shared radio frequency port and a transceiver isolation network. The transceiver isolation network is integrated inside the shared radio frequency port and has a first port and a second port.

[0010] The transmit switch array has multiple output terminals and multiple transmit switch units. The multiple output terminals can be selectively connected to the first port of any of the N shared radio frequency port modules of the transceiver isolation network through the multiple transmit switch units.

[0011] The receiving switch array has multiple input terminals and multiple receiving switch units. The multiple input terminals can be selectively connected to the second port of any of the N shared radio frequency port modules of the transceiver isolation network through the multiple receiving switch units.

[0012] The transceiver isolation network is configured such that, in the working mode where the shared radio frequency port is configured to simultaneously transmit and receive signals, the isolation between the first port and the second port is not less than 60dB.

[0013] Optionally, the transceiver isolation network adopts a composite structure combining directional coupling, differential mode isolation, and impedance matching.

[0014] Optionally, the transmitting switch unit is a PIN diode switch or a GaN switch.

[0015] Optionally, the receiving switch unit has a built-in attenuation protection circuit.

[0016] Optionally, the control module uses an MCU or a dedicated logic control chip, and the control module is configured to independently generate and output control signals to the transmit switch array and the receive switch array.

[0017] Optionally, the control module supports TTL, RS485 and I2C control interfaces, and can realize independent switching of a single channel and batch switching of multiple channels, with a switching time of no more than 100ns.

[0018] Optionally, a port matching circuit is also included, which is disposed at the common RF port for impedance matching.

[0019] Optionally, the port matching circuit is adapted to a standard RF impedance of 50Ω or 75Ω, and its operating frequency band covers DC to 40GHz.

[0020] Optionally, a power supply module is also included. The power supply module adopts a low-voltage, low-power supply design and supplies power to the control module, the transmit switch array, the receive switch array, and the common radio frequency port module. It has built-in voltage regulation and filtering circuits.

[0021] Based on the same inventive concept, the present invention also provides a method for controlling the same-end synchronous transceiver radio frequency switch matrix as described above, comprising the following steps:

[0022] The control module synchronously sends control commands to the transmit and receive channels.

[0023] The transmit switch array selects the corresponding transmit switch unit according to the control command, so that the transmit signal is transmitted outward through the selected transmit switch unit, the corresponding transmit / receive isolation network and the common radio frequency port;

[0024] Simultaneously, the receiving switch array selects the corresponding receiving switch unit according to the control command, so that the received signal enters the receiving link through the shared radio frequency port, the corresponding transceiver isolation network and the selected receiving switch unit;

[0025] In this process, the transceiver isolation network blocks the leakage of the transmitted signal to the receiving channel during the execution of the above steps, thereby achieving synchronous transmission and reception of the shared radio frequency port.

[0026] The synchronous transceiver RF switch matrix and its control method provided by this invention have at least one of the following beneficial effects:

[0027] 1) Integrated transceiver port design: By integrating independent transmit and receive sub-channels within each physical port and sharing the same external RF interface, the traditional architecture of requiring separate ports for transmission and reception in RF systems is completely eliminated, significantly improving port utilization and reducing device size.

[0028] 2) High isolation transceiver isolation network: By integrating a dedicated high isolation transceiver isolation network in each shared RF port, it can provide an isolation of no less than 60dB in the same-end synchronous transceiver operation mode, effectively blocking crosstalk from the transmitted signal to the receiving channel, taking into account both wideband adaptability and high isolation performance, and solving the crosstalk problem between high-power transmission and weak signal reception.

[0029] 3) Independent Matrix Control for Transmit and Receive Switches: The transmit and receive switch arrays are independently designed and controlled independently and synchronously by a unified control module. This allows the system to be flexibly configured for various operating modes, such as single transmit, single receive, asynchronous transmit / receive, or synchronous full-duplex, and enables independent selection of any one or more ports. The control logic has been optimized to support high-speed switching at the nanosecond level (switching time ≤ 100ns), perfectly adapting to application scenarios with extremely high real-time requirements, such as high-speed frequency hopping and rapid beam scanning, thus improving the overall agility and intelligence of the system.

[0030] 4) Low-loss wideband matching optimization: By optimizing the RF path design, reducing unnecessary cascaded components, and combining this with a port matching circuit located at the shared RF port, this invention achieves extremely low insertion loss (≤1.5dB) across the entire signal link. This carefully designed matching circuit effectively matches the port impedance to the standard system impedance (50Ω / 75Ω) over a very wide frequency range (e.g., DC to 40GHz), significantly reducing voltage standing wave ratio (VSWR) and signal reflection. This ensures efficient and high-fidelity transmission of signals from low frequencies to millimeter-wave bands, improves the utilization efficiency of transmit power and the signal-to-noise ratio (SNR) of the received signal, enabling the system to adapt to wideband scenarios.

[0031] 5) Multi-channel Scalable Matrix Architecture: This invention adopts a modular, matrix-style architecture design. The number N of its shared RF port modules can be flexibly expanded according to actual needs (N≥2). This scalable matrix architecture enables this invention to be widely compatible and applied in multiple key areas such as 5G / 6G communication equipment testing, phased array radar systems, satellite communications, electronic warfare equipment, and various high-performance RF automated testing platforms, possessing broad market application prospects and industrial value. Attached Figure Description

[0032] Those skilled in the art will understand that the accompanying drawings are provided to better understand the invention and do not constitute any limitation on the scope of the invention. Wherein:

[0033] Figure 1 The logic block diagram of the switch matrix of an existing RF tester;

[0034] Figure 2This is a logic block diagram of a synchronous transmit / receive radio frequency switch matrix provided in one embodiment of the present invention. Detailed Implementation

[0035] To make the objectives, technical solutions, and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0036] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0037] In the description of this invention, it should be understood that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product is in use, or the orientation or positional relationship commonly understood by those skilled in the art. They are only used to facilitate the description of this invention and to simplify the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0038] Furthermore, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or apparatus that includes said element. Those skilled in the art will understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0039] This invention provides a synchronous transceiver radio frequency switch matrix, including a control module, a transmit switch array, a receive switch array, and N shared radio frequency port modules, where N is an integer greater than or equal to 2. Both the transmit and receive switch arrays are connected to the control module.

[0040] A shared radio frequency port module includes a shared radio frequency port and a transceiver isolation network. The transceiver isolation network is integrated inside the shared radio frequency port and has a first port and a second port.

[0041] The transmit switch array has multiple output terminals and multiple transmit switch units. The multiple output terminals can be selectively connected to the first port of any of the N shared RF port modules in the transceiver isolation network through the multiple transmit switch units.

[0042] The receiver switch array has multiple input terminals and multiple receiver switch units. The multiple input terminals can be selectively connected to the second port of any of the N shared RF port modules in the transceiver isolation network through the multiple receiver switch units.

[0043] The transceiver isolation network is constructed such that, in a working mode where the shared radio frequency port is configured to simultaneously transmit and receive signals, the isolation between the first port and the second port is not less than 60 dB.

[0044] like Figure 2 As shown, in this embodiment, both the transmit switch array and the receive switch array adopt the same tree-like cascaded topology. Their core components and connections are as follows:

[0045] P1 and P2 represent the system's main input / output ports. In the architecture of this invention, they correspond to the control points that, after passing through the internal gating network, are ultimately connected to the shared RF port module. They can be the starting point (during transmission) or the convergence point (during reception) of the signal.

[0046] S1-S16: Represent the system's expansion ports. They are the terminal nodes of a tree structure, corresponding to N shared RF port modules. Figure 2 An example with N=16 is shown.

[0047] The boxes marked with numbers in the diagram represent the basic units that make up the switch array—radio frequency switch units (including transmit switch units and receive switch units). For example,

[0048] The node marked "2" indicates a single-pole four-throw switch unit. This unit has one common terminal and two switchable gating terminals. Its function is to route the signal from the common terminal to one of the two gating terminals under the action of a control signal, or to achieve reverse signal gating.

[0049] Nodes marked "1": Indicate a single-pole double-throw switch or a fixed signal distribution / convergence path. In the transmit path, it can be used for final signal distribution or driving; in the receive path, it can be used for initial signal convergence or to provide an impedance matching interface.

[0050] Taking the signal path of port P1 as an example, this demonstrates its ability to "selectively connect" to any output terminal (such as S1-S8):

[0051] After the signal enters from P1, it first reaches a node "2". This node, under the command of the control unit, determines whether the signal should go to the upper branch or the lower branch.

[0052] If the upper branch is selected, the signal reaches the second "2" node. Selecting this node again can direct the signal to a more specific path.

[0053] Through the final connection of the subsequent "1" node, the signal can be directed to the target extended port, such as any one of S1-S4.

[0054] The path from P1 to S5-S8: By selecting the lower branch through the first-level "2" node and going through a similar selection process, you can connect to any one of S5-S8.

[0055] Similarly, port P2 has a tree structure that is completely symmetrical and independent of P1, and is dedicated to connecting to expansion ports S9-S16.

[0056] By controlling the on / off states of nodes "2" and "1" at each level in the control diagram, a unique and exclusive electrical path can be constructed from P1 (or P2) to any target S-port (S1-S16), thereby enabling arbitrary interconnection from a few core ports to a large number of expansion ports. When this switch matrix is ​​applied to the same-end synchronous transmit / receive mode, the transmit switch array and the receive switch array can operate independently. The control unit can synchronously establish an independent transmit path and an independent receive path for the same shared RF port by independently controlling the switch states in the two arrays, and the two paths are spatially isolated through a transmit / receive isolation network.

[0057] This tree-like cascaded structure offers exceptional scalability. Simply adding one node at the end easily expands the system from 16 channels to 32, 64, or even more, without requiring significant modifications to the core control logic. Furthermore, the cascaded structure provides excellent signal distribution symmetry, effectively ensuring consistency in insertion loss and phase balance across channels—crucial for high-precision RF test systems.

[0058] In this embodiment, the number of shared RF port modules can be expanded as needed. Each shared RF port module includes a shared RF port and a transceiver isolation network. Each shared RF port connects to the internal transmit sub-channel and receive sub-channel simultaneously, realizing single-port transceiver multiplexing, thereby replacing the traditional dual-port transceiver structure and reducing the number of ports by 50%.

[0059] Each shared RF port module is a fully functional subunit. It contains a physical interface for external connection, the shared RF port, typically a standard RF connector (such as SMA, N-type, or K-type). Internally, instead of a direct cable connection, a miniaturized RF circuit board is integrated, on which a transmit / receive isolation network is built. This isolation network has two internal connection points: a first port and a second port. In the circuit layout, the first port is defined as the input point for the transmit signal, and the second port is defined as the output point for the receive signal. Each output of the transmit switch array, through a gating network consisting of one or more transmit switch units along its path, can ultimately connect to the first port of any shared RF port module. Similarly, each input of the receive switch array, through a gating network consisting of one or more receive switch units along its path, can ultimately connect to the second port of any shared RF port module.

[0060] Transceiver isolation networks are the core of achieving "synchronization at the same end" functionality. They are constructed to provide an isolation of no less than 60dB, meaning that through their internal circuit topology, component selection, and parameter design, within a specified operating frequency band, when the transmitted signal is input from the first port and the received signal is output from the second port, the signal power leaking from the first port to the second port is attenuated by at least 60dB.

[0061] In a preferred embodiment, the transceiver isolation network employs a composite structure combining directional coupling, differential-mode isolation, and impedance matching. This composite structure is not simply a stacking of components, but rather achieves high isolation and good matching over a wide bandwidth through coordinated circuit design. For example, the directional coupling section is responsible for directionally coupling out leakage signals from the transmit path; the differential-mode isolation section performs phase cancellation on the coupled signals; and the impedance matching circuit is integrated into the signal path to ensure minimal port VSWR and reduce signal reflection. This composite structure is the physical basis for achieving and exceeding 60 dB of isolation.

[0062] In this embodiment, the transmit switch array is composed of multiple transmit switch units. Each transmit switch unit corresponds to a transmit sub-channel with a common port, and independently controls the on / off, selection and switching of the transmit signal, supporting multiple transmit channels to work in parallel or independently.

[0063] The transmitting switch unit is preferably a radio frequency switch with low insertion loss and high power tolerance, such as a PIN (Positive-Intrinsic-Negative) diode switch or a gallium nitride (GaN) semiconductor switch. These switches can efficiently transmit high-power radio frequency signals output from the transmitter while having extremely low self-loss. The receiving switch unit is preferably a radio frequency switch with high sensitivity and low noise figure. Each receiving switch unit corresponds to a receiving sub-channel with a shared radio frequency port, independently controlling the gating, filtering, and link activation of the received signal.

[0064] Preferably, an attenuation protection circuit is integrated inside the receiving switch unit. This attenuation protection circuit can be automatically activated when an abnormally high-power signal (such as transmit signal crosstalk caused by isolation failure) is detected, preventing high-power crosstalk from damaging the device.

[0065] In this embodiment, the control module can be implemented using a dedicated logic control chip such as a microcontroller unit (MCU) or a field-programmable gate array (FPGA). The control module is configured (usually through built-in firmware or logic code) to independently generate and output two control signals, one sent to the transmit switch array and the other to the receive switch array, thereby achieving independent and precise control of both. This allows the system to be flexibly configured into various operating modes such as single-transmit, single-receive, asynchronous transmission and reception, or synchronous full-duplex.

[0066] Furthermore, the control module supports multiple standard control interfaces, such as transistor-to-transistor (TTL) logic levels, RS-485 serial bus, or internal integrated circuit (I2C) bus, facilitating integration with host computers. Its control logic is optimized to enable independent, rapid switching of a single channel, and also supports batch switching commands for multiple channels. Its control switching response time, i.e., the time from command issuance to stable switching of the on / off state, is no greater than 100 nanoseconds (ns), meeting the requirements of high-speed real-time systems.

[0067] To optimize RF signal transmission quality, this synchronous transceiver RF switch matrix also includes a port matching circuit located at the shared RF port. Its core function is to perform impedance transformation and matching, aligning the impedance of the shared RF port to the standard 50Ω or 75Ω system impedance to minimize signal reflection. This port matching circuit is designed to cover an extremely wide frequency band, such as from DC to 40 GHz, thus adapting to various application scenarios from low frequencies to millimeter waves.

[0068] Furthermore, this synchronous transceiver RF switch matrix also includes a power supply module. This power supply module employs a low-voltage, low-power supply design, providing, for example, 3.3V or 5V DC power, and supplies power to the control module, transmit switch array, receive switch array, and common RF port module. The power supply module integrates voltage regulation circuitry (such as a low-dropout linear regulator LDO) and filtering circuitry (such as a π-type filter) to eliminate power supply ripple and noise, preventing them from coupling into the RF signal and ensuring system stability.

[0069] Based on the same inventive concept, this invention also proposes a method for controlling the same-end synchronous transceiver radio frequency switch matrix as described above, comprising the following steps:

[0070] The control module synchronously sends control commands to the transmit and receive channels.

[0071] The transmit switch array selects the corresponding transmit switch unit according to the control command, so that the transmit signal is transmitted outward through the selected transmit switch unit, the corresponding transmit / receive isolation network and the common radio frequency port;

[0072] At the same time, the receiving switch array selects the corresponding receiving switch unit according to the control command, so that the received signal enters the receiving link through the common radio frequency port, the corresponding transceiver isolation network and the selected receiving switch unit;

[0073] In this process, the transceiver isolation network blocks the leakage of the transmitted signal to the receiving channel, thereby enabling synchronous transmission and reception on the shared radio frequency port.

[0074] Specifically, during system operation, the control module receives operating instructions and simultaneously generates and issues control instructions for both the transmit and receive channels. Then, the transmit switch array, based on the received control instructions, drives one or more corresponding transmit switch units to operate, transmitting the signal from the signal source through the selected transmit switch unit, the first port of the transmit / receive isolation network connected to that transmit switch unit, and finally radiating it outward from the corresponding shared RF port. Simultaneously, the receive switch array, based on the received control instructions, drives one or more corresponding receive switch units to operate, establishing a signal path. This allows the received signal entering from external space via the same shared RF port to first pass through the transmit / receive isolation network of that shared RF port, then be output from its second port, and finally enter the subsequent receiving processing link via the selected receive switch unit. Throughout the synchronous operation, the transmit / receive isolation network continuously functions, effectively blocking (or suppressing) signal leakage from the transmit path to the receive path. The port matching circuit ensures stable transmission of transmit and receive signals, achieving synchronous transmission and reception on the same port, at the same time, and in the same frequency band. Multiple channels can operate independently or in parallel without interference.

[0075] Since the control method provided by this invention belongs to the same inventive concept as the synchronous transmit / receive RF switch matrix described above, the control method provided by this invention has all the advantages of the synchronous transmit / receive RF switch matrix described above. Therefore, the beneficial effects of the control method provided by this invention will not be described in detail here.

[0076] In summary, this invention provides a synchronous transceiver RF switch matrix and its control method. It employs a core architecture of layered isolation of transceiver channels, integrated shared ports, and independent switch control. Each RF port is divided into an internal transmit sub-channel and a receive sub-channel, with both sub-channels sharing the same external physical port. Through a dedicated transceiver isolation network, independent transceiver switching units, and matching circuit design, crosstalk from high-power signals in the transmit channel to the receive channel is blocked, while ensuring independent transmission and non-interference of transmit and receive signals. The overall matrix-style modular layout supports parallel operation of multiple synchronous transceiver channels. Combined with unified control logic, it achieves high-speed switching and independent selection, providing a crucial hardware foundation for next-generation integrated communication and sensing systems, advanced radar, and high-density testing systems.

[0077] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure are within the protection scope of the present invention. Obviously, those skilled in the art can make various modifications and variations to the present invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the present invention and its equivalents, the present invention also intends to include these modifications and variations.

Claims

1. A same-end synchronous transceiving RF switch matrix, characterized in that, It includes a control module, a transmit switch array, a receive switch array, and N shared RF port modules, where N is an integer greater than or equal to 2. Both the transmit switch array and the receive switch array are connected to the control module. The shared radio frequency port module includes a shared radio frequency port and a transceiver isolation network. The transceiver isolation network is integrated inside the shared radio frequency port and has a first port and a second port. The transmit switch array has multiple output terminals and multiple transmit switch units. The multiple output terminals can be selectively connected to the first port of any of the N shared radio frequency port modules of the transceiver isolation network through the multiple transmit switch units. The receiving switch array has multiple input terminals and multiple receiving switch units. The multiple input terminals can be selectively connected to the second port of any of the N shared radio frequency port modules of the transceiver isolation network through the multiple receiving switch units. The transceiver isolation network is configured such that, in the working mode where the shared radio frequency port is configured to simultaneously transmit and receive signals, the isolation between the first port and the second port is not less than 60dB.

2. The same-end synchronous transceiving RF switch matrix according to claim 1, characterized in that, The transceiver isolation network adopts a composite structure that combines directional coupling, differential mode isolation, and impedance matching.

3. The synchronous transceiver RF switch matrix according to claim 1, characterized in that, The transmitting switch unit is a PIN diode switch or a GaN switch.

4. The synchronous transceiver RF switch matrix according to claim 1, characterized in that, The receiving switch unit has a built-in attenuation protection circuit.

5. The synchronous transceiver RF switch matrix according to claim 1, characterized in that, The control module uses an MCU or a dedicated logic control chip, and is configured to independently generate and output control signals to the transmit switch array and the receive switch array.

6. The synchronous transceiver RF switch matrix according to claim 5, characterized in that, The control module supports TTL, RS485 and I2C control interfaces, and can realize independent switching of single channels and batch switching of multiple channels, with a switching time of no more than 100ns.

7. The synchronous transceiver RF switch matrix according to claim 1, characterized in that, It also includes a port matching circuit, which is located at the common RF port and is used for impedance matching.

8. The synchronous transceiver RF switch matrix according to claim 7, characterized in that, The port matching circuit is compatible with 50Ω or 75Ω standard RF impedance and its operating frequency band covers DC to 40GHz.

9. The synchronous transceiver RF switch matrix according to claim 1, characterized in that, It also includes a power supply module, which adopts a low-voltage, low-power supply design and supplies power to the control module, the transmit switch array, the receive switch array and the common radio frequency port module. It has built-in voltage regulation and filtering circuits.

10. A method for controlling a synchronous transceiver radio frequency switch matrix according to any one of claims 1-9, characterized in that, Includes the following steps: The control module synchronously sends control commands to the transmit and receive channels. The transmit switch array selects the corresponding transmit switch unit according to the control command, so that the transmit signal is transmitted outward through the selected transmit switch unit, the corresponding transmit / receive isolation network and the common radio frequency port; Simultaneously, the receiving switch array selects the corresponding receiving switch unit according to the control command, so that the received signal enters the receiving link through the shared radio frequency port, the corresponding transceiver isolation network and the selected receiving switch unit; In this process, the transceiver isolation network blocks the leakage of the transmitted signal to the receiving channel during the above steps, thereby achieving synchronous transmission and reception of the shared radio frequency port.

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