Over-temperature protection circuit for power transistor

Abstract

This application discloses an over-temperature protection circuit for a power transistor, applicable to the field of integrated circuit technology. The circuit includes: an output terminal of a bias current supply circuit connected to the first terminal of a temperature-sensing resistor to output a bias current; a threshold voltage supply circuit outputting a threshold voltage; a comparator's non-inverting input terminal connected to the first terminal of the temperature-sensing resistor, an inverting input terminal connected to the output terminal of the threshold voltage supply circuit, and an output terminal connected to a power transistor control circuit to control the on / off state of the power transistor; the temperature-sensing resistor is positioned directly above the power transistor, and a dielectric layer for isolation is provided between the temperature-sensing resistor and the power transistor. Applying this solution, an over-temperature protection circuit for the power transistor can be effectively implemented, with no temperature sensing delay, high accuracy, and no additional losses introduced into the main power path, exhibiting high versatility.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to an over-temperature protection circuit for a power transistor. Background Technology

[0002] With the development of semiconductor technology, the integration level, power density, and switching frequency of power integrated circuits are continuously improving. In application scenarios such as automotive and industrial control, more stringent requirements are being placed on the temperature tolerance and long-term reliability of chips.

[0003] Power transistors are the core energy conversion units in integrated circuits, generating a large amount of heat during operation, causing their junction temperature to rise sharply. Excessive temperature not only leads to performance degradation problems such as decreased carrier mobility and threshold voltage drift, but can also reduce the reliability and lifespan of components, and even cause permanent damage such as thermal breakdown. Currently, there are three main over-temperature protection schemes. The first is the PN junction temperature measurement method, which uses the negative temperature characteristic of the base-emitter voltage of diodes or transistors to detect temperature. This circuit is simple but easily affected by process variations and power supply noise, resulting in limited accuracy. The second is the external thermistor method, which requires placing a thermistor outside the chip. Although the accuracy is acceptable, it increases system cost and packaging complexity, and cannot accurately sense the temperature of the power transistor die inside the chip in real time. Thirdly, there is the on-chip metal resistor temperature measurement method, which involves placing a metal resistor in series with the drain of the power transistor and mounting it in contact with it. The drawback is that the detected signal is a mixture of current and temperature signals, requiring complex circuitry for separation. Furthermore, it's understandable that any sensing element connected in series with the main power path (such as a sampling resistor) will increase the on-resistance of the power loop, leading to additional power loss and reducing overall system efficiency. In addition, because the metal resistor is placed next to the power transistor, the lateral heat conduction path is long, resulting in low thermal coupling efficiency and a significant delay in temperature sensing.

[0004] In summary, how to effectively achieve over-temperature protection for power transistors, ensure accuracy, and reduce latency is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0005] The purpose of this invention is to provide an over-temperature protection circuit for power transistors, so as to effectively protect power transistors from over-temperature, ensure accuracy, and reduce delay.

[0006] To solve the above-mentioned technical problems, the present invention provides the following technical solution:

[0007] The present invention provides an over-temperature protection circuit for a power transistor, comprising: a bias current supply circuit, a temperature sensing resistor, a threshold voltage supply circuit, a power transistor control circuit, and a comparator;

[0008] The output terminal of the bias current supply circuit is connected to the first terminal of the temperature sensing resistor to output bias current to the temperature sensing resistor; the second terminal of the temperature sensing resistor is grounded.

[0009] The threshold voltage providing circuit is used to output a threshold voltage through its own output terminal;

[0010] The non-inverting input of the comparator is connected to the first end of the temperature sensing resistor, the inverting input is connected to the output of the threshold voltage providing circuit, and the output is connected to the power transistor control circuit to control the on / off state of the power transistor.

[0011] The temperature-sensing resistor is arranged directly above the power transistor, and a dielectric layer for isolation is provided between the temperature-sensing resistor and the power transistor.

[0012] In one embodiment, the temperature-sensing resistor is a metal temperature-sensing resistor arranged directly above the active region of the power transistor, and the temperature-sensing resistor adopts a continuously bent serpentine layout trace to completely cover the active region of the power transistor.

[0013] It also includes a closed shielding ring surrounding the temperature-sensing resistor, and the shielding ring is grounded.

[0014] In one implementation, a first adjustment circuit is also included;

[0015] The threshold voltage providing circuit has a reference voltage connected to its input terminal and an adjustable threshold voltage proportional to the reference voltage output through its own output terminal.

[0016] The threshold voltage providing circuit is connected to the first adjustment circuit to adjust the ratio coefficient between the adjustable threshold voltage and the reference voltage through the first adjustment circuit.

[0017] In one embodiment, the threshold voltage providing circuit includes a first operational amplifier, a first transistor, a second operational amplifier, a second transistor, and a first resistor;

[0018] The non-inverting input terminal of the first operational amplifier receives the reference voltage, the output terminal of the first operational amplifier is connected to the control terminal of the first transistor, the first terminal of the first transistor is connected to the positive terminal of the power supply, the second terminal of the first transistor is connected to the first terminal of the first trimming circuit, the second terminal of the first trimming circuit is grounded, and the first voltage divider terminal of the first trimming circuit is connected to the inverting input terminal of the first operational amplifier.

[0019] The non-inverting input of the second operational amplifier is connected to the second voltage divider of the first trimming circuit. The output of the second operational amplifier is connected to the control terminal of the second transistor. The first terminal of the second transistor is connected to the positive terminal of the power supply. The second terminal of the second transistor is connected to the first terminal of the first resistor and the inverting input of the second operational amplifier, respectively. The second terminal of the first resistor is grounded. The first terminal of the first resistor serves as the output of the threshold voltage supply circuit.

[0020] In the first adjustment circuit, one or more resistors are connected in series between the first voltage divider terminal and the first terminal of the first adjustment circuit, and one or more resistors are connected in series between the first voltage divider terminal and the second terminal of the first adjustment circuit; the voltage of the second voltage divider terminal of the first adjustment circuit is proportional to the voltage of the first voltage divider terminal of the first adjustment circuit, and the proportionality coefficient is determined by the topology of the switch array of the first adjustment circuit.

[0021] In one embodiment, the first trimming circuit includes: a resistor array, a switch array cooperating with the resistor array, and a logic selection circuit for controlling the topology state of the switch array, such that a second voltage divider terminal of the first trimming circuit is connected to a first terminal of one of the resistors in the resistor array through the switch array.

[0022] The resistor array includes M resistors connected in series between the first voltage divider terminal of the first trimming circuit and the first terminal of the first trimming circuit, and N resistors connected in series between the first voltage divider terminal of the first trimming circuit and the second terminal of the first trimming circuit.

[0023] Wherein, M and N are both positive integers. For any resistor in the resistor array, the end of the resistor closest to the positive terminal of the power supply is taken as the first end of the resistor, and the end furthest from the positive terminal of the power supply is taken as the second end of the resistor.

[0024] In one embodiment, the resistor array includes: a first voltage divider resistor to a sixteenth voltage divider resistor connected in series in the order from the second terminal of the first adjustment circuit to the first terminal of the first adjustment circuit;

[0025] The switch array includes a first-level switch group, a second-level switch group, and a third-level switch group;

[0026] The first-level switch group includes a first switch to a sixteenth switch, and the first terminals of the first switch to the sixteenth switch are respectively connected to the first terminals of the first voltage divider resistor to the sixteenth voltage divider resistor. The second terminal of the i-th switch among the first switch to the sixteenth switch is connected to the second terminal of the (i+1)-th switch. The connection nodes are sequentially arranged from bottom to top as the first output terminal to the eighth output terminal of the first-level switch group; i is an odd number.

[0027] The second-level switch group includes switches seventeen to twenty-four, and the first ends of switches seventeen to twenty-four are respectively connected to the first output end to the eighth output end of the first-level switch group. The second end of switch i among switches seventeen to twenty-four is connected to the second end of switch i+1. The connection nodes are sequentially arranged from bottom to top as the first output end to the fourth output end of the second-level switch group; i is an odd number.

[0028] The third-level switch group includes switches 25 to 28, and the first ends of switches 25 to 28 are respectively connected to the first output end to the fourth output end of the second-level switch group. The second ends of switches 25 to 28 are interconnected and serve as the second voltage divider of the first adjustment circuit.

[0029] In one embodiment, the logic selection circuit includes:

[0030] The first-level logic selection sub-circuit is used to control each switch in the first-level switch group so that at the same time, the odd-numbered switches or the even-numbered switches in the first-level switch group are turned on.

[0031] The second-level logic selection sub-circuit is used to control each switch in the second-level switch group so that at the same time, the odd-numbered switches or the even-numbered switches in the second-level switch group are turned on.

[0032] A third-level logic selection sub-circuit is used to control each switch in the third-level switch group, such that at any given time, only one switch in the third-level switch group is turned on.

[0033] In one embodiment, it further includes: a first inverter, a first switching transistor, a second switching transistor, and a second resistor;

[0034] The output terminal of the comparator is connected to the input terminal of the first inverter and the control terminal of the first switching transistor, respectively. The output terminal of the first inverter is connected to the control terminal of the second switching transistor, and the output terminal of the first inverter is connected to the power transistor control circuit to control the on / off state of the power transistor through the power transistor control circuit.

[0035] The first terminal of the first switch is connected to the first terminal of the first resistor. The second terminal of the first switch is connected to the inverting input terminal of the comparator and the second terminal of the second switch, and the connection terminal serves as the output terminal of the threshold voltage providing circuit. The first terminal of the second switch is connected to the second terminal of the first resistor and the first terminal of the second resistor, and the second terminal of the second resistor is grounded.

[0036] In one implementation, a second adjustment circuit is also included;

[0037] The input terminal of the bias current supply circuit is connected to a reference current, and an adjustable bias current proportional to the reference current is output through its own output terminal.

[0038] The bias current supply circuit is connected to the second adjustment circuit to adjust the ratio coefficient between the adjustable bias current and the reference current.

[0039] In one embodiment, the bias current providing circuit includes a third operational amplifier, a fourth operational amplifier, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a third resistor, a fourth resistor, a fifth resistor, and a sixth resistor.

[0040] The non-inverting input of the third operational amplifier receives the reference current and is connected to the first terminal of the third resistor. The second terminal of the third resistor is grounded. The output of the third operational amplifier is connected to the control terminal of the third transistor. The first terminal of the third transistor is connected to the second terminal of the fourth transistor, the control terminal of the fourth transistor, and the control terminal of the fifth transistor. The second terminal of the third transistor is connected to the first terminal of the fourth resistor. The second terminal of the fourth resistor is grounded. The first terminals of the fourth transistor and the fifth transistor are both connected to the positive terminal of the power supply. The second terminal of the fifth transistor is connected to the first terminal of the second adjustment circuit. The second terminal of the second adjustment circuit is grounded. The first voltage divider terminal of the second adjustment circuit is connected to the inverting input of the third operational amplifier.

[0041] The non-inverting input terminal of the fourth operational amplifier is connected to the second voltage divider terminal of the second trimming circuit. The output terminal of the fourth operational amplifier is connected to the control terminal of the sixth transistor. The first terminal of the sixth transistor is connected to the second terminal of the seventh transistor, the control terminal of the seventh transistor, the control terminal of the eighth transistor, and the control terminal of the ninth transistor. The second terminal of the sixth transistor is connected to the first terminal of the fifth resistor. The second terminal of the fifth resistor is grounded. The first terminals of the seventh transistor, the eighth transistor, and the ninth transistor are all connected to the positive terminal of the power supply.

[0042] The second terminal of the eighth transistor is connected to the first terminal of the sixth resistor and the inverting input terminal of the fourth operational amplifier, respectively, and the second terminal of the sixth resistor is grounded; the second terminal of the ninth transistor serves as the output terminal of the bias current supply circuit and is connected to the first terminal of the temperature sensing resistor.

[0043] Applying the technical solution provided in this embodiment of the invention, the output terminal of the bias current providing circuit is connected to the first terminal of the temperature sensing resistor, allowing it to output a bias current to the temperature sensing resistor. The non-inverting input terminal of the comparator is also connected to the first terminal of the temperature sensing resistor. Therefore, it can be seen that the temperature of the temperature sensing resistor affects its own terminal voltage, which in turn affects the voltage at the non-inverting input terminal of the comparator. The threshold voltage providing circuit can output a threshold voltage through its own output terminal. The inverting input terminal of the comparator is connected to the output terminal of the threshold voltage providing circuit. In other words, the threshold voltage output by the threshold voltage providing circuit acts as a threshold, used for comparison with the terminal voltage of the temperature sensing resistor. The output terminal of the comparator is connected to the power transistor control circuit to control the on / off state of the power transistor. Therefore, if the power transistor overheats, it will be reflected in the terminal voltage of the temperature sensing resistor, and the comparator will turn off the power transistor through the power transistor control circuit, thereby achieving over-temperature protection for the power transistor.

[0044] Furthermore, in this application's solution, the temperature-sensing resistor is positioned directly above the power transistor, and an extremely thin silicon dioxide dielectric layer is provided between the temperature-sensing resistor and the power transistor for isolation. Because the two are directly and perpendicularly thermally coupled, the thermal coupling efficiency is very high, there is no temperature sensing delay, and the detection accuracy is also very high. Moreover, the over-temperature protection circuit in this application's solution is not connected in series with the main power path of the power transistor, therefore it does not introduce any additional impedance or loss into the main power path, ensuring the full performance and high-efficiency operation of the power transistor.

[0045] In summary, the solution proposed in this application can effectively implement the over-temperature protection circuit for the power transistor, with no temperature sensing delay, high accuracy, and without introducing any additional impedance or loss into the main power path. Attached Figure Description

[0046] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0047] Figure 1 This is a schematic diagram of the over-temperature protection circuit for a power transistor provided in a specific embodiment of the present invention.

[0048] Figure 2 This is a schematic diagram of the wiring layout of the temperature sensing resistor and the structure of the shielding ring in a specific embodiment of the present invention.

[0049] Figure 3 This is a schematic diagram of the threshold voltage providing circuit in a specific embodiment of the present invention;

[0050] Figure 4 This is a schematic diagram of the resistor array and switch array in the first adjustment circuit according to a specific embodiment of the present invention;

[0051] Figure 5 This is a schematic diagram of the logic selection circuit in the first adjustment circuit of a specific embodiment of the present invention;

[0052] Figure 6 This is a schematic diagram of the hysteresis circuit in a specific embodiment of the present invention;

[0053] Figure 7 This is a schematic diagram of the bias current providing circuit in a specific embodiment of the present invention;

[0054] Figure 8 This is a schematic diagram of the over-temperature protection circuit for a power transistor provided in another specific embodiment of the present invention. Detailed Implementation

[0055] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0056] To enable those skilled in the art to better understand the present invention, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0057] Please refer to Figure 1 , Figure 1 This is a schematic diagram of an over-temperature protection circuit for a power transistor according to a specific embodiment of the present invention. The over-temperature protection circuit includes: a bias current supply circuit 10, and a temperature sensing resistor R. Metal The circuit includes a threshold voltage supply circuit 20, a power transistor control circuit 50, and a comparator 40.

[0058] The output of the bias current supply circuit 10 is connected to the temperature sensing resistor R. Metal The first end is connected to the temperature sensing resistor R. Metal Output bias current; temperature sensing resistor R Metal The second terminal is grounded;

[0059] Threshold voltage providing circuit 20 is used to output threshold voltage through its own output terminal;

[0060] The non-inverting input of comparator 40 is connected to the temperature sensing resistor R. Metal The first terminal is connected, the inverting input terminal is connected to the output terminal of the threshold voltage providing circuit 20, and the output terminal is connected to the power transistor control circuit 50 to control the on / off state of the power transistor through the power transistor control circuit 50;

[0061] Temperature sensing resistor R Metal The temperature sensing resistor R is positioned directly above the power transistor. Metal A dielectric layer is provided between the power transistor and the transistor for isolation.

[0062] Specifically, the output of the bias current supply circuit 10 is connected to the temperature sensing resistor R. Metal The first end is electrically connected, thereby continuously supplying power to the temperature sensing resistor R. Metal The specific structure of the bias current supply circuit 10 can be set and adjusted according to actual needs. Typically, it requires supplying the bias current to the temperature sensing resistor R. Metal The output bias current is independent of power supply voltage and temperature, as described in detail in the later embodiments. Furthermore, in one of the later embodiments, this bias current is adjustable, thus adapting to the needs of different applications. The bias current supply circuit includes a 10-way temperature sensing resistor R. Metal The output bias current is denoted as I in this application. REF_TRIM .

[0063] The bias current supply circuit 10 will supply the bias current I REF_TRIM Output to temperature sensing resistor R Metal The first end, and the temperature sensing resistor R Metal The second terminal is grounded, and the non-inverting input of comparator 40 is connected to the temperature sensing resistor R. Metal Since the first terminal is connected, it can be understood that the voltage at the non-inverting input of comparator 40 is the voltage across the temperature sensing resistor R. Metal The terminal voltage, referred to in this application as the temperature sensing voltage, is denoted as V. TEMP_TRIM .

[0064] The threshold voltage providing circuit 20 can output a threshold voltage through its own output terminal. For example, in one embodiment, the input terminal of the threshold voltage providing circuit 20 is connected to a reference voltage V. REF And directly use the reference voltage V REF For example, the threshold voltage output can be used as a reference voltage V, or the input of the threshold voltage providing circuit 20 can be connected to the reference voltage V. REF And the reference voltage V REF After being amplified by a certain factor, it is then used as the threshold voltage for its own output.

[0065] See also Figure 8 It may also include a first adjustment circuit 30;

[0066] The input terminal of the threshold voltage supply circuit 20 is connected to the reference voltage V. REF It outputs a voltage proportional to the reference voltage V through its own output terminal. REF Adjustable threshold voltage;

[0067] The threshold voltage providing circuit 20 is connected to the first adjustment circuit 30 to adjust the ratio coefficient between the adjustable threshold voltage and the reference voltage through the first adjustment circuit 30.

[0068] This implementation takes into account that, in practical applications, if the threshold voltage that functions as a threshold is dynamically adjustable, the solution of this application can be flexibly adapted to various product models and user needs, significantly improving the versatility and flexibility of the solution of this application.

[0069] Therefore, in this embodiment, the threshold voltage providing circuit 20 can be connected to the first adjustment circuit 30, so that the ratio coefficient between the adjustable threshold voltage and the reference voltage can be adjusted by the first adjustment circuit 30. That is, the threshold voltage output by the threshold voltage providing circuit 20 is specifically an adjustable threshold voltage. Since the adjustable threshold voltage is dynamically adjustable, the versatility and flexibility of the solution in this application are effectively improved.

[0070] The input terminal of the threshold voltage supply circuit 20 is connected to the reference voltage V. REF It outputs a voltage proportional to the reference voltage V through its own output terminal.REF Adjustable threshold voltage V REF_TRIM , can be represented as V REF_TRIM =k1×V REF Furthermore, the proportional coefficient k1 can be adjusted by the first adjustment circuit 30, improving the versatility and flexibility of the solution in this application. In the following text, the threshold voltage output of the threshold voltage supply circuit 20 will be described as an adjustable threshold voltage V. REF_TRIM Let's take an example to illustrate. Of course, if the threshold voltage supply circuit 20 outputs a fixed threshold voltage, then k1 can be understood as a fixed value.

[0071] Furthermore, the specific structure and connection relationship of the threshold voltage providing circuit 20 and the first adjustment circuit 30 can be set and adjusted according to actual needs, since V is required. REF_TRIM Proportional to the reference voltage V REF Therefore, the threshold voltage providing circuit 20 is required to output an adjustable threshold voltage that is independent of the power supply voltage and temperature. This can usually be achieved based on the circuit structure of the clamping circuit, while the structure of the first adjustment circuit 30 must be able to adjust the proportional coefficient.

[0072] The inverting input of comparator 40 is connected to the output of the threshold voltage supply circuit 20, and the output of comparator 40 is connected to the power transistor control circuit 50, thereby controlling the on / off state of the power transistor through the power transistor control circuit 50. It can be understood that when the temperature is normal and over-temperature protection is not triggered, the power transistor needs to be controlled to be in the on state through the power transistor control circuit 50; while when over-temperature protection is triggered, the power transistor needs to be controlled to be in the off state through the power transistor control circuit 50.

[0073] For example, in a specific scenario, the temperature sensing resistor R Metal The resistance is relatively small at room temperature. According to Ohm's law, V at this temperature is... TEMP_TRIM Smaller, for example, in one specific implementation, V at this time TEMP_TRIM Below the adjustable threshold voltage V REF_TRIM That is, the voltage at the non-inverting input of comparator 40 is less than the voltage at the inverting input. Therefore, comparator 40 continuously outputs a low-level signal to the power transistor control circuit 50, for example... Figure 1 In this implementation, when the comparator 40 outputs a low-level signal, the power transistor control circuit 50 controls the power transistor to remain in the on state, enabling the power transistor to perform its function normally. However, under conditions such as prolonged full load or high current output of the chip, the junction temperature of the power transistor rises rapidly, and the heat is directly conducted upwards through the vertical ultra-thin silicon dioxide dielectric layer to the upper temperature-sensing resistor R. Metal This causes the temperature sensing resistor R to... Metal The resistance increases with temperature. When the temperature reaches the preset over-temperature protection threshold (e.g., set to 150℃), V TEMP_TRIMThe voltage will then exceed the adjustable threshold voltage V. REF_TRIM This causes the output level of comparator 40 to flip. In this example, comparator 40 outputs a high-level signal to the power transistor control circuit 50, which causes the power transistor control circuit 50 to turn off the power transistor, thereby achieving over-temperature protection.

[0074] The specific structure of the power transistor control circuit 50 can be set and adjusted according to actual needs, as long as it can effectively realize the on-off control of the power transistor. For example, in practical applications, the power transistor control circuit 50 can be equipped with circuit structures such as an electrostatic protection unit and a gate drive buffer unit for the power transistor.

[0075] The temperature sensing resistor R in this application is... Metal Instead of being placed on the side of the power transistor, it utilizes the multi-layer wiring resources of the integrated circuit to be fabricated directly above the active region of the power transistor that needs protection. The two are isolated by only a very thin silicon dioxide dielectric layer, allowing for direct vertical thermal coupling and minimizing thermal resistance. In other words, this layout makes full use of the chip's vertical space, enabling real-time, in-situ, and delay-free sensing of the power transistor's junction temperature, thereby greatly improving the timeliness and reliability of over-temperature protection.

[0076] In one specific embodiment of the present invention, the temperature sensing resistor R Metal The metal temperature-sensing resistor R is positioned directly above the active region of the power transistor. Metal And the temperature sensing resistor R Metal The layout uses a continuous, serpentine, zigzag-shaped trace pattern to completely cover the active area of ​​the power transistor.

[0077] The active region of a power transistor refers to the core heat-generating area, typically including the gate heat-generating region and the drain heat-generating region. In this implementation, the temperature-sensing resistor R... Metal The use of a continuous, serpentine, zigzag-shaped trace layout, rather than straight strips, effectively increases the total length of the resistor strip within the same area, thus increasing the temperature sensing resistor R. Metal The resistance value meets the requirements of this application, and is arranged in a continuously bent serpentine line directly above the active region of the power transistor, so that the temperature sensing resistor R... Metal It can evenly and extensively cover the core heat-generating areas such as the gate and drain of the lower power transistor, effectively reducing temperature measurement errors. This makes the temperature sensing of the present application solution more uniform and sensitive, reducing the risk of misjudgment caused by local hot spots.

[0078] See also Figure 2 Temperature sensing resistor R Metal Therefore, a continuously bending, serpentine, zigzag-shaped layout trace was adopted. Furthermore, in one specific embodiment of the invention, it may further include: [the following is unclear and likely incomplete: "in the temperature sensing resistor R..."]Metal A closed shielding ring is set around the perimeter, and the shielding ring is grounded.

[0079] In this embodiment, the temperature sensing resistor R Metal A closed grounded shielding ring is provided around the perimeter, which allows the temperature sensing resistor R to be protected. Metal Physically isolated from other circuits (such as digital logic, clock lines, power lines, etc.), this effectively shields the surrounding power supply noise, switching noise, and substrate coupling noise, ensuring a high signal-to-noise ratio and enabling the solution to work stably in complex environments, thus improving its anti-interference capability.

[0080] See also Figure 2 In the temperature sensing resistor R Metal An outer shielding ring is installed, which is a continuous closed metal loop without openings or breaks to prevent electric field leakage. Of course, in practical applications, the specific parameters of the shielding ring, such as the width of the metal trace, the size of the relevant through holes, and the metal spacing, can be set and adjusted according to actual needs.

[0081] As described above, due to the requirement V REF_TRIM Proportional to the reference voltage V REF Therefore, the threshold voltage providing circuit 20 is required to output an adjustable threshold voltage that is independent of the power supply voltage and temperature, which can typically be achieved based on a clamping circuit structure. In one specific embodiment of the present invention, see [reference needed]. Figure 3 The threshold voltage providing circuit 20 includes a first operational amplifier AMP1, a first transistor MN1, a second operational amplifier AMP2, a second transistor MN2, and a first resistor R1. In this embodiment, the threshold voltage providing circuit 20 is implemented based on a two-stage operational amplifier structure.

[0082] The non-inverting input terminal of the first operational amplifier AMP1 receives a reference voltage. The output terminal of the first operational amplifier AMP1 is connected to the control terminal of the first transistor MN1. The first terminal of the first transistor MN1 is connected to the positive terminal of the power supply. The second terminal of the first transistor MN1 is connected to the first terminal of the first trimming circuit 30. The second terminal of the first trimming circuit 30 is grounded. The first voltage divider terminal of the first trimming circuit 30 is connected to the inverting input terminal of the first operational amplifier AMP1.

[0083] The non-inverting input of the second operational amplifier AMP2 is connected to the second voltage divider of the first trimming circuit 30. The output of the second operational amplifier AMP2 is connected to the control terminal of the second transistor MN2. The first terminal of the second transistor MN2 is connected to the positive terminal of the power supply, and the second terminal of the second transistor MN2 is connected to the first terminal of the first resistor R1 and the inverting input of the second operational amplifier AMP2, respectively. The second terminal of the first resistor R1 is grounded. Since no hysteresis circuit is provided here as in the following embodiment, the first terminal of the first resistor R1 can be directly used as the output of the threshold voltage supply circuit 20.

[0084] In the first adjustment circuit 30, one or more resistors are connected in series between the first voltage divider terminal and the first terminal of the first adjustment circuit 30, and one or more resistors are connected in series between the first voltage divider terminal and the second terminal of the first adjustment circuit 30; the voltage of the second voltage divider terminal of the first adjustment circuit 30 is proportional to the voltage of the first voltage divider terminal of the first adjustment circuit 30, and the proportionality coefficient is determined by the topology of the switch array of the first adjustment circuit 30.

[0085] Reference voltage V REF Typically, this can be generated by a bandgap reference circuit. In this implementation, the reference voltage V... REF After clamping by two stages of operational amplifiers, an adjustable threshold voltage V is obtained that is independent of the power supply voltage and temperature and can be adjusted. REF_TRIM .

[0086] See also Figure 3 Reference voltage V REF Connected to the non-inverting input of the first operational amplifier AMP1, through clamping (i.e., utilizing the virtual short characteristic of the op-amp), it enables... Figure 3 Feedback voltage V FB1 (That is, the voltage at the inverting input terminal of the first operational amplifier AMP1) is equal to the voltage at its non-inverting input terminal, expressed as V. FB1 =V REF The first operational amplifier, AMP1, can be, for example, a high-gain CMOS rail-to-rail operational amplifier.

[0087] The output of the first operational amplifier AMP1 is connected to the control terminal of the first transistor MN1. Figure 3 Specifically, in this example, the circuit is connected to the gate of the first transistor MN1. By adjusting the on-resistance of the first transistor MN1 through negative feedback, the current flowing into the first trimming circuit 30 is changed, thereby increasing the voltage V at the first voltage divider terminal of the first trimming circuit 30. FB1 Constantly equal to the reference voltage V REF In this embodiment, the first voltage divider terminal of the first adjustment circuit 30 is connected to the inverting input terminal of the first operational amplifier AMP1.

[0088] The voltage at the second voltage divider terminal of the first adjustment circuit 30 is directly proportional to the voltage at the first voltage divider terminal of the first adjustment circuit 30, and this proportionality coefficient is specifically determined by the topology of the switch array of the first adjustment circuit 30. For example, in one specific embodiment, the structural arrangement of the first adjustment circuit 30 will make V IN1 The voltage value is equal to V IN1 The sum of the resistances to ground and V FB1 The ratio of the total resistance to ground, then divided by V. FB1 The product of can be expressed as:

[0089] The V here IN1 This refers to the voltage at the second voltage divider terminal of the first adjustment circuit 30, and also the voltage at the non-inverting input terminal of the second operational amplifier AMP2. It refers to V IN1 The total resistance to ground, which is also the resistance from the second voltage divider terminal of the first adjustment circuit 30 to ground. It refers to V FB1 The total resistance to ground is also the resistance from the first voltage divider terminal of the first adjustment circuit 30 to ground.

[0090] The voltage at the second voltage divider terminal of the first adjustment circuit 30 is directly proportional to the voltage at the first voltage divider terminal of the first adjustment circuit 30, denoted as k1. Therefore, in the example above, V... IN1 =k1×V FB1 Here, k1 represents the above text. Furthermore, the specific value of k1 depends on the topology of the switch array of the first tuning circuit 30.

[0091] The second operational amplifier AMP2 also has a clamping effect, making Figure 3 The feedback voltage V of the second operational amplifier AMP2 FB2 (That is, the voltage at the inverting input terminal of the second operational amplifier AMP2) is equal to the voltage at its non-inverting input terminal, expressed as V. FB2 =V IN1 Therefore, we can obtain:

[0092] Adjustable threshold voltage V REF_TRIM =V FB2 =V IN1 =k1×V FB1 =k1×V REF It can be seen that this implementation method yields an adjustable threshold voltage V that is independent of the power supply voltage and temperature. REF_TRIM This serves as one of the inputs of comparator 40. Furthermore, it can be seen that in this embodiment, the adjustable threshold voltage V... REF_TRIM With reference voltage V REFThe proportionality coefficient is the proportionality coefficient between the voltage at the second voltage divider terminal of the first adjustment circuit 30 and the voltage at the first voltage divider terminal of the first adjustment circuit 30.

[0093] The specific structure of the first adjustment circuit 30 can be adjusted as needed to achieve the functional requirements of this application. For example, in a specific embodiment of the present invention, the first adjustment circuit 30 includes: a resistor array, a switch array that cooperates with the resistor array, and a logic selection circuit for controlling the topology state of the switch array, so that the second voltage divider terminal of the first adjustment circuit 30 is connected to the first terminal of one of the resistors in the resistor array through the switch array.

[0094] The resistor array includes M resistors connected in series between the first voltage divider terminal of the first trimming circuit 30 and the first terminal of the first trimming circuit 30, and N resistors connected in series between the first voltage divider terminal of the first trimming circuit 30 and the second terminal of the first trimming circuit 30.

[0095] Where M and N are both positive integers, for any resistor in the resistor array, the end of the resistor closest to the positive terminal of the power supply is designated as the first end of the resistor, and the end furthest from the positive terminal is designated as the second end. In other words, the first end of the resistor represents the end closest to the positive terminal of the power supply, and the second end represents the end furthest from the positive terminal. For example... Figure 4 In this implementation, both M and N are 8. The first end of these 16 resistors refers to the upper port of the corresponding resistor, and the second end refers to the lower port of the corresponding resistor.

[0096] In this embodiment, M resistors are connected in series between the first voltage divider terminal and the first terminal of the first adjustment circuit 30, and N resistors are connected in series between the first voltage divider terminal and the second terminal of the first adjustment circuit 30. Connecting these resistors to the inverting input of the first operational amplifier AMP1 enables the clamping function of the first operational amplifier AMP1. The logic selection circuit controls the topology of the switch array, allowing the second voltage divider terminal of the first adjustment circuit 30 to be connected to the first terminal of one of the resistors in the resistor array via the switch array. This determines the specific ratio between the voltage of the second voltage divider terminal and the voltage of the first voltage divider terminal of the first adjustment circuit 30. In other words, this ratio depends on which resistor's first terminal in the resistor array the second voltage divider terminal of the first adjustment circuit 30 is specifically connected to.

[0097] In one specific embodiment of the present invention, the resistor array may include: a first voltage divider resistor to a sixteenth voltage divider resistor connected in series in the order from the second terminal of the first adjustment circuit 30 to the first terminal of the first adjustment circuit 30.

[0098] The switch array includes a first-level switch group, a second-level switch group, and a third-level switch group;

[0099] The first-level switch group includes the first switch to the sixteenth switch, and the first terminals of the first switch to the sixteenth switch are respectively connected to the first terminals of the first voltage divider resistor to the sixteenth voltage divider resistor. The second terminal of the i-th switch among the first switches to the sixteenth switch is connected to the second terminal of the (i+1)-th switch. The connection nodes are sequentially arranged from bottom to top as the first output terminal to the eighth output terminal of the first-level switch group. That is to say, the second terminal of the i-th switch among the first switches to the sixteenth switch is connected to the second terminal of the (i+1)-th switch, forming the 8 output terminals of the first-level switch group; i is an odd number.

[0100] The second-level switch group includes switches seventeen through twenty-four, and the first ends of switches seventeen through twenty-four are respectively connected to the first output end through the eighth output end of the first-level switch group. The second end of switch i in switches seventeen through twenty-four is connected to the second end of switch i+1. The connection nodes are sequentially arranged from bottom to top as the first output end through the fourth output end of the second-level switch group. That is to say, the second end of switch i in switches seventeen through twenty-four is connected to the second end of switch i+1, forming the four output ends of the second-level switch group; i is an odd number.

[0101] The third-level switch group includes switches 25 to 28, and the first ends of switches 25 to 28 are respectively connected to the first output end to the fourth output end of the second-level switch group. The second ends of switches 25 to 28 are interconnected and serve as the second voltage divider end of the first adjustment circuit 30.

[0102] For easier understanding, please refer to the following: Figure 4 In this embodiment, the order is from the second terminal of the first adjustment circuit 30 to the first terminal of the first adjustment circuit 30, that is... Figure 4 Sixteen resistors are connected in series from bottom to top, referred to as the first voltage divider resistor to the sixteenth voltage divider resistor, and... Figure 4 They are sequentially denoted as R01 to R16. R01 to R08 are located between the second terminal of the first adjustment circuit 30 and the first voltage divider terminal of the first adjustment circuit 30, while R09 to R16 are located between the first voltage divider terminal of the first adjustment circuit 30 and the first terminal of the first adjustment circuit 30. Therefore, in Figure 4 In this embodiment, the voltage V at the second voltage divider terminal of the first adjustment circuit 30 IN1 The voltage V at the first voltage divider terminal of the first adjustment circuit 30 FB1 The proportionality coefficient k1 can have 16 values ​​to choose from.

[0103] Figure 4 The switch array includes a first-level switch group, a second-level switch group, and a third-level switch group. The first-level switch group specifically includes 16 switches, designated S1 to S16; the second-level switch group specifically includes 8 switches, designated S17 to S24; and the third-level switch group specifically includes 4 switches, designated S25 to S28. For example, by controlling S2, S17, and S25 to be turned on through a logic selection circuit, while the remaining switches are turned off (the remaining switches do not necessarily need to be turned off, but only one of the four switches S25 to S28 is allowed to be turned on at any given time), the second voltage divider terminal V of the first adjustment circuit 30... IN1 It is then specifically connected to the first terminal of the second voltage divider resistor R02. At this time, V IN1 With V FB1 The proportionality coefficient k1 between them can be expressed as:

[0104] k1=(R01+R02) / (R01+R02+R03+R04+R05+R06+R07+R08).

[0105] For example, by controlling the conduction of switches S4, S18, and S25 through a logic selection circuit, while turning off all other switches (it is not necessary for all other switches to be turned off, but only one of the four switches S25 to S28 is allowed to conduct at any given time), the second voltage divider terminal V of the first adjustment circuit 30 will... IN1 It is then specifically connected to the first terminal of the fourth voltage divider resistor R04. At this time, V IN1 With V FB1 The proportionality coefficient k1 between them can be expressed as:

[0106] k1=(R01+R02+R03+R04) / (R01+R02+R03+R04+R05+R06+R07+R08).

[0107] Each switch in the switch array can typically be implemented based on a MOSFET. For the first adjustment circuit 30 in this embodiment, k1 has 16 selectable values, effectively improving the application flexibility of the solution and generally meeting the requirements for adjustable threshold voltage V in various applications. REF_TRIM Threshold requirements.

[0108] The specific structure of the logic selection circuit can be set according to actual needs. In one specific embodiment of the present invention, the logic selection circuit may include:

[0109] The first-level logic selection sub-circuit is used to control each switch in the first-level switch group so that at the same time, the odd-numbered switches or the even-numbered switches in the first-level switch group are turned on.

[0110] The second-level logic selection sub-circuit is used to control each switch in the second-level switch group so that at the same time, the odd-numbered switches or the even-numbered switches in the second-level switch group are turned on.

[0111] A third-level logic selection sub-circuit is used to control each switch in the third-level switch group, so that at any given time, only one switch in the third-level switch group is turned on.

[0112] It is understandable that the logic selection circuit controls the switches in the switch array of the first adjustment circuit 30 in order to specifically connect the second voltage divider terminal of the first adjustment circuit 30 to the first terminal of a resistor in the resistor array. Therefore, when setting the structure of the logic selection circuit, one way to implement it is to enable independent on / off control for each switch in the switch array of the first adjustment circuit 30. However, with this implementation method, the structure of the logic selection circuit will be more complex when the number of switches in the switch array is large.

[0113] In this implementation, the first-level logic selection sub-circuit controls each switch in the first-level switch group, so that either the odd-numbered switches in the first-level switch group are turned on, or the even-numbered switches in the first-level switch group are turned on, making the first-level logic selection sub-circuit very convenient to implement.

[0114] For example Figure 5 In the example, four NOT gates can be used to implement the first-level logic selection sub-circuit. The input of the first NOT gate N1 is connected to the input of the third NOT gate N3, and the connection is used to receive the bit 0 signal in the 4-bit control signal FUSE_1 of the first trimming circuit 30. The output of the first NOT gate N1 is connected to the input of the second NOT gate N2, and the output of the third NOT gate N3 is connected to the input of the fourth NOT gate N4.

[0115] The output of the first NOT gate N1 is specifically used to control the on / off state of switches S1, S3, S5 and S7 in the switch array; the output of the second NOT gate N2 is specifically used to control the on / off state of switches S2, S4, S6 and S8 in the switch array; the output of the third NOT gate N3 is specifically used to control the on / off state of switches S9, S11, S13 and S15 in the switch array; and the output of the fourth NOT gate N4 is specifically used to control the on / off state of switches S10, S12, S14 and S16 in the switch array.

[0116] In this implementation, the second-level logic selection sub-circuit controls each switch in the second-level switch group, so that either the odd-numbered switches in the second-level switch group are turned on, or the even-numbered switches in the second-level switch group are turned on, making the implementation of the second-level logic selection sub-circuit very convenient.

[0117] For example Figure 5 In the example, four NOT gates are used to implement the second-level logic selection sub-circuit. The input of the fifth NOT gate N5 is connected to the input of the seventh NOT gate N7, and the connection is used to receive the signal of bit 1 in the 4-bit control signal FUSE_1 of the first trimming circuit 30. The output of the fifth NOT gate N5 is connected to the input of the sixth NOT gate N6, and the output of the seventh NOT gate N7 is connected to the input of the eighth NOT gate N8.

[0118] The output of the fifth NOT gate N5 is specifically used to control the on / off state of S17 and S19 in the switch array; the output of the sixth NOT gate N6 is specifically used to control the on / off state of S18 and S20 in the switch array; the output of the seventh NOT gate N7 is specifically used to control the on / off state of S21 and S23 in the switch array; and the output of the eighth NOT gate N8 is specifically used to control the on / off state of S22 and S24 in the switch array.

[0119] The third-level logic selection sub-circuit needs to control the state of the third-level switch group, specifically ensuring that at any given time, only one switch in the third-level switch group is turned on.

[0120] It can be seen that in this embodiment, when controlling the switch array of the first adjustment circuit 30, it is not simply about turning it on. Figure 5 The example shows three switches in the switch array. This refers to half the number of switches in the first and second level switch groups, respectively, and a single switch in the third level switch group. Through the cooperation of the first, second, and third level logic selection sub-circuits, it is still possible to ensure that the second voltage divider terminal of the first adjustment circuit 30 is specifically connected to the first terminal of a resistor in the resistor array. Furthermore, this implementation significantly simplifies the structural complexity of the first, second, and third level logic selection sub-circuits, especially the first and second level logic selection sub-circuits (because the first and second level switch groups contain a large number of switches).

[0121] The structure of the third-level logic selection sub-circuit can also be set as needed, for example... Figure 5 In this example, four NOR gates and one NOT gate are used to implement the third-level logic selection sub-circuit. The input of the ninth NOT gate N9 is connected to the first input of the first NOR gate NOR1 and the second NOR gate NOR2, respectively. The connection is used to receive the signal of bit 3 in the 4-bit control signal FUSE_1 of the first trimming circuit 30. The output of the ninth NOT gate N9 is connected to the first input of the third NOT gate NOR3 and the second input of the fourth NOR gate NOR4, respectively.

[0122] The second input of the third NOR gate NOR3 is connected to the second input of the first NOR gate NOR1, and the connection is used to receive the signal of bit 2 in the 4-bit control signal FUSE_1 of the first trimming circuit 30. The output of the third NOR gate NOR3 is connected to the first input of the fourth NOR gate NOR4. Figure 5 The output of the third NOR gate NOR3 is specifically used to control the on / off state of S27 in the switch array, and the output of the fourth NOR gate NOR4 is specifically used to control the on / off state of S28 in the switch array.

[0123] The output of the first NOR gate NOR1 is connected to the first input of the second NOR gate NOR2. Figure 5 The output of the first NOR gate NOR1 is specifically used to control the on / off state of S25 in the switch array, and the output of the second NOR gate NOR2 is specifically used to control the on / off state of S26 in the switch array.

[0124] In one specific embodiment of the present invention, it may further include: a first inverter 60, a first switch Q1, a second switch Q2, and a second resistor R2.

[0125] The output of comparator 40 is connected to the input of the first inverter 60 and the control terminal of the first switch Q1, respectively. The output of the first inverter 60 is connected to the control terminal of the second switch Q2, and the output of the first inverter 60 is connected to the power transistor control circuit 50 to control the on / off state of the power transistor.

[0126] The first terminal of the first switch Q1 is connected to the first terminal of the first resistor R1. The second terminal of the first switch Q1 is connected to the inverting input terminal of the comparator 40 and the second terminal of the second switch Q2, and the connection terminal serves as the output terminal of the threshold voltage supply circuit 20. The first terminal of the second switch Q2 is connected to the second terminal of the first resistor R1 and the first terminal of the second resistor R2, and the second terminal of the second resistor R2 is grounded.

[0127] This implementation takes into account that some traditional solutions may experience critical point oscillations. That is, when the chip temperature fluctuates near the over-temperature protection point, the over-temperature protection circuit will repeatedly turn on and off, causing oscillations. This state not only makes the power transistor work unstable, but may also damage the load or other peripheral circuits.

[0128] In this embodiment, a hysteresis circuit is implemented by additionally setting a first inverter 60, a first switch Q1, a second switch Q2, and a second resistor R2. This ensures that once the over-temperature protection is triggered, the temperature must drop significantly to a safe range before it resets, thereby avoiding oscillation at the critical temperature point.

[0129] See also Figure 6 , Figure 6 For ease of viewing, only a portion of the threshold voltage supply circuit 20 is shown. When the power transistor is at normal temperature, V... TEMP_TRIM Adjustable threshold voltage V REF_TRIM When comparator 40 outputs a low level, the first inverter 60 can reverse the level. In other words, when comparator 40 outputs a low level and the power transistor control circuit 50 receives a high-level signal, the power transistor control circuit 50 will control the power transistor to remain in the on state.

[0130] If the junction temperature of the power transistor rises rapidly, causing the temperature sensing resistor R to... Metal The resistance increases with temperature. When the temperature reaches the preset over-temperature protection threshold (e.g., set to 150℃), V TEMP_TRIM The voltage will then exceed the adjustable threshold voltage V. REF_TRIM This causes the output level of comparator 40 to flip. In this example, comparator 40 outputs a high level. When the power transistor control circuit 50 receives a low-level signal, the power transistor control circuit 50 will control the power transistor to remain in the off state.

[0131] The first inverter 60 can typically be implemented based on a Schmitt trigger. Of course, other inverter structures can be chosen in other embodiments without affecting the implementation of the present invention. The first switch Q1 and the second switch Q2 are... Figure 6 In all the examples, PMOS transistors were specifically used.

[0132] In this implementation, under normal circumstances, a low-level output from comparator 40 turns on the first switch Q1, while a high-level output from the first inverter 60 turns off the second switch Q2. When the output level of comparator 40 flips, the first switch Q1 is turned off, and the second switch Q2 is turned on. This switches to an additional resistor divider node (i.e., the connection point between the first resistor R1 and the second resistor R2), thereby reducing the adjustable threshold voltage V. REF_TRIM For example, in one specific implementation, a temperature hysteresis window of about 15°C is constructed. That is, when the junction temperature of the power transistor exceeds 150°C, the output level of comparator 40 will flip, thereby turning off the power transistor. When the junction temperature of the power transistor is lower than 135°C, the output level of comparator 40 can be restored to the default state, allowing the power transistor to be turned on again.

[0133] It can be seen that the hysteresis element in this implementation method effectively prevents repeated jumps near the critical temperature point, making the solution of this application more stable and reliable.

[0134] In one specific embodiment of the present invention, a second adjustment circuit 70 may also be included;

[0135] The input terminal of the bias current supply circuit 10 is connected to a reference current, and an adjustable bias current proportional to the reference current is output through its own output terminal.

[0136] The bias current supply circuit 10 is connected to the second adjustment circuit 70 to adjust the ratio coefficient between the adjustable bias current and the reference current.

[0137] In the above implementation, the threshold voltage providing circuit 20 can output an adjustable threshold voltage V. REF_TRIM This allows the solution to be adapted to different applications. Furthermore, this implementation takes into account that if the bias current provided by the bias current providing circuit 10 is also adjustable, the application flexibility of the solution can be further improved.

[0138] The input terminal of the bias current supply circuit 10 is connected to the reference current I. REF Reference current I REF This can typically be generated by a bandgap reference circuit, and it is understood that if the second trimming circuit 70 is not provided, the bias current output by the bias current supply circuit 10 will be the same as the reference current I. REF It's a fixed ratio.

[0139] The bias current supply circuit 10 can also be implemented based on a related clamping circuit structure, so that the provided bias current is not affected by the power supply voltage and temperature.

[0140] For example, in one specific embodiment of the present invention, the bias current providing circuit 10 includes a third operational amplifier AMP3, a fourth operational amplifier AMP4, a third transistor MN3, a fourth transistor MP4, a fifth transistor MP5, a sixth transistor MN6, a seventh transistor MP7, an eighth transistor MP8, a ninth transistor MP9, a third resistor R3, a fourth resistor R4, a fifth resistor R5, and a sixth resistor R6.

[0141] The non-inverting input of the third operational amplifier AMP3 receives a reference current and is connected to the first terminal of the third resistor R3. The second terminal of the third resistor R3 is grounded. The output of the third operational amplifier AMP3 is connected to the control terminal of the third transistor MN3. The first terminal of the third transistor MN3 is connected to the second terminal of the fourth transistor MP4, the control terminal of the fourth transistor MP4, and the control terminal of the fifth transistor MP5. The second terminal of the third transistor MN3 is connected to the first terminal of the fourth resistor R4. The second terminal of the fourth resistor R4 is grounded. The first terminals of the fourth transistor MP4 and the fifth transistor MP5 are both connected to the positive terminal of the power supply. The second terminal of the fifth transistor MP5 is connected to the first terminal of the second trimming circuit 70. The second terminal of the second trimming circuit 70 is grounded. The first voltage divider terminal of the second trimming circuit 70 is connected to the inverting input of the third operational amplifier AMP3.

[0142] The non-inverting input terminal of the fourth operational amplifier AMP4 is connected to the second voltage divider terminal of the second trimming circuit 70. The output terminal of the fourth operational amplifier AMP4 is connected to the control terminal of the sixth transistor MN6. The first terminal of the sixth transistor MN6 is connected to the second terminal of the seventh transistor MP7, the control terminal of the seventh transistor MP7, the control terminal of the eighth transistor MP8, and the control terminal of the ninth transistor MP9, respectively. The second terminal of the sixth transistor MN6 is connected to the first terminal of the fifth resistor R5. The second terminal of the fifth resistor R5 is grounded. The first terminals of the seventh transistor MP7, the eighth transistor MP8, and the ninth transistor MP9 are all connected to the positive terminal of the power supply.

[0143] The second terminal of the eighth transistor MP8 is connected to the first terminal of the sixth resistor R6 and the inverting input terminal of the fourth operational amplifier AMP4, respectively, and the second terminal of the sixth resistor R6 is grounded; the second terminal of the ninth transistor MP9 serves as the output terminal of the bias current supply circuit 10 and is connected to the temperature sensing resistor R. Metal The first end.

[0144] See also Figure 7 Specifically, the bias current supply circuit 10 is implemented based on a two-stage operational amplifier and a current mirror structure, and a second adjustment circuit 70 is embedded in the bias current supply circuit 10, so that the bias current provided by the bias current supply circuit 10 is an adjustable bias current.

[0145] Specifically, the reference current I REF A voltage drop is formed across R3. Figure 7 V is written in Chinese. IN2 The voltage value at the non-inverting input of the third operational amplifier AMP3, after being clamped by the third operational amplifier AMP3, causes its feedback voltage V to... FB3 =V IN2 =I REF ×R3.

[0146] Similar to the first trimming circuit 30, the voltage at the second voltage divider terminal of the second trimming circuit 70 can be proportional to the voltage at the first voltage divider terminal of the second trimming circuit 70, and the proportionality coefficient is determined by the topology of the switching array of the second trimming circuit 70. For example, in one specific embodiment, V IN3 The voltage value is equal to V IN3 The sum of the resistances to ground and V FB3 The ratio of the total resistance to ground, then divided by V. FB3 The product of can be expressed as:

[0147] The V here IN3 This refers to the voltage at the second voltage divider terminal of the second adjustment circuit 70, which is also Figure 7 In the implementation, the voltage at the non-inverting input of the fourth operational amplifier AMP4, It refers to V IN3 The total resistance to ground, which is also the resistance from the second voltage divider terminal of the second adjustment circuit 70 to ground. It refers to V FB3 The total resistance to ground is also the resistance from the first voltage divider terminal of the second adjustment circuit 70 to ground.

[0148] In practical applications, the second adjustment circuit 70 can also typically adopt the method described above. Figure 4 The structure of the resistor array and switch array in the circuit means that the second adjustment circuit 70 can have the same circuit structure as the first adjustment circuit 30. Since the principle of the first adjustment circuit 30 has been explained in detail above, the second adjustment circuit 70 will not be explained again here.

[0149] The voltage at the second voltage divider terminal of the second adjustment circuit 70 is directly proportional to the voltage at the first voltage divider terminal of the second adjustment circuit 70, denoted as k2. Therefore, in the example above, V... IN3 =k2×V FB3 Here, k2 represents the above text. Furthermore, the specific value of k2 is determined by the topology of the switch array of the second tuning circuit 70.

[0150] Figure 7 The fourth operational amplifier AMP4 in the system also has a clamping effect, making Figure 7 The feedback voltage V of the fourth operational amplifier AMP4 FB4 (That is, the voltage at the inverting input of the fourth operational amplifier AMP4) is equal to the voltage at its non-inverting input, expressed as V. FB4 =V IN3 Therefore, we can obtain:

[0151] V FB4 =VIN3 =k2×V FB3 =k2×V IN2 =k2×I REF ×R3.

[0152] Figure 7 The eighth transistor MP8 and the ninth transistor MP9 are current mirror structures, and the mirror ratio of MP8 to MP9 is 1:1. Therefore, the adjustable bias current I in the branch containing MP9 is... REF_TRIM for:

[0153] I REF_TRIM =V FB4 / R6=k2×I REF ×R3 / R6.

[0154] Figure 7 The third resistor R3, the fourth resistor R4, the fifth resistor R5, and the sixth resistor R6 in the equation will all be set to the same type of resistor. Therefore, as shown in the above equation, the temperature drift effect of the resistors themselves can cancel each other out in the numerator and denominator. And if we denote k2×R3 / R6 in the above equation as k3, then the adjustable bias current I... REF_TRIM It can be represented as: I REF_TRIM =k3×I REF It can be seen that this implementation method can obtain an adjustable bias current I that is independent of the power supply voltage and temperature. REF_TRIM And the adjustable bias current I REF_TRIM Specifically, with reference current I REF The proportional coefficient can be adjusted by the second adjustment circuit 70.

[0155] Applying the technical solution provided in this embodiment of the invention, the output terminal of the bias current providing circuit is connected to the first terminal of the temperature sensing resistor, allowing it to output a bias current to the temperature sensing resistor. The non-inverting input terminal of the comparator is also connected to the first terminal of the temperature sensing resistor. Therefore, it can be seen that the temperature of the temperature sensing resistor affects its own terminal voltage, which in turn affects the voltage at the non-inverting input terminal of the comparator. The threshold voltage providing circuit can output a threshold voltage through its own output terminal. The inverting input terminal of the comparator is connected to the output terminal of the threshold voltage providing circuit. In other words, the threshold voltage output by the threshold voltage providing circuit acts as a threshold, used for comparison with the terminal voltage of the temperature sensing resistor. The output terminal of the comparator is connected to the power transistor control circuit to control the on / off state of the power transistor. Therefore, if the power transistor overheats, it will be reflected in the terminal voltage of the temperature sensing resistor, and the comparator will turn off the power transistor through the power transistor control circuit, thereby achieving over-temperature protection for the power transistor.

[0156] Furthermore, in this application's solution, the temperature-sensing resistor is positioned directly above the power transistor, and an extremely thin silicon dioxide dielectric layer is provided between the temperature-sensing resistor and the power transistor for isolation. Because the two are directly and perpendicularly thermally coupled, the thermal coupling efficiency is very high, there is no temperature sensing delay, and the detection accuracy is also very high. Moreover, the over-temperature protection circuit in this application's solution is not connected in series with the main power path of the power transistor, therefore it does not introduce any additional impedance or loss into the main power path, ensuring the full performance and high-efficiency operation of the power transistor.

[0157] In summary, the solution proposed in this application can effectively implement the over-temperature protection circuit for the power transistor, with no temperature sensing delay, high accuracy, and without introducing any additional impedance or loss into the main power path.

[0158] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, article, or apparatus that includes said element.

[0159] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0160] This article uses specific examples to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the technical solutions and core ideas of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made to the present invention without departing from the principles of the present invention, and these improvements and modifications also fall within the protection scope of the present invention.

Claims

1. An over-temperature protection circuit for a power transistor, characterized in that, include: Bias current supply circuit, temperature sensing resistor, threshold voltage supply circuit, power transistor control circuit, and comparator; The output terminal of the bias current supply circuit is connected to the first terminal of the temperature sensing resistor to output bias current to the temperature sensing resistor; the second terminal of the temperature sensing resistor is grounded. The threshold voltage providing circuit is used to output a threshold voltage through its own output terminal; The non-inverting input of the comparator is connected to the first end of the temperature sensing resistor, the inverting input is connected to the output of the threshold voltage providing circuit, and the output is connected to the power transistor control circuit to control the on / off state of the power transistor. The temperature-sensing resistor is arranged directly above the power transistor, and a dielectric layer for isolation is provided between the temperature-sensing resistor and the power transistor.

2. The over-temperature protection circuit for the power transistor according to claim 1, characterized in that, The temperature sensing resistor is a metal temperature sensing resistor arranged directly above the active region of the power transistor, and the temperature sensing resistor adopts a continuously bent serpentine layout trace to completely cover the active region of the power transistor. It also includes a closed shielding ring surrounding the temperature-sensing resistor, and the shielding ring is grounded.

3. The over-temperature protection circuit for the power transistor according to claim 1, characterized in that, It also includes the first adjustment circuit; The threshold voltage providing circuit has a reference voltage connected to its input terminal and an adjustable threshold voltage proportional to the reference voltage output through its own output terminal. The threshold voltage providing circuit is connected to the first adjustment circuit to adjust the ratio coefficient between the adjustable threshold voltage and the reference voltage through the first adjustment circuit.

4. The over-temperature protection circuit for the power transistor according to claim 3, characterized in that, The threshold voltage providing circuit includes a first operational amplifier, a first transistor, a second operational amplifier, a second transistor, and a first resistor; The non-inverting input terminal of the first operational amplifier receives the reference voltage, the output terminal of the first operational amplifier is connected to the control terminal of the first transistor, the first terminal of the first transistor is connected to the positive terminal of the power supply, the second terminal of the first transistor is connected to the first terminal of the first trimming circuit, the second terminal of the first trimming circuit is grounded, and the first voltage divider terminal of the first trimming circuit is connected to the inverting input terminal of the first operational amplifier. The non-inverting input of the second operational amplifier is connected to the second voltage divider of the first trimming circuit. The output of the second operational amplifier is connected to the control terminal of the second transistor. The first terminal of the second transistor is connected to the positive terminal of the power supply. The second terminal of the second transistor is connected to the first terminal of the first resistor and the inverting input of the second operational amplifier, respectively. The second terminal of the first resistor is grounded. The first terminal of the first resistor serves as the output of the threshold voltage supply circuit. In the first adjustment circuit, one or more resistors are connected in series between the first voltage divider terminal and the first terminal of the first adjustment circuit, and one or more resistors are connected in series between the first voltage divider terminal and the second terminal of the first adjustment circuit; the voltage of the second voltage divider terminal of the first adjustment circuit is proportional to the voltage of the first voltage divider terminal of the first adjustment circuit, and the proportionality coefficient is determined by the topology of the switch array of the first adjustment circuit.

5. The over-temperature protection circuit for the power transistor according to claim 4, characterized in that, The first adjustment circuit includes: a resistor array, a switch array cooperating with the resistor array, and a logic selection circuit for controlling the topology state of the switch array, such that the second voltage divider terminal of the first adjustment circuit is connected to the first terminal of one of the resistors in the resistor array through the switch array. The resistor array includes M resistors connected in series between the first voltage divider terminal of the first trimming circuit and the first terminal of the first trimming circuit, and N resistors connected in series between the first voltage divider terminal of the first trimming circuit and the second terminal of the first trimming circuit. Wherein, M and N are both positive integers. For any resistor in the resistor array, the end of the resistor closest to the positive terminal of the power supply is taken as the first end of the resistor, and the end furthest from the positive terminal of the power supply is taken as the second end of the resistor.

6. The over-temperature protection circuit for the power transistor according to claim 5, characterized in that, The resistor array includes: a first voltage divider resistor to a sixteenth voltage divider resistor connected in series in the order from the second terminal of the first adjustment circuit to the first terminal of the first adjustment circuit; The switch array includes a first-level switch group, a second-level switch group, and a third-level switch group; The first-level switch group includes a first switch to a sixteenth switch, and the first terminals of the first switch to the sixteenth switch are respectively connected to the first terminals of the first voltage divider resistor to the sixteenth voltage divider resistor. The second terminal of the i-th switch among the first switch to the sixteenth switch is connected to the second terminal of the (i+1)-th switch. The connection nodes are sequentially arranged from bottom to top as the first output terminal to the eighth output terminal of the first-level switch group; i is an odd number. The second-level switch group includes switches seventeen to twenty-four, and the first ends of switches seventeen to twenty-four are respectively connected to the first output end to the eighth output end of the first-level switch group. The second end of switch i among switches seventeen to twenty-four is connected to the second end of switch i+1. The connection nodes are sequentially arranged from bottom to top as the first output end to the fourth output end of the second-level switch group; i is an odd number. The third-level switch group includes switches 25 to 28, and the first ends of switches 25 to 28 are respectively connected to the first output end to the fourth output end of the second-level switch group. The second ends of switches 25 to 28 are interconnected and serve as the second voltage divider of the first adjustment circuit.

7. The over-temperature protection circuit for the power transistor according to claim 6, characterized in that, The logic selection circuit includes: The first-level logic selection sub-circuit is used to control each switch in the first-level switch group so that at the same time, the odd-numbered switches or the even-numbered switches in the first-level switch group are turned on. The second-level logic selection sub-circuit is used to control each switch in the second-level switch group so that at the same time, the odd-numbered switches or the even-numbered switches in the second-level switch group are turned on. A third-level logic selection sub-circuit is used to control each switch in the third-level switch group, such that at any given time, only one switch in the third-level switch group is turned on.

8. The over-temperature protection circuit for the power transistor according to claim 4, characterized in that, It also includes: a first inverter, a first switching transistor, a second switching transistor, and a second resistor; The output terminal of the comparator is connected to the input terminal of the first inverter and the control terminal of the first switching transistor, respectively. The output terminal of the first inverter is connected to the control terminal of the second switching transistor, and the output terminal of the first inverter is connected to the power transistor control circuit to control the on / off state of the power transistor through the power transistor control circuit. The first terminal of the first switch is connected to the first terminal of the first resistor. The second terminal of the first switch is connected to the inverting input terminal of the comparator and the second terminal of the second switch, and the connection terminal serves as the output terminal of the threshold voltage providing circuit. The first terminal of the second switch is connected to the second terminal of the first resistor and the first terminal of the second resistor, and the second terminal of the second resistor is grounded.

9. The over-temperature protection circuit for the power transistor according to any one of claims 1 to 8, characterized in that, It also includes a second adjustment circuit; The input terminal of the bias current supply circuit is connected to a reference current, and an adjustable bias current proportional to the reference current is output through its own output terminal. The bias current supply circuit is connected to the second adjustment circuit to adjust the ratio coefficient between the adjustable bias current and the reference current.

10. The over-temperature protection circuit for the power transistor according to claim 9, characterized in that, The bias current supply circuit includes a third operational amplifier, a fourth operational amplifier, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a third resistor, a fourth resistor, a fifth resistor, and a sixth resistor. The non-inverting input of the third operational amplifier receives the reference current and is connected to the first terminal of the third resistor. The second terminal of the third resistor is grounded. The output of the third operational amplifier is connected to the control terminal of the third transistor. The first terminal of the third transistor is connected to the second terminal of the fourth transistor, the control terminal of the fourth transistor, and the control terminal of the fifth transistor. The second terminal of the third transistor is connected to the first terminal of the fourth resistor. The second terminal of the fourth resistor is grounded. The first terminals of the fourth transistor and the fifth transistor are both connected to the positive terminal of the power supply. The second terminal of the fifth transistor is connected to the first terminal of the second adjustment circuit. The second terminal of the second adjustment circuit is grounded. The first voltage divider terminal of the second adjustment circuit is connected to the inverting input of the third operational amplifier. The non-inverting input terminal of the fourth operational amplifier is connected to the second voltage divider terminal of the second trimming circuit. The output terminal of the fourth operational amplifier is connected to the control terminal of the sixth transistor. The first terminal of the sixth transistor is connected to the second terminal of the seventh transistor, the control terminal of the seventh transistor, the control terminal of the eighth transistor, and the control terminal of the ninth transistor. The second terminal of the sixth transistor is connected to the first terminal of the fifth resistor. The second terminal of the fifth resistor is grounded. The first terminals of the seventh transistor, the eighth transistor, and the ninth transistor are all connected to the positive terminal of the power supply. The second terminal of the eighth transistor is connected to the first terminal of the sixth resistor and the inverting input terminal of the fourth operational amplifier, respectively, and the second terminal of the sixth resistor is grounded; the second terminal of the ninth transistor serves as the output terminal of the bias current supply circuit and is connected to the first terminal of the temperature sensing resistor.

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