An oscillating signal detection circuit and method

CN122553904APending Publication Date: 2026-08-11SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-05-28
Publication Date
2026-08-11

AI Technical Summary

Technical Problem

[0004]本发明提供了一种振荡信号检测电路和检测方法,以解决振荡信号检测电路的成本较高的技术问题

Benefits of technology

[0015]本发明提供的一种振荡信号检测电路和检测方法,在待检信号中出现振荡信号时,反相器输出高电平;在振荡信号消失时,反相器输出低电平。通过反相器输出的信号逻辑电平即可判断待检信号中是否存在振荡信号,检测电路不再需要设置高精度的电流传感器,成本较低。

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Abstract

This invention provides an oscillation signal detection circuit and method. The detection circuit includes a level transition pulse generator, a switching transistor, a power supply, a resistor, a capacitor, and an inverter. The input terminal of the level transition pulse generator is used to input the signal to be tested, and the output terminal of the level transition pulse generator is connected to the control terminal of the switching transistor. One end of the switching transistor, one end of the capacitor, and the input terminal of the inverter are respectively connected to one end of the resistor. The other end of the resistor is connected to the power supply, and the other end of the capacitor is connected to ground. The level transition pulse generator is used to detect whether there is a rising or falling transition in the signal to be tested. When the switching transistor is turned on, the capacitor discharges to the ground through the switching transistor, causing the inverter to output a high level. When the switching transistor is turned off, the power supply charges the capacitor through the resistor. When the voltage of the capacitor reaches a preset voltage, the inverter outputs a low level. This solution can determine whether there is an oscillation signal in the signal to be tested by the logic level of the signal output by the inverter.
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Description

Technical Field

[0001] This invention relates to the field of signal detection technology, and in particular to an oscillation signal detection circuit and detection method. Background Technology

[0002] Circuits such as phase-locked loops (PLLs), delay-locked loops (DLLs), and oscillators all contain oscillation signals. These circuits need to detect the persistence of these oscillation signals in real time during operation to adjust circuit parameters promptly and ensure a normal output signal. Currently, oscillator circuits typically incorporate oscillation signal detection circuits to detect the presence of oscillation signals. These circuits include high-precision current sensors that monitor the current in the circuit in real time to determine the presence of an oscillation signal.

[0003] However, high-precision current sensors are expensive, which in turn increases the cost of oscillation signal detection circuits. Summary of the Invention

[0004] This invention provides an oscillation signal detection circuit and detection method to solve the technical problem of high cost of oscillation signal detection circuits.

[0005] To solve the above-mentioned technical problems, the present invention provides an oscillation signal detection circuit, including a level transition pulse generator, a switching transistor, a power supply, a resistor, a capacitor, and an inverter;

[0006] The input terminal of the level transition pulse generator is used to input the signal to be detected, and the output terminal of the level transition pulse generator is connected to the control terminal of the switching transistor; one end of the switching transistor, one end of the capacitor, and the input terminal of the inverter are respectively connected to one end of the resistor, the other end of the resistor is connected to the power supply, and the other end of the capacitor is connected to the ground terminal.

[0007] The level transition pulse generator is used to detect whether there is a rising transition or a falling transition in the signal to be detected, and outputs a high-level pulse or a low-level pulse of a set width when a rising transition or a falling transition is detected, and turns on the switching transistor through the high-level pulse or the low-level pulse.

[0008] When the switch is turned on, the capacitor discharges to the ground terminal through the switch, so that the inverter outputs a high level; when the switch is turned off, the power supply charges the capacitor through the resistor, and when the voltage of the capacitor reaches a preset voltage, the inverter outputs a low level.

[0009] Preferably, the level transition pulse generator includes a signal delay chain and an XOR gate. The input terminal of the signal delay chain and one input terminal of the XOR gate are respectively used to input the signal to be detected; the output terminal of the signal delay chain and the other input terminal of the XOR gate are connected; and the output terminal of the XOR gate is connected to the control terminal of the switching transistor.

[0010] Preferably, the signal delay chain includes multiple signal delay units connected in series.

[0011] Preferably, the switching transistor is an NMOS transistor, which includes a gate, a source, and a drain. The gate is connected to the output terminal of the level transition pulse generator, the source is connected to ground, and the drain is connected to one end of the capacitor and one end of the resistor. When the level transition pulse generator outputs a high-level pulse, the NMOS transistor is turned on; when the level transition pulse generator has no output signal and remains at a low level, the NMOS transistor is turned off.

[0012] The present invention also provides a method for detecting oscillation signals, comprising the following steps:

[0013] The signal to be tested is input into the oscillation signal detection circuit described in any of the above items;

[0014] The presence of an oscillation signal in the signal under test is determined based on the output of the oscillation signal detection circuit. If the oscillation signal detection circuit outputs a high level, it is determined that an oscillation signal exists in the signal under test; if the oscillation signal detection circuit outputs a low level, it is determined that no oscillation signal exists in the signal under test.

[0015] This invention provides an oscillation signal detection circuit and method. When an oscillation signal appears in the signal under test, the inverter outputs a high level; when the oscillation signal disappears, the inverter outputs a low level. The presence of an oscillation signal in the signal under test can be determined by the logic level of the signal output by the inverter. The detection circuit no longer needs to use a high-precision current sensor, resulting in lower cost. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of an oscillation signal detection circuit provided in an embodiment of the present invention.

[0017] Figure 2 yes Figure 1 Signal waveforms of each node.

[0018] Figure 3 This is a schematic diagram of an oscillation signal detection circuit provided in an embodiment of the present invention.

[0019] The attached figures are labeled as follows:

[0020] Level transition pulse generator - TPG, switch - K, power supply - VDD, capacitor - C, inverter - INV, resistor - R, ground terminal - GND, signal under test - OSCIN, output signal of inverter - OUT, N1 - first node, N2 - second node, signal delay chain - DLY, XOR gate - XOR, NMOS transistor - M. Detailed Implementation

[0021] To make the objectives, advantages, and features of the present invention clearer, the following detailed description of an oscillation signal detection circuit and detection method proposed by the present invention is provided in conjunction with the accompanying drawings. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the explanation of the embodiments of the present invention.

[0022] In the description of this invention, the terms "first," "second," and other qualifiers are added for convenience of description and reference, and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with qualifiers such as "first" and "second" may explicitly or implicitly include one or more of that feature.

[0023] like Figure 1 and Figure 2 As shown, this embodiment provides an oscillation signal detection circuit, including a level transition pulse generator (TPG), a switching transistor (K), a power supply (VDD), a resistor (R), a capacitor (C), and an inverter (INV). The input terminal of the level transition pulse generator (TPG) is used to input the signal to be detected (OSCIN), and the output terminal of the level transition pulse generator (TPG) is connected to the control terminal of the switching transistor (K). One end of the switching transistor (K), one end of the capacitor (C), and the input terminal of the inverter (INV) are respectively connected to one end of the resistor (R). The other end of the resistor (R) is connected to the power supply (VDD), and the other end of the capacitor (C) is connected to the ground terminal (GND). The level transition pulse generator (TPG) is used for... The system detects whether a rising or falling transition exists in the signal OSCIN under test, and outputs a high-level pulse or a low-level pulse of a set width when a rising or falling transition is detected. This high-level pulse or low-level pulse turns on the switch K. When the switch K is on, the capacitor C discharges through the switch K to the ground terminal GND, causing the inverter INV to output a high level, i.e., the output signal OUT of the inverter INV is high. When the switch K is off, the power supply VDD charges the capacitor C through the resistor R. When the voltage of the capacitor C reaches a preset voltage, the inverter INV outputs a low level. The output terminal of the level transition pulse generator TPG is the first node N1, and the input terminal of the inverter INV is the second node N2.

[0024] The detection principle of the oscillation signal detection circuit provided in this embodiment is as follows: When an oscillation signal exists in the signal to be detected OSCIN, the level transition pulse generator TPG can detect the rising and falling transitions of the oscillation signal. When a rising or falling transition is detected, a high-level pulse or a low-level pulse of a set width is output, causing the switch K to turn on. After the switch K turns on, the capacitor C discharges rapidly to the ground terminal GND through the turned-on switch K. In terms of design, it is easy to make the remaining voltage of the capacitor C after one discharge much less than the maximum value of the low input level VIL of the inverter INV, so that the inverter INV outputs a high level. When the high-level pulse or the low-level pulse ends, the switch K turns off, and the power supply VDD charges the capacitor C through the resistor R. However, the voltage of the capacitor C after charging is still less than the maximum value of the low input level VIL of the inverter INV, and the inverter INV maintains a high output level. When the oscillation signal in the test signal OSCIN disappears, regardless of whether it remains at a high level or a low level, the level transition pulse generator TPG no longer outputs a high-level pulse or a low-level pulse because of the lack of a level transition. The switch K is turned off, and the capacitor C gradually charges to the power supply voltage. When the voltage at node N2 is greater than the minimum high-level input value VIH of the inverter INV, the inverter INV outputs a low level.

[0025] This embodiment provides an oscillation signal detection circuit. When an oscillation signal appears in the test signal OSCIN, the inverter INV outputs a high level; when the oscillation signal disappears, the inverter INV outputs a low level. The presence of an oscillation signal in the test signal OSCIN can be determined by the logic level of the signal output by the inverter INV. The detection circuit no longer needs to use a high-precision current sensor, resulting in lower cost.

[0026] Preferred, such as Figure 2 and Figure 3 As shown, the level transition pulse generator TPG includes a signal delay chain DLY and an XOR gate. One input terminal of the signal delay chain DLY and one input terminal of the XOR gate are used to input the signal to be detected, OSCIN. The output terminal of the signal delay chain DLY is connected to the other input terminal of the XOR gate. The output terminal of the XOR gate is connected to the control terminal of the switching transistor K. The level transition pulse generator TPG, formed by the combination of the signal delay chain DLY and the XOR gate, can detect rising and falling transitions of oscillating signals.

[0027] Preferred, such as Figure 3 As shown, the signal delay chain DLY comprises multiple signal delay units connected in series. Multiple sequentially connected signal delay units can be configured to form the delay chain DLY according to the actual needs of the circuit, thereby increasing the delay time.

[0028] Preferred, such as Figure 3 As shown, the switching transistor K is an NMOS (N-Metal-Oxide-Semiconductor) transistor M. The NMOS transistor M includes a gate, a source, and a drain. The gate is connected to the output terminal of the level transition pulse generator TPG, the source is connected to ground (GND), and the drain is connected to one end of the capacitor C and one end of the resistor R. When the level transition pulse generator TPG outputs a high-level pulse, the NMOS transistor M is turned on; when the level transition pulse generator TPG has no output signal and remains at a low level, the NMOS transistor M is turned off. Using a high-level pulse can turn on the NMOS, thereby realizing the discharge process of capacitor C. When the high-level pulse disappears, the NMOS is turned off, and capacitor C begins to charge.

[0029] In other embodiments, the switch K can also be implemented using a PMOS transistor. In this case, the operating logic is the opposite of when the switch K is implemented using an NMOS transistor, and the topology is also symmetrical. The details are obvious and will not be elaborated further.

[0030] refer to Figure 1 As shown, based on the same technical concept as the oscillation signal detection circuit described above, this embodiment provides an oscillation signal detection method, including the following steps:

[0031] S1. Input the signal to be tested, OSCIN, into the oscillation signal detection circuit described in any of the above items;

[0032] S2. Determine whether there is an oscillation signal in the test signal OSCIN based on the output result of the oscillation signal detection circuit. If the oscillation signal detection circuit outputs a high level, it is determined that there is an oscillation signal in the test signal OSCIN; if the oscillation signal detection circuit outputs a low level, it is determined that there is no oscillation signal in the test signal OSCIN.

[0033] This embodiment provides an oscillation signal detection method. The presence of an oscillation signal in the signal to be tested, OSCIN, can be determined by the output logic level of the oscillation signal detection circuit, i.e., the output logic level of the inverter INV. The detection circuit no longer needs to be equipped with a high-precision current sensor, resulting in lower cost.

[0034] In summary, the oscillation signal detection circuit and method provided by this invention outputs a high level from inverter INV when an oscillation signal appears in the test signal OSCIN, and a low level when the oscillation signal disappears. The presence of an oscillation signal in the test signal OSCIN can be determined solely by the logic level of the signal output from inverter INV. This eliminates the need for a high-precision current sensor in the detection circuit, resulting in lower costs.

[0035] The above description is only a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the present invention.

Claims

1. An oscillation signal detection circuit, characterized in that, It includes a level transition pulse generator, switching transistors, power supply, resistors, capacitors, and inverters; The input terminal of the level transition pulse generator is used to input the signal to be detected, and the output terminal of the level transition pulse generator is connected to the control terminal of the switching transistor; One end of the switching transistor, one end of the capacitor, and the input terminal of the inverter are respectively connected to one end of the resistor, the other end of the resistor is connected to the power supply, and the other end of the capacitor is connected to the ground terminal. The level transition pulse generator is used to detect whether there is a rising transition or a falling transition in the signal to be detected, and outputs a high-level pulse or a low-level pulse of a set width when a rising transition or a falling transition is detected, and turns on the switching transistor through the high-level pulse or the low-level pulse. When the switch is turned on, the capacitor discharges to the ground terminal through the switch, so that the inverter outputs a high level; when the switch is turned off, the power supply charges the capacitor through the resistor, and when the voltage of the capacitor reaches a preset voltage, the inverter outputs a low level.

2. The oscillation signal detection circuit as described in claim 1, characterized in that, The level transition pulse generator includes a signal delay chain and an XOR gate. The input terminal of the signal delay chain and one input terminal of the XOR gate are respectively used to input the signal to be detected. The output terminal of the signal delay chain and the other input terminal of the XOR gate are connected. The output terminal of the XOR gate is connected to the control terminal of the switching transistor.

3. The oscillation signal detection circuit as described in claim 2, characterized in that, The signal delay chain includes multiple signal delay units connected in series.

4. The oscillation signal detection circuit as described in claim 1, characterized in that, The switching transistor is an NMOS transistor, which includes a gate, a source, and a drain. The gate is connected to the output terminal of the level transition pulse generator, the source is connected to ground, and the drain is connected to one end of the capacitor and one end of the resistor. When the level transition pulse generator outputs a high-level pulse, the NMOS transistor is turned on; when the level transition pulse generator has no output signal and remains at a low level, the NMOS transistor is turned off.

5. A method for detecting oscillation signals, characterized in that, Includes the following steps: The signal to be tested is input into the oscillation signal detection circuit according to any one of claims 1-4; The presence of an oscillation signal in the signal under test is determined based on the output of the oscillation signal detection circuit. If the oscillation signal detection circuit outputs a high level, it is determined that an oscillation signal exists in the signal under test; if the oscillation signal detection circuit outputs a low level, it is determined that no oscillation signal exists in the signal under test.