Methods, systems, apparatus, processors, and readable storage media for implementing compression compensation for a vector network analyzer receiver

Abstract

This invention relates to a method for implementing compression compensation for a vector network analyzer receiver, comprising the following steps: pre-calibration; setting up a test system; determining the linear operating range of the receiver at a single frequency; acquiring the amplitude compression compensation value of the receiver across the entire power band in segments; acquiring compensation values ​​at multiple frequency points; and real-time compensation. The method, system, apparatus, processor, and computer-readable storage medium of this invention for implementing compression compensation for a vector network analyzer receiver, by constructing a calibration system using an external signal source and a digitally controlled attenuator, combined with synchronous triggering and power scanning, can efficiently and automatically determine the linear and nonlinear operating ranges of the receiver at different power levels throughout the entire operating frequency band, and collect the corresponding amplitude compression compensation data and store it in the memory. This improves the amplitude measurement accuracy and reliability of the vector network analyzer under large dynamic range power testing, and the compensation achieves accurate measurement over a wider power range, enhancing the overall performance and practicality of the instrument.

Description

Technical Field

[0001] This invention relates to the field of communication instrument measurement, and more particularly to the field of designing receivers for vector network analyzers. Specifically, it relates to a method, system, apparatus, processor, and computer-readable storage medium for implementing compression compensation in a vector network analyzer receiver. Background Technology

[0002] The basic function of a vector network analyzer is to comprehensively describe and measure the S-parameters of the network along the internal electrical signal transmission path of the device under test (DUT). These generally include reflection and transmission parameters. Its applications are very wide-ranging. Basic reflection measurements include various standing waves, return loss, and fault diagnosis; transmission measurements include attenuators, mixers, amplifiers, and filters. As a precision instrument, many fields consider the test results of a vector network analyzer as a reference standard. This necessitates that the vector network analyzer itself have extremely small measurement errors. The receiver is a crucial radio frequency (RF) unit of the vector network analyzer, but it does not exhibit linear characteristics across the entire input power range of the measured frequency. Especially at high and low power inputs, it exhibits varying degrees of nonlinear amplitude compression. To ensure that the test results of the vector network analyzer are within the specified error range, amplitude compensation correction must be performed on the raw measurement data from the receiver. Summary of the Invention

[0003] The purpose of this invention is to overcome the shortcomings of the prior art and provide a method, system, device, processor and computer-readable storage medium for implementing compression compensation for vector network analyzer receivers that meets the requirements of high measurement accuracy, simple operation and wide applicability.

[0004] To achieve the above objectives, the present invention provides a method, system, apparatus, processor, and computer-readable storage medium for implementing compression compensation in a vector network analyzer receiver, as follows: The main feature of this method for implementing compression compensation in a vector network analyzer receiver is that the method includes the following steps: (1) The output power of the signal source at different frequencies is calibrated and the power calibration value is saved. The numerical control attenuator is calibrated and the attenuator calibration value at each step is saved. The minimum power of the signal source is MindBm and the maximum receiving power of the vector network analyzer receiver is MaxdBm. (2) Build a test system; (3) Select the frequency to be measured, set the vector network analyzer to power sweep mode, set the power range to [MindBm, MaxdBm], and normalize the receiver response data; (4) Set the digitally controlled attenuator to 3dB attenuation. Based on the receiver power fluctuation range ±wdB, determine the receiver's linear operating range as [ndBm, mdBm], where n < m; (5) Obtain the full power band receiver amplitude compression compensation value in segments, that is, set the compensation value of the linear working area [ndBm, mdBm] to 0, and obtain the receiver amplitude compression compensation value of the high power band [mdBm, MaxdBm] and the low power band [MindBm, ndBm] in sequence. (6) Select the remaining test frequencies and repeat steps (3) to (5) to obtain the receiver amplitude compression compensation values ​​for the full power range of all operating frequencies and save them to the memory; (7) When the vector network analyzer is working, it searches for the corresponding amplitude compression compensation value in the memory based on the original measured power data, performs amplitude compensation on the original measured data, and completes the receiver nonlinear amplitude compensation.

[0005] Preferably, step (1) specifically includes the following steps: The minimum step size for signal source power calibration is determined based on the nonlinear approximation of the linear change by the vector network analyzer receiver, or through multiple experiments.

[0006] Preferably, step (2) specifically includes the following steps: Connect the signal source output port to the measured port of the vector network analyzer via a digitally controlled attenuator. Connect the external trigger output port of the vector network analyzer to the external trigger input port of the signal source. Connect the control port of the vector network analyzer to the control ports of the digitally controlled attenuator and the signal source, respectively.

[0007] Preferably, step (2) further includes the following steps: The signal source and the vector network analyzer share a common reference clock and work synchronously based on the external trigger input signal; the numerically controlled attenuator is initially set to 0dB attenuation.

[0008] Preferably, obtaining the receiver amplitude compression compensation value for the high power range [mdBm, MaxdBm] in step (5) specifically includes the following steps: When mn≥Max-m, set the digitally controlled attenuator to 0dB, set the power sweep range to [ndBm, MaxdBm], and normalize the receiver response data; Set the digitally controlled attenuator to (Max-m) dB. At this time, the receiver is in a linear state in the power range of [n+(Max-m) dBm, MaxdBm]. Use the receiver standard value in the power range of [n+(Max-m) dBm, mdBm] to calibrate and obtain the amplitude compression compensation value of [mdBm, MaxdBm]. When mn < Max-m, obtain the compensation value of the power segment [mdBm, m + (mn-1)dBm], and repeatedly execute the above segmented calibration logic until the compensation value of the full power segment [mdBm, MaxdBm] is obtained.

[0009] Preferably, obtaining the compensation value for the power range [mdBm, m+(mn-1)dBm] specifically includes the following steps: Set the digitally controlled attenuator to 0dB, set the power sweep range to [ndBm, MaxdBm], and normalize the receiver response data; The digitally controlled attenuator is set to (mn-1) dB. At this time, the receiver is in a linear state in the power range of [n+(mn-1) dBm, m+(mn-1) dBm]. The amplitude compression compensation value of (mdBm, m+(mn-1) dBm) is obtained by calibration using the receiver standard value in the power range of [n+(mn-1) dBm, mdBm].

[0010] Preferably, obtaining the receiver amplitude compression compensation value for the low-power band [MindBm, ndBm] in step (5) specifically includes the following steps: Set the power scan range to [MindBm, MaxdBm], determine the initial attenuation value L of the numerically controlled attenuator based on the linear working area length, and normalize the receiver response data. The numerically controlled attenuator is set to L1=L+(mn) / 2. At this time, the power range of [(m+(mn) / 2)dBm, (m+L)dBm] is linear in both attenuation states. Using the receiver standard value of the power range, the amplitude compression compensation value of [(MindBm-L1)dBm, ndBm)] is calibrated and obtained. To obtain the amplitude compression compensation value for the power range below (MindBm-L1)dBm, directly use the compensation value of the (MindBm-L1)dBm power point.

[0011] This system for compression compensation of a vector network analyzer receiver is characterized in that it includes a signal source, a digitally controlled attenuator, a vector network analyzer, a control unit, and a memory. The output port of the signal source is connected to the measured port of the vector network analyzer through the digitally controlled attenuator. The external trigger output port of the vector network analyzer is connected to the external trigger input port of the signal source. The memory is used to store the signal source power calibration value, the digitally controlled attenuator calibration value, the receiver amplitude compression compensation value for the full power band of each frequency point, and the original measurement data. The control unit is connected to the signal source, the digitally controlled attenuator, the vector network analyzer, and the memory.

[0012] Preferably, the control unit includes a power calibration module, a linear region determination module, a segmented compensation value calculation module, and a real-time compensation module, which are connected in sequence. The power calibration module is used to perform pre-calibration of the signal source and the digitally controlled attenuator. The linear region determination module is used to determine the linear operating region at a single frequency based on the receiver power fluctuation range. The segmented compensation value calculation module is used to calculate the receiver amplitude compression compensation values ​​for high power, low power, and extremely low power segments. The real-time compensation module is used to retrieve the corresponding compensation values ​​from the memory to complete the amplitude correction of the original measurement data when the vector network analyzer is working.

[0013] The main feature of this device for implementing compression compensation in a vector network analyzer receiver is that the device comprises: A processor is configured to execute computer-executable instructions; The memory stores one or more computer-executable instructions, which, when executed by the processor, implement the steps of the method described above for implementing compression compensation for a vector network analyzer receiver.

[0014] The processor for implementing compression compensation for a vector network analyzer receiver is characterized in that the processor is configured to execute computer-executable instructions, which, when executed by the processor, implement the various steps of the aforementioned method for implementing compression compensation for a vector network analyzer receiver.

[0015] The computer-readable storage medium is characterized in that it stores a computer program that can be executed by a processor to implement the various steps of the method described above for implementing compression compensation for a vector network analyzer receiver.

[0016] This invention employs a method, system, apparatus, processor, and computer-readable storage medium for compression compensation in vector network analyzer receivers. By constructing a calibration system using an external signal source and a digitally controlled attenuator, combined with synchronous triggering and power scanning, the system can efficiently and automatically determine the linear and nonlinear operating ranges of the receiver at different power levels across the entire operating frequency band, and collect the corresponding amplitude compression compensation data, storing it in memory. During actual measurements with the vector network analyzer, the system, based on the current test power and frequency, searches for and applies pre-stored compensation values ​​in real time to correct the original measured amplitude, thereby correcting the receiver's response in the nonlinear region to a linear state. This method significantly improves the amplitude measurement accuracy and reliability of the vector network analyzer under large dynamic range power testing, without relying on the ideal linear characteristics of the receiver hardware. The compensation achieves accurate measurements over a wider power range, enhancing the overall performance and practicality of the instrument. Attached Figure Description

[0017] Figure 1 This is a wiring diagram of the system for implementing compression compensation for a vector network analyzer receiver according to the present invention.

[0018] Figure 2 This is a schematic diagram illustrating the process of finding the linear operating region of the receiver power amplitude in the method for implementing compression compensation for a vector network analyzer receiver according to the present invention.

[0019] Figure 3 This is a schematic diagram illustrating the process of obtaining the amplitude compression compensation value of a single audio point in a vector network analyzer receiver, according to the method of the present invention for implementing compression compensation in a vector network analyzer receiver.

[0020] Figure 4 This is a schematic diagram of the original data curve of the receiver when a 3dB attenuator is connected in an embodiment of the method for implementing compression compensation for a vector network analyzer receiver according to the present invention.

[0021] Figure 5 This is a schematic diagram of the curve after the receiver uses the compensation value when a 3dB attenuator is connected in an embodiment of the method for implementing compression compensation for a vector network analyzer receiver according to the present invention. Detailed Implementation

[0022] To more clearly describe the technical content of the present invention, the following description is provided in conjunction with specific embodiments.

[0023] The method for implementing compression compensation in a vector network analyzer receiver according to the present invention includes the following steps: (1) The output power of the signal source at different frequencies is calibrated and the power calibration value is saved. The numerical control attenuator is calibrated and the attenuator calibration value at each step is saved. The minimum power of the signal source is MindBm and the maximum receiving power of the vector network analyzer receiver is MaxdBm. (2) Build a test system; (3) Select the frequency to be measured, set the vector network analyzer to power sweep mode, set the power range to [MindBm, MaxdBm], and normalize the receiver response data; (4) Set the digitally controlled attenuator to 3dB attenuation. Based on the receiver power fluctuation range ±wdB, determine the receiver's linear operating range as [ndBm, mdBm], where n < m; (5) Obtain the full power band receiver amplitude compression compensation value in segments, that is, set the compensation value of the linear working area [ndBm, mdBm] to 0, and obtain the receiver amplitude compression compensation value of the high power band [mdBm, MaxdBm] and the low power band [MindBm, ndBm] in sequence. (6) Select the remaining test frequencies and repeat steps (3) to (5) to obtain the receiver amplitude compression compensation values ​​for the full power range of all operating frequencies and save them to the memory; (7) When the vector network analyzer is working, it searches for the corresponding amplitude compression compensation value in the memory based on the original measured power data, performs amplitude compensation on the original measured data, and completes the receiver nonlinear amplitude compensation.

[0024] In a preferred embodiment of the present invention, step (1) specifically includes the following steps: The minimum step size for signal source power calibration is determined based on the nonlinear approximation of the linear change by the vector network analyzer receiver, or through multiple experiments.

[0025] In a preferred embodiment of the present invention, step (2) specifically includes the following steps: Connect the signal source output port to the measured port of the vector network analyzer via a digitally controlled attenuator. Connect the external trigger output port of the vector network analyzer to the external trigger input port of the signal source. Connect the control port of the vector network analyzer to the control ports of the digitally controlled attenuator and the signal source, respectively.

[0026] In a preferred embodiment of the present invention, step (2) further includes the following steps: The signal source and the vector network analyzer share a common reference clock and work synchronously based on the external trigger input signal; the numerically controlled attenuator is initially set to 0dB attenuation.

[0027] In a preferred embodiment of the present invention, the step (5) of obtaining the receiver amplitude compression compensation value of the high power band [mdBm, MaxdBm] specifically includes the following steps: When mn≥Max-m, set the digitally controlled attenuator to 0dB, set the power sweep range to [ndBm, MaxdBm], and normalize the receiver response data; Set the digitally controlled attenuator to (Max-m) dB. At this time, the receiver is in a linear state in the power range of [n+(Max-m) dBm, MaxdBm]. Use the receiver standard value in the power range of [n+(Max-m) dBm, mdBm] to calibrate and obtain the amplitude compression compensation value of [mdBm, MaxdBm]. When mn < Max-m, obtain the compensation value of the power segment [mdBm, m + (mn-1)dBm], and repeatedly execute the above segmented calibration logic until the compensation value of the full power segment [mdBm, MaxdBm] is obtained.

[0028] As a preferred embodiment of the present invention, obtaining the compensation value of the power range [mdBm, m+(mn-1)dBm] specifically includes the following steps: Set the digitally controlled attenuator to 0dB, set the power sweep range to [ndBm, MaxdBm], and normalize the receiver response data; The digitally controlled attenuator is set to (mn-1) dB. At this time, the receiver is in a linear state in the power range of [n+(mn-1) dBm, m+(mn-1) dBm]. The amplitude compression compensation value of (mdBm, m+(mn-1) dBm) is obtained by calibration using the receiver standard value in the power range of [n+(mn-1) dBm, mdBm].

[0029] In a preferred embodiment of the present invention, the step (5) of obtaining the receiver amplitude compression compensation value for the low power band [MindBm, ndBm] specifically includes the following steps: Set the power scan range to [MindBm, MaxdBm], determine the initial attenuation value L of the numerically controlled attenuator based on the linear working area length, and normalize the receiver response data. The numerically controlled attenuator is set to L1=L+(mn) / 2. At this time, the power range of [(m+(mn) / 2)dBm, (m+L)dBm] is linear in both attenuation states. Using the receiver standard value of the power range, the amplitude compression compensation value of [(MindBm-L1)dBm, ndBm)] is calibrated and obtained. To obtain the amplitude compression compensation value for the power range below (MindBm-L1)dBm, directly use the compensation value of the (MindBm-L1)dBm power point.

[0030] The present invention discloses a system for implementing compression compensation for a vector network analyzer receiver. The system includes a signal source, a digitally controlled attenuator, a vector network analyzer, a control unit, and a memory. The output port of the signal source is connected to the measured port of the vector network analyzer via the digitally controlled attenuator. The external trigger output port of the vector network analyzer is connected to the external trigger input port of the signal source. The memory stores the signal source power calibration value, the digitally controlled attenuator calibration value, the receiver amplitude compression compensation value for the full power band at each frequency point, and the original measurement data. The control unit is connected to the signal source, the digitally controlled attenuator, the vector network analyzer, and the memory.

[0031] In a preferred embodiment of the present invention, the control unit includes a power calibration module, a linear region determination module, a segmented compensation value calculation module, and a real-time compensation module. The power calibration module, linear region determination module, segmented compensation value calculation module, and real-time compensation module are connected in sequence. The power calibration module is used to perform pre-calibration of the signal source and the digitally controlled attenuator. The linear region determination module is used to determine the linear operating region under a single frequency based on the receiver power fluctuation range. The segmented compensation value calculation module is used to calculate the receiver amplitude compression compensation values ​​for high power segment, low power segment, and extremely low power segment. The real-time compensation module is used to retrieve the corresponding compensation value from the memory to complete the amplitude correction of the original measurement data when the vector network analyzer is working.

[0032] The present invention provides an apparatus for implementing compression compensation for a vector network analyzer receiver, wherein the apparatus comprises: A processor is configured to execute computer-executable instructions; The memory stores one or more computer-executable instructions, which, when executed by the processor, implement the steps of the method described above for implementing compression compensation for a vector network analyzer receiver.

[0033] The processor of the present invention for implementing compression compensation for a vector network analyzer receiver is configured to execute computer-executable instructions, which, when executed by the processor, implement the various steps of the method for implementing compression compensation for a vector network analyzer receiver described above.

[0034] The computer-readable storage medium of the present invention stores a computer program thereon, which can be executed by a processor to implement the various steps of the above-described method for implementing compression compensation for a vector network analyzer receiver.

[0035] In view of the non-linear characteristics of the receiver at most power inputs, the present invention proposes a method and apparatus to quickly find the linear operating region of the receiver at different power levels within the operating frequency band of the vector network analyzer and collect compensation data of the nonlinear region. The data is saved in the memory. When the vector network analyzer is working, it searches for the corresponding compensation data in the memory based on the original power data and performs amplitude compensation on the original measurement data to achieve the purpose of receiver nonlinear amplitude compensation.

[0036] The specific steps of this invention are as follows: (1) Prepare a signal source whose power and frequency specifications meet the specifications of the vector network analyzer receiver, wherein the minimum power of the signal source is MindBm and the maximum receiving power of the receiver is MaxdBm; (2) Select an appropriate step to calibrate the output power of the signal source at different frequencies. The calibration step can be set according to the minimum step of the nonlinear approximation of the linear change of the vector network analyzer receiver, or determined by multiple experiments. (3) Save the above calibration values ​​to the computer memory; (4) Calibrate the digitally controlled attenuator at the selected frequency and save the attenuator calibration value at each step. (5) According to the appendix Figure 1 Connect the vector network analyzer and the signal source. The output port of the signal source is connected to the test port of the vector network analyzer through a digitally controlled attenuator. The external trigger output port of the vector network analyzer is connected to the external trigger input port of the signal source. The control port of the vector network analyzer is connected to the control port of the digitally controlled attenuator and the signal source. This control port can be GPIB, serial port, USB, etc. (6) Select a frequency to be measured and operate the vector network analyzer in power sweep mode; (7) The operating platform sets the signal source, including frequency, start and end power and step, through the control port, and retrieves power calibration data to make the signal source work in power calibration mode; (8) The signal source and the vector network analyzer share a common reference and work synchronously with the vector network analyzer based on the external trigger input signal; (9) Initially, the digital control attenuator is set to 0dB attenuation; (10) The vector network analyzer is set to power range [MindB, MaxdB] in power scan mode to normalize the receiver response data.

[0037] The following steps 10-11 determine the power range in which the receiver operates linearly at a single frequency: (11) The digitally controlled attenuator is set to 3dB attenuation; (12) At this point, the ideal receiver response should be 3 dB lower than the original normalized value. Due to amplitude compression in the receiver, there are amplitude fluctuations in different power ranges. Only the fluctuations in the middle power range are small and close to the theoretical value. The linear operating region of the receiver [ndBm, mdBm] is found based on the receiver power fluctuation range ±wdB, where n < m.

[0038] The following steps are used to obtain the receiver power compensation value: (13) Power range [ndBm, mdBm], the compensation value is set to 0, and the actual received value of the receiver at this power is recorded and saved to the memory; (14) Obtain the power band compensation values ​​[mdBm, MaxdBm]: a. When mn >= Max–m, the digitally controlled attenuator is set to 0dB, and the power sweep range is [ndBm, MaxdBm]. The receiver response data is normalized, and the digitally controlled attenuator is set to (Max–m)dB. Due to the addition of the attenuator, the receiver is linear in the power range of [(n+(Max–m))dBm, MaxdBm]. The power range of [n+(Max–m)dBm, mdBm] is linear both before and after adding (Max–m)dB. The standard value of the receiver in the power range of [n+(Max–m)dBm, mdBm] is calibrated to obtain the compression compensation value of (mdBm, MaxdBm). b. When mn < Max - m: (b1) Obtain the power amplitude compression compensation value of the receiver in the power band of (mdBm, m+(mn-1)dBm); The digitally controlled attenuator is set to 0dB, and the power sweep range is set to [ndBm, MaxdBm] to normalize the receiver response data. The digitally controlled attenuator is then set to (mn-1)dB. Due to the addition of the attenuator, the receiver is linear in the power range [n+(mn-1)dBm, m+(mn-1)dBm]. Since the power range [n+(mn-1)dBm, mdBm] is linear at both 0dB and (mn-1)dB attenuation, the compression compensation value of (mdBm, m+(mn-1)dBm] can be obtained by standard calibration of the receiver in the power range [n+(mn-1)dBm, mdBm]. (b2) Obtain the power amplitude compression compensation value of the receiver in the power band of (m + (mn-1)dBm, MaxdBm); The digitally controlled attenuator is set to 0dB, and the power sweep range is [ndBm, MaxdBm]. The receiver amplitude compression compensation value of the power range [mdBm, m + (mn-1)dBm] obtained by step b1 is used. At this time, the receiver can be regarded as linear in the power range [ndBm, m + (mn-1)dBm].

[0039] If m + (mn-1) – n >= Max – (m + (mn-1)), refer to step a and directly obtain the receiver amplitude compression compensation value for the power band [m + (mn-1) dBm, Max dBm].

[0040] If m + (mn-1) – n < Max – (m + (mn-1)), repeat steps b1 and a until the power segment compensation value of [mdBm, MaxdBm] is obtained.

[0041] (15) Obtain the receiver amplitude compression compensation value of the power band [MindBm, ndBm).

[0042] The power sweep range is set to [MindBm, MaxdBm]. The digitally controlled attenuator is set to L. If mn >= Max-m, then L = Max-m; if mn < Max-m, then L = mn. At this time, the receiver operates linearly in the power range of [mdBm, (m+L)dBm], and the receiver response data is normalized. The digitally controlled attenuator is set to L1 = L + (mn) / 2. At this time, the receiver operates linearly in both L and L1 conditions when the digitally controlled attenuator is added in the power range of [(m + (mn) / 2) dBm, (m + L) dBm]. (Note that the actual input power of the receiver in the L1 attenuation state is in the range of [ndBm, (n + (mn) / 2) dBm]). Therefore, the standard value of the receiver in the power range of [(m + (mn) / 2) dBm, (m + L) dBm] can be used to calibrate and obtain the compression compensation value of the receiver in the actual input power range of [(Min-L1) dBm, ndBm). (16) Obtain the amplitude compression compensation value of the receiver below (Min-L1) dBm.

[0043] For power ranges below (Min-L1) dBm, the amplitude compression compensation value for receivers in the (Min-L1) dBm power range is directly adopted from the compensation value at the (Min-L1) dBm power point because the power is too small and the error is large, or the power is less than the minimum power value of the receiver.

[0044] (17) Select other frequency points and obtain the amplitude compression compensation values ​​of the full-power receiver for these frequency points according to steps 6 to 15.

[0045] To more clearly describe the technical content of the present invention, the following description is provided in conjunction with specific embodiments. The specific steps of the embodiments are as follows: (1) Select calibration frequency 1GHz; (2) Prepare a signal source model E4483C, whose typical power range is -136dBm to +17dBm, which meets the requirements of the vector network analyzer under test -50dBm to +10dBm; (3) Power calibration of the signal source at 1 GHz, with a power step of 1 dB and a range of -50 dBm to +10 dBm; (4) In order to simplify the operation process, a fixed attenuator is used instead of a digitally controlled attenuator in the embodiment; (5) See Appendix Figure 1 Connect to the test system; (6) Connect a 0dB attenuator; (7) The vector network analyzer is set to power sweep mode with a frequency of 1 GHz and a power range of [-50 dB, +10 dB] to normalize the single-channel data (e.g., A2 or B1) response data of the receiver. (8) Connect a 3dB attenuator; (9) See appendix Figure 3 Based on 0dB normalization, the overall data drop on receiver B1 is approximately 2.67dB (the attenuator attenuation value varies at different frequencies, but this has almost no impact on obtaining the compensation value). Therefore, if we set the correlation fluctuation range of the trace data to ±10mdB, we can find that the linear operating range of receiver B1 is approximately [-20dBm to 4dBm]. (10) Directly set the amplitude compensation value of the receiver in the power range of [-20dBm to 4dBm] to 0, and record the actual value of the receiver in this power range [-40.076dBm to -16.078dBm]. Consider that the receiver is in a linear working state within the range of [-40.076dBm to -16.078dBm], and no compensation is required. (11) Connect a 0dB attenuator and set the power sweep range to [-20dBm, +10dBm] to normalize the receiver response data. Record the actual receiver response data at this time [-40.069dBm, -10.071dBm]; (12) With a 6dB attenuator connected, the receiver power sweep range remains unchanged at [-20dBm, +10dBm]. The actual input power range is approximately [-26dBm, 4dBm]. At this time, the actual power value of the receiver within the set power sweep range [-14dBm, +4dBm] is regarded as the standard value without amplitude compression. It is used to calibrate the amplitude nonlinearity error of the receiver in [+4dBm, +10dBm]. The normalized amplitude value of the receiver in the [+4dBm, +10dBm] power range is subtracted from the normalized amplitude mean value in the [-14dBm, +4dBm] power range to obtain the amplitude compression compensation value for each power point in [+4dBm, +10dBm]. The actual amplitude value of the receiver at each power point is recorded accordingly. (13) Connect a 0dB attenuator and set the power sweep range to [-50dBm, +10dBm]; (14) Connect a 6dB attenuator. The receiver power sweep range remains unchanged at [-50dBm, +10dBm]. The actual input power range is approximately [-56dBm, 4dBm]. At this time, the actual power value of the receiver within the set power sweep range [-14dBm, +4dBm] is regarded as the standard value without amplitude compression. It is used to calibrate the amplitude nonlinearity error of the receiver in [-56dBm, -20dBm]. The normalized amplitude value of the receiver in the [-56dBm, -20dBm] power range is subtracted from the normalized amplitude mean value in the [-14dBm, +4dBm] power range to obtain the amplitude compression compensation value for each power point in [-56dBm, -20dBm]. The actual amplitude value of the receiver at each power point is recorded accordingly. (15) The amplitude compression compensation value for the input power of the receiver below -56dBm shall be the -56dBm power point compression compensation value, and the actual receiver amplitude value corresponding to all compensation values ​​shall be recorded. (16) Change to other frequency points and follow steps 1 to 13 to collect the amplitude compression compensation value of the entire power range of all frequency points. (17) Appendix Figure 5 When the B1 receiver operates at a single-tone frequency of 1 GHz, the amplitude compensation effect is achieved by applying the receiver compression compensation value obtained through the above steps and then connecting it to a 3 dB attenuator.

[0046] For the specific implementation scheme of this embodiment, please refer to the relevant descriptions in the above embodiments, which will not be repeated here.

[0047] It is understood that the same or similar parts in the above embodiments can be referred to each other, and the contents not described in detail in some embodiments can be referred to the same or similar contents in other embodiments.

[0048] It should be noted that in the description of this invention, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Furthermore, in the description of this invention, unless otherwise stated, "a plurality of" means at least two.

[0049] Any process or method description in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing a particular logical function or process, and the scope of the preferred embodiments of the invention includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as will be understood by those skilled in the art to which embodiments of the invention pertain.

[0050] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution device. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0051] Those skilled in the art will understand that all or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware. The corresponding program can be stored in a computer-readable storage medium. When the program is executed, it includes one or a combination of the steps of the method embodiments.

[0052] Furthermore, the functional units in the various embodiments of the present invention can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium.

[0053] The storage media mentioned above can be read-only memory, disk, or optical disk, etc.

[0054] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0055] This invention employs a method, system, apparatus, processor, and computer-readable storage medium for compression compensation in vector network analyzer receivers. By constructing a calibration system using an external signal source and a digitally controlled attenuator, combined with synchronous triggering and power scanning, the system can efficiently and automatically determine the linear and nonlinear operating ranges of the receiver at different power levels across the entire operating frequency band, and collect the corresponding amplitude compression compensation data, storing it in memory. During actual measurements with the vector network analyzer, the system, based on the current test power and frequency, searches for and applies pre-stored compensation values ​​in real time to correct the original measured amplitude, thereby correcting the receiver's response in the nonlinear region to a linear state. This method significantly improves the amplitude measurement accuracy and reliability of the vector network analyzer under large dynamic range power testing, without relying on the ideal linear characteristics of the receiver hardware. The compensation achieves accurate measurements over a wider power range, enhancing the overall performance and practicality of the instrument.

[0056] In this specification, the invention has been described with reference to specific embodiments thereof. However, it will be apparent that various modifications and variations can be made without departing from the spirit and scope of the invention. Therefore, the specification and drawings should be considered illustrative rather than restrictive.

Claims

1. A method for implementing compression compensation for a vector network analyzer receiver, characterized by, The method includes the following steps: (1) The output power of the signal source at different frequencies is calibrated and the power calibration value is saved. The numerical control attenuator is calibrated and the attenuator calibration value at each step is saved. The minimum power of the signal source is MindBm and the maximum receiving power of the vector network analyzer receiver is MaxdBm. (2) Build a test system; (3) Select the frequency to be measured, set the vector network analyzer to power sweep mode, set the power range to [MindBm, MaxdBm], and normalize the receiver response data; (4) Set the digitally controlled attenuator to 3dB attenuation. Based on the receiver power fluctuation range ±wdB, determine the receiver's linear operating range as [ndBm, mdBm], where n < m; (5) Obtain the full power band receiver amplitude compression compensation value in segments, that is, set the compensation value of the linear working area [ndBm, mdBm] to 0, and obtain the receiver amplitude compression compensation value of the high power band [mdBm, MaxdBm] and the low power band [MindBm, ndBm] in sequence. (6) Select the remaining test frequencies and repeat steps (3) to (5) to obtain the receiver amplitude compression compensation values ​​for the full power range of all operating frequencies and save them to the memory; (7) When the vector network analyzer is working, it searches for the corresponding amplitude compression compensation value in the memory based on the original measured power data, performs amplitude compensation on the original measured data, and completes the receiver nonlinear amplitude compensation.

2. The method for implementing compression compensation for a vector network analyzer receiver according to claim 1, characterized in that, Step (1) specifically includes the following steps: The minimum step size for signal source power calibration is determined based on the nonlinear approximation of the linear change by the vector network analyzer receiver, or through multiple experiments.

3. The method for implementing compression compensation for a vector network analyzer receiver according to claim 1, characterized in that, Step (2) specifically includes the following steps: Connect the signal source output port to the measured port of the vector network analyzer via a digitally controlled attenuator. Connect the external trigger output port of the vector network analyzer to the external trigger input port of the signal source. Connect the control port of the vector network analyzer to the control ports of the digitally controlled attenuator and the signal source, respectively.

4. The method for implementing compression compensation for a vector network analyzer receiver according to claim 1, characterized in that, Step (2) further includes the following steps: The signal source and the vector network analyzer share a common reference clock and work synchronously based on the external trigger input signal; the numerically controlled attenuator is initially set to 0dB attenuation.

5. The method for implementing compression compensation for a vector network analyzer receiver according to claim 1, characterized in that, The step (5) described above, which involves obtaining the receiver amplitude compression compensation value for the high power range [mdBm, MaxdBm], specifically includes the following steps: When mn≥Max-m, set the digitally controlled attenuator to 0dB, set the power sweep range to [ndBm, MaxdBm], and normalize the receiver response data; Set the digitally controlled attenuator to (Max-m) dB. At this time, the receiver is in a linear state in the power range of [n+(Max-m) dBm, MaxdBm]. Use the receiver standard value in the power range of [n+(Max-m) dBm, mdBm] to calibrate and obtain the amplitude compression compensation value of [mdBm, MaxdBm]. When mn < Max-m, obtain the compensation value of the power segment [mdBm, m + (mn-1)dBm], and repeatedly execute the above segmented calibration logic until the compensation value of the full power segment [mdBm, MaxdBm] is obtained.

6. The method for implementing compression compensation for a vector network analyzer receiver according to claim 5, characterized in that, The acquisition of the compensation value for the power range [mdBm, m+(mn-1)dBm] specifically includes the following steps: Set the digitally controlled attenuator to 0dB, set the power sweep range to [ndBm, MaxdBm], and normalize the receiver response data; The digitally controlled attenuator is set to (mn-1) dB. At this time, the receiver is in a linear state in the power range of [n+(mn-1) dBm, m+(mn-1) dBm]. The amplitude compression compensation value of (mdBm, m+(mn-1) dBm) is obtained by calibration using the receiver standard value in the power range of [n+(mn-1) dBm, mdBm].

7. The method for implementing compression compensation for a vector network analyzer receiver according to claim 1, characterized in that, The step (5) described above, which involves obtaining the receiver amplitude compression compensation value for the low-power band [MindBm, ndBm], specifically includes the following steps: Set the power scan range to [MindBm, MaxdBm], determine the initial attenuation value L of the numerically controlled attenuator based on the linear working area length, and normalize the receiver response data. The numerically controlled attenuator is set to L1=L+(mn) / 2. At this time, the power range of [(m+(mn) / 2)dBm, (m+L)dBm] is linear in both attenuation states. Using the receiver standard value of the power range, the amplitude compression compensation value of [(MindBm-L1)dBm, ndBm)] is calibrated and obtained. To obtain the amplitude compression compensation value for the power range below (MindBm-L1)dBm, directly use the compensation value of the (MindBm-L1)dBm power point.

8. A system for implementing compression compensation for a vector network analyzer receiver, comprising the method of claims 1 to 7, characterized in that, The system includes a signal source, a digitally controlled attenuator, a vector network analyzer, a control unit, and a memory. The output port of the signal source is connected to the measured port of the vector network analyzer through the digitally controlled attenuator. The external trigger output port of the vector network analyzer is connected to the external trigger input port of the signal source. The memory is used to store the signal source power calibration value, the digitally controlled attenuator calibration value, the receiver amplitude compression compensation value for the full power band of each frequency point, and the original measurement data. The control unit is connected to the signal source, the digitally controlled attenuator, the vector network analyzer, and the memory.

9. The system for implementing compression compensation for a vector network analyzer receiver according to claim 8, characterized in that, The control unit includes a power calibration module, a linear region determination module, a segmented compensation value calculation module, and a real-time compensation module. These modules are connected in sequence. The power calibration module is used to pre-calibrate the signal source and the digitally controlled attenuator. The linear region determination module is used to determine the linear operating region at a single frequency based on the receiver power fluctuation range. The segmented compensation value calculation module is used to calculate the receiver amplitude compression compensation values ​​for high-power, low-power, and extremely low-power segments. The real-time compensation module is used to retrieve the corresponding compensation values ​​from the memory to complete the amplitude correction of the original measurement data when the vector network analyzer is working.

10. A device for implementing compression compensation in a vector network analyzer receiver, characterized in that, The device includes: A processor is configured to execute computer-executable instructions; The memory stores one or more computer-executable instructions, which, when executed by the processor, implement the steps of the method for implementing compression compensation for a vector network analyzer receiver as described in any one of claims 1 to 7.

11. A processor for implementing compression compensation in a vector network analyzer receiver, characterized in that, The processor is configured to execute computer-executable instructions, which, when executed by the processor, implement the steps of the method for implementing compression compensation for a vector network analyzer receiver as described in any one of claims 1 to 7.

12. A computer-readable storage medium, characterized in that, It stores a computer program that can be executed by a processor to implement the steps of the method for implementing compression compensation for a vector network analyzer receiver as described in any one of claims 1 to 7.

Images