A storage-computation integrated inference block scheduling method and system for cross-terminal identity event triggering, an electronic device, and a storage medium

Abstract

This invention discloses a method, system, electronic device, and storage medium for in-memory computing inference block scheduling triggered by cross-terminal identity events. The method generates a unified identity event based on a candidate identity set, identification confidence level, and the current inference stage. It reads the in-memory array size, on-chip cache, off-chip loading cost, and array occupancy status, calculates the scheduling weights of Attention computing blocks, FFN weight blocks, and KV Cache blocks, and generates a block plan, array mapping, cache reuse table, and pipeline sequence. When multiple terminals generate the same or similar candidate identity sets, the method reuses FFN weight blocks, KV Cache blocks, or completed inference results in the on-chip cache based on the candidate identity set identifier, skipping corresponding off-chip loading or redundant computation, thereby reducing off-chip memory access, array conflicts, and end-to-end inference latency.

Description

Technical Field

[0001] This invention relates to the fields of edge intelligent inference, in-memory computing array scheduling, and multi-terminal identity event processing, and particularly to a method, system, electronic device, and storage medium for using a unified identity event field to drive block scheduling, on-chip cache reuse, and repeated inference skipping of Attention computing blocks, FFN weight blocks, and KV Cache blocks on an in-memory computing array.

[0002] More specifically, the present invention is applicable to scenarios such as access control, smart cockpits, robots, conference spaces, and smart terminal linkage that require identity recognition to be completed at the edge and cross-terminal services to be triggered. It is especially applicable to scenarios where multiple terminals generate the same or similar identity events within a short time window and the edge inference device is limited by the size of the in-memory array, the capacity of the on-chip cache, and the bandwidth of off-chip memory access. Background Technology

[0003] With the development of smart access control, smart cockpits, service robots, meeting spaces, and multi-terminal collaborative systems, identity recognition results are no longer limited to local unlocking or authentication on a single device. Instead, they are being used to trigger cross-terminal actions such as audio playback, screen display, robot movement, cockpit control, permission verification, and space service linkage. These scenarios require identity recognition results to be quickly encapsulated into unified events and propagated and executed with low latency and low false triggering across multiple terminals.

[0004] Existing cross-terminal identity recognition solutions typically involve terminals such as cameras, microphones, Bluetooth devices, access control card readers, and near-field communication devices collecting sensing data and independently generating local recognition results. Due to inconsistencies in data formats, timestamp formats, identity status definitions, and event naming methods among different terminals, the same target object may be repeatedly identified and triggered on multiple terminals, or cross-terminal services may be missed due to recognition failure on one terminal. Existing event deduplication mechanisms are mostly used at the application layer to suppress duplicate service actions, but they do not further utilize the deduplication results to control the scheduling order of model computation blocks and on-chip cache reuse strategies.

[0005] Existing edge identity recognition models can reduce reliance on cloud networks, but edge devices are typically limited by computing power, memory capacity, and power consumption budgets. Identity recognition models using Transformer or Transformer-like architectures include Attention layers, FFN layers, and KV caches, resulting in numerous matrix calculations and memory access operations. When the token sequence is long, the number of candidate identities is large, or multiple terminals trigger recognition requests simultaneously, off-chip weight loading is frequent, the inference queue is prone to congestion, and end-to-end response time becomes jittery.

[0006] In-memory compute architectures can perform matrix multiplication and addition calculations near or within storage arrays, thereby reducing data movement. However, existing in-memory compute inference solutions often focus on single matrix calculations, single-layer model acceleration, or fixed model mappings, typically executing computation blocks in a fixed order according to model hierarchy, lacking an end-to-end scheduling mechanism for identity event chains. Specifically, existing solutions typically do not incorporate identity status, event priority, remaining response time budget, candidate identity set identifiers, on-chip cache hit status, and array occupancy status into a unified schedule, nor do they control the block execution order of Attention, FFN, and KV Cache based on cross-terminal repeated events and the similarity of candidate identity sets.

[0007] Existing cache reuse mechanisms typically manage caches at the model layer or request locality, making it difficult to reuse FFN weight blocks or KV Cache blocks related to candidate identity sets across multiple identity events. For the same target object repeatedly collected by multiple terminals within a short period of time, if each event independently loads the weight block of the candidate identity verification stage and performs complete inference, it will cause repeated off-chip memory access, memory-to-process array conflicts, and service triggering delays.

[0008] Therefore, a technical solution is needed that can transform the identity status, event priority, remaining response time budget, current inference stage, and candidate identity set identifier in a unified identity event into in-memory computing inference block scheduling input, so that event deduplication, candidate identity set reuse, and in-memory computing array resource allocation form a closed loop, thereby reducing off-chip loading, repeated inference, and array conflicts.

[0009] To facilitate understanding of this invention, some terms are defined as follows. These definitions are used to describe embodiments of the invention and should not be construed as additional limitations on the scope of protection.

[0010] The candidate identity set (candidate_set) refers to one or more sets of candidate identity identifiers output by the identity recognition model during the candidate identity generation stage. The candidate identity set can contain the Top-K candidate identities and their confidence scores.

[0011] The candidate identity set identifier (candidate_set_id) refers to the identifier obtained after sorting, combining, hashing, or encoding the candidate identity set. The candidate identity set identifier does not directly represent the user's plaintext identity, but is used to index the FFN weighted blocks, KV Cache blocks, or completed inference results related to the candidate identity verification stage.

[0012] The unified identity event (identity_event) refers to a structured event generated by the unified identity event generation module, which carries at least the identity status, candidate identity set identifier, identity recognition confidence, event priority, remaining response time budget, and current inference stage.

[0013] The remaining response time budget (compute_budget) refers to the remaining available time between the current unified identity event generation time and the target response time threshold. The smaller the remaining response time budget, the higher the time urgency of the event.

[0014] The current inference stage, model_stage, refers to one of the stages the identity recognition model is currently in: lightweight detection, candidate identity generation, candidate identity verification, or complete identity verification.

[0015] Offchip load cost: refers to the amount of data that needs to be loaded from off-chip memory, the loading time, or a weighted average of the two when executing a certain computation block.

[0016] Array conflict cost: refers to the waiting time, resource contention level, or a weighted average of the two when multiple compute blocks compete for the same in-memory compute array.

[0017] BlockPriority: A score used to determine the execution order of Attention computation blocks, FFN weight blocks, and KV Cache blocks.

[0018] Cache index CacheKey: refers to an index generated based on the candidate identity set identifier, target object identifier or target trajectory identifier, model layer identifier, block type and time window, used to query FFN weight blocks, KVCache blocks or intermediate results in the on-chip cache.

[0019] The reused inference event refers to a unified identity event that has the same or similar set of candidate identities as an executed unified identity event within a preset time window, and can reuse the completed inference results, FFN weight blocks, or KVCache blocks. Summary of the Invention

[0020] The main technical problem to be solved by this invention is: how to dynamically adjust the execution order of model blocks and the on-chip cache reuse strategy in the in-memory computing array by using a unified identity event field when multiple terminals generate the same or similar identity events in a short period of time, so as to reduce off-chip loading, repeated inference and array conflicts.

[0021] Further dependent technical problems to be solved by the present invention include: 1. How to transform identity status, candidate identity set identifiers, event priority, and remaining response time budget into scheduling inputs for Attention computation blocks, FFN weight blocks, and KV Cache blocks; 2. How to reuse the FFN weight block, KVCache block, and completed inference results related to the candidate identity verification stage based on candidate_set_id; 3. How to feed back the deduplication results of cross-terminal events to the in-memory array resource allocation process; 4. How to update the subsequent event scheduling weight and cache retention priority based on the service execution result, cache hit count, and the number of times the candidate identity set appears repeatedly.

[0022] To solve the above-mentioned technical problems, the present invention adopts the following technical solution.

[0023] A method for block scheduling of in-memory computing inference triggered by cross-terminal identity events includes: acquiring identity recognition input data generated by one or more terminals, and obtaining a candidate identity set, identity recognition confidence, and current inference stage based on the identity recognition input data; generating a unified identity event based on the candidate identity set, identity recognition confidence, and the consistency of candidate identities within a preset time window; reading the row and column size of the in-memory computing array, the remaining capacity of the on-chip cache, the on-chip cache hit status, the off-chip loading cost, and the array occupancy status; calculating the computing block scheduling weights of Attention computing blocks, FFN weight blocks, and KV Cache blocks based on the unified identity event and the state of the in-memory computing array; generating a block scheduling plan based on the computing block scheduling weights, the data dependencies between computing blocks, and the row and column size of the in-memory computing array; when there is an FFN weight block or KV Cache block in the on-chip cache corresponding to the candidate identity set identifier, reusing the corresponding cache content and skipping off-chip loading or repeating the calculation; executing identity confirmation inference on the in-memory computing array according to the pipeline execution order, and outputting the confirmed identity status.

[0024] In one implementation, the unified identity event includes an inference state field, a scheduling control field, and an event control field. The inference state field is used to select the inference level, the scheduling control field is used to calculate the scheduling weight of the computation block, and the event control field is used for deduplication, throttling, expiration, and distribution control. The candidate identity set identifier does not directly carry plaintext identity information; instead, it serves as an index key for candidate identity-related model blocks and inference results.

[0025] In one implementation, the candidate identity set identifier is obtained by hashing or encoding a combination of Top-K candidate identity identifiers, model version identifiers, scene identifiers, and time window identifiers. For two candidate identity sets, Jaccard similarity or Top-K intersection ratio can be used to determine their similarity. When two candidate identity sets are identical or similar, they can share FFN weight blocks, KV Cache blocks, or completed inference results related to the candidate identity confirmation stage.

[0026] In one implementation, the computation block scheduling weight is calculated according to the BlockPriority formula, and event priority, on-chip cache hit status, identity status scheduling factor, identity recognition confidence, time urgency corresponding to the remaining response time budget, off-chip loading cost, and array conflict cost are included in the same score. The scheduling module sorts computation blocks without data dependencies from high to low according to BlockPriority; for computation blocks with data dependencies, the preceding dependent computation blocks are executed first, and the BlockPriority of subsequent computation blocks is recalculated after the preceding dependent computation blocks are completed.

[0027] In one implementation, the block scheduling plan includes an Attention layer block plan, an FFN layer block plan, a KV Cache reuse plan, a compute array mapping table, an on-chip cache reuse table, and a pipeline execution order. The compute array mapping table associates compute block identifiers, model layer identifiers, matrix block start addresses, matrix block sizes, target compute array numbers, input cache addresses, and output cache addresses. The on-chip cache reuse table records candidate identity set identifiers, model layer identifiers, cache block addresses, cache expiration times, cache hit counts, and cache retention priorities.

[0028] In one implementation, the duplicate event processing module generates a deduplication key based on the target object identifier or target trajectory identifier, candidate identity set identifier, scene identifier, event type, and time window. When multiple unified identity events have the same deduplication key and the candidate identity sets are the same or similar within a preset time window, the duplicate event is marked as a reasoning reuse event. For reasoning reuse events, the system no longer allocates all the storage array resources required for complete candidate identity confirmation reasoning, but instead selects to reuse FFN weight blocks, KV Cache blocks, completed reasoning results, or only execute incremental Attention calculation blocks based on the input token difference ratio.

[0029] The present invention also provides an in-memory computing inference block scheduling system for cross-terminal identity event triggering, including an identity input acquisition module, a unified identity event generation module, an array status acquisition module, an event-driven block scheduling module, an on-chip cache reuse module, an in-memory computing inference execution module, a recurring event processing module, and a feedback update module, for executing the above methods.

[0030] The present invention also provides an electronic device and a computer-readable storage medium for implementing the above-described method.

[0031] Compared with the prior art, the present invention has at least the following beneficial effects: 1. By using the identity status, event priority, remaining response time budget, current inference stage, and candidate identity set identifier in the unified identity event as input for in-memory computing inference block scheduling, the identity event can directly control the execution order of Attention, FFN, and KV Cache, instead of just being used as an application layer service message.

[0032] 2. By using candidate_set_id as the index of FFN weight block, KV Cache index and repeated inference result index simultaneously, multiple identical or similar identity events can share candidate identity-related model blocks in the on-chip cache, thereby reducing the number of off-chip loadings during the candidate identity confirmation stage.

[0033] 3. By incorporating compute_budget, array_occupancy, and offchip_load_cost into BlockPriority, identity events with low remaining response time budgets and high priority are given priority access to in-memory array resources, thereby reducing the response latency and P95 latency of high-priority events.

[0034] 4. By determining the Attention block size based on the row and column size of the in-memory array, the length of the input token, the hidden dimension, and the remaining capacity of the on-chip cache, the mismatch between the model blocks and the hardware array is reduced.

[0035] 5. By binding event deduplication with inference reuse, duplicate identity events are no longer reassigned to full storage array resources, thereby reducing array conflicts and inference queue congestion.

[0036] 6. Improve on-chip cache utilization by prioritizing the retention of high-priority events, frequently hit candidate identity sets, and caches related to the candidate identity confirmation stage through cache eviction scoring.

[0037] 7. Update subsequent event priorities, cache retention time, and terminal scores through service execution feedback, so that inference scheduling and cross-terminal service execution form a closed loop.

[0038] In one embodiment, the event-driven in-memory computing block scheduling mechanism of the present invention operates according to the following input, processing and output relationships.

[0039] Event generation Candidate identity set, identity recognition confidence, current inference stage Consistency judgment between state machine and time window Unified Identity Event Scheduling computation Unified identity events, array status, cache status BlockPriority calculation Compute block scheduling weight Block mapping R, C, L, D, S_cache Attention, FFN, KV Cache, Blocking In-memory array mapping table Cache reuse candidate_set_id, model_layer_id, block_type, time_window CacheKey Query On-chip cache reuse table and skip strategy Inference execution Pipeline execution order, array mapping table, cache reuse table In-memory computing array execution Confirmed identity status Feedback Update ACK, Failure, Timeout, Repeat Frequency Update weights and cache retention Subsequent scheduling parameters

[0040] In one implementation, the identity recognition model outputs a set of candidate identities and the confidence score corresponding to each candidate identity. The system selects the top K candidate identity identifiers from the candidate identity set based on their confidence scores, performs a stable sorting based on the candidate identity identifier or confidence score ranking result, and combines them with the model version identifier, scene identifier, and time window identifier to generate candidate_set_id.

[0041] Example formula is as follows: candidate_set_id = Hash(sort(topK_identity_ids) || model_version || scene_id || time_window_id).

[0042] `time_window_id` can be determined by the event timestamp and the window length, for example, `time_window_id = floor(timestamp / window_size)`. `K` can be 3, 5, or 10, and the window length can be 100ms, 300ms, 500ms, or 1s depending on the real-time requirements of the scenario.

[0043] Two candidate identity sets A and B are considered similar when the similarity calculated using Similarity(A, B) = |A ∩ B| / |A ∪ B| is greater than a preset threshold θ. θ can range from 0.5 to 0.9, with 0.7 being preferred. Alternatively, the Top-K intersection ratio can be used; if at least m identical candidate identities exist in both sets, they are considered similar.

[0044] The technical functions of candidate_set_id are as follows: First, as an index of the FFN weight block in the candidate identity confirmation stage; second, as one of the input keys for KV Cache reuse; third, as a basis for judging the reuse of cross-terminal repeated event inference results; and fourth, as a statistical object of candidate_frequency in cache eviction scoring.

[0045] In one implementation, the event-driven block scheduling module calculates the computation block scheduling weight according to the following formula: BlockPriority = a1 × P_event + a2 × C_hit + a3 × S_state + a4 ×I_conf + a5 × B_time - a6 × L_offchip - a7 × A_conflict.

[0046] The meanings of each variable are as follows: P_event Event Priority Higher priority events have larger values. C_hit On-chip cache hit status Take the larger value for hits, and the smaller value for misses. S_state Identity State Scheduling Factor Status values ​​such as identity conflict and candidate identity confirmation are larger. I_conf Identity recognition confidence Obtained by normalizing the confidence score of the model output B_time Time urgency The smaller the remaining response time budget, the larger the value. L_offchip Off-screen loading cost The larger the amount of data loaded outside the chip or the loading time, the larger the value. A_conflict Array collision cost The larger the array wait time or resource conflict, the higher the value. P_event, C_hit, S_state, I_conf, B_time, L_offchip, and A_conflict are all normalized to the range of 0 to 1 before calculation. a1 to a7 can be configured according to the scenario, or can be periodically updated by the system based on historical response latency, cache hit rate, and array utilization.

[0047] When two computational blocks have no data dependency, the system schedules them according to BlockPriority from high to low. When two computational blocks have a data dependency, the system executes the preceding dependent computational block first, and recalculates the BlockPriority of the subsequent computational blocks after the preceding dependent computational block is completed. This avoids disrupting the necessary dependencies in model computation due to high priority scoring.

[0048] In one implementation, the number of rows in the in-memory computing array is R, the number of columns is C, the length of the input token is L, the hidden dimension is D, and the remaining capacity of the on-chip cache is S_cache.

[0049] For the Q, K, and V matrices, the event-driven block scheduling module divides them into several matrix blocks of no more than R × C. When D is greater than C, it is split into multiple column blocks along the hidden dimension; when L is greater than R, it is split into multiple row blocks along the token sequence. The total data volume of matrix blocks scheduled simultaneously in the same pipeline stage does not exceed S_cache.

[0050] The Attention layer block partitioning plan includes the computation block identifier, the model layer to which it belongs, the Attention head to which it belongs, the start position of the input token, the end position of the input token, the start position of the hidden dimension, the end position of the hidden dimension, the target in-memory array number, the input cache address, and the output cache address. The system maps each Attention block to one or more in-memory arrays based on BlockPriority and data dependencies.

[0051] For high-priority unified identity events, the system prioritizes executing the Attentionhead or the token fragment corresponding to the candidate identity that is related to the candidate identity confirmation. For low-priority events, the system can postpone the execution of computation blocks that are not dependent on the current candidate identity confirmation layer in order to avoid blocking high-priority events.

[0052] In one implementation, the FFN layer includes a first linear transformation, an activation function, and a second linear transformation. The event-driven block scheduling module divides the FFN weight matrix into multiple weight blocks and determines the FFN sub-matrix blocks that need to be loaded or reused during the candidate identity verification stage based on candidate_set_id.

[0053] When an FFN weighted block matching candidate_set_id, model_layer_id, block_type, and time_window exists in the on-chip cache, the cache reuse module sets C_hit to a hit state and provides the corresponding cache block to the event-driven block scheduling module. The event-driven block scheduling module increases the BlockPriority of the computation block related to the hit cache block and skips the corresponding off-chip loading.

[0054] When multiple unified identity events have the same candidate_set_id or the similarity of candidate identity sets exceeds a threshold, the system reuses the hit FFN weight blocks. For hit FFN weight blocks, the system loads the corresponding weight block from off-chip memory and writes it to the on-chip cache, while updating the cache hit count and the frequency of candidate identity sets.

[0055] In one implementation, the cache reuse module generates the cache index as follows: CacheKey = Hash(candidate_set_id || target_object_id_or_track_id || model_layer_id || block_type || time_window).

[0056] Among them, target_object_id_or_track_id can be determined by the target detection box, trajectory number, or cross-frame target association result; block_type can represent FFN weight block, KV Cache block, Attention intermediate result, or completed inference result.

[0057] When a CacheKey matches a KV Cache block in the on-chip cache, and the current unified identity event and the previous unified identity event meet a preset continuity condition, the system reuses the KV Cache block. The preset continuity condition may include: the target object identifier of the current unified identity event and the previous unified identity event are the same or have similar trajectories; the time difference between the two events is less than a preset time threshold; the current inference stage and the previous inference stage are adjacent inference stages; the current model layer identifier is consistent with the previous model layer identifier; and the proportion of unchanged tokens in the current input token is higher than a preset proportion threshold.

[0058] When the target object persists in adjacent video frames or adjacent identity events, and the input token difference ratio is lower than the preset difference threshold, the event-driven block scheduling module only performs incremental calculation on the Attention block corresponding to the differentiated input token, and no longer executes all Attention calculation blocks repeatedly.

[0059] When the remaining capacity of the on-chip cache is insufficient, the cache reuse module calculates the cache eviction score according to the following formula: EvictScore = c1 × recent_access + c2 × candidate_frequency + c3 × event_priority - c4 × block_size.

[0060] Among them, recent_access indicates the recent access level of the cache block, candidate_frequency indicates the frequency of occurrence of the candidate identity set within the preset time window, event_priority indicates the event priority of the corresponding unified identity event, block_size indicates the size of the cache block, and c1 to c4 are preset weight coefficients.

[0061] The cache reuse module releases the cache block with the lowest EvictScore and prioritizes retaining cache blocks related to high-priority unified identity events, frequently hit candidate identity sets, the current candidate identity verification stage, and the stage about to enter full identity verification. Thus, even with limited on-chip cache capacity, the system can still retain the cache blocks most valuable for subsequent identity verification inference.

[0062] In one implementation, the duplicate event processing module generates a dedup_key based on the target object identifier or target trajectory identifier, candidate identity set identifier, scene identifier, event type, and time window. If multiple unified identity events have the same dedup_key within a preset time window, and the candidate identity sets are the same or similar, then the duplicate event is marked as a reasoning reuse event.

[0063] For inference reuse events, the event-driven block scheduling module reuses the identity state, candidate identity set, FFN weight block, KV Cache block, or completed inference result of the completed inference event. The system determines whether to execute the incremental attention calculation block based on the input token difference ratio. If the confidence of the deduplicated event is lower than the confidence of the retained event, the system will not allocate a new complete FFN weight block loading task for the deduplicated event.

[0064] Deduplication and throttling are used not only to reduce duplicate service triggers, but also to reduce duplicate inference, reduce off-chip memory access, and free up in-memory array resources. For high-priority events, such as security alarms, emergency access control, or robot avoidance events, the system can exceed the limits of ordinary throttling, but can still reuse cache blocks related to the matched candidate identities.

[0065] In one implementation, the confirmed unified identity event can be sent to the candidate service terminal or the terminal control task. The service execution result is not directly saved as an isolated business result, but is used to update the scheduling weight of the computation block corresponding to the subsequent unified identity event, the retention time of the cache block corresponding to the candidate identity set, and the load score of the candidate service terminal.

[0066] When a service fails or no confirmation message is received, the feedback update module increases the event priority of subsequent unified identity events under the same identity state and decreases the terminal score corresponding to the failed service terminal. When a service succeeds, the feedback update module extends the retention time of the FFN weight block and KV Cache block of the corresponding candidate_set_id in the on-chip cache. When the same candidate_set_id appears more than a preset number of times within a preset time window, the feedback update module increases the retention priority of the cache block corresponding to that candidate_set_id.

[0067] The de-identified identity identifier, candidate identity set identifier, and cache index in this invention do not directly carry plaintext identity information. The collection, storage, and processing of facial images, voice features, location information, or other sensitive personal information should be carried out only after obtaining legal authorization, meeting the principle of minimum necessity, and implementing access control, encrypted storage, or localized processing mechanisms.

[0068] When applied in public scenarios, identity information in unified identity events can be transmitted across terminals using hashes, encrypted indexes, or anonymized identifiers. Except for service purposes such as maintaining security, verifying permissions, or requiring explicit user authorization, raw biometric data is not used as a field for cross-terminal distribution. The system can restrict the processing of sensitive data such as raw facial images and voice clips to local edge devices, using only the de-identified unified identity event fields for scheduling and terminal control.

[0069] In one implementation, event-driven in-memory block scheduling can be implemented as follows pseudocode.

[0070] Input: identity_event, array_state, cache_state, model_profile.

[0071] Output: block_schedule, array_mapping_table, cache_reuse_table.

[0072] 1. Parse the state, priority, compute_budget, model_stage, and candidate_set_id in identity_event.

[0073] 2. Generate a CacheKey based on candidate_set_id, target_object_id_or_track_id, model_layer_id, block_type, and time_window.

[0074] 3. Query the on-chip cache to obtain the FFN weight block, KV Cache block, and C_hit of the completed inference results.

[0075] 4. Generate a set of attention computation blocks based on R, C, L, D, and S_cache.

[0076] 5. Generate the FFN weight block set for the candidate identity verification stage based on candidate_set_id.

[0077] 6. Determine whether the KV Cache reuse condition is met in the current inference phase.

[0078] 7. Calculate BlockPriority for each Attention computation block, FFN weight block, and KV Cache block.

[0079] 8. Construct a directed acyclic graph of computational blocks based on data dependencies.

[0080] 9. Sort computational blocks without dependency conflicts in descending order of BlockPriority.

[0081] 10. Maintain the prior dependency constraints for computational blocks with dependencies, and recalculate the BlockPriority of subsequent computational blocks after the prior dependencies are completed.

[0082] 11. Generate a memory-computing array mapping table based on the row and column size and array occupancy status of the memory-computing array.

[0083] 12. Generate an on-chip cache reuse table based on cache hit results, cache expiration time, and cache hit count.

[0084] 13. Output the Attention layer block plan, FFN layer block plan, KV Cache reuse plan, and pipeline execution order. Attached Figure Description

[0085] Figure 1 is a system overall architecture diagram provided in an embodiment of the present invention; Figure 2 is a flowchart of the event-driven in-memory computing block scheduling provided in an embodiment of the present invention; Figure 3 is a mapping diagram of identity status judgment and scheduling action provided in an embodiment of the present invention; Figure 4 is a flowchart of cache reuse provided in an embodiment of the present invention; Figure 5 is a timing diagram of multi-terminal repetitive event reasoning multiplexing provided in an embodiment of the present invention; Figure 6 is a diagram of the in-memory array mapping and pipeline execution provided in an embodiment of the present invention.

[0086] The attached figures are labeled as follows: 100, In-memory computing inference block scheduling system; 101, Identity input acquisition module; 102, Unified identity event generation module; 103, Array status acquisition module; 104, Event-driven block scheduling module; 105, On-chip cache reuse module; 106, In-memory computing inference execution module; 107, Repeated event processing module; 108, Feedback update module; 120, In-Memory Computing Chip; 121, In-Memory Computing Array; 122, On-Chip Cache; 123, Off-Chip Memory; 124, Event Bus; 201, Attention Blocking Unit; 202, FFN Blocking Unit; 203, KV Cache Management Unit; 204, Scheduling Weight Calculation Unit; 205, Array Mapping Unit; 206, Cache Reuse Unit; 207, Dependency Maintenance Unit; 208, Pipeline Ordering Unit; 301, State Machine Unit; 302, Confidence Judgment Unit; 303, Continuous Window Consistency Judgment Unit; 304, Conflict Judgment Unit; 305, Scheduling Action Mapping Unit; 401, CacheKey Generation Unit; 402, FFN Weighted Block Query Unit; 403, KV Cache Query Unit; 404, Off-chip Loading Control Unit; 405, Incremental Attention Control Unit; 406, Cache Eviction Unit; 501, Deduplication Key Generation Unit; 502, Similarity Judgment Unit; 503, Reasoning Reuse Marker Unit; 504, Reasoning Result Reuse Unit; 505, Service Confirmation Unit. Detailed Implementation

[0087] The present invention will be further described below with reference to the accompanying drawings and specific embodiments. It should be understood that the following embodiments are for illustrative purposes only and are not intended to limit the scope of protection of the present invention. Where there is no conflict, the technical features of the various embodiments of the present invention can be combined with each other.

[0088] As shown in Figures 1 and 4, in a multi-terminal identity recognition scenario, a camera terminal and a microphone terminal respectively collect perceptual data of the same target object. After performing initial identity reasoning on the input data, the identity input acquisition module 101 outputs a set of candidate identities and an identity recognition confidence score.

[0089] At time t0, the first terminal generates a unified identity event E1, with a candidate identity set of {U1, U3, U8, U9, U12}. At time t0+300ms, the second terminal generates a unified identity event E2, with a candidate identity set of {U1, U3, U8, U9, U15}. If the system sets K=5, the intersection size of the two candidate identity sets is 4, the union size is 6, and the Jaccard similarity is 4 / 6, or 0.667.

[0090] When the preset similarity threshold θ is 0.6, the candidate identity sets of E1 and E2 are determined to be similar. The system can mark E2 as an inference reuse event and query the FFN weight block, KV Cache block, and completed inference results under the corresponding candidate_set_id or similar candidate_set_id of E1.

[0091] In this embodiment, candidate_set_id can be generated as follows: candidate_set_id = Hash(sort(U1, U3, U8, U9, U12) || model_v3 ||meeting_room_A || window_1024).

[0092] `candidate_set_id` is not transmitted as plaintext user identity, but rather serves as an index to the model blocks and cache blocks related to the candidate identity set. Even if the two terminals originate from different sources, as long as the candidate identity sets are the same or similar, the system can still reuse the candidate identity-related model blocks in the on-chip cache.

[0093] As shown in Figures 2 and 6, in one embodiment of the in-memory computing identity recognition model, the in-memory computing array has a size of 128×128, an on-chip cache capacity of 8MB, an input token length L of 256, a hidden dimension D of 768, a candidate identity set Top-K of 5, and a time window of 500ms.

[0094] Since L=256 and R=128, the Q, K, and V matrices are split into 2 row blocks along the token direction; since D=768 and C=128, the Q, K, and V matrices are split into 6 column blocks along the hidden dimension direction. Therefore, a single Q, K, or V matrix can form 12 basic matrix blocks, and the three types of Q, K, and V matrices together form 36 basic matrix blocks.

[0095] For a P0-level candidate identity verification event, the normalization parameters are set as follows: P_event=1.0, C_hit=1.0, S_state=0.8, I_conf=0.92, B_time=0.9, L_offchip=0.2, A_conflict=0.3. The weighting coefficients are a1=0.20, a2=0.20, a3=0.15, a4=0.15, a5=0.15, a6=0.075, a7=0.075.

[0096] The BlockPriority of this computation block is: 0.20×1.0 + 0.20×1.0 + 0.15×0.8 + 0.15×0.92 + 0.15×0.9 - 0.075×0.2 - 0.075×0.3 = 0.7555.

[0097] For another compute block that misses the cache and has a high array conflict, if C_hit=0, L_offchip=0.7, A_conflict=0.5, and all other parameters are the same, then BlockPriority is: 0.20×1.0 + 0.20×0 + 0.15×0.8 + 0.15×0.92 + 0.15×0.9 - 0.075×0.7 - 0.075×0.5 = 0.503.

[0098] Therefore, when there is no data dependency between the two, the preceding computation block enters the pipeline execution order first; if there is a data dependency between the two, the preceding dependent block is executed first, and the BlockPriority of the subsequent computation block is recalculated after the preceding dependent block is completed.

[0099] As shown in Figure 4, in a continuous video frame identity verification scenario, a unified identity event E1 is generated in the first frame, and a unified identity event E2 is generated within 300ms in the second frame. The object detection module determines that the similarity of the target trajectories of E1 and E2 is higher than 0.8, the current model layer identifiers are consistent, the current inference stage belongs to the adjacent inference stage, and the proportion of unchanged tokens in the input tokens of E2 relative to E1 is 75%.

[0100] The system generates a CacheKey based on candidate_set_id, target trajectory identifier, model layer identifier, block_type, and time_window, and queries the on-chip cache 122. When the CacheKey hits a KV Cache block, the on-chip cache reuse module 105 reuses the KV Cache block and returns C_hit=1 to the event-driven block scheduling module 104.

[0101] If the preset threshold for the proportion of unchanged tokens is 70%, then E2 satisfies the incremental attention condition. The event-driven block scheduling module 104 only performs incremental calculations on the attention calculation blocks corresponding to the differentiated input tokens, without repeatedly executing all attention calculation blocks. This reduces redundant calculations and off-chip memory accesses.

[0102] As shown in Figure 5, in a smart access control or conference room entrance scenario, the first and second cameras detect the same target object within a 500ms time window. The unified identity events generated by the two terminals have the same target trajectory identifier, the same scene identifier, and the same event type, and the similarity of the candidate identity sets is higher than the threshold.

[0103] The recurring event processing module 107 generates a dedup_key based on the target trajectory identifier, candidate_set_id, scene_id, event_type, and time_window, and marks the second unified identity event as an inference reuse event.

[0104] The system first performs candidate identity verification reasoning corresponding to the first unified identity event, and writes the FFN first linear transform weight block, second linear transform weight block, and KV Cache corresponding to the candidate identity set into the on-chip cache 122. When the second unified identity event enters the scheduling queue, the on-chip cache reuse module 105 queries the on-chip cache according to the CacheKey to determine whether the corresponding FFN weight block and KV Cache have been hit.

[0105] The event-driven block scheduling module 104 no longer allocates all the storage array resources required for complete candidate identity verification reasoning for the second unified identity event. Instead, it reuses the candidate identity weight block, KV Cache, and completed identity status from the first unified identity event, and decides whether to execute the incremental Attention calculation block based on the input token difference ratio. Therefore, the second unified identity event does not need to repeatedly load the complete FFN weight block, nor does it need to repeatedly execute the complete candidate identity verification reasoning.

[0106] As shown in Figure 3, in a multi-terminal identity recognition scenario, when multiple terminals report different candidate identities within the same time window and the confidence difference is less than the threshold ΔT, the state machine unit 301 transitions the identity state to identity conflict. The S_state value of the identity conflict state is higher than that of the normal candidate identity generation state.

[0107] In the event of an identity conflict, the system suspends terminal control commands that require identity verification results to reach a preset confidence threshold, such as door opening and cockpit control, and increases the BlockPriority of the relevant Attention calculation blocks and FFN weight blocks in the candidate identity verification layer. If an FFN weight block similar to the conflicting candidate identity set exists in the on-chip cache, the system will still prioritize reusing that weight block to reduce the off-chip loading required for secondary verification.

[0108] If the remaining response time budget for a high-priority identity conflict event is lower than a preset threshold, the event-driven block scheduling module 104 suspends the loading of FFN weight blocks in low-priority events that are not dependent on the current candidate identity verification stage, and allocates the released in-memory array resources to the high-priority identity conflict event. The suspended low-priority events retain the completed calculation results and cached indexes, and continue execution after the high-priority events are completed.

[0109] As shown in Figures 1 and 5, the confirmed unified identity event can be sent to the candidate service terminal via the event bus 124. The candidate service terminal returns an ACK, execution failure, timeout, or retry result. The feedback update module 108 feeds back the service execution result to the event-driven block scheduling module 104 and the on-chip cache multiplexing module 105.

[0110] When the service execution result is successful, the feedback update module 108 extends the retention time of the corresponding candidate_set_id FFN weight block and KV Cache block in the on-chip cache. For example, the validity period of the corresponding cache block is extended from 500ms to 2s, and the candidate_frequency statistic is increased.

[0111] When the service execution result is failure or no confirmation message is received, the feedback update module 108 increases the event priority of subsequent unified identity events under the same identity status and decreases the terminal score corresponding to the failed service terminal. If the same candidate_set_id appears more than the preset number of times within a 3-second time window, the cache retention priority of the FFN weight block and KV Cache block corresponding to that candidate_set_id is increased.

[0112] In one prototype testing or simulation testing embodiment, the following test conditions are used to verify the technical effects of the present invention. The following data is used to illustrate the effects of one embodiment and does not constitute a limitation on the scope of protection of the present invention.

[0113] Test equipment An edge inference device including an in-memory computing array with an array size of 128×128 or equivalent, and an on-chip cache capacity of 8MB or equivalent. Model size It contains a 12-layer Transformer structure, 8 attention heads, and a candidate identity set of 1000 people. Number of terminals Five terminals, including two camera terminals, one microphone terminal, one access control controller, and one display terminal. Network environment A hybrid environment of local area network, Wi-Fi and local message bus Sample size 1000 identity samples, 10000 identity event trigger tests Comparison Plan Ordinary edge inference solutions and in-memory computing inference solutions that do not employ event-driven block scheduling Indicator Statistical Methods The average value was taken from multiple rounds of testing, and the P95 latency was statistically analyzed. The metrics are defined as follows: Average response latency is defined as the time from when the identity awareness module collects the first frame of valid target data to when the service execution terminal returns an ACK. P95 response latency is the latency value corresponding to the 95th percentile after sorting the end-to-end response latency of multiple identity event trigger tests. The number of off-chip memory accesses is calculated as the percentage of off-chip weight block loads in the in-memory compute inference scheme without cache reuse and event-driven block scheduling, taken as 100%.

[0114] Under the above test conditions, the test results are shown in the following example.

[0115] Average response delay 286ms 194ms Reduced by 32.2% P95 Response Delay 421ms 238ms Reduced by 43.5% Cross-device trigger success rate 96.7% 99.2% An increase of 2.5 percentage points False trigger rate 3.1% 0.8% Reduced by 74.2% Off-site memory access count 100% 68% 32% reduction Weight reload count 100% 63% 37% reduction The test data mentioned above can be obtained through prototype testing, simulation testing, or equivalent experimental environments, and is used to illustrate the technical effects of event-driven block scheduling, candidate_set_id cache reuse, and repeated inference skipping.

[0116] In one embodiment, the electronic device includes a memory-in-memory computing chip, a processor, a memory, off-chip memory, and a communication module. The memory-in-memory computing chip includes at least one memory-in-memory array 121 and an on-chip cache 122. The memory stores a computer program, which, when executed by the processor and / or the memory-in-memory computing chip, implements the methods described in the above embodiments.

[0117] The processor can be used to perform unified identity event generation, candidate_set_id generation, similarity judgment, BlockPriority calculation, cache eviction score calculation, and feedback update. The in-memory computing chip can be used to perform Attention calculation blocks, FFN weight blocks, and KV Cache related calculations. The communication module can be used to receive multi-terminal identity recognition input data and send confirmed unified identity events or terminal control tasks.

[0118] In one embodiment, a computer-readable storage medium stores a computer program that, when executed by a processor and / or in-memory computing chip, implements the above-described method. The computer-readable storage medium may include a read-only memory, random access memory, flash memory, solid-state drive, magnetic disk, optical disk, or other media capable of storing program instructions.

[0119] The above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit the scope of protection of the present invention. Any equivalent substitutions, modifications, or combinations made to the unified identity event field, the candidate_set_id generation method, the computation block scheduling weight, the cache reuse strategy, the in-memory array mapping method, the event deduplication strategy, or the feedback update method within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for in-memory computing inference block scheduling for cross-terminal identity event triggering Its features are, include: Acquire identity recognition input data generated by one or more terminals, and obtain a candidate identity set, identity recognition confidence, and current inference stage based on the identity recognition input data; Based on the candidate identity set, the identity recognition confidence level, and the consistency of candidate identities within a preset time window, a unified identity event is generated, wherein the unified identity event includes at least the identity status, event priority, remaining response time budget, current inference stage, and candidate identity set identifier; Read the row and column size of the in-memory computing array, the remaining capacity of the on-chip cache, the on-chip cache hit status, the off-chip loading cost, and the array occupancy status; Based on the unified identity event and the state of the in-memory computing array, calculate the computing block scheduling weights of the Attention computing block, FFN weight block, and KV Cache block respectively; Based on the scheduling weights of the computing blocks, the data dependencies between computing blocks, and the row and column size of the in-memory computing array, a block scheduling plan is generated. The block scheduling plan includes an Attention layer block plan, an FFN layer block plan, a KV Cache reuse plan, an in-memory computing array mapping table, an on-chip cache reuse table, and a pipeline execution order. When an FFN weight block or KV Cache block corresponding to the candidate identity set identifier exists in the on-chip cache, the FFN weight block or KV Cache block is reused, and the corresponding off-chip loading or recalculation is skipped. The identity verification reasoning is performed on the in-memory computing array according to the pipeline execution order, and the verified identity status is output.

2. The method according to claim 1 Its features are, The unified identity event includes a reasoning state field, a scheduling control field, and an event control field; The reasoning state field includes identity status, current reasoning stage, and identity recognition confidence, which is used to determine whether the lightweight recognition layer, candidate identity generation layer, candidate identity confirmation layer, or complete identity confirmation layer is currently being executed. The scheduling control field includes event priority, remaining response time budget, and candidate identity set identifier, which are used to calculate the scheduling weights of the Attention computation block, FFN weight block, and KV Cache block. The event control fields include a unique event identifier, an anonymized identity identifier, a source device identifier, a scene identifier, an event timestamp, an event validity period, a throttling key, a deduplication key, a policy tag, and a privacy level, which are used to perform event merging, event expiration judgment, repeated inference skipping, and cross-terminal distribution control. The candidate identity set identifier is not used to directly represent the user's plaintext identity, but is used to index the model weight block, KV Cache block, or completed inference result related to the candidate identity set.

3. The method according to claim 1 Its features are, The candidate identity set identifier is generated in the following manner: Select the K candidate identity identifiers with the highest confidence scores from the candidate identity set output by the identity recognition model; The K candidate identity identifiers are sorted in a preset order and then combined with the model version identifier, scene identifier, and time window identifier. The combined result is hashed or encoded to obtain the candidate identity set identifier; The similarity between two candidate identity sets A and B is calculated using the following formula: Similarity(A, B) = |A ∩ B| / |A ∪ B|; When Similarity(A, B) is greater than a preset similarity threshold, the two candidate identity sets are determined to be similar, and the preset similarity threshold ranges from 0.5 to 0.9; or, when there are at least m identical candidate identities among the Top-K candidate identities of the two candidate identity sets, the two candidate identity sets are determined to be similar.

4. The method according to claim 1 Its features are, The scheduling weight of the computation block is calculated according to the following formula: BlockPriority = a1 × P_event + a2 × C_hit + a3 × S_state + a4 × I_conf + a5 × B_time - a6 × L_offchip - a7 × A_conflict; Wherein, P_event represents the event priority of the unified identity event, C_hit represents whether the on-chip cache hits the FFN weight block or KV Cache block corresponding to the candidate identity set identifier, S_state represents the scheduling factor corresponding to the identity state, I_conf represents the identity recognition confidence, B_time represents the time urgency corresponding to the remaining response time budget, L_offchip represents the off-chip loading cost, A_conflict represents the conflict cost of the in-memory computing array, and a1 to a7 are preset weight coefficients; Among them, P_event, C_hit, S_state, I_conf, B_time, L_offchip and A_conflict are all normalized to the range of 0 to 1 before calculation. The smaller the remaining response time budget, the larger B_time is. When two computation blocks have no data dependency, they are scheduled from high to low according to BlockPriority; when two computation blocks have data dependency, the preceding dependent computation block is executed first, and the BlockPriority of the subsequent computation block is recalculated after the preceding dependent computation block is completed.

5. The method according to claim 1 Its features are, The Attention layer block plan is determined based on the number of rows R, the number of columns C, the length of the input token L, the hidden dimension D, and the remaining on-chip cache capacity S_cache of the in-memory computing array; Among them, the column width of the Q matrix block, K matrix block and V matrix block is not greater than the number of columns C, the row height is not greater than the number of rows R, and the amount of data of the computation block scheduled in the same pipeline stage is not greater than the remaining capacity of the on-chip cache S_cache; When D is greater than C, it is split into multiple column blocks along the hidden dimension direction; when L is greater than R, it is split into multiple row blocks along the token sequence direction. The Attention layer block plan includes a computation block identifier, the model layer to which it belongs, the Attention head to which it belongs, the start position of the input token, the end position of the input token, the start position of the hidden dimension, the end position of the hidden dimension, the target memory array number, the input cache address, and the output cache address.

6. The method according to claim 1 Its features are, The FFN layer block plan includes a first linear transformation weight block, an activation intermediate result block, and a second linear transformation weight block; The FFN weight block includes the FFN sub-matrix block required to distinguish the candidate identity set during the candidate identity confirmation stage; The set of FFN weight blocks to be loaded or reused is determined based on the candidate identity set identifier. When the on-chip cache hits the FFN weight block corresponding to the candidate identity set identifier, the C_hit associated with the FFN weight block is set to the hit state, the BlockPriority of the corresponding computation block is increased, and the corresponding off-chip loading is skipped. When multiple unified identity events have the same candidate identity set identifier, or the similarity of the corresponding candidate identity sets is higher than the preset similarity threshold, the hit FFN weight block in the on-chip cache is reused; when the FFN weight block is not hit, the corresponding FFN weight block is loaded from the off-chip memory and written to the on-chip cache.

7. The method according to claim 1 Its features are, Generate a cache index CacheKey based on the candidate identity set identifier, target object identifier or target trajectory identifier, model layer identifier, block type, and time window; When the cache index matches a KV Cache block in the on-chip cache, and the current unified identity event and the previous unified identity event meet a preset continuity condition, the KV Cache block is reused; The preset continuity conditions include at least two of the following: the target object identifier of the current unified identity event is the same as or the target trajectory is similar to that of the previous unified identity event; the time difference between the current unified identity event and the previous unified identity event is less than a preset time threshold; the current inference stage and the previous inference stage are adjacent inference stages; the current model layer identifier is the same as the previous model layer identifier; and the proportion of unchanged tokens in the current input token is higher than a preset proportion threshold. When the target object persists in adjacent video frames or adjacent identity events, and the input token difference ratio is lower than the preset difference threshold, incremental calculation is only performed on the Attention calculation block corresponding to the differentiated input token.

8. The method according to claim 1 Its features are, When the remaining capacity of the on-chip cache is insufficient, the cache blocks to be released are determined according to the following cache eviction score: EvictScore = c1 × recent_access + c2 × candidate_frequency + c3 × event_priority - c4 × block_size; Among them, recent_access indicates the recent access level of the cache block, candidate_frequency indicates the frequency of occurrence of the candidate identity set within the preset time window, event_priority indicates the event priority of the corresponding unified identity event, block_size indicates the size of the cache block, and c1 to c4 are preset weight coefficients; The recent_access, candidate_frequency, event_priority, and block_size are all normalized to the range of 0 to 1 before calculation; Release the cache block with the lowest EvictScore and prioritize retaining cache blocks related to high-priority unified identity events, frequently hit candidate identity sets, the current candidate identity verification stage, or the stage that is about to enter the full identity verification stage.

9. The method according to claim 1 Its features are, Generate deduplication keys based on target object identifier or target trajectory identifier, candidate identity set identifier, scene identifier, event type, and time window; When multiple unified identity events have the same deduplication key within a preset time window, and the candidate identity set identifiers are the same or the similarity of the candidate identity sets is higher than a preset similarity threshold, the duplicate unified identity events will be marked as inference reuse events. For the inference reuse event, instead of allocating all the storage array resources required for complete candidate identity confirmation inference, the identity state, candidate identity set, FFN weight block, KV Cache block or the completed inference result of the completed inference event is reused, and it is determined whether to execute only the incremental attention calculation block according to the input token difference ratio. When the identity recognition confidence of the deduplicated unified identity event is lower than that of the retained unified identity event, no new full FFN weight block loading task will be assigned to the deduplicated unified identity event.

10. The method according to claim 1 Its features are, After outputting the confirmed identity status, the confirmed unified identity event is sent to the candidate service terminal or terminal control task, and the service execution result is received. When the service execution result is execution failure or no confirmation message is received, the event priority of subsequent unified identity events under the same identity status is increased, the terminal score corresponding to the failed service terminal is reduced, and the priority of assigning related computing tasks or control tasks to the failed service terminal is reduced. When the service execution result is successful, extend the retention time of the FFN weight block and KV Cache block of the corresponding candidate identity set in the on-chip cache; When the same candidate identity set appears more than a preset number of times within a preset time window, the cache retention priority of the FFN weight block and KV Cache block corresponding to the candidate identity set is increased.

11. A storage-based computing inference block scheduling system for cross-terminal identity event triggering Its features are, include: The identity input acquisition module is used to acquire identity recognition input data generated by one or more terminals, and obtain the candidate identity set, identity recognition confidence, and current inference stage; The unified identity event generation module is used to generate a unified identity event based on the candidate identity set, identity recognition confidence, and the consistency of candidate identities within a preset time window. The array status acquisition module is used to read the row and column size of the in-memory computing array, the remaining capacity of the on-chip cache, the on-chip cache hit status, the off-chip loading cost, and the array occupancy status. The event-driven block scheduling module is used to calculate the scheduling weights of the Attention computing block, FFN weight block, and KV Cache block according to the unified identity event and the state of the in-memory computing array, and generate the Attention layer block plan, FFN layer block plan, KV Cache reuse plan, in-memory computing array mapping table, on-chip cache reuse table, and pipeline execution order. The on-chip cache reuse module is used to reuse the corresponding cached content and skip the corresponding off-chip loading or repeated calculation when there is an FFN weight block, KV Cache block or inference result corresponding to the candidate identity set identifier in the on-chip cache. The in-memory computing inference execution module is used to perform identity verification inference on the in-memory computing array according to the pipeline execution order, and output the verified identity status. The duplicate event processing module is used to mark duplicate unified identity events as inference reuse events based on the deduplication key, candidate identity set identifier, and candidate identity set similarity, and to control the event-driven block scheduling module to reduce the allocation of full storage array resources to the inference reuse events. The feedback update module is used to update the computation block scheduling weight, cache retention priority, and terminal score of subsequent unified identity events based on the service execution result, cache hit count, and the number of times the candidate identity set appears repeatedly. The system is used to perform the method according to any one of claims 1 to 10.

12. An electronic device Its features are, This includes in-memory computing chips, processors, memory, off-chip memory, and communication modules; The in-memory computing chip includes at least one in-memory computing array and on-chip cache; The memory stores a computer program, which, when executed by the processor and / or the in-memory computing chip, implements the method described in any one of claims 1 to 10.

13. A computer-readable storage medium Its features are, The computer-readable storage medium stores a computer program that, when executed by a processor and / or a memory computing chip, implements the method described in any one of claims 1 to 10.

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