Circuit board, circuit board assembly, and electronic device

Abstract

This application provides a circuit board, a circuit board assembly, and an electronic device. The circuit board includes: a first pad, a second pad, a third pad, and a fourth pad; the first pad and the second pad are electrically connected; the third pad and the fourth pad are also electrically connected; the first pad is used to mount a first electronic device; the circuit board is used to mount a second or third electronic device; when the second electronic device is mounted on the circuit board, the second pad is used to mount the second electronic device, and the third and fourth pads are idle; when the third electronic device is mounted on the circuit board, the fourth pad is used to mount the third electronic device, and the second and third pads are used to mount an adapter board to electrically connect the second and third pads. This application can reduce the thickness of the circuit board assembly while being compatible with chips with various pin structures.

Description

Technical Field

[0001] This application relates to the field of circuit technology, and more particularly to a circuit board, circuit board assembly, and electronic device. Background Technology

[0002] When manufacturing circuit board assemblies, it is often necessary to use chips from different manufacturers that perform the same function, and these chips have different pin structures. To ensure compatibility between chips from different manufacturers on the same circuit board, related technologies employ an adapter board mounted on the circuit board, with the chip mounted on the adapter board. In other words, in these technologies, the circuit board assembly includes a stacked circuit board, an adapter board, and chips. However, this increases the thickness of the circuit board assembly, making it unsuitable for electronic devices such as tablets and foldable phones where overall thickness is critical. Summary of the Invention

[0003] To address the aforementioned technical problems, this application provides a circuit board, a circuit board assembly, and an electronic device that can reduce the thickness of the circuit board assembly while being compatible with chips with various pin structures.

[0004] A first aspect of this application provides a circuit board including: a first pad, a second pad, a third pad, and a fourth pad located on the surface of the circuit board. The first pad is electrically connected to the second pad, and the third pad is electrically connected to the fourth pad. The first pad is used to mount a first electronic device, which may be, for example, a system-on-a-chip (SoC). The circuit board assembly is used to mount a second or third electronic device. The second and third electronic devices may be two electronic devices that perform the same function but have different pin structures.

[0005] When the second electronic device is mounted on the circuit board, the second pad is used to mount the second electronic device, while the third and fourth pads are idle. Since the second pad is electrically connected to the first pad, the second electronic device can achieve electrical connection with the first electronic device through the second and first pads, thereby enabling signal transmission between the second and first electronic devices.

[0006] When the third electronic device is mounted on the circuit board, the fourth pad is used to mount the third electronic device, and the second and third pads are used to mount the adapter board to electrically connect the second and third pads. Since the third pad is electrically connected to the fourth pad, and the second pad is electrically connected to the first pad, the third electronic device can be electrically connected to the first electronic device in sequence through the fourth pad, the third pad, the adapter board, the second pad, and the first pad, thereby realizing signal transmission between the third electronic device and the first electronic device.

[0007] Therefore, in this application, the second electronic device and the third electronic device with different pin structures can share the same circuit board, thus achieving co-board compatibility between the second electronic device and the third electronic device.

[0008] Furthermore, in this application, when the third electronic device is mounted on the circuit board, both the third electronic device and the adapter board are directly mounted on solder joints located on the surface of the circuit board; that is, the third electronic device and the adapter board are laid flat on the circuit board. In contrast, related technologies stack the adapter board and the chip sequentially on the circuit board. In this application, the first electronic device, the third electronic device, and the adapter board are laid flat on the circuit board. Therefore, compared with the prior art, the total thickness of the circuit board in this application is effectively reduced, making it more suitable for use in electronic devices such as tablets and mobile phones where thickness requirements are high.

[0009] In addition, the second pad can be used to set up the second electronic device independently, and the second and third pads can be combined to set up an adapter board. In this way, the second pad is a shared pad for both the use of the second electronic device and the use of the third electronic device. This improves the utilization rate of the second pad, and allows the co-board compatibility of the second and third electronic devices to be achieved with a smaller number of pads. This reduces the surface area of ​​the circuit board and lowers the cost.

[0010] It should be noted that the second and third pads are used to set the adapter board, so the second and third pads must be set on the same surface of the circuit board. The first and fourth pads can be located on the same surface of the circuit board as the second and third pads, or they can be located on different surfaces of the circuit board than the second and third pads.

[0011] In some embodiments of this application, the second pad and the third pad are arranged adjacent to each other. Since the second pad and the third pad are used to mount the adapter board, when the second pad and the third pad are arranged adjacent to each other, the distance between the second pad and the third pad can be reduced, thereby reducing the length of the adapter board mounted on the second pad and the third pad, and thus reducing the cost of the adapter board.

[0012] A second aspect of this application provides a circuit board including: a first pad, a second pad, a third pad, a fourth pad, a fifth pad, and a sixth pad located on the surface of the circuit board. The first pad is electrically connected to the second pad, the third pad is electrically connected to the fourth pad, and the fifth pad is electrically connected to the sixth pad. The first pad is used to mount a first electronic device, which may be, for example, a system-on-a-chip (SoC). The circuit board is used to mount a second or third electronic device. The second and third electronic devices may be two chips that perform the same function but have different pin structures.

[0013] When the second electronic device is mounted on the circuit board, the fourth pad is used to mount the second electronic device, and the second and third pads are used to mount the adapter board to electrically connect the second and third pads. The fifth and sixth pads are left unused. Since the third pad is electrically connected to the fourth pad and the second pad is electrically connected to the first pad, the second electronic device can be electrically connected to the first electronic device sequentially through the fourth pad, the third pad, the adapter board, the second pad, and the first pad, thereby realizing signal transmission between the second and first electronic devices.

[0014] When the third electronic device is mounted on the circuit board, the sixth pad is used to mount the third electronic device, and the second and fifth pads are used to mount the adapter board to electrically connect the second and fifth pads. The third and fourth pads are left unused. Since the fifth pad is electrically connected to the sixth pad, and the second pad is electrically connected to the first pad, the third electronic device can be electrically connected to the first electronic device sequentially through the sixth pad, the fifth pad, the adapter board, the second pad, and the first pad, thereby realizing signal transmission between the third and first electronic devices.

[0015] Therefore, in this application, co-board compatibility between the second and third electronic devices can be achieved, that is, co-board compatibility between chips with different pin structures can be achieved.

[0016] Furthermore, in this application, when the second electronic device is mounted on the circuit board, both the second electronic device and the adapter board are directly mounted on solder joints located on the surface of the circuit board. In other words, the second electronic device and the adapter board are laid flat on the circuit board, whereas in related technologies, the adapter board and the second electronic device are stacked sequentially on the circuit board. In this application, the first electronic device, the second electronic device, and the adapter board are laid flat on the circuit board, thus effectively reducing the total thickness of the circuit board compared to existing technologies. This makes it more suitable for use in electronic devices such as tablets and mobile phones where thickness requirements are high. Similarly, when the third electronic device is mounted on the circuit board, the total thickness of the circuit board can also be effectively reduced by laying the first electronic device, the third electronic device, and the adapter board flat, thus making it more suitable for use in electronic devices such as tablets and mobile phones where thickness requirements are high.

[0017] In some embodiments of this application, the third pad is disposed adjacent to the second pad. Since the third pad and the second pad are used to mount the adapter board, when the third pad and the second pad are disposed adjacent to each other, the distance between the third pad and the second pad can be reduced, thereby reducing the length of the adapter board mounted on the third pad and the second pad, and thus reducing the cost of the adapter board.

[0018] In some embodiments of this application, the fifth pad is arranged adjacent to the second pad. Since the fifth pad and the second pad are used to mount the adapter board, when the fifth pad and the second pad are arranged adjacent to each other, the distance between the fifth pad and the second pad can be reduced, thereby reducing the length of the adapter board mounted on the third pad and the second pad, and thus reducing the cost of the adapter board.

[0019] When using a second electronic component, the adapter board is positioned on the third and second pads; when using a third electronic component, the adapter board is positioned on the fifth and second pads. To ensure the adapter board is interchangeable when using different chips, the combined pads formed by the third and second pads have the same structure as those formed by the fifth and second pads. This reduces the number of adapter board types, thereby improving component versatility.

[0020] Specifically, the third and fifth pads have the same structure and are located on opposite sides of the second pad, respectively. The spacing between the third and second pads is the same as the spacing between the fifth and second pads. Thus, when installing the second or third electronic device, simply rotating the adapter board horizontally by 180° allows the same adapter board to be used on the same circuit board.

[0021] A third aspect of this application provides a circuit board assembly including a first electronic device, a second electronic device, or a third electronic device, and a circuit board according to any embodiment of the first aspect described above. The first electronic device is disposed on a first pad of the circuit board. When the circuit board assembly includes a second electronic device, the second electronic device is disposed on a second pad, and the third and fourth pads of the circuit board are unoccupied. When the circuit board assembly includes a third electronic device, the third electronic device is disposed on a fourth pad. The circuit board assembly also includes an adapter board disposed on the second and third pads to electrically connect the second and third pads. The circuit board assembly can achieve all the effects of a circuit board.

[0022] In some embodiments of this application, the adapter board includes a seventh pad and an eighth pad, which are electrically connected. The seventh pad is disposed on the second pad, and the eighth pad is disposed on the third pad. Thus, the adapter board has a single-sided pad configuration. When setting up the adapter board, the surface with the seventh and eighth pads can be aligned and soldered to the second and third pads of the circuit board, thereby achieving the mounting of the adapter board on the circuit board. This method of mounting the adapter board is simpler.

[0023] In some embodiments of this application, the first electronic device includes a system-on-a-chip (SoC). When the circuit board assembly includes a second electronic device, the second electronic device is a double-data-rate synchronous dynamic random access memory (DDR). The circuit board also includes a ninth pad electrically connected to the first pad, and the circuit board assembly also includes a universal flash memory (UFS) disposed on the ninth pad. Thus, this application can implement a storage scheme where DDR and UFS are independently packaged. When the circuit board assembly includes a third electronic device, the third electronic device is an ultra-high integration multi-chip package (UMCP) or an ultra-high integration multi-chip package (EMCP), wherein the UMCP or EMCP can be a co-packaged chip formed by combining DDR and UFS. Thus, this application can also implement a storage scheme that co-packages DDR and UFS. Therefore, this application can be compatible with the above two different storage schemes on the same circuit board.

[0024] In some embodiments of this application, the third electronic device is an in-circuit programming ISP chip, a power management chip, a wireless network communication technology Wi-Fi chip, a power amplifier, a digital switch, a repeater, a camera module, an audio module, or a Wi-Fi module.

[0025] A fourth aspect of this application provides a circuit board assembly including a first electronic device, a second or third electronic device, an adapter board, and a circuit board according to any embodiment of the second aspect. The first electronic device is disposed on a first pad of the circuit board. When the circuit board assembly includes a second electronic device, the second electronic device is disposed on a fourth pad, and the adapter board is disposed on the second and third pads of the circuit board to electrically connect the second and third pads, while the fifth and sixth pads of the circuit board are left unattended. When the circuit board assembly includes a third electronic device, the third electronic device is disposed on a sixth pad of the circuit board, and the adapter board is disposed on the second and fifth pads to electrically connect the second and fifth pads, while the third and fourth pads are left unattended. The circuit board assembly can achieve all the effects of a circuit board.

[0026] In some embodiments of this application, the adapter board includes a seventh pad and an eighth pad, which are electrically connected. When the circuit board assembly includes a second electronic device, the seventh pad is disposed on the second pad, and the eighth pad is disposed on the third pad. Thus, the adapter board has a single-sided pad configuration. When setting up the adapter board, the surface with the seventh and eighth pads can be aligned and soldered to the second and third pads of the circuit board, thereby achieving the adapter board's placement on the circuit board. When the circuit board assembly includes a third electronic device, the seventh pad is disposed on the second pad, and the eighth pad is disposed on the fifth pad. Similarly, the adapter board can also be placed on the circuit board by having a single-sided pad configuration.

[0027] In some embodiments of this application, the first electronic device is a System-on-a-Chip (SOC). When the circuit board assembly includes a second electronic device, the second electronic device is a Double Data Rate (DMR) Synchronous Dynamic Random Access Memory (DDR). The circuit board also includes a tenth pad electrically connected to the first pad, and the circuit board assembly further includes a Universal Flash Memory (UFS) disposed on the tenth pad. Thus, this application can implement a storage scheme where DDR and UFS are independently packaged. When the circuit board assembly includes a third electronic device, the third electronic device is an Ultra-High Integration Multi-Chip Package (UMCP) or an Ultra-Electronic Packaging Package (EMCP), wherein the UMCP or EMCP can be a co-packaged chip formed by combining DDR and UFS. Thus, this application can also implement a storage scheme that co-packages DDR and UFS. Therefore, this application can be compatible with the above two different storage schemes on the same circuit board.

[0028] A fifth aspect of this application also provides an electronic device, including a power supply and a circuit board assembly according to any of the above embodiments, wherein the power supply is electrically connected to the circuit board assembly. The electronic device is capable of achieving all the effects of the circuit board assembly. Attached Figure Description

[0029] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 This is a schematic diagram of the structure of the electronic device in the embodiments of this application;

[0031] Figure 2a This is a schematic diagram of a circuit board assembly in the related technology that includes one type of chip.

[0032] Figure 2b This is a schematic diagram of a circuit board assembly in the related technology that includes another type of chip;

[0033] Figure 3 This is a schematic diagram of the circuit board assembly in one embodiment of this application;

[0034] Figure 4 for Figure 3 A top view of the circuit board in the circuit board assembly shown in the embodiment;

[0035] Figure 5 for Figure 3 A schematic cross-sectional view of the circuit board in the circuit board assembly shown in the embodiment.

[0036] Figure 6 for Figure 3A cross-sectional view of the adapter board in the circuit board assembly shown in the embodiment.

[0037] Figure 7 for Figure 5 The diagram shows a cross-sectional structure of a circuit board with one type of chip installed on it.

[0038] Figure 8 for Figure 4 Top view of a circuit board with one of the chips installed;

[0039] Figure 9 for Figure 5 The diagram shows a cross-sectional structure when another chip is mounted on the circuit board.

[0040] Figure 10 for Figure 4 Top view of the circuit board shown with another chip installed on it;

[0041] Figure 11 for Figure 3 The embodiment shown is a schematic diagram of a planar structure of a camera module in a specific application scenario;

[0042] Figure 12 for Figure 3 The illustrated embodiment is a schematic diagram of a planar structure of another camera module in a specific application scenario;

[0043] Figure 13 This is a schematic diagram of the planar structure of the circuit board in another embodiment of this application;

[0044] Figure 14 for Figure 13 A schematic diagram of the cross-sectional structure of the circuit board shown;

[0045] Figure 15 for Figure 13 The diagram shows a cross-sectional structure of a circuit board with one type of chip installed on it.

[0046] Figure 16 for Figure 13 Top view of a circuit board with one of the chips installed;

[0047] Figure 17 for Figure 13 The diagram shows a cross-sectional structure when another chip is mounted on the circuit board.

[0048] Figure 18 for Figure 13 Top view of the circuit board shown with another chip installed on it;

[0049] Figure 19This is a schematic diagram of the structure of the first storage scheme provided in the embodiments of this application;

[0050] Figure 20 This is a schematic diagram of the structure of the second storage scheme provided in the embodiments of this application;

[0051] Figure 21 for Figure 5 A schematic cross-sectional view of the circuit board assembly implementing the first storage scheme on the circuit board shown.

[0052] Figure 22 for Figure 5 A schematic cross-sectional view of the circuit board assembly implementing the second storage scheme on the circuit board shown.

[0053] Figure 23 for Figure 14 A schematic cross-sectional view of the circuit board assembly implementing the first storage scheme on the circuit board shown.

[0054] Figure 24 for Figure 14 The diagram shows a cross-sectional view of a circuit board assembly implementing the second storage scheme.

[0055] Icons: 1-Electronic device; 100-Circuit board assembly; 10-Circuit board; 11-Surface mount; 111 / 112 / 113 / 114 / 115 / 116-Pads; 12-Wiring layer; 20-SOC; 30-Storage device; 31 / 32-Chip; 311 / 321-Camera module; 33-DDR; 34-UFS; 35-UMCP; 300-Input / output device; 400-Sensor; 60-Adapter board; 61-Surface mount; 617 / 618-Pads; 64-Wiring layer; 200-Power supply. Detailed Implementation

[0056] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0057] In this article, the term "and / or" simply describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item)" refers to one or more, while "more" refers to two or more. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0058] The terms "first" and "second," etc., used in the specification and claims of this application are used to distinguish different objects, not to describe a specific order of objects. For example, "first target object" and "second target object," etc., are used to distinguish different target objects, not to describe a specific order of target objects.

[0059] Terms such as “connected” and “linked” are used to express the interconnection or interaction between different components, which may include direct connection or indirect connection through other components. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover non-exclusive inclusion, such as including a series of steps or units. A method, system, product, or apparatus is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to these processes, methods, products, or apparatuses. Terms such as “upper,” “lower,” “left,” and “right” are used only relative to the orientation of components in the accompanying drawings. These directional terms are relative concepts used for relative description and clarification, and may vary accordingly depending on the orientation of the components in the drawings.

[0060] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0061] In the description of the embodiments in this application, unless otherwise stated, "multiple" means two or more. For example, multiple processing units means two or more processing units; multiple systems means two or more systems.

[0062] like Figure 1As shown, this application embodiment provides an electronic device 1, which can be, for example, a server, consumer electronics, home electronics, in-vehicle electronics, financial terminal products, communication electronic products, etc., and this application embodiment does not limit the scope of these. Illustrated, the aforementioned consumer electronics can be mobile phones, tablet computers, laptops, personal computers (PCs), personal digital assistants (PDAs), smart wearable products (e.g., smartwatches, smart bracelets), virtual reality (VR) terminal devices, augmented reality (AR) terminal devices, drones, etc. Home electronics can be smart door locks, televisions, smart speakers, refrigerators, robot vacuum cleaners, etc. In-vehicle electronic products can be in-vehicle navigation systems, in-vehicle displays, etc. Financial terminal products can be automated teller machines (ATMs), self-service electronic devices 1, etc. Communication electronic products can be servers, storage devices, radar, base stations, and other communication equipment.

[0063] like Figure 1 As shown, electronic device 1 may include circuit board assembly 100, power supply 200, input / output device 300, and sensor 400. Circuit board assembly 100 is electrically connected to power supply 200. Circuit board assembly 100 includes circuit board 10, system on chip (SOC) 20, and storage device 30.

[0064] Reference Figure 1 Both the SOC 20 and the storage device 30 are mounted on the circuit board 10. The SOC 20 may integrate various devices, such as a central processing unit (CPU), a storage controller, a cache, and a bus. The storage device 30 is electrically connected to the SOC 20 via an electrical connection structure. The storage device 30 may include double-data-rate synchronous dynamic random access memory (DDR), universal flash storage (UFS), etc. When the CPU in the SOC 20 is running, it can obtain instructions and data from the storage device 30 and store the instructions and data in the cache of the SOC 20. The CPU executes the corresponding functions by loading the instructions and data stored in the cache. The storage controller can control the connection between the storage device 30 and the cache in the SOC 20, so that the cache can read data from the storage device 30 or write data to the storage device 30 via the bus.

[0065] Figure 1 The input / output device 300 shown can be, for example, a screen, keyboard, and mouse. Figure 1 The sensor 400 shown can be, for example, an image sensor, an infrared sensor, a gyroscope sensor, and an accelerometer sensor. The input / output device 300 and the sensor 400 can be electrically connected to the circuit board 10 via a bus. The user interacts with the CPU through the input / output device 300 to instruct the CPU to control the electronic device 1 to perform various functions. The user can also store data in and retrieve data from the storage device 30 through the input / output device 300. The sensor 400 can collect data (e.g., image data collected by the image sensor, three-axis component data collected by the gyroscope sensor from the electronic device 1), store the collected data in the storage device 30, or directly provide it to the CPU. The CPU can control the electronic device 1 to perform certain functions based on the data collected by the sensor 400 (e.g., screen unlocking based on facial image data collected by the image sensor). It should be noted that, as... Figure 1 The electronic device 1 shown may also include more or fewer devices or equipment (e.g., it may also include communication devices to enable short-range communication or cellular communication), and this application embodiment does not specifically limit this.

[0066] In practical applications, for Figure 1 The pin structure of any chip in the illustrated storage device 30, such as DDR, may differ between different manufacturers. Here, the difference in pin structure between two chips may refer to at least one parameter being different in the number of pins, their arrangement, and the pin spacing.

[0067] In related technologies, to make the same circuit board 10 compatible with chips from different manufacturers, for example... Figure 2a Chip 31 and Figure 2b Chip 32 is located on circuit board 10, and pads 101 are provided on the circuit board. Here, chips 31 and 32 can perform the same function but have different pin structures. For example... Figure 2a As shown, when chip 31 needs to be installed, chip 31 can be placed on pad 101 via adapter board 60, that is, placed on circuit board 10. Figure 2b As shown, when chip 32 needs to be installed, chip 32 can be placed on pad 101 via adapter board 60, that is, placed on circuit board 10. Thus, the adapter board 60 enables the same circuit board 10 to be compatible with chips with various pin structures.

[0068] However, both adding an adapter board 60 between circuit board 10 and chip 31, and adding an adapter board 60 between circuit board 10 and chip 32, will increase the thickness of circuit board assembly 100. Circuit board assembly 100 can also be referred to as printed circuit board assembly (PCBA). When circuit board assembly 100 is used in electronic devices 1 such as tablets and foldable phones where the overall thickness is important, the thickness of the PCBA will be too large and will not meet the thickness requirements of the product.

[0069] Based on this, such as Figure 3 As shown, this application embodiment provides a circuit board assembly 100, which may include a circuit board 10, a SOC 20, and an adapter board 60. Since chips 31 and 32 can perform the same function, the circuit board assembly 100 typically only includes one of chips 31 and 32. For example, it may include chip 31 or chip 32.

[0070] In this embodiment, the circuit board 10 can be a printed circuit board (PCB) or a flexible circuit board, etc.

[0071] Chips 31 and 32 can be unpackaged chips, i.e., bare chips. These chips can be in-system programming (ISP) chips, central processing units (CPUs), graphics processing units (GPUs), memory, input / output (I / O) chips, power management chips, Wi-Fi wireless network communication technology chips, integrated passive devices (IPDs), DDR, UFS, etc. Alternatively, they can integrate other pre-packaged functional modules, such as high-bandwidth memory (HBM), die-on-silicon interposer (DOI) modules, fan-out RDL interposer (FOI) modules, ultra-high integration multi-chip packages (UMCP), embedded multi-chip packages (EMCP), etc.

[0072] like Figure 4 and Figure 5As shown, the circuit board 10 has a surface 11, on which pads 111, 112, 113, 114, 115 and 116 are provided. Each of the pads 111, 112, 113, 114, 115 and 116 includes a plurality of solder balls.

[0073] like Figure 5 As shown, the circuit board 10 also has a wiring layer 12 inside, which may include a multi-layer electrical connection structure. Specifically, the electrical connection structure may be a structure such as metal wires that enables signal transmission. Figure 5 The diagram shows a circuit board 10 with three layers of electrical connection structures inside. The three layers of electrical connection structures are L1, L2, and L3.

[0074] like Figure 5 As shown, pad 111 is electrically connected to pad 112. For example, pad 111 and pad 112 can be electrically connected via electrical connection structure L1. Pad 113 is electrically connected to pad 114. For example, pad 113 can be electrically connected to pad 114 via electrical connection structure L2. Pad 115 is electrically connected to pad 116. For example, pad 115 can be electrically connected to pad 116 via electrical connection structure L3.

[0075] like Figure 6 As shown, the adapter board 60 has a surface 61 on which pads 617 and 618 are provided. Both pads 617 and 618 include a plurality of solder balls. For example, pad 617 includes solder balls 71, 72, 73 and 74. Pad 618 includes solder balls 81, 82, 83 and 84.

[0076] like Figure 6 As shown, the adapter board 60 has a wiring layer 64 inside, which includes a multi-layer electrical connection structure. Figure 6 The diagram shows a four-layer electrical connection structure inside the adapter board 60. The four electrical connection layers in the wiring layer 64 are L11, L12, L13, and L14.

[0077] like Figure 6 As shown, pads 617 and 618 are electrically connected. Specifically, each solder ball in pad 617 can be electrically connected to each solder ball in pad 618 through an electrical connection structure. For example, solder ball 71 in pad 617 is electrically connected to solder ball 81 in pad 618 through electrical connection structure L11, solder ball 72 in pad 617 is electrically connected to solder ball 82 in pad 618 through electrical connection structure L12, solder ball 73 in pad 617 is electrically connected to solder ball 83 in pad 618 through electrical connection structure L13, and solder ball 74 in pad 617 is electrically connected to solder ball 84 in pad 618 through electrical connection structure L14.

[0078] like Figure 7 As shown, pad 111 can be used to set up SOC 20. Pad 114 can be used to set up chip 31, and pad 116 can be used to set up chip 32. Since the pin structures of SOC 20, chip 31, and chip 32 are different, the corresponding pad structures on circuit board 10 are also different. That is, the structures of pads 111, 114, and 116 are all different. It can be understood that the difference in the structure of two pads can refer to at least one difference in the number, arrangement, and spacing of the solder balls in the pads. For example, the solder ball arrangement of the two pads may be different; and / or, the solder ball spacing of the two pads may be different; and / or, the number of solder balls of the two pads may be different.

[0079] like Figure 7 As shown, the adapter board 60 can be disposed on pads 112 and 113 to be disposed on the circuit board 10. Specifically, the adapter board 60 can be soldered to pads 112 and 113 by means of a land grid array (LGA) package.

[0080] Since chips 31 and 32 have the same function, in practical applications, either chip 31 or chip 32 can be placed on circuit board 10. The following description will explain the two cases of placing chip 31 or chip 32 separately on circuit board 10.

[0081] Scenario 1:

[0082] When chip 31 is required, such as Figure 7 As shown, SOC20 can be mounted on pad 111 using surface mount technology (SMT), chip 31 can be mounted on pad 114 using SMT, and adapter board 60 can be mounted on pads 112 and 113 using SMT. Chip 32 is not mounted. Since pads 112 and 111 are electrically connected via electrical connection structure L1, and pads 114 and 113 are electrically connected via electrical connection structure L2, chip 31 can be electrically connected to SOC20 sequentially via pad 114, electrical connection structure L2, pad 113, adapter board 60, pad 112, electrical connection structure L1, and pad 111, thus forming a communication branch between SOC20 and chip 31.

[0083] As can be seen, in the embodiments of this application, such as Figure 7 As shown, when chip 31 is required, both chip 31 and adapter board 60 are directly mounted on circuit board 10. That is, chip 31 and adapter board 60 are laid flat on circuit board 10. Figure 2aIn the related technologies shown, the adapter board 60 and the chip 31 are stacked sequentially on the circuit board 10. In this embodiment, the SOC 20, the chip 31 and the adapter board 60 are laid flat on the circuit board 10. Therefore, compared with the related technologies, the total thickness of the circuit board assembly 100 in this embodiment is effectively reduced, which makes it more suitable for electronic devices such as tablets and mobile phones with high thickness requirements.

[0084] like Figure 7 and Figure 8 As shown, pads 115 and 116 are idle pads, meaning no components are placed on them. Furthermore, pads 115 and 116 are not electrically connected to the SOC 20. Therefore, the communication branch starting from the SOC 20 only has one communication branch from the SOC 20 to the chip 31, with no other communication branches. If the SOC 20 has two communication branches, but only one transmits a signal, the other non-transmitting communication branch will create a stub, which will affect signal transmission quality. In this embodiment, only one communication branch exists, therefore no stub is created, thus avoiding the impact on signal transmission quality and reducing signal reflection. Therefore, this embodiment improves signal transmission quality.

[0085] In addition, such as Figure 7 As shown, since pads 112 and 113 are jointly provided on the adapter board 60 in this case, in order to reduce the length of the adapter board 60, pads 112 and 113 can be arranged adjacent to each other.

[0086] Moreover, such as Figure 7 As shown, in this embodiment, the pads 617 of the adapter board 60 can be connected to the pads 113 of the circuit board 10. Specifically, in one example, the pads 617 and 113 have the same structure. In another example, the number of solder balls in the pad 617 is greater than the number of solder balls in the pad 113, and a portion of the structure of the pad 617 is the same as that of the pad 113. In yet another example, the number of solder balls in the pad 617 is less than the number of solder balls in the pad 113, and a portion of the structure of the pad 113 is the same as that of the pad 117.

[0087] like Figure 7 As shown, in this embodiment, the pads 618 of the adapter board 60 can be connected to the pads 112 of the circuit board 10. Therefore, the structures of pads 618 and 112 can be the same; or, a portion of the structure of pad 618 is the same as the structure of pad 112; or, a portion of the structure of pad 618 is the same as the structure of pad 112.

[0088] In other embodiments, the pads 617 of the adapter board 60 can be connected to the pads 112 of the circuit board 10, and the pads 618 of the adapter board 60 can be connected to the pads 113 of the circuit board 10.

[0089] It is understandable that the signals transmitted between SOC20 and chip 31 can be general purpose media interface (GPMI) signals, universal serial bus (USB) signals, display port (DP) signals, embedded display port (eDP) signals, mobile industry processor interface (MIPI) signals, radio frequency signals, storage signals, etc.

[0090] Scenario 2:

[0091] When a 32-bit chip is required, such as Figure 9 As shown, SOC20 can be mounted on pad 111 via SMT, chip 32 can be mounted on pad 116 via SMT, and adapter board 60 can be mounted on pads 112 and 115 via SMT. Chip 31 is not mounted. Since pads 112 and 111 are electrically connected via electrical connection structure L1, and pads 116 and 115 are electrically connected via electrical connection structure L3, chip 32 can be electrically connected to SOC20 sequentially via pad 116, electrical connection structure L3, pad 115, adapter board 60, pad 112, electrical connection structure L1, and pad 111. This forms a communication branch between SOC20 and chip 32.

[0092] Furthermore, due to the embodiments in this application, such as Figure 9 As shown, when chip 32 is required, both chip 32 and adapter board 60 are directly mounted on circuit board 10. That is, chip 32 and adapter board 60 are laid flat on circuit board 10. Figure 2b In the related technologies shown, the adapter board 60 and the chip 32 are stacked sequentially on the circuit board 10. In this embodiment, the SOC 20, the chip 32 and the adapter board 60 are laid flat on the circuit board 10. Therefore, compared with the related technologies, the total thickness of the circuit board assembly 100 in this embodiment is effectively reduced, which makes it more suitable for electronic devices such as tablets and mobile phones with high thickness requirements.

[0093] like Figure 9 and Figure 10As shown, pads 113 and 114 are idle pads, meaning no components are placed on them. Furthermore, pad 113 has no electrical connection to SOC 20, and since pad 114 also has no electrical connection to SOC 20, the communication branch starting from SOC 20 only has one communication branch from SOC 20 to chip 32, with no other communication branches. If SOC 20 has two communication branches, but only one transmits a signal, the other non-transmitting communication branch will create a stub, which will affect signal transmission quality. In this embodiment, only one communication branch exists, therefore no stub is created, thus avoiding the impact on signal transmission quality and reducing signal reflection. Therefore, this embodiment improves signal transmission quality.

[0094] In addition, such as Figure 9 As shown, since pads 112 and 115 are jointly provided on the adapter board 60 in this case, in order to reduce the length of the adapter board 60, pads 112 and 115 can be arranged adjacent to each other.

[0095] Moreover, such as Figure 9 As shown, the pads 617 of the adapter board 60 can be connected to the pads 112 of the circuit board 10. In one specific implementation, pads 617 and 112 have the same structure. In another example, pad 617 has more solder balls than pad 112, and a portion of the structure of pad 617 is the same as that of pad 112. In yet another example, pad 617 has fewer solder balls than pad 112, and a portion of the structure of pad 112 is the same as that of pad 117.

[0096] like Figure 7 As shown, the pads 618 of the adapter board 60 can be connected to the pads 115 of the circuit board 10. The structures of pads 618 and pads 115 can be the same; or, a portion of the structure of pads 618 is the same as the structure of pads 115; or, a portion of the structure of pads 618 is the same as that of pads 115.

[0097] In other embodiments, the pads 617 of the adapter board 60 can be connected to the pads 115 of the circuit board 10, and the pads 618 of the adapter board 60 can be connected to the pads 112 of the circuit board 10.

[0098] In order to make the adapter board 60 interchangeable in both Case 1 and Case 2, the structure of the combination of pads 112 and 113 can be the same as the structure of the combination of pads 112 and 115.

[0099] In one example, such as Figure 4As shown, pads 113 and 115 are respectively located on both sides of pad 112, meaning that pads 113, 112, and 115 are arranged sequentially along a straight line. Pads 112, 113, and 115 have identical structures, and the spacing between pads 112 and 113, as well as the spacing between pads 113 and 115, is also the same. Therefore, an adapter board 60 can accommodate pads 112 and 113, and can also accommodate pads 112 and 115.

[0100] It is understandable that having the same structure for two pads means that the number of solder balls, the arrangement of solder balls, and the spacing between solder balls are all the same.

[0101] In another example, pad 113 has the same structure as pad 115, but a different structure than pad 112. The spacing between pad 113 and pad 112 is the same as the spacing between pad 115 and pad 112. Therefore, when mounting chip 31 or chip 32, the adapter board 60 can be used on the same circuit board 10 simply by rotating it horizontally by 180°.

[0102] Furthermore, in order not to increase the overall thickness of the PCBA, the thickness of the adapter board 60 can be less than or equal to the maximum thickness of the SOC 20, chip 31 and chip 32.

[0103] The following will further explain this embodiment in conjunction with specific application scenarios.

[0104] In one application scenario, it is necessary to be compatible with circuit board 10 such as Figure 11 The camera module 311 shown and as shown Figure 12 The camera module 321 is shown. Camera modules 311 and 321 have different pin structures; the pin structure of camera module 311 is the same as that of pad 114, and the pin structure of camera module 312 is the same as that of pad 116. It is understood that this explanation uses compatibility with different camera modules on circuit board 10 as an example. In practical applications, circuit board 10 can also be compatible with other modules with different pin structures, such as power amplifiers, digital switches, repeaters, audio modules, or Wi-Fi modules.

[0105] When camera module 311 is required, such as Figure 11 As shown, the SOC20 is placed on pad 11, the camera module 311 is placed on pad 114, and the adapter board 60 is placed on pads 112 and 113. In this way, the camera module 311 can be electrically connected to the SOC20 through the adapter board 60.

[0106] When camera 321 is required, such as Figure 12As shown, the SOC20 is placed on pad 11, the camera module 321 is placed on pad 116, and the adapter board 60 is placed on pads 112 and 115. In this way, the camera module 321 can be electrically connected to the SOC20 through the adapter board 60.

[0107] This enables compatibility of camera modules of different specifications on a single board, thus supporting the differences in product specifications. Furthermore, since there is no need for elevation adjustment via the adapter board 60, the PCBA thickness remains unchanged, meeting the thickness requirements of electronic devices. In related technologies, the thickness of the adapter board 60 is approximately 0.45mm; therefore, this embodiment achieves a thickness gain of 0.45mm, meaning the PCBA thickness is reduced by at least 0.45mm.

[0108] In other embodiments of this application, with Figure 4 The difference between the illustrated embodiments lies in the structure of the circuit board 10. Specifically, in this embodiment, as shown... Figure 13 As shown, the circuit board 10 has a surface 11, on which pads 111, 112, 113 and 114 are provided.

[0109] like Figure 14 As shown, the circuit board 10 also has a wiring layer 12 inside, which includes electrical connection structures. Specifically, as... Figure 14 As shown, the wiring layer 12 includes electrical connection structures L21 and L22, and the electrical connection structures L21 and L22 are located on the same layer.

[0110] like Figure 14 As shown, pad 111 is electrically connected to pad 112. Specifically, pad 111 can be electrically connected to pad 112 via electrical connection structure L21. Pad 113 is electrically connected to pad 114. For example, pad 113 can be electrically connected to pad 114 via electrical connection structure L22.

[0111] Figure 14 The pad 111 shown can be set Figure 3 The SOC20 shown can be configured with pad 112. Figure 3 The chip 31 shown can be configured with pads 114. Figure 3 Chip 32 is shown. Because the pin structures of chip 31 and chip 32 are different, the structures of pad 112 and pad 114 are also different.

[0112] Since chips 31 and 32 have the same function, in practical applications, either chip 31 or chip 32 can be placed on circuit board 10. The following description will explain the two cases of placing chip 31 or chip 32 separately on circuit board 10.

[0113] Scenario 1:

[0114] When it is necessary to set chip 31 on circuit board 10, such as Figure 15 As shown, chip 31 can be mounted on pad 112 via SMT, while chip 32 is not mounted. Since pad 112 and pad 111 are electrically connected via electrical connection structure L21, chip 31 can be electrically connected to SOC 20 in sequence via pad 112, electrical connection structure L21, and pad 111, thereby forming a communication branch between SOC 20 and chip 31.

[0115] like Figure 15 and Figure 16 As shown, pads 113 and 114 are idle pads, meaning no components are placed on them. Furthermore, pad 113 is not connected to SOC 20, and since pad 114 is also not connected to SOC 20, there is only one communication branch from SOC 20 to chip 31, with no other communication branches. If SOC 20 has two communication branches, but only one transmits a signal, the other non-transmitting communication branch will create a spike, affecting signal transmission quality. In this embodiment, only one communication branch exists, thus avoiding spikes and reducing signal reflection. Therefore, this embodiment improves signal transmission quality.

[0116] like Figure 15 As shown, pads 111 and 112 can be arranged adjacent to each other, which can shorten the length of the electrical connection structure L21 between pads 111 and 112, thereby shortening the communication path between SOC20 and chip 31 and further reducing latency.

[0117] Furthermore, since the adapter board 60 is not required in this case, costs can be saved.

[0118] Scenario 2:

[0119] When it is necessary to set chip 32 on circuit board 10, such as Figure 17 As shown, chip 32 can be mounted on pad 114 via SMT, and adapter board 60 can be mounted on pads 112 and 113, without chip 31 being mounted. Since pads 112 and 111 are electrically connected via electrical connection structure L21, and pads 114 and 113 are electrically connected via electrical connection structure L22, chip 32 can be electrically connected to SOC 20 sequentially via pad 114, electrical connection structure L22, pad 113, adapter board 60, pad 112, electrical connection structure L21, and pad 111. Furthermore, as... Figure 17 and Figure 18 As shown, there are no unused pads on the circuit board 10, which improves the utilization rate of each pad.

[0120] Since pads 112 and 113 are both provided on the adapter board 60 in this case, pads 112 and 113 can be arranged adjacent to each other in order to reduce the length of the adapter board 60.

[0121] Furthermore, due to the fact that in this embodiment, such as Figure 15 As shown, pad 112 can be used to individually mount chip 31, such as Figure 17 As shown, pads 112 and 113 can be combined to form an adapter board 60. In this way, pad 112 is a shared pad in two different situations, thereby improving the utilization rate of pad 112. This allows for co-board compatibility of chip 31 and chip 32 using a smaller number of pads, thereby reducing the surface area of ​​the circuit board 10 and lowering costs.

[0122] Moreover, such as Figure 17 As shown, since chip 32 needs to be electrically connected to SOC 20 through adapter board 60, the distance between chip 32 and SOC 20 is relatively large. The higher the speed of chip 32, the greater the signal loss during transmission. Furthermore, the loss increases with the communication distance. Conversely, the lower the speed of chip 32, the less loss occurs during signal transmission. Therefore, to minimize the loss between chip 32 and SOC 20, chip 32 can be a non-ultra-high-speed chip, such as a low-speed or high-speed chip. Ultra-high-speed chips have higher speeds and bandwidths than high-speed chips, and high-speed chips have higher speeds and bandwidths than low-speed chips.

[0123] The embodiments of this application will be further described below in conjunction with specific application scenarios.

[0124] Figure 1 The storage device shown may include, for example: Figure 19 The DDR33 and UFS34 shown, regarding the packaging methods of DDR33 and UFS34, in one possible implementation, are as follows: Figure 19 As shown, DDR33 and UFS34 are packaged in different packages, forming multiple independent package structures. It can be understood that DDR33 and UFS34 can be different bare dies. The bare die described in this application embodiment can be an integrated circuit formed on a semiconductor through processes such as growth, doping, etching, and development, thereby realizing a specific function. For example, a DDR33 bare die is used to implement flash memory functionality.

[0125] In another possible implementation, such as Figure 20As shown, DDR33 and UFS34 can be packaged together in the same housing to form UMCP35. This means that the DDR33 and UFS34 bare chips are placed together inside a housing material using standard packaging processes such as bonding or sintering. This housing material forms the housing. Then, the leads of the DDR33 and UFS34 bare chips are connected to the pins of the housing using jumpers or embedded wires. These pins are used to connect to external devices, enabling signal exchange between the DDR33 and UFS34 bare chips and external devices or equipment.

[0126] Compared with independent packaging structures, multi-chip co-package structures have different numbers of chips encapsulated in the package and different numbers of pins in the package, so the two cannot be directly adapted to the same circuit board 10.

[0127] In practical applications, different storage schemes may be adopted. Storage scheme one is as follows: Figure 19 The circuit board 10 shows two independent package structures: DDR33 and UFS34. Storage solution two is as follows: Figure 20 The UMCP35 is integrated on circuit board 10 as shown.

[0128] The two different storage schemes mentioned above can be used Figure 5 This is implemented based on the circuit board 10 shown. Specifically, when using storage scheme one, that is, integrating the two independent package structures DDR33 and UFS34 on the circuit board 10, as shown... Figure 21 As shown, in addition to pads 111, 112, 113, 114, 115, and 116, the circuit board 10 also has pad 1110. Pad 111 may include sub-pads 1111 and 1112. Pad 112 is electrically connected to sub-pad 1111 via electrical connection structure L31, pad 114 is electrically connected to pad 113 via electrical connection structure L32, pad 116 is electrically connected to pad 115 via electrical connection structure L33, and pad 1110 is electrically connected to sub-pad 1112 via electrical connection structure L34.

[0129] like Figure 21 As shown, SOC20 can be mounted on pad 111, that is, SOC20 is mounted on sub-pads 1111 and 1112. DDR33 can be mounted on pad 114, LGA61 (i.e., Figure 7The adapter board 60 shown can be mounted on pads 112 and 113. Thus, DDR33 can be electrically connected to SOC20 via pad 114, electrical connection structure L32, pad 113, LGA61, pad 112, electrical connection structure L31, and sub-pad 1111. UFS34 can be mounted on pad 1110, thus UFS34 can be electrically connected to SOC20 via pad 1110, electrical connection structure L34, and sub-pad 1112. Pads 115 and 116 are unused pads.

[0130] When using storage scheme two, i.e., integrating UMCP35 on circuit board 10, such as Figure 22 As shown, the SOC20 can be mounted on pad 111, that is, the SOC is mounted on sub-pads 1111 and 1112. The UMCP35 can be mounted on pad 116, and the LGA61 can be mounted on pads 112 and 115. Thus, the UMCP35 can be electrically connected to the SOC20 sequentially via pad 116, electrical connection structure L33, pad 115, LGA61, pad 112, electrical connection structure L31, and sub-pad 1111. Pads 113 and 114 are unused pads. This enables co-board compatibility for different storage solutions.

[0131] Furthermore, the two different storage schemes mentioned above can also be used in Figure 14 This is implemented based on the circuit board 10 shown. When using storage scheme one, that is, integrating two independent package structures, DDR33 and UFS34, on the circuit board 10, as shown... Figure 23 As shown, in addition to pads 111, 112, 113, and 114, the circuit board 10 also has pad 119. Pad 111 may include sub-pads 1111 and 1112. Pad 112 is electrically connected to sub-pad 1111 via electrical connection structure L21, pad 114 is electrically connected to pad 113 via electrical connection structure L22, and pad 119 is electrically connected to sub-pad 1112 via electrical connection structure L23.

[0132] like Figure 23 As shown, SOC20 can be disposed on pad 111, that is, SOC is disposed on sub-pads 1111 and 1112. DDR33 can be disposed on pad 112, and UFS34 can be disposed on pad 119. Thus, DDR33 can be electrically connected to SOC20 through pad 112, electrical connection structure L21, and sub-pad 1111. UFS34 can be electrically connected to SOC20 through pad 119, electrical connection structure L23, and sub-pad 1112. Figure 23 As shown, pads 113 and 114 are both unused pads.

[0133] When using storage scheme two, i.e., integrating UMCP35 on circuit board 10, such as Figure 24 As shown, SOC20 can be disposed on pad 111, that is, SOC is disposed on sub-pads 1111 and 1112. LGA61 can be disposed on pads 112 and 113, and UMCP35 can be disposed on pad 114. Thus, UMCP35 can be electrically connected to SOC20 sequentially through pad 114, electrical connection structure L22, pad 113, LGA61, pad 112, electrical connection structure L21, and sub-pad 1111. Figure 24 As shown, pad 119 is an unused pad. This enables board compatibility for different storage solutions.

[0134] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A circuit board, characterized in that, The circuit board includes: a first pad, a second pad, a third pad, and a fourth pad located on the surface of the circuit board; the first pad is electrically connected to the second pad; the third pad is electrically connected to the fourth pad; The first pad is used to mount the first electronic device; The circuit board is used to mount a second electronic device or a third electronic device; When the second electronic device is placed on the circuit board, the second pad is used to place the second electronic device, and the third and fourth pads are idle; When the third electronic device is disposed on the circuit board, the fourth pad is used to dispose of the third electronic device, and the second and third pads are used to dispose of an adapter board to make the second and third pads electrically connected.

2. The circuit board according to claim 1, characterized in that, The second pad is arranged adjacent to the third pad.

3. A circuit board, characterized in that, The circuit board includes: a first pad, a second pad, a third pad, a fourth pad, a fifth pad, and a sixth pad located on the surface of the circuit board; the first pad is electrically connected to the second pad; the third pad is electrically connected to the fourth pad; and the fifth pad is electrically connected to the sixth pad. The first pad is used to mount the first electronic device; The circuit board is used to mount a second electronic device or a third electronic device; When the second electronic device is disposed on the circuit board, the fourth pad is used to dispose of the second electronic device, the second pad and the third pad are used to dispose of an adapter board to make the second pad and the third pad electrically connected, and the fifth pad and the sixth pad are left idle. When the third electronic device is mounted on the circuit board, the sixth pad is used to mount the third electronic device, the second pad and the fifth pad are used to mount the adapter board so that the second pad and the fifth pad are electrically connected, and the third pad and the fourth pad are idle.

4. The circuit board according to claim 3, characterized in that, The third pad has the same structure as the fifth pad and is located on both sides of the second pad. The spacing between the third pad and the second pad is the same as the spacing between the fifth pad and the second pad.

5. A circuit board assembly, characterized in that, It includes a first electronic device, a second electronic device or a third electronic device, and a circuit board as described in claim 1 or 2, wherein the first electronic device is disposed on a first pad of the circuit board; When the circuit board assembly includes the second electronic device, the second electronic device is disposed on the second pad, and the third and fourth pads of the circuit board are free. When the circuit board assembly includes the third electronic device, the third electronic device is disposed on the fourth pad; the circuit board assembly also includes an adapter board disposed on the second pad and the third pad to electrically connect the second pad and the third pad.

6. The circuit board assembly according to claim 5, characterized in that, The adapter board includes a seventh pad and an eighth pad, and the seventh pad and the eighth pad are electrically connected; The seventh pad is disposed on the second pad, and the eighth pad is disposed on the third pad.

7. The circuit board assembly according to claim 5 or 6, characterized in that, The first electronic device is a system-on-a-chip (SOC); When the circuit board assembly includes the second electronic device, the second electronic device is a Double Data Rate Synchronous Dynamic Random Access Memory (DDR); the circuit board also includes a ninth pad, which is electrically connected to the first pad; the circuit board assembly is a Universal Flash Storage (UFS), and the UFS is disposed on the ninth pad; When the circuit board assembly includes the third electronic device, the third electronic device is an ultra-high integration multi-chip package (UMCP) or an embedded chip package memory (EMCP).

8. The circuit board assembly according to claim 5 or 6, characterized in that, The third electronic device is an in-circuit programming ISP chip, a power management chip, a wireless network communication technology Wi-Fi chip, a power amplifier, a digital switch, a repeater, a camera module, an audio module, or a Wi-Fi module.

9. A circuit board assembly, characterized in that, It includes a first electronic device, a second or third electronic device, an adapter board, and a circuit board as described in claim 3 or 4, wherein the first electronic device is disposed on a first pad of the circuit board; When the circuit board assembly includes the second electronic device, the second electronic device is disposed on the fourth pad of the circuit board, the adapter board is disposed on the second and third pads of the circuit board to make the second pad and the third pad electrically connected, and the fifth and sixth pads of the circuit board are free. When the circuit board assembly includes the third electronic device, the third electronic device is disposed on the sixth pad of the circuit board, the adapter board is disposed on the second pad and the fifth pad of the circuit board to make the second pad and the fifth pad electrically connected, and the third pad and the fourth pad are idle.

10. The circuit board assembly according to claim 9, characterized in that, The adapter board includes a seventh pad and an eighth pad, and the seventh pad and the eighth pad are electrically connected; When the circuit board assembly includes the second electronic device, the seventh pad is disposed on the second pad, and the eighth pad is disposed on the third pad; When the circuit board assembly includes the third electronic device, the seventh pad is disposed on the second pad, and the eighth pad is disposed on the fifth pad.

11. The circuit board assembly according to claim 9 or 10, characterized in that, The first electronic device is a System-on-a-Chip (SOC); When the circuit board assembly includes the second electronic device, the second electronic device is a DDR; the circuit board also includes a tenth pad, which is electrically connected to the first pad; the circuit board assembly also includes a UFS, which is disposed on the tenth pad; When the circuit board assembly includes the third electronic device, the third electronic device is a UMCP or an EMCP.

12. The circuit board assembly according to claim 9 or 10, characterized in that, The third electronic device is an in-circuit programming ISP chip, a power management chip, a wireless network communication technology Wi-Fi chip, a power amplifier, a digital switch, a repeater, a camera module, an audio module, or a Wi-Fi module.

13. An electronic device, characterized in that, It includes a power supply and a circuit board assembly as described in any one of claims 5-12, wherein the power supply is electrically connected to the circuit board assembly.

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