A method for preparing a PCB board and the PCB board itself.

Abstract

This invention relates to the field of integrated circuit manufacturing technology and discloses a method for preparing a PCB board and the PCB board itself, comprising the following steps: S1: sequentially baking, drilling, and water grinding of the substrate; S2: performing black hole treatment and VCP copper plating on the water-ground substrate; S3: sequentially grinding, pre-processing of circuits, lamination, and LDI exposure of the circuits on the copper-plated substrate to form circuit patterns; S4: etching the exposed substrate to form conductive circuits; S5: sequentially performing pre-treatment of solder resist, coating of solder resist green oil, exposure of solder resist, and development of solder resist on the etched substrate to form a solder resist layer; S6: baking and curing the substrate with the solder resist layer; S7: sequentially performing pre-silver plating sandblasting, VCP electroplating, and silver plating sandblasting on the cured substrate; S8: shaping and inspection of the sandblasted substrate. By constructing a complete and orderly process route, the manufacturing precision, plating adhesion, and overall reliability of the PCB board are improved.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit manufacturing technology, and more specifically to a method for preparing a PCB board and the PCB board itself. Background Technology

[0002] Printed circuit boards (PCBs), serving as the support for electronic components and the carrier of electrical connections, are hailed as the "mother of electronic products." Their manufacturing precision and reliability directly determine the performance and lifespan of end electronic devices. With the rapid development of 5G communication, automotive electronics, high-frequency high-speed computing, and other fields, PCBs are evolving towards higher density, higher integration, and higher reliability, placing more stringent requirements on the surface treatment processes of conductive lines. Especially in functional contact areas that require frequent insertion and removal, soldering, or serve as electrical test points, the adhesion, wear resistance, and conductivity stability of the surface plating are crucial.

[0003] Currently, in PCB surface treatment processes, before silver plating, the conductive lines are typically subjected to simple chemical micro-etching or sandblasting to roughen them and increase the adhesion area of ​​the plating layer. However, simple roughening treatments often fail to create a sufficiently deep and uniform micro-anchoring structure, resulting in limited adhesion between the metal plating layer and the substrate. During subsequent assembly and use, especially under harsh conditions such as high-temperature thermal cycling, mechanical vibration, or moisture corrosion, the plating layer is prone to reliability issues such as peeling, blistering, or increased contact resistance, severely affecting the lifespan of the PCB board.

[0004] On the other hand, to meet the needs of product traceability and identification, PCB board surfaces typically require the printing of characters, barcodes, and other information. Existing processes often apply a uniform surface treatment to the entire board surface, failing to differentiate between functional contact areas and non-functional marking areas. This "one-size-fits-all" approach not only unnecessarily complicates the marking areas, increasing manufacturing costs, but may also introduce additional roughness in unnecessarily designated areas, affecting character clarity and adhesion. Furthermore, how to further enhance the mechanical interlocking effect between the plating layer and the substrate through structural innovation while ensuring electrical contact performance remains a challenge for those skilled in the art. Summary of the Invention

[0005] In order to overcome the above-mentioned defects of the prior art, the present invention provides a method for manufacturing a PCB board and a PCB board, so as to solve the problems existing in the background art.

[0006] This invention provides the following technical solution: a method for preparing a PCB board, comprising the following steps: S1: The substrate is sequentially baked, drilled, and water-polished; S2: Perform black hole treatment and VCP electroplating on the water-polished substrate to metallize the holes; S3: After copper plating, the substrate is sequentially ground, pre-processed for circuitry, laminated, and exposed to LDI circuitry to form circuit patterns. S4: Etch the exposed substrate to form conductive lines; S5: The etched substrate is sequentially subjected to solder mask pretreatment, solder mask green oil coating, solder mask exposure and solder mask development to form a solder mask layer; S6: Baking and curing the substrate to form the solder resist layer; S7: The cured substrate is sequentially subjected to pre-silver electroplating sandblasting, VCP electroplating for forming nickel-silver plating, and silver plate sandblasting. S8: The sandblasted substrate is shaped and inspected, and then vacuum packaged.

[0007] Preferably, in step S7, both the pre-silvering sandblasting treatment and the silver plate sandblasting treatment use white corundum sand of the same mesh size, and the sandblasting pressure is controlled at 0.2 MPa.

[0008] Preferably, in step S7, the VCP electroplating process includes sequential nickel plating and silver plating, with the nickel layer having a thickness of 6 μm and the silver layer having a thickness of 2 μm.

[0009] Preferably, in step S2, between the black hole treatment and the VCP copper plating treatment, a micro-etching step is also included, which is used to remove carbides from the substrate surface.

[0010] Preferably, in steps S5 and S6, between solder resist development and baking curing, a solder resist inspection step is also included to check whether there are defects in the solder resist layer.

[0011] Preferably, in step S2, the VCP electroplating copper treatment is carried out using a vertical continuous electroplating line, and the current density is controlled at 1.5ASD.

[0012] Preferably, in step S3, the line LDI exposure uses direct laser imaging technology with an exposure energy of 90 J / cm².

[0013] The beneficial effects of the first embodiment of the present invention are as follows: By constructing a complete and orderly process route, the manufacturing precision, plating adhesion, and overall reliability of the PCB board are improved. This method introduces a micro-etching step between the black hole treatment and VCP copper plating in stage S2. This design can precisely remove carbide particles remaining on the substrate surface after black hole treatment, avoiding potential defects such as reduced adhesion of the electroplated copper layer, voids in the hole walls, or plating peeling caused by carbon residue. This lays the foundation for high-quality subsequent hole metallization.

[0014] In the electroplating process, VCP copper plating employs a vertical continuous plating line combined with precise current density control at 1.5 ASD. This not only ensures the uniformity of copper layer deposition on the hole walls and board surface but also effectively enhances deep plating capability, reliably guaranteeing the metallization quality of high aspect ratio holes. In the circuit forming stage, LDI laser direct imaging technology, coupled with an exposure energy of 90 J / cm², enables maskless direct transfer of high-precision circuit patterns. This avoids circuit distortion problems caused by factors such as film expansion and contraction and alignment deviations in traditional exposure processes, making it particularly suitable for the precision manufacturing needs of fine lines and high-density interconnect boards.

[0015] One of the core innovations of this method lies in the double sandblasting design in stage S7. First, the exposed conductive lines are sandblasted before electroplating to create a micro-roughened surface. Then, a second sandblasting process is performed after the nickel-silver plating is completed. This design significantly increases the micro-contact area and mechanical interlocking force between the plating layer and the subsequent contact medium through physical roughening. Simultaneously, the secondary sandblasting effectively removes the oxide layer and micro-contaminants from the plating surface, ensuring high cleanliness and uniformity of the silver layer. Furthermore, this method adds a solder resist inspection step between solder resist development and baking / curing, enabling timely detection and removal of defects such as incomplete solder mask coverage, bubbles, or foreign matter adhesion, avoiding cost waste caused by defective products flowing into subsequent processes.

[0016] Based on the above-mentioned PCB board manufacturing method, a second embodiment of the present invention is proposed.

[0017] Therefore, the present invention provides a PCB board prepared by the above-described method, comprising a substrate and a solder resist layer. The substrate surface is provided with conductive lines, the solder resist layer covers the substrate surface, and the solder resist layer is provided with multiple electroplating windows, each exposing a portion of the conductive lines.

[0018] The electroplating window is divided into a first area and a second area. The first area is the functional contact area of ​​the PCB board, and the second area is the non-functional marking area of ​​the PCB board.

[0019] The conductive line surface located in the first region has a first rough layer formed by pre-silver blasting and a second rough layer formed by silver plate blasting, the second rough layer being superimposed on the first rough layer.

[0020] The conductive line surface located in the second region has only a first rough layer formed by pre-silver blasting.

[0021] The surface of the first roughened layer is covered with a metal plating layer.

[0022] Preferably, the metal plating layer comprises a nickel layer and a silver layer stacked sequentially from the inside out, wherein the nickel layer covers the first roughening layer and the silver layer covers the nickel layer.

[0023] Preferably, an interlocking structure is provided in the first region. The interlocking structure includes protrusions and pits. The pits are formed on the first roughened layer, and the protrusions are the outward extensions of the nickel layer. The protrusions fill the pits.

[0024] The beneficial effects of the second embodiment of the present invention are as follows: Through meticulous structural design and functional zoning, high-performance electrical contacts are ensured while manufacturing costs are effectively controlled, demonstrating the integrity and reliability of the structure.

[0025] The core innovation of this PCB board lies in clearly dividing the electroplating window into a first region and a second region, and giving them different surface treatment characteristics. Specifically, the first region, as the functional contact area of ​​the PCB board, undertakes key tasks such as signal transmission, electrical connection, or component soldering. The conductive lines on its surface undergo two roughening processes during the manufacturing process: pre-electroplated sandblasting and silver plate sandblasting, forming a composite microstructure composed of a first roughened layer and a second roughened layer. This dual roughening treatment not only significantly improves the surface roughness and specific surface area of ​​this region, but also enhances the bonding strength between the subsequent metal plating layer and the substrate through a physical anchoring effect. This effectively avoids the risk of plating peeling, flaking, or increased contact resistance under harsh conditions such as high temperature and humidity, vibration and shock, or long-term power supply, thereby ensuring the long-term stability and reliability of the contact points.

[0026] In contrast, the second area, as a non-functional marking area, is mainly used for printing static information such as product identification, barcodes, production batch numbers, or anti-counterfeiting marks. Its surface undergoes only one sandblasting treatment to form the first rough layer. This differentiated design reflects the concept of balancing function and cost. The marking area only needs to meet the basic adhesion requirements of ink or characters, and one sandblasting treatment is sufficient, avoiding the process redundancy and cost increase caused by secondary sandblasting of this area. In terms of the metal plating structure, this embodiment uses nickel and silver layers stacked sequentially from the inside out. The 6μm nickel layer acts as a barrier layer, which can effectively prevent copper atoms from diffusing into the silver layer, preventing increased contact resistance or solder joint embrittlement caused by the formation of intermetallic compounds. The 2μm silver layer provides excellent conductivity, solderability, and low contact resistance.

[0027] In addition, a micro-interlocking structure consisting of bumps and pits is set in the first region: the pits are pre-formed on the first roughened layer, and the nickel layer naturally extends and fills the pits during the electroplating process, forming bumps, thereby constructing a mechanical interlocking mechanism. This structure improves the peel resistance between the plating layer and the substrate, effectively preventing interface separation between the plating layer and the substrate even under severe thermal cycling or mechanical shock conditions, further enhancing the structural durability of the product. Attached Figure Description

[0028] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 This is a schematic diagram of the overall structure of the PCB board of the present invention.

[0030] Figure 2 For the present invention Figure 1 Enlarged view of the structure at point A in the image.

[0031] Figure 3 For the present invention Figure 1 Enlarged view of the structure at point B in the image.

[0032] The reference numerals in the attached figures are as follows: 1. Substrate; 11. Conductive line; 2. Solder resist layer; 21. Electroplated silver window; 211. First region; 212. Second region; 3. First roughening layer; 4. Second roughening layer; 5. Nickel layer; 6. Silver layer; 7. Bump; 8. Pits. Detailed Implementation

[0033] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0034] Example 1: This embodiment provides a method for manufacturing a PCB board, including the following steps: S1: The substrate is sequentially baked, drilled, and water-polished; S2: Perform black hole treatment and VCP electroplating on the water-polished substrate to metallize the holes; S3: After copper plating, the substrate is sequentially ground, pre-processed for circuitry, laminated, and exposed to LDI circuitry to form circuit patterns. S4: Etch the exposed substrate to form conductive lines; S5: The etched substrate is sequentially subjected to solder mask pretreatment, solder mask green oil coating, solder mask exposure and solder mask development to form a solder mask layer; S6: Baking and curing the substrate to form the solder resist layer; S7: The cured substrate is sequentially subjected to pre-silver electroplating sandblasting, VCP electroplating for forming nickel-silver plating, and silver plate sandblasting. S8: The sandblasted substrate is shaped and inspected, and then vacuum packaged.

[0035] In step S7, both the pre-silvering sandblasting treatment and the silver plate sandblasting treatment use white corundum sand of the same mesh size, and the sandblasting pressure is controlled at 0.2MPa.

[0036] In step S7, the VCP electroplating process includes sequential nickel plating and silver plating, with the nickel layer having a thickness of 6 μm and the silver layer having a thickness of 2 μm.

[0037] In step S2, between the black hole treatment and the VCP copper plating treatment, there is also a micro-etching step, which is used to remove carbides from the substrate surface.

[0038] In steps S5 and S6, between solder resist development and baking curing, a solder resist inspection step is also included to check whether there are defects in the solder resist layer.

[0039] In step S2, the VCP electroplating process is carried out using a vertical continuous electroplating line, and the current density is controlled at 1.5 ASD.

[0040] In step S3, the line LDI exposure uses direct laser imaging technology with an exposure energy of 90 J / cm².

[0041] In summary, the PCB fabrication method provided in Example 1 improves the manufacturing precision, plating adhesion, and overall reliability of the PCB by constructing a complete and orderly process route. This method introduces a micro-etching step between the black hole treatment and VCP copper plating in stage S2. This design can precisely remove carbide particles remaining on the substrate surface after black hole treatment, avoiding potential defects such as reduced adhesion of the electroplated copper layer, voids in the hole walls, or plating peeling caused by carbon residue. This lays the foundation for high-quality subsequent hole metallization. In the electroplating process, VCP copper plating employs a vertical continuous plating line combined with precise current density control at 1.5 ASD. This not only ensures the uniformity of copper layer deposition on the hole walls and board surface but also effectively enhances deep plating capability, reliably guaranteeing the metallization quality of high aspect ratio holes. In the circuit forming stage, LDI laser direct imaging technology, coupled with an exposure energy of 90 J / cm², enables maskless direct transfer of high-precision circuit patterns. This avoids circuit distortion problems caused by factors such as film expansion and contraction and alignment deviations in traditional exposure processes, making it particularly suitable for the precision manufacturing needs of fine lines and high-density interconnect boards. One of the core innovations of this method lies in the double sandblasting design in stage S7. First, the exposed conductive lines undergo a sandblasting process before electroplating to create a micro-roughened surface. Then, a second sandblasting process is performed after the nickel-silver plating is completed. This design significantly increases the micro-contact area and mechanical interlocking force between the plating layer and the subsequent contact medium through physical roughening. Simultaneously, the secondary sandblasting effectively removes the oxide layer and micro-contaminants from the plating surface, ensuring high cleanliness and uniformity of the silver layer. Furthermore, this method adds a solder resist inspection step between solder resist development and baking / curing, enabling timely detection and removal of defects such as incomplete solder mask coverage, bubbles, or foreign matter adhesion, avoiding cost waste caused by defective products flowing into subsequent processes. Overall, the preparation method features a rigorous process flow design, a wide process window, and precise parameter control. The various processes are seamlessly connected and mutually supportive, which not only significantly improves the yield and batch stability of PCB products but also has good industrialization potential.

[0042] Example 2: Reference Figures 1 to 3 This embodiment provides a PCB board, which is prepared by the above-described method. It includes a substrate 1 and a solder resist layer 2. The substrate 1 has conductive lines 11 on its surface. The solder resist layer 2 covers the surface of the substrate 1. The solder resist layer 2 has multiple electroplating windows 21, and the electroplating windows 21 expose a portion of the conductive lines 11.

[0043] The electroplating window 21 is divided into a first area 211 and a second area 212. The first area 211 is the functional contact area of ​​the PCB board, and the second area 212 is the non-functional marking area of ​​the PCB board. Through the partitioned design, physical isolation between function and marking is achieved, creating conditions for subsequent differentiated surface treatment processes, facilitating performance enhancement in critical areas, and reducing processing costs in non-critical areas.

[0044] The conductive line 11 located in the first region 211 has a first roughened layer 3 formed by pre-silver blasting and a second roughened layer 4 formed by silver plate blasting, with the second roughened layer 4 superimposed on the first roughened layer 3. This double roughening treatment increases the microscopic surface area and mechanical anchoring points of the region, ensuring that the functional contact area maintains stable and reliable electrical contact performance during long-term use.

[0045] The conductive line 11 located in the second region 212 has only a first rough layer 3 formed by pre-silver blasting. One blasting is sufficient to meet the basic requirements for ink or character adhesion in the marking area, avoiding unnecessary secondary processing, simplifying the process, and saving production costs.

[0046] The surface of the first roughening layer 3 is covered with a metal plating. The presence of the metal plating provides the necessary protection, conductivity, and solderability for the conductive circuit 11. At the same time, the roughening layer, as an intermediate transition layer, strengthens the bond between the plating and the substrate, preventing peeling during subsequent processing or use.

[0047] The metal plating consists of a nickel layer 5 and a silver layer 6 stacked sequentially from the inside out. The nickel layer 5 covers the first roughening layer 3, and the silver layer 6 covers the nickel layer 5. The nickel layer 5 acts as a barrier layer, effectively inhibiting the diffusion of copper atoms into the silver layer 6 and preventing interface embrittlement. The silver layer 6 imparts excellent conductivity and solderability. The synergistic effect of the two-layer structure enhances the electrical performance and environmental resistance of the contact area.

[0048] An interlocking structure is provided within the first region 211. The interlocking structure includes protrusions 7 and recesses 8. The recesses 8 are formed on the first roughened layer 3, and the protrusions 7 are the outward extensions of the nickel layer 5, filling the recesses 8. This interlocking structure forms a mechanical anchor at the microscopic level, enhancing the peel resistance between the plating layer and the substrate. It maintains structural integrity even under severe thermal cycling or mechanical impact, significantly extending the product's service life.

[0049] In summary, the PCB board provided in Embodiment 2, through its refined structural design and functional partitioning, effectively controls manufacturing costs while ensuring high-performance electrical contacts, demonstrating structural integrity and reliability. The core innovation of this PCB board lies in clearly dividing the electroplating window 21 into a first region 211 and a second region 212, and giving them different surface treatment characteristics. Specifically, the first region 211, as the functional contact area of ​​the PCB board, undertakes key tasks such as signal transmission, electrical connection, or component soldering. The conductive lines 11 on its surface undergo two roughening processes during the manufacturing process: pre-electroplated sandblasting and silver plate sandblasting, forming a composite microstructure composed of a first roughened layer 3 and a second roughened layer 4. This dual roughening treatment not only significantly improves the surface roughness and specific surface area of ​​this region, but also enhances the bonding strength between the subsequent metal plating layer and the substrate through a physical anchoring effect. This effectively avoids the risk of plating peeling, flaking, or increased contact resistance under harsh conditions such as high temperature and humidity, vibration and shock, or long-term power supply, thereby ensuring the long-term stability and reliability of the contact points. In contrast, the second area 212, as a non-functional marking area, is mainly used for printing static information such as product identification, barcodes, production batch numbers, or anti-counterfeiting marks. Its surface undergoes only one sandblasting treatment to form the first rough layer 3. This differentiated design reflects the concept of balancing function and cost. The marking area only needs to meet the basic adhesion requirements of ink or characters, and one sandblasting treatment is sufficient, avoiding the process redundancy and cost increase caused by secondary sandblasting of this area. In terms of the metal plating structure, this embodiment uses a nickel layer 5 and a silver layer 6 stacked sequentially from the inside out. The 6μm nickel layer 5 acts as a barrier layer, which can effectively prevent copper atoms from diffusing into the silver layer, preventing the increase in contact resistance or solder joint embrittlement caused by the formation of intermetallic compounds. The 2μm silver layer 6 provides excellent conductivity, solderability, and low contact resistance. In addition, a micro-interlocking structure consisting of protrusions 7 and pits 8 is provided in the first region 211: the pits 8 are pre-formed on the first roughened layer, and the nickel layer 5 naturally extends and fills the interior of the pits 8 during the electroplating process, forming protrusions 7, thereby constructing a mechanical interlocking mechanism. This structure improves the peel resistance between the plating layer and the substrate, and can effectively prevent the interface separation between the plating layer and the substrate even under severe thermal cycling or mechanical impact conditions, further enhancing the structural durability of the product; Overall, through structural innovation and process synergy, this PCB achieves high adhesion and electrical contact stability in functional areas and cost optimization in non-functional areas. Its overall structural design is scientific and reasonable, making it suitable for applications with extremely high requirements for reliability, durability, and signal integrity, such as aerospace, medical electronics, automotive electronics, and high-frequency communication equipment. It has significant technological advancements and promising market application prospects.

[0050] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A method for manufacturing a PCB board, characterized in that, Includes the following steps: S1: The substrate is sequentially baked, drilled, and water-polished; S2: Perform black hole treatment and VCP electroplating on the water-polished substrate to metallize the holes; S3: After copper plating, the substrate is sequentially ground, pre-processed for circuitry, laminated, and exposed to LDI circuitry to form circuit patterns. S4: Etch the exposed substrate to form conductive lines; S5: The etched substrate is sequentially subjected to solder mask pretreatment, solder mask green oil coating, solder mask exposure and solder mask development to form a solder mask layer; S6: Baking and curing the substrate to form the solder resist layer; S7: The cured substrate is sequentially subjected to pre-silver electroplating sandblasting, VCP electroplating for forming nickel-silver plating, and silver plate sandblasting. S8: The sandblasted substrate is shaped and inspected, and then vacuum packaged.

2. The method for preparing a PCB board according to claim 1, characterized in that, In step S7, both the pre-silvering sandblasting treatment and the silver plate sandblasting treatment use white corundum sand of the same mesh size, and the sandblasting pressure is controlled at 0.2MPa.

3. The method for preparing a PCB board according to claim 1, characterized in that, In step S7, the VCP electroplating process includes sequential nickel plating and silver plating, with the nickel layer having a thickness of 6 μm and the silver layer having a thickness of 2 μm.

4. The method for preparing a PCB board according to claim 1, characterized in that, In step S2, between the black hole treatment and the VCP copper plating treatment, there is also a micro-etching step, which is used to remove carbides from the substrate surface.

5. The method for preparing a PCB board according to claim 1, characterized in that, In steps S5 and S6, between solder resist development and baking curing, a solder resist inspection step is also included to check whether there are defects in the solder resist layer.

6. The method for preparing a PCB board according to claim 1, characterized in that, In step S2, the VCP electroplating process is carried out using a vertical continuous electroplating line, and the current density is controlled at 1.5 ASD.

7. The method for preparing a PCB board according to claim 1, characterized in that, In step S3, the line LDI exposure uses direct laser imaging technology with an exposure energy of 90 J / cm².

8. A PCB board, manufactured using the preparation method according to any one of claims 1 to 7, characterized in that, The substrate (1) includes a substrate (1) and a solder resist layer (2). The substrate (1) has conductive lines (11) on its surface. The solder resist layer (2) covers the surface of the substrate (1). The solder resist layer (2) has an electroplating window (21) on it. There are multiple electroplating windows (21), and the electroplating windows (21) expose part of the conductive lines (11). The electroplating window (21) is divided into a first area (211) and a second area (212). The first area (211) is the functional contact area of ​​the PCB board, and the second area (212) is the non-functional marking area of ​​the PCB board. The conductive line (11) located in the first region (211) has a first rough layer (3) formed by pre-silver blasting and a second rough layer (4) formed by silver plate blasting, the second rough layer (4) being superimposed on the first rough layer (3); The surface of the conductive line (11) located in the second region (212) has only a first rough layer (3) formed by pre-silver blasting. The surface of the first rough layer (3) is covered with a metal plating layer.

9. A PCB board according to claim 8, characterized in that, The metal plating layer includes a nickel layer (5) and a silver layer (6) stacked sequentially from the inside out. The nickel layer (5) covers the first rough layer (3), and the silver layer (6) covers the nickel layer (5).

10. A PCB board according to claim 9, characterized in that, An interlocking structure is provided in the first region (211). The interlocking structure includes protrusions (7) and pits (8). The pits (8) are formed on the first rough layer (3). The protrusions (7) are the outward extension of the nickel layer (5). The protrusions (7) fill the pits (8).

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