PCB board and manufacturing method thereof

CN122555079APending Publication Date: 2026-08-11KUNSHAN SUHANG CIRCUIT BOARD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-04-27
Publication Date
2026-08-11

AI Technical Summary

Technical Problem

[0003]然而,在进行上述HDI板制作时,容易出现以下问题:在减薄铜作业时易出现VIP孔内壁及孔口处的铜被深度咬蚀的现象,即,在VIP孔上形成圈状凹陷等减铜过度现象,从而造成后续的沉铜电镀无法在VIP孔表面镀上铜等问题,进而严重影响了线路板产品的质量

Benefits of technology

[0016] The beneficial effects of this invention are as follows: The PCB board manufacturing method provided by this invention has the following advantages: ① Through improvement and innovation, this invention adopts a PCB board manufacturing process that combines "drilling, first copper plating and full-board electroplating, first film coating, pulse electroplating, resin plugging of VIP plated holes, second film coating, full-board etching, second copper plating and full-board electroplating". In this PCB board manufacturing process, the first film coating enables pulse electroplating only on the inside of VIP holes and through holes, without affecting the surface copper thickness of work board A, which is beneficial for subsequent control of surface copper thickness. The second film coating enables the covering and protection of the through hole prototype, and combined with resin plugging to protect the inside of VIP plated holes, so that when performing full-board etching (copper thinning operation), only the surface copper thickness of work board B is controlled (correspondingly ensuring the quality of subsequent outer layer circuit formation), without affecting the copper layer thickness inside the holes, thus well meeting the dual control of the copper thickness inside the holes and the surface copper thickness of PCB board products. ② Existing technologies typically employ a step-by-step processing method when fabricating VIP plated holes and vias, i.e., first fabricating the VIP plated holes and then fabricating the vias. However, this invention employs a processing method that simultaneously drills VIP holes and vias; simultaneously performs pulse electroplating to obtain the preliminary shapes of the VIP plated holes and vias; and simultaneously performs full-board electroplating to obtain a combination of caps and vias. Compared to existing technologies, the processing technology for the VIP plated holes and vias of this invention is simpler and more efficient. ③ The PCB manufacturing method provided by this invention is novel, reasonable, simple, easy to process, and has low processing costs.

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Abstract

This invention discloses a PCB board and its manufacturing method, comprising: drilling VIP holes and through holes on a work board A; performing copper plating, full-board electroplating, film coating, and pulse electroplating on work board A to achieve copper layer of a predetermined thickness on the inner walls of the VIP holes and through holes, obtaining preliminary VIP plated holes and through holes; resin plugging the VIP plated holes, while not plugging the preliminary through holes, and polishing to obtain work board B; covering and protecting the preliminary through holes and then etching the entire board to ensure that the surface copper thickness of work board B reaches a predetermined thickness; performing copper plating and full-board electroplating on work board B to plate caps at the openings of the VIP plated holes and obtain through holes; and ensuring that the copper layers on the caps and the inner walls of the through holes are flush with the surface copper of work board B. This manufacturing method is novel, reasonable, and simple, with high processing efficiency, low processing cost, and high-quality PCB board, meeting the product requirements for the thickness of copper inside the holes and the thickness of surface copper.
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Description

Technical Field

[0001] This invention relates to the field of PCB technology, and in particular to a PCB and its manufacturing method that can effectively control the thickness of copper in holes and the thickness of copper on the surface. Background Technology

[0002] Currently, the manufacturing process of high-density interconnect (HDI) boards generally follows this procedure: inner layer circuit fabrication → lamination → drilling VIP holes → enlarging countersunk holes with a router → removing adhesive residue → VIP copper plating → VIP electroplating → resin plugging → ceramic grinding → target marking → copper thinning (used to control the copper thickness of the surface copper layer, the copper reduction is generally 14-20μm) → drilling through holes → copper plating → electroplating → outer layer circuit fabrication → subsequent processes.

[0003] However, the following problems are likely to occur during the production of the HDI board: the copper on the inner wall and at the opening of the VIP hole is deeply etched during the copper thinning process, that is, the copper is excessively reduced by forming a ring-shaped depression on the VIP hole. This causes problems such as the inability of subsequent copper plating to plate copper on the surface of the VIP hole, which seriously affects the quality of the circuit board product.

[0004] In view of this, the present invention is hereby proposed. Summary of the Invention

[0005] To overcome the above-mentioned defects, the present invention provides a PCB board and its manufacturing method. The manufacturing method is novel, reasonable and simple, with high processing efficiency and low processing cost. Moreover, the resulting PCB board has high processing quality and well meets the product requirements for the thickness of copper in the holes and the thickness of copper on the surface.

[0006] The technical solution adopted by this invention to solve its technical problem is: a method for manufacturing a PCB board, comprising the following manufacturing steps: S1: Provides a work board A with inner layer circuitry; S2: Drill VIP holes and through holes on the work plate A; S3: The work board A is sequentially subjected to copper plating, whole board electroplating, film coating and pulse electroplating to achieve copper layer of a set thickness on the inner wall of the VIP hole and the through hole, so as to obtain the prototype of VIP plated hole and through hole. S4: Resin plugs are applied to the VIP plating holes, but not to the through holes; after resin plugging, the openings of the VIP plating holes are polished and leveled to obtain work board B; S5: After covering and protecting the through hole prototype, perform whole-board etching to make the copper thickness of the working board B reach the preset thickness; after completing the whole-board etching, grind and flatten the opening of the through hole prototype. S6: The work board B is subjected to copper plating and full-board electroplating operations in sequence, so as to plate a cap at the opening of the VIP plated hole, and at the same time increase the thickness of the copper layer on the inner wall of the through hole prototype to a preset thickness, thereby obtaining the through hole; in addition, the cap and the copper layer on the inner wall of the through hole are flush with the copper surface of the work board B.

[0007] As a further improvement of the present invention, in S3 above, after the whole plate is electroplated, a vacuum lamination process is used to coat the surface of the working plate A with a photosensitive dry film. Then, the photosensitive dry film is exposed and developed to form a window on the photosensitive dry film that can expose the VIP hole and the through hole. In addition, the gap between the outer edge of the VIP hole and the inner edge of the corresponding window, and the gap between the outer edge of the through hole and the inner edge of the corresponding window are controlled to be 1 to 5 mil respectively.

[0008] As a further improvement of the present invention, in S3 above, the processing parameters of pulse electroplating are: pulse frequency of 100-200Hz, current density of 3-5ASF, and conveying speed of the plate conveyor belt of 1-3m / min.

[0009] As a further improvement of the present invention, in S3 above, after the coating operation is completed and before the pulse electroplating operation is performed, the VIP hole and the through hole are subjected to a pre-treatment process of electroless gold treatment to remove the oxide layer inside the hole.

[0010] As a further improvement of the present invention, in S4 above, resin plugging of the VIP plating holes is performed using a screen printing process, specifically including: A screen printing plate is provided, wherein the mesh area on the screen printing plate corresponding to the VIP plating hole is exposed, and the remaining mesh area is covered. Place the screen onto plate A obtained by S3 above; Resin is printed on the screen, and the resin flows into the VIP plating holes through the exposed mesh area; The resin inside the VIP plating hole is cured.

[0011] As a further improvement of the present invention, in S5 above, a photosensitive dry film is applied to the surface of the working board B using a vacuum lamination process. Then, the photosensitive dry film is exposed and developed so that only the portion of the photosensitive dry film facing out of the via hole prototype is retained. In addition, the outer periphery of the retained photosensitive dry film extends beyond the outer edge of the orifice of the via hole prototype.

[0012] As a further improvement of the present invention, in S5 above, the etching amount is controlled to be 15 to 20 μm when performing whole-board etching.

[0013] As a further improvement of the present invention, in S6 above, the processing parameters for whole-plate electroplating are: pulse current electroplating is used, and the pulse frequency is 100-200Hz, the current density is 10-15ASF; the conveying speed of the plate conveyor belt is 1-3m / min.

[0014] As a further improvement of the present invention, it also includes S7: the board B obtained by S6 above is subjected to conventional outer layer circuit fabrication, outer layer solder mask, surface treatment, molding, finished product electrical testing, and finished product inspection processes in sequence to obtain a PCB board.

[0015] The present invention also provides a PCB board, which is manufactured using the PCB board manufacturing method described in the present invention.

[0016] The beneficial effects of this invention are as follows: The PCB board manufacturing method provided by this invention has the following advantages: ① Through improvement and innovation, this invention adopts a PCB board manufacturing process that combines "drilling, first copper plating and full-board electroplating, first film coating, pulse electroplating, resin plugging of VIP plated holes, second film coating, full-board etching, second copper plating and full-board electroplating". In this PCB board manufacturing process, the first film coating enables pulse electroplating only on the inside of VIP holes and through holes, without affecting the surface copper thickness of work board A, which is beneficial for subsequent control of surface copper thickness. The second film coating enables the covering and protection of the through hole prototype, and combined with resin plugging to protect the inside of VIP plated holes, so that when performing full-board etching (copper thinning operation), only the surface copper thickness of work board B is controlled (correspondingly ensuring the quality of subsequent outer layer circuit formation), without affecting the copper layer thickness inside the holes, thus well meeting the dual control of the copper thickness inside the holes and the surface copper thickness of PCB board products. ② Existing technologies typically employ a step-by-step processing method when fabricating VIP plated holes and vias, i.e., first fabricating the VIP plated holes and then fabricating the vias. However, this invention employs a processing method that simultaneously drills VIP holes and vias; simultaneously performs pulse electroplating to obtain the preliminary shapes of the VIP plated holes and vias; and simultaneously performs full-board electroplating to obtain a combination of caps and vias. Compared to existing technologies, the processing technology for the VIP plated holes and vias of this invention is simpler and more efficient. ③ The PCB manufacturing method provided by this invention is novel, reasonable, simple, easy to process, and has low processing costs. Attached Figure Description

[0017] Figure 1 This is a flowchart illustrating the PCB board manufacturing method described in this invention. Figure 2 This is a schematic cross-sectional view of the working board A described in Embodiment 1 of the present invention; Figure 3 This is a schematic cross-sectional view of the working plate A after drilling VIP holes and through holes in Embodiment 1 of the present invention; Figure 4 This is a schematic cross-sectional view of the working board A after drilling, which is then subjected to copper plating, electroplating, and film coating processes in Embodiment 1 of the present invention. Figure 5 This is a schematic cross-sectional view of the VIP hole and the through hole after pulse electroplating in Embodiment 1 of the present invention; Figure 6 This is a schematic cross-sectional view of the working board B after it has undergone film coating processing in Embodiment 1 of the present invention; Figure 7 This is a schematic cross-sectional view of the working board B after undergoing full-board etching in Embodiment 1 of the present invention. Figure 8 This is a schematic cross-sectional view of plate B obtained in Embodiment 1 of the present invention; Figure 9 This is a schematic cross-sectional view of the PCB board obtained in Embodiment 1 of the present invention.

[0018] Referring to the accompanying drawings, the following explanations are provided: B1, Workboard A; B2, Workboard B; 10, Insulating Intermediate Layer; 11, Inner Layer Circuitry; 12, Insulating Addition Layer; 13, Copper Foil Addition Layer; 20, VIP Hole; 21, Through Hole; 30, VIP Plated Hole; 31, Through Hole Prototype; 4, Cap; 5, Through Hole; 6, Anti-plating Photosensitive Dry Film; 60, Window; 7, Resin; 8, Anti-corrosion Photosensitive Dry Film; 9, Outer Layer Circuitry. Detailed Implementation

[0019] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0020] Example 1:

[0021] Please see the appendix Figure 1 To be continued Figure 9 As shown, this embodiment 1 provides a method for manufacturing a PCB board, including the following manufacturing steps: S1: Provides a work board A with inner layer circuitry.

[0022] Regarding the aforementioned work board A, its implementation structure is determined according to the design requirements of the PCB board product, and this application does not impose any restrictions. However, in order to provide a clear and detailed description of the PCB board manufacturing method provided in this application, this embodiment uses a four-layer PCB board as an example for explanation and illustration.

[0023] Understandably, given that the PCB product is a four-layer board, the manufacturing method and implementation structure of the work board A can be designed as follows: S10: Provide a double-sided copper-clad laminate; the double-sided copper-clad laminate has an insulating intermediate layer 10 and two copper foil layers respectively fixedly attached to opposite sides of the insulating intermediate layer 10. The insulating intermediate layer 10 can be, but is not limited to, a prepreg. The thickness of the insulating intermediate layer 10 and the copper foil layers are determined according to the design requirements of the PCB product. This embodiment does not impose any restrictions.

[0024] S11: After the double-sided copper-clad laminate is cut to a set size, it is placed in an oven for baking to eliminate the stress in the double-sided copper-clad laminate, prevent the double-sided copper-clad laminate from warping, expanding and shrinking, etc., and improve its dimensional stability.

[0025] S12: After roughening (using micro-etching process, which achieves both copper surface roughening and copper thickness reduction control), cleaning and drying of the double-sided copper-clad laminate, the photosensitive dry film is applied to the two copper foil layers using a vacuum laminating machine.

[0026] S13: First, according to the work instructions, expose a portion of the photosensitive dry film using an LDI exposure machine. Then, use a developing solution to remove the unexposed areas of the photosensitive dry film. Next, use an alkaline etching solution to etch away the portions of the two copper foil layers that are exposed outside the photosensitive dry film. Finally, use a stripping solution to remove the photosensitive dry film, thus creating two inner layer circuits 11. The developing solution, alkaline etching solution, and stripping solution mentioned above are all commonly used chemicals in the circuit board processing field. Since they are not part of the technical points to be protected in this application, they will not be described in detail here.

[0027] In addition, after the inner layer circuit 11 is fabricated, AOI optical inspection is performed on the inner layer circuit 11 to ensure the quality of circuit processing.

[0028] S14: First, an insulating layer 12 and a copper foil layer 13 are sequentially stacked on the two inner layer circuits 11. The insulating layer 12 can be, but is not limited to, a prepreg or pure adhesive. The thickness of the insulating layer 12 and the copper foil layer 13 are determined according to the design requirements of the PCB product. This embodiment does not impose any restrictions. Then, hot pressing is performed (heating rate of 2-3℃ / min, pressing temperature of 180-220℃, pressing pressure of not less than 420Psi) to firmly bond the inner layer circuits 11, the insulating layer 12, and the copper foil layer 13 together, thus obtaining the work board A B1.

[0029] As can be seen from the above, the implementation structure of the work board A provided in this embodiment is as follows: Please refer to the appendix. Figure 2As shown, the working board A includes an insulating intermediate layer 10, two inner layer circuits 11 respectively fixed on opposite sides of the insulating intermediate layer 10, and two copper foil reinforcement layers 13 respectively fixed on the two inner layer circuits 11 by insulating reinforcement layers 12.

[0030] S2: VIP holes 20 and through holes 21 are drilled at predetermined positions on the work board A using mechanical drilling or laser drilling. The through holes 21 penetrate both opposite sides of the work board A along its thickness direction. Simultaneously, the through holes 21 also penetrate both layers of the inner layer circuitry 11, providing technical support for the subsequent electrical connection of the inner layer circuitry 11 to the outer layer circuitry 9 via the vias 5. The VIP holes 20 can be designed as through holes or blind holes according to the PCB product design requirements. This embodiment uses a blind hole structure for the VIP holes 20 as an example. Furthermore, the bottom of the VIP holes 20 is a portion of one layer of the inner layer circuitry 11, providing technical support for the subsequent electrical connection of the VIP plated holes 30 to the inner layer circuitry 11. For details, please refer to the appendix. Figure 3 As shown.

[0031] Furthermore, after completing the above drilling process, this embodiment also performs the following processing steps: ① A rounded truncated surface is machined at the opening of the VIP hole 20 using a milling machine, so that the VIP hole 20 is formed into a countersunk hole shape; ② The inner walls of the VIP hole 20 and the through hole 21 are treated with plasma cleaning to remove adhesive residue, so as to improve the processing quality of subsequent processes.

[0032] In addition, before performing the above-mentioned drilling process, the two copper foil layers 13 can be selectively micro-etched according to the design requirements of the PCB product, so as to selectively implement copper thickness reduction control.

[0033] S3: The work board A, which has completed the above drilling process, is sequentially subjected to copper plating, whole board electroplating, film coating, pulse electroplating and film removal operations, so as to achieve copper layer of a set thickness on the inner wall of the VIP hole 20 and the through hole 21, to obtain VIP plated hole 30 and through hole prototype 31.

[0034] The aforementioned copper plating operation can be understood as depositing a seed layer with a copper thickness of 0.5–1 μm on the entire working board A (including the inner walls of the VIP holes 20 and the through holes 21) after the aforementioned drilling process; the aforementioned whole-board electroplating operation can be understood as plating a copper plating layer A with a set copper thickness (e.g., 8–12 μm) onto the seed layer of the entire board; for details, please refer to the appendix. Figure 4 As shown.

[0035] Understandably, ① the seed layer serves as the base for forming the copper plating layer A, and the copper plating layer A serves as the conductive layer during subsequent pulse electroplating. ② Regarding the two copper foil enhancement layers 13, after completing the above-mentioned copper plating and full-board electroplating operations, the two copper foil enhancement layers 13 are thickened overall, as shown in the appendix. Figure 4 As shown.

[0036] The above-mentioned coating process can be understood as follows: First, a vacuum lamination process is used to coat the two thickened copper foil layers 13 on the work board A with a photosensitive anti-plating film 6. Then, the two layers of photosensitive anti-plating film 6 are exposed and developed according to the work data to form a window 60 on each of the photosensitive anti-plating film 6 that exposes the VIP hole 20 and the through hole 21. For details, please refer to the appendix. Figure 4 As shown.

[0037] Furthermore, considering the offset problem during dry film pattern forming, and in order to improve the accuracy of subsequent pulse electroplating processing of the VIP hole 20 and the through hole 21, this embodiment also optimizes the design so that the VIP hole 20 and the through hole 21 meet the following conditions with the window 60: the orthographic projection of the VIP hole 20 toward its corresponding window 60 falls completely in the window 60, and the gap between the outer edge of the VIP hole 20 and the inner edge of its corresponding window 60 is controlled to be 1 to 5 mil; the orthographic projection of the through hole 21 toward its corresponding window 60 falls completely in the window 60, and the gap between the outer edge of the through hole 21 and the inner edge of its corresponding window 60 is also controlled to be 1 to 5 mil.

[0038] The aforementioned pulse electroplating operation can be understood as using pulse electroplating technology to plate a copper plating layer B of a set copper thickness (e.g., 5-10 μm) onto the copper plating layer A on the inner wall of the VIP hole 20 and the through hole 21, respectively, to obtain the VIP plated hole 30 and the through hole prototype 31. For details, please refer to the appendix. Figure 5 As shown.

[0039] Understandably, ① the structure of the VIP plated hole 30 is as follows: it has a VIP hole 20 and a conductive copper layer A on the inner wall of the VIP hole 20. The conductive copper layer A is composed of a seed layer, a copper plating layer A, and a copper plating layer B on the inner wall of the VIP hole 20. The structure of the through-hole prototype 31 is as follows: it has a through hole 21 and a conductive copper layer B on the inner wall of the through hole 21. The conductive copper layer B is composed of a seed layer, a copper plating layer A, and a copper plating layer B on the inner wall of the through hole 21. ② Because the processing parameters of pulse electroplating in this step are set based on the copper thickness design requirements of the conductive copper layer A, the copper thickness of the conductive copper layer B does not meet the design requirements of the through-hole 5. That is, in this step, a through-hole prototype is obtained, rather than a through-hole is obtained.

[0040] Furthermore, the processing parameters of the pulse electroplating are optimized as follows: pulse current electroplating is used, and the pulse frequency is 100-200Hz (preferably 150Hz), the current density is 3-5ASF (preferably 3.5ASF), and the conveying speed of the plate conveyor belt is 1-3m / min (preferably 1m / min).

[0041] Furthermore, in this embodiment, after the coating operation is completed and before the pulse electroplating operation is performed, a pre-treatment process for electroless gold plating can be selectively performed on the VIP hole 20 and the through hole 21. Specifically, ultrasonic cleaning or vacuum cleaning is performed on the inside of the VIP hole 20 and the through hole 21 to remove the oxide layer inside the VIP hole 20 and the through hole 21, so as to ensure the processing quality of the copper plating layer B.

[0042] The above-mentioned stripping operation can be understood as completely removing the resist photosensitive dry film 6 using a stripping solution after completing the pulse electroplating operation.

[0043] Furthermore, for ease of describing the subsequent processes, this embodiment also defines the board obtained after completing the above S3 processing as board A.

[0044] S4: The VIP plating holes 30 are filled with resin using a screen printing process, while the through-hole prototype 31 is not filled with resin (because the through-hole 5 has not yet been formed); after the resin filling is completed, the openings of the VIP plating holes 30 are polished and smoothed to obtain the work board B2, which can be referred to in the appendix for details. Figure 6 As shown.

[0045] Specifically, the specific processing method for resin plugging in this step is as follows: First, a screen is provided, with the mesh area on the screen corresponding to the VIP plating hole 30 exposed, and the remaining mesh area covered; then, the screen is placed on the board A; next, resin 7 is printed on the screen, and the resin 7 flows into the VIP plating hole 30 through the exposed mesh area; after the VIP plating hole 30 is filled with resin 7, the resin 7 in the VIP plating hole 30 is cured.

[0046] Furthermore, the curing process of the resin 7 described above can be carried out in stages. For example, after the VIP plating hole 30 is filled with resin 7, the resin 7 is first pre-cured at a baking temperature of 150-250°C for 20-30 minutes; then, the opening of the VIP plating hole 30 is ground and leveled using a ceramic grinding wheel to remove the resin protruding from the opening; then, the resin 7 is baked at a temperature of 140-160°C for 40-60 minutes to completely cure the resin 7.

[0047] S5: After covering and protecting the via prototype 31, perform full-board etching to ensure that the copper thickness of the working board B (specifically, the thickness of the copper foil layer 13) reaches the preset thickness; after completing the full-board etching, the opening of the via prototype 31 is also polished and leveled; see appendix for details. Figure 7 As shown.

[0048] Specifically, the method for covering and protecting the via prototype 31 in this step is as follows: First, a photosensitive dry film 8 is applied to the two opposing surfaces of the working board B along its thickness direction (i.e., on the two thickened copper foil layers 13) using a vacuum lamination process. Then, the two layers of photosensitive dry film 8 are exposed and developed according to the work instructions, so that only the portion of the photosensitive dry film 8 facing away from the via prototype 31 remains, thus achieving the coverage and protection of the via prototype 31. For details, please refer to the appendix. Figure 6 As shown.

[0049] Note: Since the VIP plating hole 30 is already filled with resin 7, there is no need to cover or protect the VIP plating hole 30.

[0050] Furthermore, considering the offset problem during dry film patterning, and in order to better protect the via prototype 31 and prevent it from being etched by the etching solution, this embodiment also optimizes the size of the retained photoresist dry film 8. Specifically, the outer periphery of the retained photoresist dry film 8 extends beyond the outer edge of the via prototype 31, and the extension is at least 3 to 5 mil.

[0051] In addition, during the whole-board etching process, the etching amount is controlled between 15 and 20 μm according to the design requirements of the PCB product.

[0052] In addition, after completing the above-mentioned whole-board etching, the resist photosensitive dry film 8 is first completely removed using a stripping solution. Then, a ceramic grinding wheel is used to grind and smooth the openings of the via prototype 31 and the VIP plated hole 30, so that the copper foil layer 13 after copper reduction, the via prototype 31, the VIP plated hole 30, and the resin 7 are flush. For details, please refer to the appendix. Figure 7 As shown.

[0053] Supplement: Since copper plating and full-board electroplating are required in the subsequent processes, according to the design requirements of the PCB board product, this step can only grind and flatten the opening of the through hole prototype 31, without grinding and flattening the resin 7.

[0054] S6: After completing the above S5 processing, the work board B is sequentially subjected to copper deposition (i.e., depositing a seed layer A on the entire work board B) and full-board electroplating (i.e., plating a copper plating layer C on the seed layer A) to achieve the simultaneous plating of the cap 4 at the opening of the VIP plating hole 30 and to increase the thickness of the copper layer on the inner wall of the through hole prototype 31 to a preset thickness, thereby obtaining the through hole 5; in addition, the surface copper of the work board B (specifically referring to the two layers of copper foil extension 13) is thickened again to be flush with the copper layer on the inner wall of the cap 4 and the through hole 5; for details, please refer to the appendix. Figure 8 As shown.

[0055] Understandably, ① the structure of the via 5 is as follows: it has a through hole 21 and a conductive copper layer C on the inner wall of the through hole 21. The conductive copper layer C consists of a conductive copper layer B, a seed layer A and a copper plating layer C on the conductive copper layer B. ② The purpose of this S6 implementation is to: plate a cap 4 at the opening of the VIP plating hole 30 according to the design requirements of the PCB product; to obtain the via 5; and to adjust the surface copper thickness of the working board B to a preset copper thickness to meet the processing requirements of subsequent outer layer circuits.

[0056] Furthermore, in this embodiment, the processing parameters of the whole plate electroplating operation in S6 are optimized as follows: pulse current electroplating is used, and the pulse frequency is 100-200Hz (preferably 150Hz), the current density is 10-15ASF (preferably 10ASF), and the conveying speed of the plate conveyor belt is 1-3m / min (preferably 1m / min).

[0057] In addition, for the convenience of describing the subsequent processes, this embodiment also defines the board obtained after completing the above S6 processing as board B.

[0058] S7: The obtained board B is subjected to conventional resin plugging (i.e., filling the through holes 5 with resin 7 using screen printing, referring to the resin plugging method provided in S4 above), grinding (i.e., grinding the openings of the through holes 5), copper plating, whole-board electroplating, outer layer circuit fabrication (outer layer circuits 9 can be fabricated on the copper foil layer 13 using the subtractive process provided in S13 above), outer layer solder resist (i.e., setting a solder resist ink layer at a predetermined position on the outer layer circuit 9), surface treatment (i.e., setting a surface treatment layer on the outer layer circuit 9 at a position exposed outside the solder resist ink layer, the surface treatment layer can be, but is not limited to, electroplated soft gold layer, electroless nickel-palladium-gold layer, or electroless nickel-gold layer, etc.), molding, finished product electrical testing, and finished product inspection, etc., to obtain the PCB board; for details, please refer to the appendix. Figure 9 As shown.

[0059] Furthermore, it is understood that the two outer layer circuits 9 are electrically connected to the two inner layer circuits 11 through the vias 5. Additionally, after the outer layer circuits 9 are fabricated, they are also subjected to AOI optical inspection to ensure the quality of the circuit fabrication.

[0060] As can be seen from the above, the PCB board manufacturing method provided in this embodiment 1 has the following advantages: ① This embodiment, through improvement and innovation, adopts a PCB board manufacturing process that combines drilling (to obtain VIP holes 20 and through holes 21), first copper plating and whole-board electroplating, first film coating, pulse electroplating (to obtain VIP plated holes 30 and through hole prototypes 31), resin plugging of VIP plated holes 30, second film coating, whole-board etching, second copper plating and whole-board electroplating (to obtain caps 4 and through holes 5)); in this PCB board manufacturing process, the first film coating can achieve the goal of only processing the VIP holes 20 and through holes 21. Pulse electroplating is performed on the inside of the via 21 and 0, without affecting the surface copper thickness of the work board A. This facilitates subsequent control of the surface copper thickness. The second coating can cover and protect the via prototype 31, and the resin plug can protect the inside of the VIP plated via 30. Thus, during the whole board etching (copper reduction), only the surface copper thickness of the work board B is controlled (correspondingly ensuring the quality of subsequent outer layer circuit formation), without affecting the copper layer thickness inside the hole. This effectively meets the dual control requirements of the copper thickness inside the hole and the surface copper thickness of the PCB product. ② In the prior art, when making VIP plated vias and vias, a step-by-step processing method is usually adopted, that is: first make the VIP plated vias, and then make the vias. In this embodiment, the fabrication of the VIP plated hole 30 and the through hole 5 employs the following processing methods: simultaneously drilling the VIP hole 20 and the through hole 21; simultaneously performing pulse electroplating to obtain the VIP plated hole 30 and the through hole prototype 31; and simultaneously performing whole-board electroplating to obtain the combination of the cap 4 and the through hole 5. Compared with the prior art, the fabrication process of the VIP plated hole 30 and the through hole 5 in this embodiment is simpler and more efficient. ③ The PCB board fabrication method provided in this embodiment is novel, reasonable, simple, easy to process, and has low processing cost.

[0061] Example 2:

[0062] This embodiment 2 provides a PCB board, which is manufactured using the PCB board manufacturing method provided in embodiment 1 above.

[0063] As can be seen from the above, the PCB board obtained in this embodiment 2 has high processing quality and well meets the product requirements for the thickness of copper in the holes and the thickness of copper on the surface.

[0064] Finally, it should be noted that the suffixes "A", "B", etc. in the component names in this specification (such as work board A, work board B, etc.) are only for the purpose of clarity of description and are not intended to limit the scope of implementation of this invention patent.

[0065] Many specific details have been set forth in the foregoing description to provide a thorough understanding of the present invention. However, the above description is merely a preferred embodiment of the present invention, and the present invention can be implemented in many other ways different from those described herein. Therefore, the present invention is not limited to the specific embodiments disclosed above. Furthermore, any person skilled in the art can make many possible variations and modifications to the technical solutions of the present invention, or modify them into equivalent embodiments, using the methods and techniques disclosed above, without departing from the scope of the present invention. Any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention, without departing from the content of the present invention, shall still fall within the protection scope of the present invention.

Claims

1. A method of manufacturing a PCB board, characterized by: The production process includes the following steps: S1: Provides a work board A with inner layer circuitry; S2: Drill VIP holes (20) and through holes (21) on the working plate A. S3: The working board A is subjected to copper plating, whole board electroplating, film coating and pulse electroplating in sequence to achieve copper layer of a set thickness on the inner wall of the VIP hole (20) and the through hole (21) to obtain VIP plated hole (30) and through hole prototype (31). S4: Resin plugs are applied to the VIP plating holes (30), but not to the through hole prototype (31); after resin plugging, the openings of the VIP plating holes (30) are polished and leveled to obtain the work plate B; S5: After covering and protecting the through hole prototype (31), perform whole board etching to make the copper thickness of the working board B reach the preset thickness; after completing the whole board etching, grind and flatten the hole opening of the through hole prototype (31). S6: The working board B is subjected to copper plating and whole-board electroplating operations in sequence, so as to plate the cap (4) at the opening of the VIP plating hole (30) and increase the thickness of the copper layer on the inner wall of the through hole prototype (31) to the preset thickness, thereby obtaining the through hole (5); in addition, the copper layer on the inner wall of the cap (4) and the through hole (5) is flush with the copper surface of the working board B.

2. The method of claim 1, wherein: In S3 above, after the whole plate is electroplated, a vacuum lamination process is used to coat the surface of the working plate A with a photosensitive dry film (6). Then, the photosensitive dry film (6) is exposed and developed to form a window (60) on the photosensitive dry film (6) that can expose the VIP hole (20) and the through hole (21). In addition, the gap between the outer edge of the VIP hole (20) and the inner edge of the corresponding window (60) and the gap between the outer edge of the through hole (21) and the inner edge of the corresponding window (60) are controlled to be 1 to 5 mil respectively.

3. The method for manufacturing a PCB board according to claim 1, characterized in that: In S3 above, the processing parameters for pulse electroplating are: pulse frequency of 100-200Hz, current density of 3-5ASF, and conveying speed of the plate conveyor belt of 1-3m / min.

4. The method for manufacturing a PCB board according to claim 1, characterized in that: In the above S3, after the coating operation is completed and before the pulse electroplating operation is performed, the VIP hole (20) and the through hole (21) are subjected to a pre-treatment process of electroless gold treatment to remove the oxide layer inside the hole.

5. The method for manufacturing a PCB board according to claim 1, characterized in that: In S4 above, the VIP plated holes (30) are filled with resin using a screen printing process, specifically including: A screen is provided, wherein the mesh area on the screen corresponding to the VIP plating hole (30) is exposed, and the remaining mesh area is covered. Place the screen onto plate A obtained by S3 above; Resin (7) is printed on the screen, and the resin (7) flows into the VIP plating holes (30) through the exposed mesh area; The resin inside the VIP plating hole (30) is cured.

6. The method of claim 1, wherein: In the above S5, a photosensitive dry film (8) is applied to the surface of the working board B using a vacuum lamination process. Then, the photosensitive dry film (8) is exposed and developed so that only the part of the photosensitive dry film (8) facing the outside of the through hole prototype (31) is retained. In addition, the outer periphery of the retained photosensitive dry film (8) extends beyond the outer edge of the orifice of the through hole prototype (31).

7. The method of claim 1, wherein: In the above S5, the etching amount is controlled between 15 and 20 μm during the whole-board etching process.

8. The method of claim 1, wherein: In S6 above, the processing parameters for whole-plate electroplating are: pulse current electroplating is used, with a pulse frequency of 100-200Hz and a current density of 10-15ASF; the conveying speed of the plate conveyor belt is 1-3m / min.

9. The method of claim 1, wherein: It also includes S7: The board B obtained by S6 above is subjected to conventional outer layer circuit fabrication, outer layer solder mask, surface treatment, molding, finished product electrical testing, and finished product inspection processes to obtain the PCB board.

10. A PCB board characterized by: It is manufactured using the PCB board manufacturing method described in any one of claims 1-9.