Printed circuit board manufacturing method and printed circuit board

Abstract

This application relates to the field of printed circuit board (PCB) manufacturing technology, proposing a PCB manufacturing method and a PCB. The PCB manufacturing method includes: providing a lamination structure comprising multiple core boards, with signal layers formed on at least two core boards; processing signal holes on the lamination structure, the signal holes including through holes and stepped grooves, wherein one signal layer is arranged corresponding to the through hole, and the remaining signal layers are arranged corresponding to each step of the stepped groove; depositing copper layers on the hole walls of the through holes and the groove walls of the stepped grooves; forming a brown coating film on the copper layer surfaces of the hole walls of the through holes and the groove walls of the stepped grooves; removing the copper layer on the bottom wall of the stepped grooves by laser processing; and increasing the copper layer thickness on the hole walls of the through holes and the side walls of the stepped grooves to a target thickness by electroplating. At least two signal layers are placed at the location of a signal hole to achieve the layout and transmission of at least two signal networks, without occupying the PCB surface space, effectively improving wiring density.

Description

Technical Field

[0001] This application relates to the field of printed circuit board manufacturing technology, and in particular to a method for manufacturing a printed circuit board and a printed circuit board. Background Technology

[0002] Printed circuit boards (PCBs) typically have signal vias to enable signal transmission across layers. In related technologies, signal vias usually correspond to a single signal layer, resulting in a density bottleneck in PCB wiring and making it difficult to meet the design requirements of high-density PCBs. Summary of the Invention

[0003] In view of this, embodiments of this application provide a method for manufacturing a printed circuit board and a printed circuit board to solve the problem of density bottleneck in the wiring of printed circuit boards.

[0004] The first aspect of this application discloses a method for manufacturing a printed circuit board, comprising: A pressing structure is provided, the pressing structure comprising a plurality of core plates, at least two of the core plates having signal layers formed thereon; Signal holes are machined on the pressing structure. Each signal hole includes a through hole and a stepped groove arranged coaxially with the through hole. One of the signal layers is arranged corresponding to the through hole, and the remaining signal layers are arranged corresponding to each step of the stepped groove. A copper layer is deposited on the hole wall and the groove wall of the stepped groove by copper plating. A browning film is formed on the copper layer surface of the hole wall and the groove wall of the stepped groove through a browning treatment. The copper layer on the bottom wall of the stepped groove is removed by laser processing; Remove the brown film and increase the copper layer thickness of the hole wall and the sidewall of the stepped groove to the target thickness by electroplating.

[0005] The beneficial effects of the printed circuit board manufacturing method provided in this application are as follows: by setting at least two signal layers at the location of a signal hole, the layout and transmission of at least two signal networks can be realized without increasing the number of signal holes, without occupying the board space of the printed circuit board, effectively improving the wiring density and meeting the design requirements of high-density printed circuit boards; moreover, the copper layer of the sidewall of the stepped groove and the copper layer of the hole wall of the through hole are disconnected at the bottom wall of the stepped groove to achieve electrical isolation between each signal layer, thereby avoiding signal interference and ensuring the transmission performance of each signal network.

[0006] In some embodiments, the signal layers are formed on two core plates respectively, the signal layer on one core plate is a first signal layer, the signal layer on the other core plate is a second signal layer, the stepped groove is a first-order stepped groove, the first signal layer is arranged corresponding to the stepped groove, and the second signal layer is arranged corresponding to the through hole.

[0007] In some embodiments, the distance between the bottom wall of the stepped groove and the second signal layer is 4mil-10mil.

[0008] In some embodiments, the diameter of the stepped groove is 0.325mm-0.4mm, and the diameter of the through hole is 0.125mm-0.2mm.

[0009] In some embodiments, the stepped groove is machined using controlled depth milling, and the flatness of the bottom wall of the stepped groove is less than or equal to 15 μm.

[0010] In some embodiments, the first signal layer and the second signal layer are respectively formed on two adjacent core boards.

[0011] In some embodiments, when processing the signal hole, First, machine the stepped groove, then machine the through hole; or, First, process the through hole, then process the stepped groove.

[0012] In some embodiments, after the copper plating treatment of the hole wall and the stepped groove wall and before the browning treatment, flash plating is performed on the copper layer surface of the hole wall and the stepped groove wall.

[0013] In some embodiments, after the copper layer thickness on the hole wall and the sidewall of the stepped groove is increased to the target thickness, the signal hole is filled with resin, and copper is deposited and electroplated on the resin surface after the resin is cured.

[0014] The second aspect of this application discloses a printed circuit board manufactured by the printed circuit board manufacturing method described in the first aspect.

[0015] The printed circuit board adopts any one or more embodiments of the above-described printed circuit board manufacturing method, and therefore has the beneficial effects of the above-described embodiments, which will not be described in detail here.

[0016] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the pressing structure in related technologies; Figure 2 yes Figure 1 A schematic diagram of the press-fit structure after machining through holes; Figure 3 yes Figure 2 A schematic diagram of the structure after copper plating on the inner wall of the through hole; Figure 4 yes Figure 3 A schematic diagram of the press-fit structure after back drilling is performed; Figure 5 This is a flowchart of a printed circuit board manufacturing method provided in some embodiments of this application; Figure 6 These are schematic diagrams of the core board structure provided in some embodiments of this application; Figure 7 yes Figure 6 The diagram shows the structure of the circuit layer and signal layer formed after the core board is etched with copper foil; Figure 8 yes Figure 6 The diagram shows the structure of the circuit layer formed after the core board is etched with copper foil. Figure 9 These are schematic diagrams of the pressing structure provided in some embodiments of this application; Figure 10 yes Figure 9 The diagram shows the structure after the stepped groove is processed in the press-fit structure. Figure 11 yes Figure 10 A schematic diagram of the press-fit structure after machining through holes; Figure 12 yes Figure 11 The diagram shows the structure of the stepped groove wall and the through hole wall after copper plating and flash plating. Figure 13 yes Figure 12 A schematic diagram of the structure of the stepped groove after the copper layer has been removed from the bottom wall; Figure 14 yes Figure 13 The diagram shows the structure after the copper layer thickness of the stepped groove sidewall and the through hole wall is increased to the target thickness. Figure 15 yes Figure 14 The diagram shows the structure after resin plugging of the stepped groove and through-hole. Figure 16 yes Figure 15 The diagram shows the structure after the resin has been cured and copper plating has been applied to the resin surface. Figure 17 This is a schematic diagram of the structure after the press-fit structure with stepped grooves and through holes is processed according to other embodiments of this application; Figure 18 This is a schematic diagram of the structure after the through hole is processed in some embodiments of the pressing structure provided in this application; Figure 19 yes Figure 18 The diagram shows the structure after the stepped groove is processed in the press-fit structure.

[0019] The markings in the diagram mean: 100. Press-fit structure; 10. Core board; 11. Substrate; 12. Copper foil; 121. Circuit layer; 122. Signal layer; 1221. First signal layer; 1222. Second signal layer; 20. Signal hole; 21. Through hole; 22. Back drill hole; 23. Stepped groove; 231. Groove sidewall; 232. Groove bottom wall; 30. Copper layer; 40. Resin; 50. Prepreg. Detailed Implementation

[0020] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0021] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.

[0022] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.

[0023] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0024] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0025] In the description of the embodiments of this application, the term "multiple" refers to two or more (including two), similarly, "multiple sets" refers to two or more (including two sets), and "multiple pieces" refers to two or more (including two pieces).

[0026] In the description of the embodiments of this application, the technical terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. They are only for the convenience of describing the embodiments of this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.

[0027] In the description of the embodiments of this application, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.

[0028] In related technologies, the manufacturing method of printed circuit boards is as follows: Please refer to... Figure 1 A lamination structure 100 is provided, comprising a plurality of core plates 10, one of which has a signal layer 122 formed thereon; thereafter, please refer to Figure 2 and Figure 3First, through holes 21 are machined on the pressed structure 100. Then, a copper layer 30 is formed on the inner wall of the through holes 21 by copper plating and electroplating. The copper layer 30 is connected to the signal layer 122. Then, please refer to... Figure 4 A back-drilled hole 22 is machined on the pressed structure 100 to remove the unused copper layer 30 inside the through hole 21, thereby improving the signal transmission quality. The through hole 21 and the back-drilled hole 22 together form the signal hole 20.

[0029] However, the aforementioned signal holes correspond to a single signal layer, resulting in a density bottleneck in the wiring of the printed circuit board, making it difficult to meet the design requirements of high-density printed circuit boards.

[0030] To address the density bottleneck in printed circuit board (PCB) wiring, this application proposes a PCB manufacturing method and a PCB. The method adjusts the conventional signal hole (back-drilling structure), abandoning the traditional back-drilling process to remove excess metal. Instead, it adopts a composite structure of "controlled depth stepped groove + bottom through hole" to achieve the integration of multiple signal layers at the same signal hole, without increasing the number of signal holes, thus effectively improving wiring density.

[0031] Please refer to Figure 5 The first aspect of this application provides a method for manufacturing a printed circuit board, comprising the following steps: S100, please refer to Figure 9 A pressing structure 100 is provided, which includes a plurality of core plates 10, and at least two core plates 10 are respectively formed with signal layers 122.

[0032] Understandably, the number of core boards 10 can be three, four, five, six, or more. Taking a number of core boards 10 as an example, the six core boards 10 are laminated with a prepreg 50 (PP sheet) to form a laminated structure 100; wherein, the prepreg 50 is cured during the lamination process, and plays a role in filling the gaps between layers and providing adhesive force.

[0033] Understandably, signal layers 122 can be formed on two core boards 10 respectively, that is, there are two signal layers 122; or, signal layers 122 can be formed on three core boards 10 respectively, that is, there are three signal layers 122; or, signal layers 122 can be formed on four core boards 10 respectively, that is, there are four signal layers 122.

[0034] For example, please refer to Figure 6 The unprocessed core board 10 includes a substrate 11 and copper foils 12 disposed on opposite sides of the substrate 11. Of course, the unprocessed core board 10 may also include a substrate 11 and copper foils 12 disposed on one side of the substrate 11.

[0035] The substrate 11 is made of an insulating material, such as FR-4 (epoxy resin impregnated fiberglass cloth).

[0036] Taking a core board 10 with copper foil 12 on both sides of the substrate 11 as an example, one structural form of the processed core board 10 is as follows: Figure 7 As shown, the copper foil 12 on one side of the substrate 11 is processed to form a circuit layer 121 and a signal layer 122, and the copper foil 12 on the other side of the substrate 11 is processed to form a circuit layer 121; another structural form of the processed core board 10 is as follows. Figure 8 As shown, the copper foils 12 on both sides of the substrate 11 are processed to form circuit layers 121.

[0037] S200, please refer to Figure 10 and Figure 11 Signal holes 20 are machined on the pressing structure 100. The signal holes 20 include through holes 21 and stepped grooves 23 arranged coaxially with the through holes 21. One signal layer 122 is arranged corresponding to the through hole 21, and the other signal layers 122 are arranged corresponding to each step of the stepped grooves 23.

[0038] Understandably, one signal hole 20 or multiple signal holes 20 can be machined on the pressing structure 100. The signal hole 20 penetrates the pressing structure 100 along the pressing direction of the core plate 10.

[0039] The stepped groove 23 and the through hole 21 are arranged coaxially, which can be understood as the central axis of the stepped groove 23 coinciding with or substantially coinciding with the central axis of the through hole 21.

[0040] The signal layer 122 has a larger size than the diameter of the via 21, and the signal layer 122 has a larger size than the diameter of the stepped groove 23.

[0041] Understandably, the stepped slot 23 can be a first-order stepped slot, a second-order stepped slot, or a third-order stepped slot or more. Specifically, when the stepped slot 23 is a first-order stepped slot, the stepped slot 23 is arranged corresponding to one signal layer 122; when the stepped slot 23 is a second-order stepped slot, the first and second orders of the stepped slot 23 are arranged corresponding to two signal layers 122 respectively; when the stepped slot 23 is a third-order stepped slot, the first, second, and third orders of the stepped slot 23 are arranged corresponding to three signal layers 122 respectively.

[0042] It should be noted that when the stepped groove 23 is a first-order stepped groove, the stepped groove 23 has one groove depth; when the stepped groove 23 is a second-order stepped groove, the stepped groove 23 has two groove depths; when the stepped groove 23 is a third-order stepped groove, the stepped groove 23 has three groove depths; and so on, when the stepped groove 23 is an N-order stepped groove, the stepped groove 23 has N groove depths.

[0043] S300, please refer to Figure 11 and Figure 12 A copper layer 30 is deposited on the wall of the through hole 21 and the wall of the stepped groove 23 by copper plating.

[0044] The stepped groove 23 has a side wall 231 and a bottom wall 232. That is, during the copper plating process, a copper layer 30 is deposited on both the side wall 231 and the bottom wall 232 of the stepped groove 23.

[0045] For example, the copper plating process uses a chemical displacement reaction to deposit a thin copper layer 30 (thickness less than 2 μm, typically 0.3 μm-0.8 μm) on the wall of the through hole 21 and the wall of the stepped groove 23 to achieve metallization and conduction, thereby serving as a conductive lead for subsequent copper plating.

[0046] S400, A browning film is formed on the surface of the copper layer 30 on the hole wall of the through hole 21 and the groove wall of the stepped groove 23 through a browning treatment.

[0047] The stepped groove 23 has a side wall 231 and a bottom wall 232. That is, during the browning process, a browning film is formed on both the side wall 231 and the bottom wall 232 of the stepped groove 23.

[0048] The brown coating forms a uniform micro-rough structure (e.g., honeycomb or fluffy) on the surface of the copper layer 30. This micro-rough structure can significantly improve the absorption rate of laser energy, making the laser removal of the copper layer 30 more efficient and uniform. The brown coating can also reduce the reflection on the surface of the copper layer 30, avoiding uneven distribution of laser energy, thereby achieving more precise processing. Moreover, the brown coating can passivate the surface of the copper layer 30, reducing metal spatter or oxide debris generated during laser action and reducing contamination of the surrounding area.

[0049] The browning film is formed by the reaction of copper layer 30 with browning solution, and its main component is cuprous oxide.

[0050] S500, please refer to Figure 12 and Figure 13 The copper layer 30 on the bottom wall 232 of the stepped groove 23 is removed by laser processing.

[0051] Understandably, the laser beam is projected from the opening of the stepped groove 23 to the bottom of the stepped groove 23 to ablate the copper layer 30 of the bottom wall 232 of the stepped groove 23, thereby removing the copper layer 30 of the bottom wall 232 of the stepped groove 23.

[0052] For example, the laser drill tape data is pre-sized by 0.15mm-0.2mm (i.e. 6mil-8mil) to the diameter of the through hole 21.

[0053] After removing the copper layer 30 from the bottom wall 232 of the stepped groove 23, the copper layer 30 on the side wall 231 of the stepped groove 23 and the copper layer 30 on the hole wall of the through hole 21 are disconnected at the bottom wall 232 of the stepped groove 23 to achieve electrical isolation between each signal layer 122.

[0054] S600, please refer to Figure 14 The brown film is removed, and the copper layer 30 of the hole wall of the through hole 21 and the sidewall 231 of the stepped groove 23 is increased to the target thickness through electroplating.

[0055] In this process, no copper plating is required, but pretreatment micro-etching is necessary to remove the brown film on the surface of the copper layer 30 on the hole wall of the through hole 21 and the side wall 231 of the stepped groove 23, so as to avoid the brown film residue affecting the electroplating of copper.

[0056] The printed circuit board manufacturing method provided in this application embodiment sets at least two signal layers 122 at the location of a signal hole 20 to realize the layout and transmission of at least two signal networks. It does not require an additional number of signal holes 20, does not occupy the board space of the printed circuit board, effectively improves the wiring density, and meets the design requirements of high-density printed circuit boards. At the same time, the copper layer 30 of the side wall 231 of the stepped groove 23 and the copper layer 30 of the hole wall of the through hole 21 are disconnected at the bottom wall 232 of the stepped groove 23 to realize electrical isolation between each signal layer 122, thereby avoiding signal interference and ensuring the transmission performance of each signal network.

[0057] Please refer to Figure 11 and Figure 12 In some embodiments, signal layers 122 are formed on two core boards 10 respectively. The signal layer 122 on one core board 10 is a first signal layer 1221, and the signal layer 122 on the other core board 10 is a second signal layer 1222. The stepped groove 23 is a first-order stepped groove. The first signal layer 1221 is arranged correspondingly to the stepped groove 23, and the second signal layer 1222 is arranged correspondingly to the through hole 21.

[0058] It is understandable that the two core boards 10 with the signal layer 122 can be adjacent or not.

[0059] Among them, the stepped groove 23 is a first-order stepped groove, that is, the stepped groove 23 has a groove depth.

[0060] The first signal layer 1221 is arranged correspondingly to the stepped groove 23. This can be understood as the copper layer 30 of the groove sidewall 231 of the stepped groove 23 being conductive to the first signal layer 1221 to form a first conductive channel. The second signal layer 1222 is arranged correspondingly to the through-hole 21. This can be understood as the copper layer 30 of the hole wall of the through-hole 21 being conductive to the second signal layer 1222 to form a second conductive channel. The first and second conductive channels are not connected.

[0061] Please refer to Figure 17 In some embodiments, signal layers 122 are formed on each of the three core boards 10, that is, three signal layers 122 are provided at the position of one signal hole 20; correspondingly, the stepped groove 23 is a two-stage stepped groove, that is, the stepped groove 23 has two groove depths. One signal layer 122 is arranged corresponding to the through hole 21, and the other two signal layers 122 are arranged corresponding to the first stage and the second stage of the stepped groove 23, respectively.

[0062] Please refer to Figure 11 In some embodiments, when the stepped groove 23 is a first-order stepped groove, the distance t1 between the bottom wall 232 of the stepped groove 23 and the second signal layer 1222 is 4mil-10mil.

[0063] Understandably, the distance t1 between the bottom wall 232 of the stepped groove 23 and the second signal layer 1222 can be 4mil, 4.5mil, 5mil, 5.5mil, 6mil, 6.5mil, 7mil, 7.5mil, 8mil, 8.5mil, 9mil, 9.5mil or 10mil, etc.

[0064] Based on the above technical solution, the size of the portion of the copper layer 30 in the via 21 above the second signal layer 1222 is consistent with t1. t1 is designed to be 4mil-10mil, which makes the portion of the copper layer 30 in the via 21 above the second signal layer 1222 shorter. This makes it less prone to resonance, reflection and insertion loss at high frequencies, thus improving signal integrity.

[0065] Please refer to Figure 10 and Figure 11 In some embodiments, when the stepped groove 23 is a first-order stepped groove, the diameter D1 of the stepped groove 23 is 0.325mm-0.4mm, and the diameter D2 of the through hole 21 is 0.125mm-0.2mm.

[0066] Understandably, the diameter D1 of the stepped groove 23 can be 0.325mm, 0.35mm, 0.375mm, or 0.4mm, etc. The diameter D1 of the stepped groove 23 shall not exceed the diameter of the original back-drilled hole 22 to avoid affecting the circuit layout on the board surface.

[0067] Understandably, the diameter D2 of the through hole 21 can be 0.125mm, 0.15mm, 0.175mm, or 0.2mm, etc. The diameter D2 of the through hole 21 should not exceed the original diameter of the through hole 21 to avoid affecting the circuit layout on the board.

[0068] For example, the difference between the diameter D1 of the stepped groove 23 and the diameter D2 of the through hole 21 is 0.15mm-0.2mm (i.e., 6mil-8mil). Understandably, the difference between the diameter D1 of the stepped groove 23 and the diameter D2 of the through hole 21 can be 0.15mm, 0.175mm, or 0.2mm, etc.

[0069] In some embodiments, the stepped groove 23 is machined by controlled depth milling, and the flatness F of the bottom wall 232 of the stepped groove 23 is less than or equal to 15 μm.

[0070] Understandably, the flatness F of the bottom wall 232 of the stepped groove 23 can be equal to 15 μm; or, the flatness F of the bottom wall 232 of the stepped groove 23 can be less than 15 μm, for example, the flatness F of the bottom wall 232 of the stepped groove 23 can be 14 μm, 13 μm, 12 μm, 11 μm or 10 μm, etc.

[0071] Please refer to Figure 11 In some embodiments, when the stepped groove 23 is a first-order stepped groove, the first signal layer 1221 and the second signal layer 1222 are respectively formed on two adjacent core boards 10. Of course, the first signal layer 1221 and the second signal layer 1222 can also be formed on two non-adjacent core boards 10.

[0072] In some embodiments, three signal layers 122 are provided, and the three signal layers 122 can be formed on three adjacent core boards 10 respectively. Of course, the three signal layers 122 can also be formed on three non-adjacent core boards 10 respectively; or, two signal layers 122 can be formed on two adjacent core boards 10 respectively, and the core board 10 forming the third signal layer 122 is not adjacent to the above two core boards 10.

[0073] Please refer to Figure 10 and Figure 11 In some embodiments, when machining the signal hole 20, the stepped groove 23 is machined first, and then the through hole 21 is machined to form the signal hole 20.

[0074] For example, a flat-head drill bit is used to machine a depth-controlled stepped groove 23 at the position of the original back-drilled hole 22 according to preset depth and size parameters, ensuring that the bottom wall 232 of the groove is flat and the groove wall is smooth, and controlling the groove depth error within the allowable range. Then, by using a nested drilling method (ensuring that the central axis of the through hole 21 coincides or substantially coincides with the central axis of the stepped groove 23), a through hole 21 is drilled at the center position of the bottom wall 232 of the stepped groove 23 to form a signal hole 20.

[0075] Please refer to Figure 18 and Figure 19 In some embodiments, when machining the signal hole 20, the through hole 21 is machined first, and then the stepped groove 23 is machined to form the signal hole 20.

[0076] In some embodiments, after copper plating of the hole wall of the through hole 21 and the wall of the stepped groove 23 and before browning treatment, flash plating is performed on the copper layer 30 surface of the hole wall of the through hole 21 and the wall of the stepped groove 23.

[0077] The copper layer 30 formed after the copper plating process is relatively thin and in a highly active state. It is easily oxidized when exposed to air, which affects the adhesion of subsequent electroplating. Flash plating can form a dense and stable copper layer 30 on the surface of the copper layer 30 after the copper plating process, which can effectively isolate the air and protect the copper layer 30 after the copper plating process. At the same time, it provides a more stable and uniform conductive foundation for subsequent processes.

[0078] For example, the thickness of the flash-plated copper layer 30 is 5-8 μm. Understandably, the thickness of the flash-plated copper layer 30 can be 5 μm, 5.5 μm, 6 μm, 6.5 μm, 7 μm, 7.5 μm, or 8 μm, etc.

[0079] In some other embodiments, after copper plating is performed on the walls of the through-hole 21 and the walls of the stepped groove 23, if the thickness of the copper layer 30 meets the requirements, flash plating may not be performed on the surface of the copper layer 30 on the walls of the through-hole 21 and the walls of the stepped groove 23.

[0080] Please refer to Figure 15 and Figure 16 After the copper layer 30 thickness of the hole wall of the through hole 21 and the sidewall 231 of the stepped groove 23 is increased to the target thickness, the signal hole 20 is filled with resin, that is, resin 40 is filled into the through hole 21 and the stepped groove 23 to ensure that the copper layer 30 in the through hole 21 and the copper layer 30 in the stepped groove 23 are not conductive. After the resin 40 is cured, copper is deposited and electroplated on the surface of the resin 40 to achieve further signal conduction and extraction, ensure the normal transmission of the multi-signal layer 122, and optimize the surface flatness of the printed circuit board.

[0081] In some other embodiments, when the copper layer 30 in the through hole 21 and the copper layer 30 in the stepped groove 23 are not easily conductive, the resin plugging and POFV (Plating Over Filled Via) process may not be performed.

[0082] A second aspect of this application discloses a printed circuit board manufactured by the printed circuit board manufacturing method described in the first aspect. Exemplarily, the printed circuit board is a high-speed PCB.

[0083] The beneficial effects of the printed circuit board provided in this application embodiment are as follows: (1) Improve wiring density: A single signal hole enables the integration of multiple signal layers without the need to increase the number of signal holes, effectively saving the board space of the printed circuit board and significantly improving the wiring density, which is suitable for high-density and miniaturized product requirements.

[0084] (2) Ensure signal performance: Independent transmission of each signal layer is achieved through laser isolation to avoid crosstalk; the bottom of the slot has high flatness and the redundant length is effectively controlled, reducing signal reflection, insertion loss and resonance, and improving the quality of high-speed signals.

[0085] (3) Stable structure: Based on the original signal hole position optimization, it has good compatibility with the existing printed circuit board manufacturing process and processing equipment; resin plugging and POFV process improve the structural strength of the signal hole and improve product reliability.

[0086] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A method of manufacturing a printed circuit board, characterized by, include: A pressing structure is provided, the pressing structure comprising a plurality of core plates, at least two of the core plates having signal layers formed thereon; Signal holes are machined on the pressing structure. Each signal hole includes a through hole and a stepped groove arranged coaxially with the through hole. One of the signal layers is arranged corresponding to the through hole, and the remaining signal layers are arranged corresponding to each step of the stepped groove. A copper layer is deposited on the hole wall and the groove wall of the stepped groove by copper plating. A browning film is formed on the copper layer surface of the hole wall and the groove wall of the stepped groove through a browning treatment. The copper layer on the bottom wall of the stepped groove is removed by laser processing; Remove the brown film and increase the copper layer thickness of the hole wall and the sidewall of the stepped groove to the target thickness by electroplating.

2. The printed circuit board manufacturing method according to claim 1, wherein The signal layers are formed on two of the core plates respectively. The signal layer on one core plate is a first signal layer, and the signal layer on the other core plate is a second signal layer. The stepped groove is a first-order stepped groove. The first signal layer is arranged corresponding to the stepped groove, and the second signal layer is arranged corresponding to the through hole.

3. The printed circuit board manufacturing method according to claim 2, wherein The distance between the bottom wall of the stepped groove and the second signal layer is 4mil-10mil.

4. The printed circuit board manufacturing method as described in claim 2, characterized in that, The diameter of the stepped groove is 0.325mm-0.4mm, and the diameter of the through hole is 0.125mm-0.2mm.

5. The printed circuit board manufacturing method according to claim 2, wherein The stepped groove is machined using controlled depth milling, and the flatness of the bottom wall of the stepped groove is less than or equal to 15 μm.

6. The printed circuit board manufacturing method of claim 2, wherein, The first signal layer and the second signal layer are respectively formed on two adjacent core boards.

7. The printed circuit board manufacturing method according to any one of claims 1 to 6, wherein When machining the signal hole First, machine the stepped groove, then machine the through hole; or, First, process the through hole, then process the stepped groove.

8. The printed circuit board manufacturing method according to any one of claims 1 to 6, wherein After the copper plating treatment of the hole wall and the stepped groove wall and before the browning treatment, flash plating is performed on the copper layer surface of the hole wall and the stepped groove wall.

9. The printed circuit board manufacturing method according to any one of claims 1 to 6, wherein After the copper layer thickness on the hole wall and the sidewall of the stepped groove is increased to the target thickness, the signal hole is filled with resin, and copper is deposited and electroplated on the resin surface after the resin is cured.

10. A printed circuit board, characterized by The printed circuit board is manufactured by the printed circuit board manufacturing method as described in any one of claims 1-9.

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