A high-response double-sided silicon microstrip particle detector and a preparation method thereof

Abstract

This invention relates to the field of semiconductor devices, and particularly to a high-response double-sided silicon microstrip particle detector and its fabrication method. The detector includes a high-resistivity silicon substrate, front microstrips, a front bias ring, and a front guard ring, as well as back microstrips, a back bias ring, and a back guard ring. The surfaces of the front microstrips, the front bias ring, the front guard ring, the back microstrips, the back bias ring, and the back guard ring facing outwards from the high-resistivity silicon substrate are all provided with metal electrodes forming ohmic contacts. The front and back microstrips are symmetrically arranged in parallel, with one-to-one correspondence in position. The width of each front and back microstrip ranges from 2.5 mm to 3 mm, including the endpoints. This invention expands the effective carrier collection area, significantly improves the carrier collection efficiency of the detector under high-dose particle irradiation, and enhances the detector's withstand voltage and long-term operational stability.

Description

Technical Field

[0001] This invention relates to the field of semiconductor devices, and in particular to a high-response double-sided silicon microstrip particle detector and its fabrication method. Background Technology

[0002] Semiconductor detectors have been widely used in fields such as high-energy physics, astrophysics, and nuclear medicine, among which silicon microstrip particle detectors have achieved rapid development due to their superior performance. Currently, major high-energy physics research centers worldwide generally use silicon microstrip particle detectors as vertex detectors for measuring the tracks of charged particles.

[0003] Currently, the core working principle of the double-sided silicon microstrip particle detector is as follows: by applying a reverse bias voltage to the N-type ohmic contact microstrip electrode on the back side of the silicon substrate, a fully depleted sensitive region is formed inside the detector; when a high-energy particle is incident and passes through the sensitive region, it will ionize in the silicon material to generate electron-hole pairs; under the action of the high electric field in the depletion region, the electrons and holes drift to the back and front microstrip electrodes close to the particle track, respectively, and the electrical signals collected by the electrodes can reflect the energy, position and other information of the incident particle.

[0004] Silicon microstrip detectors possess numerous advantages, including high energy resolution, good position resolution, wide energy linear range, and fast time response. Among these advantages, the size, spacing, and arrangement of the microstrips, as the core signal collection unit of the detector, directly determine the detector's collection efficiency of charge carriers generated by high-energy particle irradiation, as well as its ability to resolve the particle incident position.

[0005] In existing technologies, to achieve higher position resolution, the industry generally designs silicon microstrips to be smaller and smaller, while employing a vertically intersecting arrangement of front and back microstrips. While this design can improve position resolution accuracy, it also brings significant technical drawbacks. On the one hand, the significant reduction in microstrip size directly reduces the effective carrier collection area, especially in scenarios with high-dose particle irradiation, where the carrier collection efficiency of the detector decreases significantly, and the response performance degrades drastically. On the other hand, the vertically intersecting microstrip arrangement and the small-sized microstrip design make the device prone to edge electric field concentration under high reverse bias, which can lead to breakdown and limit the detector's withstand voltage and long-term operational stability.

[0006] Therefore, how to provide a high-response, double-sided silicon microstrip particle detector for high-dose particle irradiation scenarios and improve its operational stability is a problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0007] The purpose of this invention is to provide a high-response double-sided silicon microstrip particle detector and its fabrication method, so as to solve the problems of poor response performance and poor working stability of existing double-sided silicon microstrip particle detectors under high-dose particle irradiation scenarios.

[0008] To solve the above-mentioned technical problems, the present invention provides a high-response double-sided silicon microstrip particle detector, comprising a high-resistivity silicon substrate, a front microstrip, a front bias ring and a front protection ring disposed on the front side of the high-resistivity silicon substrate, and a back microstrip, a back bias ring and a back protection ring disposed on the back side of the high-resistivity silicon substrate.

[0009] The front microstrip, the front bias ring, the front protection ring, the back microstrip, the back bias ring, and the back protection ring all have metal electrodes forming ohmic contacts on their outer surfaces facing the high-resistivity silicon substrate.

[0010] The non-metallic electrode areas on the front and back sides of the high-resistivity silicon substrate are covered with an insulating dielectric protective layer.

[0011] The front micro-strips and the back micro-strips are arranged symmetrically and parallel to each other, and their positions correspond one-to-one.

[0012] The front bias ring surrounds the outside of the front micro strip, and the front protection ring surrounds the outside of the front bias ring; the back bias ring surrounds the outside of the back micro strip, and the back protection ring surrounds the outside of the back bias ring.

[0013] The width of each individual microstrip on the front and the back is between 2.5 mm and 3 mm, including the endpoint values.

[0014] Optionally, the high-response double-sided silicon microstrip particle detector also includes a lightly doped isolation ring;

[0015] The lightly doped isolation ring is disposed between the back microstrip, the back bias ring, and the back protection ring.

[0016] Optionally, in the high-response double-sided silicon microstrip particle detector, the junction depth of the lightly doped isolation ring ranges from 100 nanometers to 150 nanometers, including the endpoint values.

[0017] The peak concentration of the doped surface of the lightly doped isolation ring is in the range of 1E18 / cm. 3 Up to 5E18 / cm 3 This includes endpoint values;

[0018] The width of a single lightly doped isolation ring ranges from 8 micrometers to 10 micrometers, including the endpoint values.

[0019] Optionally, in the high-response double-sided silicon microstrip particle detector, the junction depth of the front microstrip, the front bias ring, and the front guard ring ranges from 300 nanometers to 500 nanometers, including the endpoint values.

[0020] The peak concentration range of the doped surfaces of the front microstrip, the front bias ring, and the front guard ring is 5E19 / cm². 3 Up to 1E20 / cm 3 This includes endpoint values.

[0021] Optionally, in the high-response double-sided silicon microstrip particle detector, the junction depth of the back microstrip, the back bias ring, and the back guard ring ranges from 200 nanometers to 400 nanometers, including the endpoint values.

[0022] The peak concentration range of the doped surfaces of the backside microstrip, the backside bias ring, and the backside protection ring is 1E20 / cm². 3 Up to 3E20 / cm 3 This includes endpoint values.

[0023] Optionally, in the high-response double-sided silicon microstrip particle detector, the metal electrode is an aluminum electrode;

[0024] The thickness of the aluminum electrode ranges from 550 nanometers to 650 nanometers, including the endpoint values.

[0025] Optionally, in the high-response double-sided silicon microstrip particle detector, the insulating dielectric protective layer is a composite passivation layer of undoped silicon glass layer and borosilicate glass layer.

[0026] The thickness of the insulating dielectric protective layer ranges from 650 nanometers to 750 nanometers, including the endpoint values.

[0027] Optionally, in the high-response double-sided silicon microstrip particle detector, the spacing between adjacent front microstrips and the spacing between adjacent back microstrips range from 100 micrometers to 120 micrometers, including endpoint values.

[0028] And / or, the width of each of the single front bias rings and the single back bias rings ranges from 0.15 mm to 0.20 mm, including the endpoint values;

[0029] And / or, the width of each of the single front protective rings and the single rear protective rings ranges from 30 micrometers to 50 micrometers, including the endpoint values.

[0030] Optionally, in the high-response double-sided silicon microstrip particle detector, the front side of the high-resistivity silicon substrate includes a plurality of sequentially nested front protective rings, and the back side includes a plurality of sequentially nested back protective rings.

[0031] The spacing between each of the front protective rings gradually decreases from the outside to the inside; the spacing between each of the back protective rings also gradually decreases from the outside to the inside.

[0032] The spacing between adjacent front protective rings and the spacing between adjacent back protective rings both range from 20 micrometers to 80 micrometers, including the endpoint values.

[0033] A method for fabricating a high-response double-sided silicon microstrip particle detector, the method comprising:

[0034] Prepare a high-resistivity silicon substrate;

[0035] A patterned type I heavily doped ion implantation is performed on the front side of the high-resistivity silicon substrate to form front-side microstrips, a front-side bias ring, and a front-side protection ring.

[0036] A double-sided overlay process is used to implant patterned type II heavily doped ions on the back side of the high-resistivity silicon substrate to form back microstrips, a back bias ring, and a back protection ring; wherein the back microstrips are arranged symmetrically and parallel to the front microstrips, and their positions correspond one-to-one.

[0037] An insulating dielectric protective layer is deposited on the front and back sides of the high-resistivity silicon substrate;

[0038] Electrode windows are made on the front side of the high-resistivity silicon substrate, and metal electrodes are disposed at corresponding positions of the front microstrip, the front bias ring, and the front protection ring. Electrode windows are also made on the back side of the high-resistivity silicon substrate, and metal electrodes are disposed at corresponding positions of the back microstrip, the back bias ring, and the back protection ring.

[0039] The high-response double-sided silicon microstrip particle detector provided by this invention includes a high-resistivity silicon substrate, a front microstrip, a front bias ring, and a front protection ring disposed on the front side of the high-resistivity silicon substrate, and a back microstrip, a back bias ring, and a back protection ring disposed on the back side of the high-resistivity silicon substrate. The surfaces of the front microstrip, the front bias ring, the front protection ring, the back microstrip, the back bias ring, and the back protection ring facing outwards from the high-resistivity silicon substrate are all provided with metal electrodes forming ohmic contacts. The non-metallic electrode areas on the front and back sides of the high-resistivity silicon substrate are covered with an insulating dielectric protective layer. The front microstrip and the back microstrip are symmetrically arranged in parallel, and their positions correspond one-to-one. The front bias ring surrounds the outside of the front microstrip, and the front protection ring surrounds the outside of the front bias ring. The back bias ring surrounds the outside of the back microstrip, and the back protection ring surrounds the outside of the back bias ring. The width of a single front microstrip and the back microstrip ranges from 2.5 mm to 3 mm, including the endpoint values.

[0040] This invention significantly increases the width of the microstrips on both the front and back sides, thereby expanding the effective carrier collection area. Combined with the symmetrical, parallel, and one-to-one correspondence arrangement of the double-sided microstrips, it significantly improves the carrier collection efficiency of the detector under high-dose particle irradiation, solving the problems of low carrier collection efficiency and performance saturation under high-dose irradiation in existing technologies. Furthermore, it significantly reduces the risk of breakdown under high reverse bias, improving the detector's withstand voltage and long-term operational stability. This invention also provides a method for fabricating a high-response double-sided silicon microstrip particle detector with the aforementioned beneficial effects. Attached Figure Description

[0041] To more clearly illustrate the technical solutions of the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1 A schematic diagram of a specific embodiment of the high-response double-sided silicon microstrip particle detector provided by the present invention;

[0043] Figure 2 A front structural schematic diagram of a specific embodiment of the high-response double-sided silicon microstrip particle detector provided by the present invention;

[0044] Figure 3 A schematic diagram of the back structure of a specific embodiment of the high-response double-sided silicon microstrip particle detector provided by the present invention;

[0045] Figure 4 This is a flowchart illustrating a specific embodiment of the fabrication method of the high-response double-sided silicon microstrip particle detector provided by the present invention.

[0046] Figure label:

[0047] 101-High-resistivity silicon substrate; 102-Insulating dielectric protective layer; 103-Front-side microstrip; 104-Front-side bias ring; 105-Front-side protection ring; 106-Back-side microstrip; 107-Back-side bias ring; 108-Back-side protection ring; 109-Lightly doped isolation ring; A-Front-side microstrip electrode; B-Front-side bias ring electrode; C-Front-side protection ring electrode; D-Back-side microstrip electrode; E-Back-side bias ring electrode; F-Back-side protection ring electrode. Detailed Implementation

[0048] To enable those skilled in the art to better understand the present invention, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are merely some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0049] The core of this invention is to provide a high-response double-sided silicon microstrip particle detector, the structural schematic diagram of one specific embodiment of which is shown below. Figure 1 As shown, referred to as Specific Embodiment 1, it includes a high-resistivity silicon substrate 101, a front microstrip 103, a front bias ring 104 and a front protection ring 105 disposed on the front side of the high-resistivity silicon substrate 101, and a back microstrip 106, a back bias ring 107 and a back protection ring 108 disposed on the back side of the high-resistivity silicon substrate 101.

[0050] The front microstrip 103, the front bias ring 104, the front protection ring 105, the back microstrip 106, the back bias ring 107, and the back protection ring 108 are all provided with metal electrodes forming ohmic contacts on the outer surfaces of the high-resistivity silicon substrate 101.

[0051] The non-metallic electrode areas on the front and back sides of the high-resistivity silicon substrate 101 are covered with an insulating dielectric protective layer 102.

[0052] The front micro-strips 103 and the back micro-strips 106 are arranged symmetrically and parallel to each other, and their positions correspond one-to-one.

[0053] The front bias ring 104 surrounds the outside of the front micro strip 103, and the front protection ring 105 surrounds the outside of the front bias ring 104; the back bias ring 107 surrounds the outside of the back micro strip 106, and the back protection ring 108 surrounds the outside of the back bias ring 107.

[0054] The width of a single strip of the front micro-strip 103 and the back micro-strip 106 ranges from 2.5 mm to 3 mm, including endpoint values ​​such as any one of 2.50 mm, 2.94 mm or 3.00 mm.

[0055] The widths of the front microstrip 103 and the back microstrip 106 in this invention are significantly greater than the widths of the microstrips in conventional double-sided silicon microstrip particle detectors, thereby improving the carrier collection efficiency under high-dose particle irradiation.

[0056] You can refer to this. Figure 2 and Figure 3 , Figure 2 This is a schematic diagram of the front structure of the double-sided silicon microparticle detector. Figure 3This is a schematic diagram of the back structure of the double-sided silicon microarray electron detector. The double-sided silicon microarray electron detector has multiple microstrips on each side; that is, multiple front microstrips 103 are arranged in parallel on the front side, and multiple back microstrips 106 are arranged in parallel on the back side. There can also be multiple front protective rings 105 and multiple back protective rings 108. It should be noted that the number of front protective rings 105 may not be the same as the number of back protective rings 108. Of course, as a preferred embodiment, the number of front protective rings 105 is the same as the number of back protective rings 108, and their positions correspond one-to-one.

[0057] In one specific embodiment, the front microstrip 103 is a heavily p-type doped microstrip, the back microstrip 106 is a heavily n-type doped microstrip, and the high-resistivity silicon substrate 101 is a high-resistivity p-type silicon wafer substrate. Typically, the high-resistivity p-type silicon wafer substrate is... <100> A crystal-oriented, double-sided polished P-type low-doped silicon wafer with a resistivity of 10000 Ω·cm and a thickness of 550 micrometers.

[0058] The metal electrode of the front P-type heavily doped microstrip is set at the same potential as the metal electrode of the front bias ring 104 structure and is loaded with a low potential, while the metal electrode of the front protection ring 105 is suspended; the metal electrode of the back N-type heavily doped microstrip is set at the same potential as the metal electrode of the back bias ring 107 and is loaded with a high potential, while the metal electrode of the back protection ring 108 is suspended.

[0059] The non-metallic electrode areas on both the front and back sides of the high-resistivity silicon substrate 101 are covered with an insulating dielectric protective layer 102 to achieve surface passivation and insulation protection.

[0060] This invention uses a parallel arrangement of double-sided microstrips to replace the traditional vertical cross arrangement. Combined with the synergistic design of equipotential bias rings and multi-level unequal-spacing protection rings, it effectively optimizes the electric field distribution at the edge of the microstrips, suppresses the electric field concentration effect, significantly reduces the risk of device breakdown under high reverse bias, and greatly improves the detector's withstand voltage and long-term working stability.

[0061] The front side of the high-resistivity silicon substrate 101 is formed by ion implantation to form front-side P-type heavily doped microstrips, front-side P-type heavily doped bias rings, and front-side P-type heavily doped protection rings; the back side of the high-resistivity silicon substrate 101 is formed by ion implantation to form back-side N-type heavily doped microstrips, back-side N-type heavily doped bias rings, and back-side N-type heavily doped protection rings.

[0062] In a preferred embodiment, the high-response double-sided silicon microstrip particle detector further includes a lightly doped isolation ring 109;

[0063] The lightly doped isolation ring 109 is disposed between the back micro-strip 106, the back bias ring 107 and the back protection ring 108.

[0064] As mentioned above, the lightly doped isolation ring 109 is a P-type lightly doped isolation ring 109. In this preferred embodiment, a P-type lightly doped isolation ring 109 is provided between the heavily doped N-type structures on the back side, which can effectively block the lateral leakage between adjacent N-type structures, eliminate the risk of short circuit, and further improve the electrical stability and radiation resistance of the device. At the same time, the preparation method of the present invention is fully compatible with existing semiconductor processes, which is conducive to achieving large-scale mass production.

[0065] Of course, the lightly doped isolation ring 109 is not only disposed between adjacent back micro-strips 106, between the back micro-strips 106 and the back bias ring 107, and between the back bias ring 107 and the back protection ring 108, but also, if there are multiple nested back protection rings 108, the lightly doped isolation ring 109 is also disposed between adjacent back protection rings 108, as can be seen from [reference]. Figure 3 .

[0066] In one specific embodiment, the junction depth of the lightly doped isolation ring 109 ranges from 100 nm to 150 nm, including endpoint values ​​such as any one of 100.0 nm, 122.4 nm, or 150.0 nm; the peak concentration of the doped surface of the lightly doped isolation ring 109 ranges from 1E18 / cm². 3 Up to 5E18 / cm 3 This includes endpoint values, such as 1.0E18 / cm. 3 3.0 E18 / cm 3 Or 5.0E18 / cm 3 Any one of the following; the width of a single lightly doped isolation ring 109 ranges from 8 micrometers to 10 micrometers, including endpoint values ​​such as any one of 8.0 micrometers, 9.1 micrometers, or 10.0 micrometers.

[0067] This specific embodiment defines the junction depth, peak concentration of the doped surface, and single-strip width parameters of the lightly doped isolation ring 109. Within the above parameter range, the lightly doped isolation ring 109 can form a stable and suitable isolation barrier, which not only ensures effective isolation of the adjacent heavily doped back structure and completely eliminates lateral leakage, but also avoids problems such as electric field distortion and reduced withstand voltage caused by improper isolation ring parameters, further optimizing the electrical performance and process controllability of the device.

[0068] In another preferred embodiment, the junction depth of the front microstrip 103, the front bias ring 104, and the front guard ring 105 ranges from 300 nm to 500 nm, including endpoint values ​​such as any one of 300.0 nm, 441.2 nm, or 500.0 nm; the peak concentration of the doped surface of the front microstrip 103, the front bias ring 104, and the front guard ring 105 ranges from 5E19 / cm². 3 Up to 1E20 / cm 3 This includes endpoint values, such as 5.0E19 / cm. 3 8.0E19 / cm 3 Or 1.0E20 / cm 3 Any one of them.

[0069] In this preferred embodiment, by limiting the junction depth and peak concentration of the doped surface of the front microstrip 103, the front bias ring 104, and the front guard ring 105, the front heavily doped structure, the high-resistivity silicon substrate 101, and the back heavily doped structure can form a high-performance PIN structure. At the same time, it forms a stable low-resistivity ohmic contact with the metal electrode, effectively reducing contact resistance and device dark current, improving the accuracy of signal transmission and the energy resolution of the detector, and ensuring stable operation of the device under reverse bias.

[0070] In another preferred embodiment, the junction depth of the backside microstrip 106, the backside bias ring 107, and the backside guard ring 108 ranges from 200 nm to 400 nm, including endpoint values ​​such as any one of 200.0 nm, 352.1 nm, or 400.0 nm; the peak concentration of the doped surface of the backside microstrip 106, the backside bias ring 107, and the backside guard ring 108 ranges from 1E20 / cm². 3 Up to 3E20 / cm 3 This includes endpoint values, such as 1E20 / cm 3 2.0 E20 / cm 3 Or 3.0E20 / cm 3 Any one of them.

[0071] In this preferred embodiment, by limiting the junction depth and peak concentration of the doped surface of the back microstrip 106, the back bias ring 107, and the back guard ring 108, a good PIN structure can be formed by the back heavily doped structure, the high-resistivity silicon substrate 101, and the front heavily doped structure, which has good depletion characteristics. That is, it can achieve full depletion of the silicon substrate in conjunction with the front structure, and at the same time form a stable low-resistivity ohmic contact with the metal electrode, effectively reducing the reverse leakage current of the device and improving the device stability and carrier drift collection efficiency under high reverse bias.

[0072] In one specific embodiment, the metal electrode is an aluminum electrode;

[0073] The thickness of the aluminum electrode ranges from 550 nanometers to 650 nanometers, including endpoint values ​​such as any one of 550.0 nanometers, 600.2 nanometers, or 650.0 nanometers.

[0074] In this specific embodiment, an aluminum electrode is used as the ohmic contact electrode, which can form a stable and low-resistance ohmic contact with the silicon-based heavily doped structure and is fully compatible with existing semiconductor mass production processes, reducing manufacturing costs. At the same time, the thickness range of the aluminum electrode is limited to 550nm-650nm, which avoids the problems of excessive sheet resistance and high signal transmission loss caused by an excessively thin electrode, and also avoids the problem of incident particle energy loss caused by an excessively thick electrode, thus balancing the conductivity of the electrode and the detection accuracy.

[0075] The front microstrip 103, the front bias ring 104, and the front protection ring 105 are all provided with aluminum ohmic contact metal electrodes, namely front microstrip electrode A, front bias ring electrode B, and front protection ring electrode C, respectively; wherein, the front microstrip electrode A and the front bias ring electrode B are set at the same potential and are loaded with a low potential during operation, while the front protection ring electrode C is suspended.

[0076] The back microstrip 106, the back bias ring 107, and the back protection ring 108 are all provided with aluminum ohmic contact metal electrodes, namely the back microstrip electrode D, the back bias ring electrode E, and the back protection ring electrode F, respectively. Among them, the back microstrip electrode D and the back bias ring electrode E are set at the same potential. When working, a high potential is applied to form a reverse bias voltage with the front electrode, so that the detector substrate is completely depleted. The back protection ring electrode F is suspended.

[0077] In a preferred embodiment, the insulating dielectric protective layer 102 is a composite passivation layer of undoped silicon glass layer and borosilicate glass layer;

[0078] The thickness of the insulating dielectric protective layer 102 ranges from 650 nanometers to 750 nanometers, including endpoint values ​​such as any one of 650.0 nanometers, 669.4 nanometers, or 750.0 nanometers.

[0079] In this preferred embodiment, undoped silicon glass and / or borosilicate glass are used as the insulating dielectric protective layer 102, which can form an excellent passivation effect on the silicon substrate surface, effectively reducing the surface state density and surface leakage current, while also possessing good insulation performance and semiconductor process compatibility. The thickness of the insulating dielectric protective layer 102 is limited to 650nm-750nm, which ensures sufficient insulation withstand voltage and long-term passivation protection effect, while avoiding the problems of increased electrode windowing process difficulty and poor step coverage caused by excessively thick dielectric layers, thus balancing device performance and high product yield.

[0080] Specifically, the spacing between adjacent front microstrips 103 and the spacing between adjacent back microstrips 106 range from 100 micrometers to 120 micrometers, including endpoint values ​​such as any one of 100.0 micrometers, 111.4 micrometers, or 120.0 micrometers; the width of a single front bias ring 104 and a single back bias ring 107 ranges from 0.15 millimeters to 0.20 millimeters, including endpoint values ​​such as any one of 0.150 millimeters, 0.199 millimeters, or 0.200 millimeters; the width of a single front protection ring 105 and a single back protection ring 108 ranges from 30 micrometers to 50 micrometers, including endpoint values ​​such as any one of 30.0 micrometers, 41.7 micrometers, or 50.0 micrometers.

[0081] This specific implementation further optimizes the electric field distribution inside the device by limiting the spacing between adjacent microstrips, the width of the bias ring, and the width of the guard ring. While ensuring the integration of the device, it further suppresses the concentration of electric field at the edges and improves the reverse breakdown voltage of the device. At the same time, the adapted microstrip spacing can effectively avoid signal crosstalk between adjacent microstrips, further improving the position resolution and signal acquisition accuracy of the detector.

[0082] Furthermore, the high-resistivity silicon substrate 101 includes a plurality of sequentially nested front protective rings 105 on the front side and a plurality of sequentially nested back protective rings 108 on the back side.

[0083] The spacing between each of the front protective rings 105 gradually decreases from the outside to the inside; the spacing between each of the back protective rings 108 gradually decreases from the outside to the inside.

[0084] The spacing between adjacent front protective rings 105 and the spacing between adjacent rear protective rings 108 are both in the range of 20 micrometers to 80 micrometers, including endpoint values ​​such as any one of 20.0 micrometers, 66.4 micrometers or 80.0 micrometers.

[0085] This preferred embodiment employs a multi-ring nested protection ring design, coupled with an unequal arrangement of protection rings with gradually decreasing spacing from the outside to the inside. This achieves gradual homogenization of the electric field at the device edge, suppresses the generation of electric field spikes, and significantly improves the device's reverse withstand voltage capability and radiation resistance. At the same time, limiting the spacing range of the protection rings allows for adaptation to the overall size design of the device, maximizing the optimization of the electric field distribution and reducing the risk of breakdown under high voltage without significantly increasing the device volume.

[0086] The high-response double-sided silicon microstrip particle detector provided by the present invention includes a high-resistivity silicon substrate 101, a front microstrip 103, a front bias ring 104, and a front protection ring 105 disposed on the front side of the high-resistivity silicon substrate 101, and a back microstrip 106, a back bias ring 107, and a back protection ring 108 disposed on the back side of the high-resistivity silicon substrate 101; the surfaces of the front microstrip 103, the front bias ring 104, the front protection ring 105, the back microstrip 106, the back bias ring 107, and the back protection ring 108 facing the outer side of the high-resistivity silicon substrate 101 are all provided with metal electrodes forming ohmic contacts; The non-metallic electrode areas on the front and back sides of the high-resistivity silicon substrate 101 are covered with an insulating dielectric protective layer 102; the front microstrips 103 and the back microstrips 106 are symmetrically arranged in parallel, and their positions correspond one-to-one; the front bias ring 104 surrounds the outside of the front microstrips 103, and the front protection ring 105 surrounds the outside of the front bias ring 104; the back bias ring 107 surrounds the outside of the back microstrips 106, and the back protection ring 108 surrounds the outside of the back bias ring 107; the width of a single front microstrip 103 and the back microstrip 106 ranges from 2.5 mm to 3 mm, including the endpoint values. This invention significantly increases the width of the microstrips on the front and back sides, thereby expanding the effective collection area of ​​charge carriers. Combined with the symmetrical parallel arrangement of the double-sided microstrips with one-to-one correspondence, it significantly improves the carrier collection efficiency of the detector under high-dose particle irradiation, solves the problems of low carrier collection efficiency and performance saturation under high-dose irradiation in the prior art, and significantly reduces the breakdown risk of the device under high reverse bias, improving the detector's withstand voltage and long-term working stability.

[0087] This invention also provides a method for fabricating a high-response double-sided silicon microstrip particle detector, and a flowchart of one specific embodiment is shown below. Figure 4 As shown, referred to as Specific Embodiment Two, the method for fabricating the high-response double-sided silicon microstrip particle detector is used to fabricate any of the high-response double-sided silicon microstrip particle detectors described above, comprising:

[0088] S101: Prepare a high-resistivity silicon substrate 101.

[0089] Of course, in this step, the high-resistivity silicon substrate can be cleaned using the 101 standard cleaning method first. Specifically, a 6-inch double-sided polishing process can be selected. <100> P-type high-resistivity silicon wafers with crystal orientation, resistivity of 10000Ω·cm, and thickness of 550μm are subjected to RCA standard cleaning to remove organic matter, metal impurities, and particulate contamination from the wafer surface. After cleaning, the wafer surface is first dried with high-purity nitrogen gas and then placed in an oven for drying.

[0090] Next, photolithographic markings are fabricated on the high-resistivity silicon substrate 101. Specifically, a silicon dioxide dielectric layer with a thickness of 700 nm is deposited on the front side of the cleaned silicon wafer using a PECVD process; photoresist is spin-coated on the front side of the wafer where the silicon dioxide dielectric layer has been grown, and a photolithographic marking pattern to be etched is formed through photolithography and development processes; the silicon dioxide dielectric layer is etched using a dry etching process, and a uniformly deep photolithographic alignment mark is formed by etching 50 nm. After etching, the photoresist is cleaned and removed.

[0091] S102: A type-1 heavily doped ion implantation is performed on the front side of the high-resistivity silicon substrate 101 to form a front microstrip 103, a front bias ring 104, and a front guard ring 105.

[0092] In this specific embodiment, "Type I" and "Type II" refer to N-doping or P-doping. Continuing the previous example, if the high-resistivity silicon substrate 101 is a P-type high-resistivity silicon wafer, then the Type I heavily doped ion implantation on the front side of the silicon wafer is equivalent to P-type heavily doped ion implantation. Specifically, the silicon wafer substrate is thermally oxidized to form a 50nm thick SiO2 ion implantation mask layer on both the front and back sides of the wafer; photoresist is spin-coated on the front side of the wafer, and a patterned window for the P-type heavily doped implantation region is formed through photolithography and development processes; boron ion implantation is performed using the photoresist as a mask, for example, with an implantation dose of 1E15 ions / cm. 2 The implantation energy is 80keV. After implantation, the photoresist is removed by cleaning, and the impurities are activated by high-temperature annealing, forming a P-type heavily doped microstrip structure, a bias ring structure, and a guard ring structure on the front side of the wafer.

[0093] S103: Using a double-sided overlay process, patterned type II heavily doped ion implantation is performed on the back side of the high-resistivity silicon substrate 101 to form a back microstrip 106, a back bias ring 107, and a back protection ring 108; wherein, the back microstrip 106 and the front microstrip 103 are arranged symmetrically and parallel to each other, and their positions correspond one-to-one.

[0094] Following the previous example, the type II heavy doping ion implantation in this step refers to the N-type heavy doping ion implantation performed on the back side of the silicon wafer. Photoresist is spin-coated onto the back side of the wafer, using a double-sided overlay process. Using the photolithographic markings on the front side as alignment references, a patterned window for the N-type heavy doping implantation region is formed through photolithography and development processes, ensuring that the implantation pattern is symmetrical and parallel to the P-type heavy doped structure on the front side, with a one-to-one correspondence in position. Phosphorus ion implantation is then performed using the photoresist as a mask, for example, with an implantation dose of 2E15 ions / cm². 2 The implantation energy is 100keV. After implantation, the photoresist is removed by cleaning, and the impurities are activated by high-temperature annealing, forming an N-type heavily doped microstrip structure, a bias ring structure, and a guard ring structure on the back of the wafer.

[0095] Of course, after this step, patterned P-type lightly doped ion implantation can be performed on the back side of the silicon wafer. Specifically, photoresist is spin-coated on the back side of the wafer, and a double-sided overlay process is used to form patterned windows of the P-type lightly doped implantation region through photolithography and development processes. The windows are located in the gaps between the N-type heavily doped structures. Boron ion implantation is then performed using the photoresist as a mask, for example, with an implantation dose of 3E14 ions / cm. 2 The injection energy is 30keV; after injection, the photoresist is removed by cleaning, and the impurities are activated by high-temperature annealing, forming a P-type lightly doped isolation ring 109 structure between the N-type heavily doped structures.

[0096] S104: Deposit insulating dielectric protective layers 102 on the front and back sides of the high-resistivity silicon substrate 101.

[0097] Following the previous example, in this step, surface passivation is performed by depositing an insulating dielectric protective layer 102. Specifically, a wet etching process can be used to remove the SiO2 ion implantation mask layer on the front and back surfaces of the wafer. Using an LPCVD process, a 50nm thick undoped silicon glass USG and a 650nm thick borosilicate glass BPSG are sequentially deposited on the front and back sides of the wafer to form an insulating dielectric protective layer 102 with a total thickness of 700nm. After deposition, the wafer is placed in an annealing furnace and subjected to a hot reflow process at 950℃ for 30 minutes to complete the surface passivation treatment.

[0098] S105: Electrode windows are made on the front side of the high-resistivity silicon substrate 101, and metal electrodes are provided at corresponding positions of the front microstrip 103, the front bias ring 104 and the front protection ring 105. Electrode windows are made on the back side of the high-resistivity silicon substrate 101, and metal electrodes are provided at corresponding positions of the back microstrip 106, the back bias ring 107 and the back protection ring 108.

[0099] Following the previous example, in this step, photoresist can be spin-coated on the front side of the wafer first, and a patterned window for the front contact electrode window can be formed through photolithography and development processes. Then, a dry etching process is used to etch the insulating dielectric protective layer 102 in the corresponding area until the underlying P-type heavily doped semiconductor region is exposed to form the front contact electrode window. After etching is completed, the photoresist is cleaned and removed.

[0100] Next, photoresist is spin-coated on the front side of the wafer, and a patterned structure of the front electrode is formed through photolithography and development processes. An electron beam evaporation deposition process is used to deposit a 600nm thick aluminum metal layer on the front side of the wafer. Through a chemical lift-off process, the metal and photoresist in the non-electrode areas are removed to form the front P-type microstrip electrode, bias ring electrode and guard ring electrode, thus completing the fabrication of the front ohmic contact electrode.

[0101] Next, using the same process as described above, photoresist is spin-coated on the back of the wafer. Through double-sided overlay, photolithography development, and dry etching, the N-type contact electrode window on the back is etched and formed. The photoresist is then cleaned and removed. Then, using the same process as described above, a 600nm thick aluminum metal layer is deposited on the back of the wafer through electron beam evaporation and chemical lift-off processes to form the N-type microstrip electrode, bias ring electrode, and guard ring electrode on the back, thus completing the fabrication of the back ohmic contact electrode.

[0102] After this, dicing and packaging can be performed. The prepared wafer is diced using a precision dicing machine to obtain individual detector chips. The chips are then packaged and soldered onto a dedicated PCB test board using a eutectic bonding process. The chip electrodes are then wire-bonded to the PCB board electrodes using a gold wire bonding process, thus completing the detector packaging and preparation.

[0103] Of course, the specific parameters in the explanation of each step above are just examples. In actual production, you can choose the corresponding parameters according to the actual situation.

[0104] The high-response double-sided silicon microstrip particle detector provided by the present invention involves preparing a high-resistivity silicon substrate 101; performing patterned type I heavily doped ion implantation on the front side of the high-resistivity silicon substrate 101 to form front microstrips 103, a front bias ring 104, and a front guard ring 105; and using a double-sided overlay process, performing patterned type II heavily doped ion implantation on the back side of the high-resistivity silicon substrate 101 to form back microstrips 106, a back bias ring 107, and a back guard ring 108; wherein, the back microstrips 106 and the front microstrips 104 are... The microstrips are arranged symmetrically and in parallel, with each position corresponding to the next. Insulating dielectric protective layers 102 are deposited on the front and back sides of the high-resistivity silicon substrate 101. Electrode windows are made on the front side of the high-resistivity silicon substrate 101, and metal electrodes are placed at corresponding positions on the front microstrips 103, the front bias ring 104, and the front protective ring 105. Electrode windows are also made on the back side of the high-resistivity silicon substrate 101, and metal electrodes are placed at corresponding positions on the back microstrips 106, the back bias ring 107, and the back protective ring 108. This invention significantly increases the width of the microstrips on the front and back sides, thereby expanding the effective carrier collection area. Combined with the symmetrical parallel arrangement of the double-sided microstrips and the strategy of multi-level protective ring termination, it significantly improves the carrier collection efficiency of the detector under high-dose particle irradiation, solving the problems of low carrier collection efficiency and performance saturation under high-dose irradiation in existing technologies. It also significantly reduces the breakdown risk of the device under high reverse bias, improving the detector's withstand voltage and long-term operational stability.

[0105] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.

[0106] It should be noted that in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0107] The high-response double-sided silicon microstrip particle detector and its fabrication method provided by this invention have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of this invention. It should be noted that those skilled in the art can make several improvements and modifications to this invention without departing from the principles of this invention, and these improvements and modifications also fall within the protection scope of this invention.

Claims

1. A high-response double-sided silicon microstrip particle detector, characterized in that, It includes a high-resistivity silicon substrate, a front microstrip, a front bias ring and a front protection ring disposed on the front side of the high-resistivity silicon substrate, and a back microstrip, a back bias ring and a back protection ring disposed on the back side of the high-resistivity silicon substrate. The front microstrip, the front bias ring, the front protection ring, the back microstrip, the back bias ring, and the back protection ring all have metal electrodes forming ohmic contacts on their outer surfaces facing the high-resistivity silicon substrate. The non-metallic electrode areas on the front and back sides of the high-resistivity silicon substrate are covered with an insulating dielectric protective layer. The front micro-strips and the back micro-strips are arranged symmetrically and parallel to each other, and their positions correspond one-to-one. The front bias ring surrounds the outside of the front micro strip, and the front protection ring surrounds the outside of the front bias ring; the back bias ring surrounds the outside of the back micro strip, and the back protection ring surrounds the outside of the back bias ring. The width of each individual microstrip on the front and the back is between 2.5 mm and 3 mm, including the endpoint values.

2. The high-response double-sided silicon microstrip particle detector as described in claim 1, characterized in that, It also includes a lightly doped isolation ring; The lightly doped isolation ring is disposed between the back microstrip, the back bias ring, and the back protection ring.

3. The high-response double-sided silicon microstrip particle detector as described in claim 2, characterized in that, The junction depth of the lightly doped isolation ring ranges from 100 nanometers to 150 nanometers, including the endpoint values; The peak concentration of the doped surface of the lightly doped isolation ring is in the range of 1E18 / cm. 3 Up to 5E18 / cm 3 This includes endpoint values; The width of a single lightly doped isolation ring ranges from 8 micrometers to 10 micrometers, including the endpoint values.

4. The high-response double-sided silicon microstrip particle detector as described in claim 1, characterized in that, The junction depth of the front microstrip, the front bias ring, and the front protection ring ranges from 300 nanometers to 500 nanometers, including the endpoint values. The peak concentration range of the doped surfaces of the front microstrip, the front bias ring, and the front guard ring is 5E19 / cm². 3 Up to 1E20 / cm 3 This includes endpoint values.

5. The high-response double-sided silicon microstrip particle detector as described in claim 1, characterized in that, The junction depth of the back microstrip, the back bias ring, and the back protection ring ranges from 200 nanometers to 400 nanometers, including the endpoint values; The peak concentration range of the doped surfaces of the backside microstrip, the backside bias ring, and the backside protection ring is 1E20 / cm². 3 Up to 3E20 / cm 3 This includes endpoint values.

6. The high-response double-sided silicon microstrip particle detector as described in claim 1, characterized in that, The metal electrode is an aluminum electrode; The thickness of the aluminum electrode ranges from 550 nanometers to 650 nanometers, including the endpoint values.

7. The high-response double-sided silicon microstrip particle detector as described in claim 1, characterized in that, The insulating dielectric protective layer is a composite passivation layer consisting of an undoped silicon glass layer and a borosilicate glass layer. The thickness of the insulating dielectric protective layer ranges from 650 nanometers to 750 nanometers, including the endpoint values.

8. The high-response double-sided silicon microstrip particle detector as described in claim 1, characterized in that, The spacing between adjacent front microstrips and the spacing between adjacent back microstrips range from 100 micrometers to 120 micrometers, including endpoint values; And / or, the width of each of the single front bias rings and the single back bias rings ranges from 0.15 mm to 0.20 mm, including the endpoint values; And / or, the width of each of the single front protective rings and the single rear protective rings ranges from 30 micrometers to 50 micrometers, including the endpoint values.

9. The high-response double-sided silicon microstrip particle detector according to any one of claims 1 to 8, characterized in that, The high-resistivity silicon substrate has multiple nested front protective rings on the front side and multiple nested back protective rings on the back side. The spacing between each of the front protective rings gradually decreases from the outside to the inside; the spacing between each of the back protective rings also gradually decreases from the outside to the inside. The spacing between adjacent front protective rings and the spacing between adjacent back protective rings both range from 20 micrometers to 80 micrometers, including the endpoint values.

10. A method for fabricating a high-response double-sided silicon microstrip particle detector, characterized in that, The method for fabricating the high-response double-sided silicon microstrip particle detector is used to fabricate the high-response double-sided silicon microstrip particle detector as described in any one of claims 1 to 9, comprising: Prepare a high-resistivity silicon substrate; A patterned type I heavily doped ion implantation is performed on the front side of the high-resistivity silicon substrate to form front-side microstrips, a front-side bias ring, and a front-side protection ring. A double-sided overlay process is used to implant patterned type II heavily doped ions on the back side of the high-resistivity silicon substrate to form back microstrips, a back bias ring, and a back protection ring; wherein the back microstrips are arranged symmetrically and parallel to the front microstrips, and their positions correspond one-to-one. An insulating dielectric protective layer is deposited on the front and back sides of the high-resistivity silicon substrate; Electrode windows are made on the front side of the high-resistivity silicon substrate, and metal electrodes are disposed at corresponding positions of the front microstrip, the front bias ring, and the front protection ring. Electrode windows are also made on the back side of the high-resistivity silicon substrate, and metal electrodes are disposed at corresponding positions of the back microstrip, the back bias ring, and the back protection ring.

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