Process for manufacturing a crystalline silicon solar cell, crystalline silicon solar cell, module and photovoltaic system

Abstract

This application belongs to the field of photovoltaic technology and provides a process method for manufacturing crystalline silicon solar cells, crystalline silicon solar cells, cell modules, and photovoltaic systems. The process method uses N-type silicon wafers with minority carrier lifetime ≤4000μs and resistivity ≥4Ω·cm to form the cell. The passivation layer and / or antireflection layer on the light-receiving and / or non-light-receiving surfaces of the cell are hydrogen-rich layers. The silicon wafer in the cell is then subjected to hydrogen-rich passivation treatment using this hydrogen-rich layer. A UV-blocking film layer is then formed on the light-receiving side to obtain the crystalline silicon solar cell. The hydrogen-rich passivation treatment allows hydrogen to penetrate and disperse into the silicon wafer, combining with metal impurities, thereby effectively improving the minority carrier lifetime of silicon in the cell. Furthermore, the UV-blocking film layer on the light-receiving surface effectively suppresses UV-induced degradation and improves hydrogen passivation stability, thus enabling the fabrication of crystalline silicon solar cells with excellent photoelectric performance and good stability from silicon wafers with low minority carrier lifetimes.

Description

Technical Field

[0001] This application belongs to the field of photovoltaic technology and relates to a process for manufacturing crystalline silicon solar cells, crystalline silicon solar cells, cell modules and photovoltaic systems. Background Technology

[0002] Monocrystalline silicon, due to its high crystal quality, low defect density, and excellent photoelectric conversion efficiency, has become the mainstream material for high-efficiency photovoltaic cells. Currently, the industrial process mainly uses the Repeated Czochralski (RCZ) method for silicon single crystal growth. This method significantly improves production efficiency and reduces unit costs by repeatedly feeding and pulling multiple crystal rods in a single batch. However, as the number of crystal pulling cycles increases, transition metal impurities (such as Fe, Cr, Ni, etc.) in the silicon melt in the crucible accumulate due to the inability to effectively remove them. These bulk metal impurities enter the silicon lattice during crystal growth, forming recombination centers that significantly reduce minority carrier lifetime. In subsequent batches, they may even fail to meet the basic requirements for minority carrier lifetime in high-efficiency cells, making them unsuitable for high-performance photovoltaic device production, resulting in material waste and yield loss. Summary of the Invention

[0003] In view of the problems existing in the prior art, the purpose of this application is to provide a process method for manufacturing crystalline silicon solar cells, crystalline silicon solar cells, cell modules and photovoltaic systems, which can realize the manufacture of high-performance and high-stability photovoltaic products using N-type silicon wafers with low minority carrier lifetime.

[0004] To achieve this objective, the following technical solution is adopted in this application: In a first aspect, this application provides a process method for manufacturing crystalline silicon solar cells, the process method comprising: We provide N-type silicon wafers with minority carrier lifetime ≤4000μs and resistivity ≥4Ω·cm; The N-type silicon wafer is fabricated into a solar cell, the solar cell having opposing light-receiving and non-light-receiving surfaces; the process of fabricating the solar cell includes the step of forming a passivation layer and / or an anti-reflection layer on the light-receiving side and / or the non-light-receiving side, and the passivation layer and / or anti-reflection layer on at least one side is a hydrogen-rich layer; The hydrogen-rich layer is used to perform hydrogen-rich passivation treatment on the N-type silicon wafer in the battery cell. A UV-blocking adhesive film layer is formed on the light-receiving side of the solar cell after hydrogen-rich passivation treatment to obtain a crystalline silicon solar cell.

[0005] This application uses N-type silicon wafers with minority carrier lifetime ≤4000μs to fabricate solar cells, and makes at least one of the front passivation layer, front antireflection layer, back passivation layer, or back antireflection layer in the solar cell a hydrogen-rich layer; the N-type silicon wafer in the solar cell is subjected to hydrogen-rich passivation treatment using this hydrogen-rich layer; and then a UV cutoff film layer is formed on the light-receiving side to obtain a crystalline silicon solar cell. The hydrogen-rich passivation treatment allows hydrogen to effectively penetrate and disperse into the N-type silicon wafer and combine with metal impurities, achieving a sufficient hydrogen passivation effect on the N-type silicon wafer, thereby effectively improving the minority carrier lifetime of silicon in the solar cell; and by combining the UV cutoff film layer to suppress UV-induced degradation and improve hydrogen passivation stability, the N-type silicon wafer with low minority carrier lifetime can be used to fabricate crystalline silicon solar cells with excellent photoelectric performance and good stability.

[0006] The following are preferred technical solutions of this application, but are not intended to limit the technical solutions provided in this application. The technical objectives and beneficial effects of this application can be better achieved through the following technical solutions.

[0007] As a preferred technical solution of this application, the minority carrier lifetime of the N-type silicon wafer is 1500μs~4000μs before it is made into a solar cell.

[0008] And / or, the N-type silicon wafer is monocrystalline silicon, and the total concentration of metal impurities in the N-type silicon wafer is ≥200ppbw.

[0009] And / or, after the hydrogen-rich passivation treatment, the minority carrier lifetime of the N-type silicon wafer in the solar cell is >4000 μs.

[0010] And / or, after the hydrogen-rich passivation treatment, the hydrogen concentration in the N-type silicon wafer of the solar cell is 1 × 10⁻⁶. 15 cm -3 ~5×10 21 cm -3 .

[0011] As a preferred technical solution of this application, the process of manufacturing the battery cell includes the step of forming a front passivation layer and / or a front antireflection layer on the light-receiving surface, and the step of forming a back passivation layer and / or a back antireflection layer on the non-light-receiving surface; and at least one of the front passivation layer, the front antireflection layer, the back passivation layer, or the back antireflection layer is the hydrogen-rich layer.

[0012] And / or, the front passivation layer, the front antireflection layer, the back passivation layer, or the back antireflection layer each independently include AlO. x SiN x or SiN x O y At least one of them.

[0013] As a preferred technical solution in this application, AlO is prepared... x The method includes ALD and satisfies at least one of the following conditions: A1, the AlO x When the layer is not hydrogen-rich, the temperature of ALD is T1, T1 = 200℃~300℃; the number of cycles is N1, N1 = 20 cycles~80 cycles; and the growth rate is 0.10 nm / cycle~0.14 nm / cycle.

[0014] A2, the AlO x When the layer is hydrogen-rich, the oxygen source used by ALD includes H2O, the temperature of ALD is T1', T1' = T1 + 20℃ ~ 60℃; the number of cycles is N1', N1' = N1 + 3 cycles ~ 6 cycles.

[0015] A3, the AlO x When it is a hydrogen-rich layer, before the hydrogen-rich passivation treatment, AlO x The hydrogen concentration in AlO is 2 at.% to 6 at.%; after the hydrogen-rich passivation treatment, AlO x The hydrogen concentration in it is <4 at..

[0016] As a preferred technical solution in this application, SiN is prepared. x The method includes PECVD and satisfies at least one of the following conditions: B1, the SiN x When the layer is not hydrogen-rich, the temperature of PECVD is T2, where T2 = 250℃~450℃; the flow rate of the silicon source used in PECVD is V1, where V1 = 200 sccm~2000 sccm, and the flow rate of the nitrogen source used is V2, where V2 = 1000 sccm~15000 sccm.

[0017] B2, the SiN x When the hydrogen-rich layer is used, the PECVD temperature is T2', where T2' = T2 - 10℃ ~ 30℃; the silicon source used in PECVD includes SiH4 and / or the nitrogen source used includes NH3; the flow rate of SiH4 is V1', where V1' = V1 + 300 sccm ~ 600 sccm, and / or the flow rate of NH3 is V2', where V2' = V2 + 1500 sccm ~ 6000 sccm.

[0018] B3, the SiN x When it is a hydrogen-rich layer, before the hydrogen-rich passivation treatment, SiN x The hydrogen concentration in it is 8×10 22 cm -3 ~9×10 23 cm -3After the hydrogen-rich passivation treatment, SiN x Hydrogen concentration < 3 × 10 23 cm -3 .

[0019] As a preferred technical solution in this application, SiN is prepared. x O y The method includes PECVD and satisfies at least one of the following conditions: C1, the SiN x O y When the layer is not hydrogen-rich, the temperature of PECVD is T3, T3 = 400℃~600℃; the flow rate of the silicon source used in PECVD is V3, V3 = 200sccm~600sccm, and the flow rate of the nitrogen source used is V4, V4 = 1000sccm~6000sccm.

[0020] C2, the SiN x O y When the hydrogen-rich layer is used, the PECVD temperature is T3', where T3' = T3 - 10℃ ~ 30℃; the silicon source used in PECVD includes SiH4 and / or the nitrogen source used includes NH3; the flow rate of SiH4 is V3', where V3' = V3 + 300 sccm ~ 600 sccm, and / or the flow rate of NH3 is V4', where V4' = V4 + 1500 sccm ~ 6000 sccm.

[0021] C3, the SiN x O y When it is a hydrogen-rich layer, before the hydrogen-rich passivation treatment, SiN x O y The hydrogen concentration in it is 8×10 22 cm -3 ~9×10 23 cm -3 After the hydrogen-rich passivation treatment, SiN x O y Hydrogen concentration < 3 × 10 23 cm -3 .

[0022] As a preferred technical solution of this application, the hydrogen-rich passivation process includes: heat-treating the battery cell at 200℃~400℃ for 20min~60min under the protection of an inert atmosphere.

[0023] As a preferred technical solution of this application, the UV-blocking adhesive film layer includes a basic component and a UV absorber.

[0024] And / or, the base components include EVA (ethylene-vinyl acetate copolymer) and / or POE (polyolefin elastomer).

[0025] And / or, the ultraviolet absorber includes benzotriazole absorbers and / or benzophenone absorbers.

[0026] And / or, the mass percentage of the ultraviolet absorber in the UV-blocking film is 0.1% to 1%.

[0027] As a preferred technical solution of this application, the method for preparing the UV cutoff adhesive film layer includes preparing a UV cutoff adhesive film slurry, applying it and curing it to obtain a UV cutoff adhesive film layer.

[0028] And / or, the thickness of the wet film formed after the UV cutoff adhesive slurry is 0.02mm~0.2mm.

[0029] And / or, after curing, the thickness of the UV-blocking adhesive film layer is 10μm~80μm.

[0030] Secondly, this application provides a crystalline silicon solar cell obtained according to the process method described in the first aspect.

[0031] Thirdly, this application provides a battery string including crystalline silicon solar cells as described in the second aspect.

[0032] Fourthly, this application provides a battery assembly including a crystalline silicon solar cell as described in the second aspect or a battery string as described in the third aspect.

[0033] Fifthly, this application provides a photovoltaic system including a battery module as described in the fourth aspect.

[0034] Compared with existing technical solutions, this application has at least the following beneficial effects: The manufacturing process for crystalline silicon solar cells provided in this application uses N-type silicon wafers with minority carrier lifetime ≤4000μs and resistivity ≥4Ω·cm to form solar cells. At least one of the front passivation layer, front antireflection layer, back passivation layer, or back antireflection layer in the solar cell is a hydrogen-rich layer. This hydrogen-rich layer is used to perform hydrogen-rich passivation treatment on the N-type silicon wafer. A UV-blocking film layer is then formed on the light-receiving side, thereby obtaining a crystalline silicon solar cell. The hydrogen-rich passivation treatment allows hydrogen to effectively penetrate and disperse into the N-type silicon wafer and combine with metal impurities, achieving a sufficient hydrogen passivation effect on the N-type silicon wafer, thus effectively improving the minority carrier lifetime of silicon in the solar cell. Furthermore, the UV-blocking film layer suppresses UV-induced degradation and improves hydrogen passivation stability, enabling the fabrication of crystalline silicon solar cells with excellent photoelectric performance and good stability from N-type silicon wafers with low minority carrier lifetimes. This process enables the large-scale industrial use of N-type silicon wafers with low minority carrier lifetime, effectively improving the utilization rate of N-type silicon wafers, improving the yield of N-type silicon wafer production or silicon ingot production, and effectively reducing costs, thus having practical economic benefits. Attached Figure Description

[0035] Figure 1 This is a schematic diagram of the process method for manufacturing crystalline silicon solar cells provided in the embodiments of this application.

[0036] Figure 2 This is a graph showing the variation of minority carrier lifetime in different crystal rods during the continuous Czochralski process for producing single-crystal silicon.

[0037] Figure 3 This is a graph showing the conversion efficiency of solar cells formed from N-type silicon wafers with different low minority carrier lifetimes in Example 1.

[0038] Figure 4 This is a graph showing the conversion efficiency of solar cells formed from N-type silicon wafers with different high minority carrier lifetimes in control group 1. Detailed Implementation

[0039] The technical solution of this application will be further described below through specific embodiments. Obviously, the described embodiments are only a part of the embodiments of this application, not all of them. Therefore, the detailed description of the embodiments of this application provided below is not intended to limit the scope of the claimed application, but merely represents selected embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0040] In the description of this application, it should be noted that the terms "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of the invention is in use. They are used only for the convenience of describing this application and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance. In the description of this application, unless otherwise stated, "a plurality of" means two or more.

[0041] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0042] In this embodiment, the term "and / or" is merely a description of the relationship between associated objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this application generally indicates that the preceding and following associated objects have an "or" relationship.

[0043] To achieve the manufacturing of high-performance and highly stable photovoltaic products using N-type silicon wafers with low minority carrier lifetimes, this application provides a process method for manufacturing crystalline silicon solar cells in one or more embodiments, such as... Figure 1 As shown, the process includes: S10 provides N-type silicon wafers (or silicon substrates) with minority carrier lifetime ≤4000μs and resistivity ≥4Ω·cm. N-type is the conductive doping type, the opposite of P-type.

[0044] The process method of this application can be used to manufacture solar cells using N-type silicon wafers with minority carrier lifetime ≤4000μs and resistivity ≥4Ω·cm. For example, the minority carrier lifetime can be 4000μs, 3800μs, 3500μs, 3300μs, 3000μs, 2800μs, 2500μs, 2200μs, 2000μs, 1800μs or 1500μs, etc., preferably 1500μs~4000s; the resistivity can be 4Ω·cm, 8Ω·cm, 10Ω·cm, 13Ω·cm, 15Ω·cm, 18Ω·cm, 20Ω·cm, 23Ω·cm, 25Ω·cm or 28Ω·cm, etc.

[0045] Minority carrier lifetime, or minority carrier lifespan, is a core physical parameter for evaluating the quality of N-type silicon wafers and their photovoltaic performance. Under illumination or electrical injection conditions, N-type silicon wafers generate additional electron-hole pairs (i.e., non-equilibrium carriers) beyond thermal equilibrium. For P-type silicon, holes are majority carriers, and electrons are minority carriers; for N-type silicon, the opposite is true. Minority carrier lifetime refers to the average survival time of these non-equilibrium minority carriers from their generation to their disappearance through recombination. The unit is typically microseconds (μs) or milliseconds (ms). Minority carrier lifetime directly reflects the strength of carrier recombination within the N-type silicon wafer and is crucial in determining photovoltaic cell efficiency. For example, a longer minority carrier lifetime results in a higher non-equilibrium carrier concentration and a higher open-circuit voltage (Voc). Furthermore, a longer lifetime means that photogenerated carriers are more likely to be collected by the electrodes rather than recombine within the wafer, thus increasing the short-circuit current (Isc) and fill factor (FF). Minority carrier lifetime is affected by the intrinsic properties of silicon materials. In particular, metallic impurities in silicon materials become the most important and fatal recombination centers. Therefore, when the content of metallic impurities increases, the minority carrier lifetime decreases.

[0046] In practical manufacturing and applications, the impact of metallic impurities on minority carrier lifetime is particularly evident in single-crystal silicon grown using the Repeated Czochralski (RCz) method. Currently, the main growth method for single-crystal silicon is the RCz continuous Czochralski method, which produces crystal rods one by one by adding material multiple times in a single furnace cycle; for example... Figure 2As shown, R1 to R6 represent the first to sixth ingots produced in this furnace; the final ingot represents the last ingot produced in this furnace. Before the last ingot is produced, each ingot does not consume all the molten material in the furnace at the end, i.e., the percentage of crystallization on the horizontal axis represents the proportion of molten material consumed in the furnace. Before producing the next ingot, new raw materials need to be added to the furnace to form sufficient molten material before production can begin. As a result, as the number of ingots produced increases, the metal enrichment in the silicon melt gradually increases, and the bulk metal content grown into the ingot is also higher, leading to a decreasing trend in the minority carrier lifetime of silicon single crystals. When the concentration of metal impurities in the ingot is too high, making single crystal silicon with a low minority carrier lifetime ≤4000μs unusable for making N-type silicon wafers to produce solar cells, the processes already completed and the products produced will be wasted, resulting in increased energy consumption and costs. However, by using the process method of this application to achieve the industrial application of N-type silicon wafers with low minority carrier lifetimes, the yield of ingot RCz production can be improved by at least 5%.

[0047] Therefore, this application is particularly targeted at these N-type silicon wafers, that is, in some specific embodiments, the N-type silicon wafer is monocrystalline silicon, and the total concentration of metal impurities in the N-type silicon wafer is ≥200 ppbw. Exemplarily, the total concentration of metal impurities can be 200 ppbw, 210 ppbw, 230 ppbw, 300 ppbw, 350 ppbw, 450 ppbw, 600 ppbw, or 800 ppbw, etc. ppbw represents a mass fraction of one part per million.

[0048] It should be noted that the minority carrier lifetime of the N-type silicon wafer in this application refers to the minority carrier lifetime obtained by testing the silicon ingot. However, the minority carrier lifetime of the N-type silicon wafer in a separately specified solar cell refers to the minority carrier lifetime obtained after hydrogen-rich passivation treatment. As a further example, the minority carrier lifetime of the aforementioned N-type silicon wafer can be tested using methods such as microwave photoconductivity decay (μ-PCD), quasi-steady-state photoconductivity (QSSPC), transient photoconductivity decay (PCD), or transient photoluminescence (TRPL) on the silicon ingot or the resulting solar cell. Considering the need to test low minority carrier lifetimes, it is preferable to use instruments and methods with high sensitivity and accuracy. To achieve testing of the N-type silicon wafer in the solar cell, it is preferable to use non-contact instruments and methods.

[0049] As a further example, metallic impurities in crystal rods or N-type silicon wafers can be detected by methods such as secondary ion mass spectrometry (SIMS), deep level transient spectroscopy (DLTS), and inductively coupled plasma mass spectrometry (ICP-MS).

[0050] S20. An N-type silicon wafer is fabricated into a solar cell, the solar cell having opposing light-receiving and non-light-receiving surfaces; the process of fabricating the solar cell includes the step of forming a passivation layer and / or an anti-reflection layer on the light-receiving side and / or the non-light-receiving side, and at least one of the passivation layer and / or anti-reflection layer is a hydrogen-rich layer.

[0051] To achieve high-performance and high-stability photovoltaic products using N-type silicon wafers with low minority carrier lifetimes, this application selects to set the necessary functional layers (referring to the aforementioned passivation layer and / or antireflection layer) in crystalline silicon solar cells as thin films with hydrogen storage capabilities, i.e., hydrogen-rich layers. Subsequently, by combining the deposition of the hydrogen-rich layer with thermal treatment processes, hydrogen passivation of internal and interface defects in the silicon mass can be achieved while simultaneously completing passivation and / or antireflection functions. Choosing these passivation layers and / or antireflection layers, which are inherent to the cell's structure, reduces the cumbersome and complex processes associated with introducing additional hydrogen-rich passivation sacrificial layers (which require separate fabrication and removal). Furthermore, the passivation and antireflection layers cover a large area of ​​the N-type silicon wafer and can be applied to both the front and back sides (referring to the light-receiving and non-light-receiving sides), achieving a more thorough and uniform hydrogen-rich passivation effect. Therefore, in some embodiments, hydrogen-rich layers are provided on both the front and back sides of the N-type silicon wafer. Meanwhile, using passivation and antireflection layers as hydrogen-rich layers makes it easier to adjust and control the hydrogen content and other film properties during preparation, making it compatible with existing processes and production lines.

[0052] It is understood that, apart from the passivation layer and / or antireflection layer mentioned above, this application does not limit other structural features on the light-receiving surface and the non-light-receiving surface of the crystalline silicon solar cell. For example, the front side of the N-type silicon wafer can be texturized, and the back side of the N-type silicon wafer can be configured with the structure or arrangement of the contact area (including the P-region and the N-region) and the passivation area as needed.

[0053] Furthermore, in some embodiments, the process of fabricating the battery cell includes the steps of forming a front passivation layer and / or a front antireflection layer on the light-receiving surface, and also includes the steps of forming a back passivation layer and / or a back antireflection layer on the non-light-receiving surface; and at least one of the front passivation layer, the front antireflection layer, the back passivation layer, or the back antireflection layer is a hydrogen-rich layer.

[0054] It is also understood that the passivation layer and / or antireflection layer in this application can be selected from commonly used material layers or combinations thereof, depending on design requirements and process matching. For example, in some embodiments, the front passivation layer, the front antireflection layer, the back passivation layer, or the back antireflection layer each independently include AlO₂. x (alumina), SiN x (Silicon nitride) or SiN x O y At least one of (silicon oxynitride).

[0055] Of course, the passivation layer and antireflection layer can also be prepared using methods commonly used in the art. However, considering that hydrogen passivation is to be performed on N-type silicon wafers with high metal impurity content and low minority carrier lifetime, the hydrogen content in the passivation layer and antireflection layer should be appropriately increased so that sufficient hydrogen can combine more deeply and uniformly with more metal impurities, thereby achieving a deeper and more sufficient hydrogen passivation effect on the N-type silicon wafer.

[0056] Thus, by way of example, in some embodiments, the passivation layer and / or antireflection layer includes AlO. x When preparing AlO x The method includes ALD and satisfies at least one of the following conditions: A1, AlO x When the layer is not hydrogen-rich, the ALD temperature is T1, T1 = 200℃~300℃; the number of cycles is N1, N1 = 20 cycles~80 cycles; and the growth rate is 0.10 nm / cycle~0.14 nm / cycle. Therefore, AlO x It has high growth quality and good passivation effect.

[0057] For example, T1 can be 200℃, 220℃, 240℃, 260℃, 280℃ or 300℃, etc.; N1 can be 20cycle, 30cycle, 40cycle, 50cycle, 60cycle, 70cycle or 80cycle, etc.

[0058] A2, AlO x When the Al2O3 layer is hydrogen-rich, the oxygen source used for the Al2O3 layer includes H2O (used to provide hydrogen and regulate the hydrogen content). The temperature of the Al2O3 layer is T1', where T1' = T1 + 20℃ to 60℃; the number of cycles is N1', where N1' = N1 + 3 cycles to 6 cycles. Therefore, increasing the temperature and the number of cycles is beneficial for Al2O3 as a hydrogen-rich layer. x The hydrogen content is effectively increased compared to when it is not a hydrogen-rich layer, better supporting the hydrogen passivation effect on subsequent N-type silicon wafers, without affecting AlO. x Its own growth quality and passivation effect.

[0059] For example, the difference between T1' and T can be 20℃, 30℃, 40℃, 50℃ or 60℃, etc.; the difference between N1' and N1 can be 3 cycles, 4 cycles, 5 cycles or 6 cycles, etc.

[0060] A3, AlO x When it is a hydrogen-rich layer, before hydrogen-rich passivation treatment, AlO xThe hydrogen concentration in AlO is 2 at.% to 6 at.% (atomic percentage), for example, it can be 2 at.%, 3 at.%, 4 at.%, 5 at.%, or 6 at.%, etc.; after hydrogen-rich passivation treatment, AlO x The hydrogen concentration in the solution is <4 at.%, and can be, for example, 1 at.%, 2 at.%, 3 at.%, or 3.8 at.%, etc. It is understood that in the freshly prepared AlO₂ layer forming the hydrogen-rich layer... x At that time, its hydrogen content was relatively high, which was beneficial for supporting the hydrogen passivation effect of subsequent N-type silicon wafers; however, with the implementation of hydrogen-rich passivation treatment, the hydrogen was transferred for hydrogen passivation, and AlO x The hydrogen content in AlO will decrease. Furthermore, after hydrogen-rich passivation treatment, the hydrogen content in AlO will decrease. x A hydrogen concentration of ≥1 at.% in the film is beneficial for passivating the dangling bonds of the film itself and the silicon interface, thereby improving the interface state and bonding.

[0061] In some embodiments, SiN is prepared x The method includes PECVD and satisfies at least one of the following conditions: B1, SiN x When the layer is not hydrogen-rich, the PECVD temperature is T2, where T2 = 250℃~450℃; the flow rate of the silicon source used in PECVD is V1, where V1 = 200 sccm~2000 sccm, and the flow rate of the nitrogen source used is V2, where V2 = 1000 sccm~15000 sccm. Therefore, SiN... x It has high growth quality and good passivation and anti-reflection effects.

[0062] For example, T2 can be 250℃, 280℃, 300℃, 330℃, 350℃, 380℃, 400℃, 420℃, or 450℃, etc.; V1 can be 200sccm, 300sccm, 500sccm, 800sccm, 1000sccm, 1200sccm, 1500sccm, 1800sccm, or 2000sccm, etc.; V2 can be 1000sccm, 3000sccm, 5000sccm, 8000sccm, 10000sccm, 12000sccm, or 15000sccm, etc.

[0063] B2, SiN xWhen the layer is hydrogen-rich, the PECVD temperature is T2', where T2' = T2 - 10℃ to 30℃; the silicon source used in PECVD includes SiH4 (to provide hydrogen and adjust the hydrogen content) and / or the nitrogen source includes NH3 (to provide hydrogen and adjust the hydrogen content); the flow rate of SiH4 is V1', where V1' = V1 + 300 sccm to 600 sccm, and / or the flow rate of NH3 is V2', where V2' = V2 + 1500 sccm to 6000 sccm. Therefore, lowering the temperature and increasing the flow rate of the hydrogen source is beneficial for SiN as a hydrogen-rich layer. x The hydrogen content is effectively increased compared to when it is not a hydrogen-rich layer, better supporting the hydrogen passivation effect on subsequent N-type silicon wafers, without affecting SiN. x Its own growth material, passivation and anti-reflection effects.

[0064] For example, the difference between T2 and T2' can be 10℃, 15℃, 20℃, 25℃ or 30℃, etc.; the difference between V1' and V1 can be 300sccm, 350sccm, 400sccm, 450sccm, 500sccm, 550sccm or 600sccm, etc.; the difference between V2' and V2 can be 1500sccm, 2000sccm, 2500sccm, 3000sccm, 3500sccm, 4000sccm, 4500sccm, 5000sccm, 5500sccm or 6000sccm, etc.

[0065] B3, SiN x When it is a hydrogen-rich layer, before hydrogen-rich passivation treatment, SiN x The hydrogen concentration in it is 8×10 22 cm -3 ~9×10 23 cm -3 For example, it can be 8×10 22 cm -3 1×10 23 cm -3 3×10 23 cm -3 5×10 23 cm -3 7×10 23 cm -3 Or 9×10 23 cm -3 etc.; After hydrogen-rich passivation treatment, SiN x Hydrogen concentration < 3 × 10 23 cm -3 For example, it could be 1×10 21 cm -3 5×10 21 cm-3 1×10 22 cm -3 5×10 22 cm -3 1×10 23 cm -3 Or 3×10 23 cm -3 And so on. It is understandable that in the newly prepared SiN₂ with its hydrogen-rich layer formed... x At that time, its hydrogen content was relatively high, which was beneficial for supporting the hydrogen passivation effect of subsequent N-type silicon wafers; and with the implementation of hydrogen-rich passivation treatment, the hydrogen was transferred for hydrogen passivation, SiN x The hydrogen content in SiN will decrease. Furthermore, after hydrogen-rich passivation treatment, the hydrogen content in SiN... x Hydrogen concentration > 5 × 10 19 cm -3 This is beneficial for passivating the dangling bonds of the thin film itself and the silicon interface, thereby improving the interface state and bonding.

[0066] As a preferred technical solution in this application, SiN is prepared. x O y The method includes PECVD and satisfies at least one of the following conditions: C1, SiN x O y When the layer is not hydrogen-rich, the PECVD temperature is T3, where T3 = 400℃~600℃; the flow rate of the silicon source used in PECVD is V3, where V3 = 200 sccm~600 sccm, and the flow rate of the nitrogen source used is V4, where V4 = 1000 sccm~6000 sccm. Therefore, SiN... x O y It has high growth quality and good passivation and anti-reflection effects.

[0067] For example, T3 can be 400℃, 430℃, 450℃, 500℃, 540℃, 550℃, 580℃ or 600℃, etc.; V3 can be 200sccm, 300sccm, 400sccm, 500sccm or 600sccm, etc.; V4 can be 1000sccm, 2000sccm, 3000sccm, 4000sccm, 5000sccm or 6000sccm, etc.

[0068] C2, SiN x O yWhen the hydrogen-rich layer is used, the PECVD temperature is T3', where T3' = T3 - 10℃ to 30℃; the silicon source used in PECVD includes SiH4 and / or the nitrogen source includes NH3; the SiH4 flow rate is V3', where V3' = V3 + 300 sccm to 600 sccm, and / or the NH3 flow rate is V4', where V4' = V4 + 1500 sccm to 6000 sccm. Therefore, lowering the temperature and increasing the hydrogen source flow rate is beneficial for SiN as a hydrogen-rich layer. x O y The hydrogen content is effectively increased compared to when it is not a hydrogen-rich layer, better supporting the hydrogen passivation effect on subsequent N-type silicon wafers, without affecting SiN. x O y Its own growth material, passivation and anti-reflection effects.

[0069] For example, the difference between T3 and T3' can be 10℃, 15℃, 20℃, 25℃ or 30℃, etc.; the difference between V3' and V3 can be 300sccm, 350sccm, 400sccm, 450sccm, 500sccm, 550sccm or 600sccm, etc.; the difference between V4' and V4 can be 1500sccm, 2000sccm, 2500sccm, 3000sccm, 3500sccm, 4000sccm, 4500sccm, 5000sccm, 5500sccm or 6000sccm, etc.

[0070] C3, SiN x O y When it is a hydrogen-rich layer, before hydrogen-rich passivation treatment, SiN x O y The hydrogen concentration in it is 8×10 22 cm -3 ~9×10 23 cm -3 For example, it can be 8×10 22 cm -3 1×10 23 cm -3 3×10 23 cm -3 5×10 23 cm -3 7×10 23 cm -3 Or 9×10 23 cm -3 etc.; After hydrogen-rich passivation treatment, SiN x O y Hydrogen concentration < 3 × 10 23 cm -3 For example, it could be 1×10 21cm -3 5×10 21 cm -3 1×10 22 cm -3 5×10 22 cm -3 1×10 23 cm -3 Or 3×10 23 cm -3 And so on. It is understandable that in the newly prepared SiN₂ with its hydrogen-rich layer formed... x O y At that time, its hydrogen content was relatively high, which was beneficial for supporting the hydrogen passivation effect of subsequent N-type silicon wafers; and with the implementation of hydrogen-rich passivation treatment, the hydrogen was transferred for hydrogen passivation, SiN x O y The hydrogen content in SiN will decrease. Furthermore, after hydrogen-rich passivation treatment, the hydrogen content in SiN... x O y Hydrogen concentration > 5 × 10 19 cm -3 This is beneficial for passivating the dangling bonds of the thin film itself and the silicon interface, thereby improving the interface state and bonding.

[0071] As a further example, the hydrogen content of the corresponding membrane layer before and after hydrogen-rich passivation treatment in this application can be tested and analyzed by secondary ion mass spectrometry (SIMS), especially dynamic SIMS (D-SIMS), or elastic recoil detection analysis (ERD / ERDA) and Fourier transform infrared spectroscopy (FTIR).

[0072] S30. Hydrogen-rich passivation treatment is performed on the N-type silicon wafer in the battery cell using a hydrogen-rich layer.

[0073] After the passivation layer and / or antireflection layer are formed by coating, the hydrogen in silicon is not fully activated. It only exists on the surface and interface of the coating and is not completely penetrated and uniformly dispersed in the N-type silicon wafer. Therefore, activation treatment is required. Activation treatment can be a high-temperature annealing heat treatment or a photothermal treatment, which makes the hydrogen uniformly dispersed in the silicon substrate. This can achieve complete passivation of dangling bonds, repair of interface damage, and promote the combination of hydrogen with metal impurities in the N-type silicon wafer to reduce bulk recombination, thereby improving the battery performance and efficiency.

[0074] Therefore, in some embodiments, the hydrogen-rich passivation process includes: heat-treating the battery cell at 200°C to 400°C for 20 to 60 minutes under an inert atmosphere. Exemplarily, the heat treatment temperature can be 200°C, 230°C, 250°C, 300°C, 350°C, 380°C, or 400°C, etc.; and the time can be 20 minutes, 30 minutes, 40 minutes, 50 minutes, or 60 minutes, etc.

[0075] In some embodiments, the inert atmosphere includes nitrogen.

[0076] Understandably, hydrogen content in N-type silicon wafers increases after hydrogen-rich passivation treatment. Therefore, in some embodiments, the hydrogen concentration in N-type silicon wafers within the solar cell can reach 1×10⁻⁶ after hydrogen-rich passivation treatment. 15 cm -3 ~5×10 21 cm -3 This facilitates a more uniform and sufficient hydrogen passivation effect across the entire N-type silicon wafer. For example, the hydrogen concentration in the N-type silicon wafer within the solar cell can be 1 × 10⁻⁶. 15 cm -3 1×10 18 cm -3 1×10 19 cm -3 1×10 20 cm -3 1×10 21 cm -3 Or 5×10 21 cm -3 wait.

[0077] In some embodiments, the resistivity of the N-type silicon wafer is 4 Ω·cm to 28 Ω·cm, exemplarily, it can be 4 Ω·cm, 6 Ω·cm, 8 Ω·cm, 10 Ω·cm, 13 Ω·cm, 15 Ω·cm, 18 Ω·cm, 20 Ω·cm, 23 Ω·cm, 25 Ω·cm, or 28 Ω·cm, etc. This is beneficial for maximizing the final conversion efficiency of the battery.

[0078] S40. A UV-blocking film layer is formed on the light-receiving side of the solar cell after hydrogen-rich passivation treatment, resulting in a crystalline silicon solar cell. After hydrogen-rich passivation treatment of the N-type silicon wafer in the solar cell, subsequent exposure to light can cause Si-H bond breakage, leading to LeTID (Light and elevated Temperature Induced Degradation), i.e., photothermal induced degradation. This instability causes the failure of hydrogen binding with metal impurities, resulting in a significant decrease in bulk minority carrier lifetime. To address this, this application sets a specific UV-blocking film on the light-receiving side of the solar cell to reduce harmful ultraviolet radiation, thereby improving the hydrogen passivation stability and durability of the N-type silicon wafer, thus supporting the long-term lifetime of the crystalline silicon solar cell.

[0079] In some embodiments, the UV-blocking film layer includes a base component and a UV absorber.

[0080] In some embodiments, the base components include EVA and / or POE. Using this base component facilitates compatibility with structures such as adhesive films used in subsequent component lamination.

[0081] In some embodiments, the ultraviolet absorber includes benzotriazole absorbers and / or benzophenone absorbers.

[0082] In some embodiments, the mass percentage of the UV absorber in the UV cutoff film is 0.1% to 1%. For example, the percentage of the UV absorber may be 0.1%, 0.2%, 0.3%, 0.5%, 0.8%, 0.9%, or 1%, etc.; thereby, it is beneficial for the UV cutoff film to fully absorb the harmful UV portion.

[0083] In some embodiments, the method for preparing a UV cutoff adhesive film layer includes preparing a UV cutoff adhesive film slurry, applying it, and curing it to obtain a UV cutoff adhesive film layer.

[0084] In some embodiments, the thickness of the wet film formed after the UV cutoff adhesive slurry is applied is 0.02 mm to 0.2 mm. For example, the thickness of the wet film can be 0.02 mm, 0.05 mm, 0.1 mm, 0.13 mm, 0.15 mm, or 0.2 mm, etc.

[0085] In some embodiments, the thickness of the UV-blocking adhesive film layer after curing is 10μm to 80μm. For example, the thickness of the UV-blocking adhesive film layer can be 10μm, 15μm, 20μm, 30μm, 40μm, 50μm, 60μm, 70μm, or 80μm, etc.; thereby, it is beneficial for the UV-blocking adhesive film to fully absorb the harmful ultraviolet rays.

[0086] Furthermore, to achieve a stable and sufficient resistance to UV degradation, the solar cell with a UV-blocking film layer is designed to withstand 60 kWh / m² UV radiation. 2 After being irradiated with ultraviolet (UV) energy, its output power decay rate is less than 1%, that is, UV60 < 1%.

[0087] One or more embodiments of this application provide a battery string including crystalline silicon solar cells as described above.

[0088] One or more embodiments of this application provide a battery assembly, including the crystalline silicon solar cell or battery string provided in the above embodiments.

[0089] One or more embodiments of this application provide a photovoltaic system including a battery module as described above.

[0090] Example 1 This embodiment provides a process method for manufacturing crystalline silicon solar cells, including the following steps: S10. Provide a number of N-type silicon wafers with minority carrier lifetime ≤4000μs; these N-type silicon wafers are fabricated from single-crystal silicon rods produced by the continuous Czochralski (RCz) method, and the minority carrier lifetime of the N-type silicon wafers is 1500μs~4000μs; the total concentration of metal impurities in each N-type silicon wafer is ≥200ppbw; the resistivity is 4Ω·cm~28Ω·cm; S20. Fabricating N-type silicon wafers into solar cells involves texturing, diffusion, laser etching, etching, LPCVD deposition, ALD deposition, PECVD deposition, and metallization processes to form stacked AlO₂ layers on the front side of the N-type silicon wafer. x Layer, front SiN x Layer and front SiN x O y The layer consists of the light-receiving side of the solar cell; simultaneously, a contact region and a passivation region are formed on the back side of the N-type silicon wafer, and a stacked tunneling layer of SiO is formed on the N-type silicon wafer in the contact region. x P-type and / or N-type doped layers, backside AlO x Layer, back side SiN x Layer, back side SiN x O y Layers and metal electrode layers; a back-side AlO layer is formed on an N-type silicon wafer in the passivation region, including a stacked configuration. x Layer, back side SiN x Layer, back side SiN x O y The layer is used to obtain a crystalline silicon solar cell, which is a back contact cell; And on the front AlO x Layer, front SiN x Layer, front SiN x O y Layer, back AlO x Layer, back side SiN x Layer, back side SiN x O y All are hydrogen-rich layers, prepared according to the following method: Preparation of frontal AlO x Layer and back AlO x All layer methods utilize ALD, with H2O as the oxygen source. The ALD temperature is T1', where T1' = T1 + 40℃, and T1 = 200℃~300℃; the number of cycles is N1', where N1' = N1 + 5 cycles, and N1 = 20 cycles~80 cycles; the growth rate is 0.10 nm / cycle~0.14 nm / cycle. This ensures that the front-side AlO₂... x Layer and back AlO xThe hydrogen concentration in the layer is 2 at.% to 6 at.%; Preparation of front-side SiN x Layer and back SiN x All layers are processed using PECVD, with the PECVD temperature being T2', where T2' = T2 - 10℃~30℃, and T2 = 250℃~450℃. The silicon source used in PECVD includes SiH4, and the nitrogen source includes NH3. The SiH4 flow rate is V1', where V1' = V1 + 300 sccm~600 sccm, and V1 = 200 sccm~2000 sccm. The NH3 flow rate is V2', where V2' = V2 + 1500 sccm~6000 sccm, and V2 = 1000 sccm~15000 sccm. This ensures that the front-side SiN... x Layer and back SiN x The hydrogen concentration in the layer is 8 × 10 22 cm -3 ~9×10 23 cm -3 ; Preparation of front-side SiN x O y Layer and back SiN x O y All layers are processed using PECVD at temperatures ranging from T3' (T3 - 10℃ to 30℃) to T3 (400℃ to 600℃). The silicon source used in PECVD is SiH4, and the nitrogen source is NH3. The SiH4 flow rate is V3' (V3 + 300 sccm to 600 sccm) to V3 (200 sccm to 600 sccm). The NH3 flow rate is V4' (V4 + 1500 sccm to 6000 sccm) to V4 (1000 sccm to 6000 sccm). This ensures the front-side SiN... x O y Layer and back SiN x O y The hydrogen concentration in the layer is 8 × 10 22 cm -3 ~9×10 23 cm -3 ; S30. Hydrogen-rich passivation treatment of N-type silicon wafers in solar cells using a hydrogen-rich layer: Under the protection of an inert nitrogen atmosphere, the solar cells are heat-treated at 200℃~400℃ for 20min~60min, so that after the hydrogen-rich passivation treatment, AlO₂... x Hydrogen concentration in SiN < 4 at.% x Hydrogen concentration < 3 × 10 23 cm -3 SiN x Oy Hydrogen concentration < 3 × 10 23 cm -3 Furthermore, the hydrogen concentration of the N-type silicon wafer in the solar cell is 1×10⁻⁶. 15 cm -3 ~5×10 21 cm -3 Minority carrier lifetime > 4000 μs; S40. A UV cutoff film layer is formed on the light-receiving side of the solar cell after hydrogen-rich passivation treatment to obtain a crystalline silicon solar cell: A UV cutoff film slurry is prepared, containing the basic component EVA and the UV absorber benzotriazole, with the UV absorber accounting for 0.1%~1%. It is then sprayed onto the outer surface of the outermost film layer on the light-receiving side of the solar cell, with a wet film thickness of 0.02mm~0.2mm. After curing, a UV cutoff film layer of 10μm~80μm is formed.

[0091] Control group 1 The main difference from Example 1 is that N-type silicon wafers were fabricated using single-crystal silicon rods produced by the continuous Czochralski (RCz) method. All N-type silicon wafers exhibited a minority carrier lifetime >4000 μs, and their resistivity ranged from 4 Ω·cm to 28 Ω·cm. The photogenerated carrier injection concentration measured in the BCT400 transient mode was 5 × 10⁻⁶. 14 cm -3 Using these N-type silicon wafers, the cells for back-contact batteries were fabricated, and hydrogen-rich passivation treatment and UV-blocking adhesive film layer were applied according to the method in Example 1.

[0092] In both Example 1 and Control Group 1, 20 N-type silicon wafers were used to form back-contact cells. These cells were then tested, such as... Figure 3 The results shown are those of the test for 20 batteries in Example 1. Figure 4 The figure shows the test results for 20 wafers in control group 1. As can be seen from the figure, the process for manufacturing crystalline silicon solar cells provided in this application embodiment can use N-type silicon wafers with minority carrier lifetime ≤4000μs to form solar cells. Combined with hydrogen-rich passivation treatment, hydrogen can be effectively penetrated and dispersed into the N-type silicon wafer and combined with metal impurities, achieving a sufficient hydrogen passivation effect on the N-type silicon wafer, thereby effectively improving the minority carrier lifetime of silicon in the solar cell. At the same time, by combining a UV-blocking film layer to suppress UV-induced degradation and improve hydrogen passivation stability, N-type silicon wafers with low minority carrier lifetime can be used to produce crystalline silicon solar cells with excellent photoelectric performance and good stability.

[0093] Moreover, although the process method for manufacturing crystalline silicon solar cells proposed in this application is for N-type silicon wafers with low minority carrier lifetime, it can also be applied to N-type silicon wafers with medium to high minority carrier lifetime according to actual needs, and is beneficial to improving the hydrogen passivation stability of the resulting crystalline silicon solar cells and the cell strings, cell modules and photovoltaic systems containing them, as well as maintaining or improving the minority carrier lifetime.

[0094] The preferred embodiments of this application have been described in detail above. However, this application is not limited to the specific details of the above embodiments. Within the scope of the technical concept of this application, various simple modifications can be made to the technical solution of this application, and these simple modifications all fall within the protection scope of this application.

[0095] It should also be noted that the various specific technical features described in the above embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, this application will not describe the various possible combinations separately.

[0096] Furthermore, various different implementations of this application can be combined in any way, as long as they do not violate the spirit of this application, they should also be regarded as the content disclosed in this application.

Claims

1. A process for manufacturing crystalline silicon solar cells, characterized in that, The process includes: We provide N-type silicon wafers with minority carrier lifetime ≤4000μs and resistivity ≥4Ω·cm; The N-type silicon wafer is fabricated into a solar cell, the solar cell having opposing light-receiving and non-light-receiving surfaces; the process of fabricating the solar cell includes the step of forming a passivation layer and / or an anti-reflection layer on the light-receiving side and / or the non-light-receiving side, and the passivation layer and / or anti-reflection layer on at least one side is a hydrogen-rich layer; The hydrogen-rich layer is used to perform hydrogen-rich passivation treatment on the N-type silicon wafer in the battery cell. A UV-blocking adhesive film layer is formed on the light-receiving side of the solar cell after hydrogen-rich passivation treatment to obtain a crystalline silicon solar cell.

2. The process for manufacturing crystalline silicon solar cells according to claim 1, characterized in that, Before being fabricated into solar cells, the minority carrier lifetime of the N-type silicon wafer is 1500 μs to 4000 μs; And / or, the N-type silicon wafer is monocrystalline silicon, and the total concentration of metal impurities in the N-type silicon wafer is ≥200ppbw; And / or, after the hydrogen-rich passivation treatment, the minority carrier lifetime of the N-type silicon wafer in the solar cell is >4000 μs; And / or, after the hydrogen-rich passivation treatment, the hydrogen concentration in the N-type silicon wafer of the solar cell is 1 × 10⁻⁶. 15 cm -3 ~5×10 21 cm -3 .

3. The process for manufacturing crystalline silicon solar cells according to claim 1, characterized in that, The process of manufacturing the battery cell includes the steps of forming a front passivation layer and / or a front antireflection layer on the light-receiving surface, and also includes the steps of forming a back passivation layer and / or a back antireflection layer on the non-light-receiving surface; and at least one of the front passivation layer, the front antireflection layer, the back passivation layer, or the back antireflection layer is the hydrogen-rich layer; And / or, the front passivation layer, the front antireflection layer, the back passivation layer, or the back antireflection layer each independently include AlO. x SiN x or SiN x O y At least one of them.

4. The process method for manufacturing crystalline silicon solar cells according to claim 1 or 3, characterized in that, Preparation of AlO x The method includes ALD and satisfies at least one of the following conditions: A1, the AlO x When the layer is not hydrogen-rich, the temperature of ALD is T1, where T1 = 200℃~300℃; the number of cycles is N1, where N1 = 20 cycles~80 cycles; and the growth rate is 0.10 nm / cycle~0.14 nm / cycle. A2, the AlO x When the layer is hydrogen-rich, the oxygen source used by ALD includes H2O, the temperature of ALD is T1', T1' = T1 + 20℃ ~ 60℃; the number of cycles is N1', N1' = N1 + 3 cycles ~ 6 cycles; A3, the AlO x When it is a hydrogen-rich layer, before the hydrogen-rich passivation treatment, AlO x The hydrogen concentration in AlO is 2 at.% to 6 at.%; after the hydrogen-rich passivation treatment, AlO x The hydrogen concentration in it is <4 at..

5. The process method for manufacturing crystalline silicon solar cells according to claim 1 or 3, characterized in that, Preparation of SiN x The method includes PECVD and satisfies at least one of the following conditions: B1, the SiN x When the layer is not hydrogen-rich, the temperature of PECVD is T2, T2 = 250℃~450℃; the flow rate of the silicon source used in PECVD is V1, V1 = 200sccm~2000sccm, and the flow rate of the nitrogen source used is V2, V2 = 1000sccm~15000sccm. B2, the SiN x When the hydrogen-rich layer is used, the PECVD temperature is T2', where T2' = T2 - 10℃ ~ 30℃; the silicon source used in PECVD includes SiH4 and / or the nitrogen source used includes NH3; the flow rate of SiH4 is V1', where V1' = V1 + 300 sccm ~ 600 sccm, and / or the flow rate of NH3 is V2', where V2' = V2 + 1500 sccm ~ 6000 sccm; B3, the SiN x When it is a hydrogen-rich layer, before the hydrogen-rich passivation treatment, SiN x The hydrogen concentration in it is 8×10 22 cm -3 ~9×10 23 cm -3 After the hydrogen-rich passivation treatment, SiN x The hydrogen concentration in the medium is <3×10 23 cm -3 .

6. The process method for manufacturing crystalline silicon solar cells according to claim 1 or 3, characterized in that, Preparation of SiN x O y The method includes PECVD and satisfies at least one of the following conditions: C1, the SiN x O y When the layer is not hydrogen-rich, the temperature of PECVD is T3, T3 = 400℃~600℃; the flow rate of the silicon source used in PECVD is V3, V3 = 200sccm~600sccm, and the flow rate of the nitrogen source used is V4, V4 = 1000sccm~6000sccm. C2, the SiN x O y When the hydrogen-rich layer is used, the PECVD temperature is T3', where T3' = T3 - 10℃ ~ 30℃; the silicon source used in PECVD includes SiH4 and / or the nitrogen source used includes NH3; the flow rate of SiH4 is V3', where V3' = V3 + 300 sccm ~ 600 sccm, and / or the flow rate of NH3 is V4', where V4' = V4 + 1500 sccm ~ 6000 sccm; C3, the SiN x O y When it is a hydrogen-rich layer, before the hydrogen-rich passivation treatment, SiN x O y The hydrogen concentration in it is 8×10 22 cm -3 ~9×10 23 cm -3 After the hydrogen-rich passivation treatment, SiN x O y The hydrogen concentration in the medium is <3×10 23 cm -3 .

7. The process method for manufacturing crystalline silicon solar cells according to claim 1, characterized in that, The hydrogen-rich passivation process includes: heat-treating the battery cells at 200℃~400℃ for 20min~60min under the protection of an inert atmosphere.

8. The process method for manufacturing crystalline silicon solar cells according to claim 1, characterized in that, The UV-blocking adhesive film layer includes basic components and a UV absorber; And / or, the base components include EVA and / or POE; And / or, the ultraviolet absorber includes benzotriazole absorbers and / or benzophenone absorbers; And / or, the mass percentage of the ultraviolet absorber in the UV-blocking film is 0.1% to 1%.

9. The process method for manufacturing crystalline silicon solar cells according to claim 1 or 8, characterized in that, The method for preparing the UV cut-off adhesive film layer includes preparing a UV cut-off adhesive film slurry, applying it and curing it to obtain the UV cut-off adhesive film layer. And / or, the thickness of the wet film formed after the UV cutoff adhesive slurry is 0.02mm~0.2mm; And / or, after curing, the thickness of the UV-blocking adhesive film layer is 10μm~80μm.

10. A crystalline silicon solar cell, characterized in that, Obtained by the process method according to any one of claims 1-9.

11. A battery string, characterized in that, Including the crystalline silicon solar cell as described in claim 10.

12. A battery assembly, characterized in that, Includes the crystalline silicon solar cell as described in claim 10 or the battery string as described in claim 11.

13. A photovoltaic system, characterized in that, Includes the battery assembly as described in claim 12.

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