Hybrid passivated back contact solar cell and method of making same

Abstract

This disclosure relates to the field of solar cell technology and discloses a hybrid passivated back-contact solar cell and its fabrication method. The cell includes: a substrate layer having a light-receiving surface and a back-contact surface; a first passivated contact structure; a second passivated contact structure; a first electrode connected to the first passivated contact structure; and a second electrode connected to the second passivated contact structure. The first and second passivated contact structures are alternately disposed on the back-contact surface. The first passivated contact structure includes a tunneling oxide layer and a doped polycrystalline silicon layer, and the second passivated contact structure includes a first intrinsic amorphous silicon layer and a first doped amorphous silicon layer. The first electrode uses a high-temperature paste suitable for forming ohmic contacts through localized laser annealing, and the second electrode uses a low-temperature paste that forms a connection with the second passivated contact structure through low-temperature annealing. This disclosure achieves selective application of high-temperature and low-temperature pastes, reduces production costs, and ensures cell performance and photoelectric conversion efficiency by improving localized sintering performance.

Description

Technical Field

[0001] This disclosure relates to the field of solar cell technology, specifically to a hybrid passivated back contact solar cell and its fabrication method. Background Technology

[0002] Driven by the global energy transition and carbon neutrality goals, the photovoltaic industry is facing the dual challenges of technological iteration and cost competition. As a core component, the photoelectric conversion efficiency and manufacturing cost of high-efficiency solar cells directly determine the economic viability of photovoltaic power generation. Currently, hybrid passivated back-contact solar cells, with their composite passivation contact structure on the back surface—that is, the p / n regions on the back surface of the cell employing a tunneling oxide / doped polycrystalline silicon passivation contact structure based on TOPCon technology and an intrinsic amorphous silicon / doped amorphous silicon passivation contact structure based on HJT technology respectively—exhibit significant advantages in passivation performance and power generation efficiency, becoming a research hotspot in the field of solar cells.

[0003] However, this type of hybrid passivated back-contact battery, precisely because of its back-light surface structure film layers with different characteristics, faces problems such as poor process compatibility and high cost when incorporating other structural layers, thus hindering its large-scale application. Therefore, how to achieve a balance between improving battery conversion efficiency and controlling costs through process innovation has become a key direction for technological breakthroughs in the industry. Summary of the Invention

[0004] This disclosure provides a hybrid passivated back contact solar cell and its fabrication method, which solves the problem that existing hybrid passivated back contact solar cells cannot simultaneously improve cell conversion efficiency and control costs.

[0005] In a first aspect, this disclosure provides a hybrid passivated back-contact solar cell, comprising: a substrate layer, a first passivated contact structure, a second passivated contact structure, a first electrode, and a second electrode. The substrate layer includes a light-receiving surface and a back-lighting surface disposed opposite to each other. The first passivated contact structure and the second passivated contact structure are alternately disposed on the back-lighting surface. The first passivated contact structure includes a tunneling oxide layer and a doped polycrystalline silicon layer stacked together. The second passivated contact structure includes a first intrinsic amorphous silicon layer and a first doped amorphous silicon layer stacked together. The conductivity types of the first passivated contact structure and the second passivated contact structure are opposite. The first electrode is adapted to be connected to the first passivated contact structure, and the second electrode is adapted to be connected to the second passivated contact structure. The first electrode uses a high-temperature paste, which is adapted to form an ohmic contact with the first passivated contact structure through local laser annealing. The second electrode uses a low-temperature paste, which is adapted to form a connection with the second passivated contact structure through low-temperature annealing.

[0006] Beneficial effects: This disclosure uses a high-temperature slurry to form the first electrode on a first passivation contact structure suitable for high-temperature processes, and a low-temperature slurry to form the second electrode on a second passivation contact structure suitable for low-temperature processes. This selective application of high-temperature and low-temperature slurries satisfies process compatibility requirements and significantly reduces production costs, increasing mass production scale. Furthermore, before achieving reliable connection between the second passivation contact structure and the low-temperature slurry through low-temperature annealing across the entire area, the first passivation contact structure and the high-temperature slurry are pre-treated using a laser process to achieve ohmic contact, thereby improving local sintering performance and ensuring the performance utilization of local areas of the battery suitable for high-temperature processes. In other words, this scheme combining local laser annealing and full-area low-temperature annealing avoids the performance degradation of the second passivation contact structure caused by full-area high-temperature annealing, and also avoids the impact of solely using full-area low-temperature annealing on the full realization of the first passivation contact structure's performance, thus improving the overall battery performance and photoelectric conversion efficiency.

[0007] In one optional embodiment, the device further includes: a first transparent conductive layer and a second transparent conductive layer, with an isolation groove separating the two layers; the first transparent conductive layer is adapted to be disposed on the first passivated contact structure, the first transparent conductive layer includes a through-hole contact groove, and a first electrode is disposed in the contact groove to connect with the first passivated contact structure; the second transparent conductive layer is disposed on the second passivated contact structure, and a second electrode is disposed on the second transparent conductive layer.

[0008] Beneficial effects: The first transparent conductive layer is located at least on the first passivated contact structure, and the second transparent conductive layer is located at least on the second passivated contact structure; the contact groove is located in the first transparent conductive layer on the first passivated contact structure, that is, the first passivated contact structure with the exposed part of the contact groove. The location of the contact groove is suitable for setting high-temperature slurry so as to realize the sintering and fixing of the high-temperature slurry and the first passivated contact structure.

[0009] In one alternative embodiment, the width of the isolation groove is less than or equal to the width of the contact groove; the second passivation contact structure further extends to cover a portion of the surface of the first passivation contact structure to form a window area on the first passivation contact structure that exposes a portion of the first passivation contact structure, the width of the contact groove is greater than or equal to the width of the first electrode, and the width of the contact groove is less than the width of the window area.

[0010] Beneficial effects: In this disclosure, the width of the isolation groove can be smaller than the width of the contact groove. On the one hand, this ensures that the isolation groove, while isolating the first and second transparent conductive layers, retains as much passivation performance as possible at its interface with the passivation contact structure. On the other hand, it ensures that the width of the contact groove is sufficient to accommodate the first electrode. Furthermore, the width of the contact groove is greater than or equal to the width of the first electrode, but less than the width of the window area of ​​the second passivation contact structure used to expose part of the first passivation contact structure. That is, a portion of the first transparent conductive layer is also covered on the surface of the window area, ensuring that the contact groove can accommodate the first electrode while further enhancing the anti-reflection effect of the first transparent conductive layer on the first passivation contact structure. In an optional embodiment, it further includes: a first passivation anti-reflection structure disposed on the light-receiving surface of the substrate layer. The first passivation anti-reflection structure includes a second intrinsic amorphous silicon layer and a third transparent conductive layer stacked together, with the second intrinsic amorphous silicon layer disposed relatively close to the light-receiving surface.

[0011] Beneficial effects: The first passivation and antireflection structure, which includes a second intrinsic amorphous silicon layer and a third transparent conductive layer, on the light-receiving surface in this disclosure can match the low-temperature characteristics of the first intrinsic amorphous silicon layer and the first doped amorphous silicon layer on the backlight surface. There is no need to worry about excessively high deposition temperatures affecting the characteristics of the amorphous silicon thin film on the backlight surface, resulting in high process compatibility. In addition, amorphous silicon materials contain more hydrogen atoms, which have better passivation performance and can further improve the surface quality of the light-receiving surface of the battery, that is, improve the passivation performance and contact performance of the battery on the light-receiving side.

[0012] In one alternative embodiment, the first passivation antireflection structure further includes a second doped amorphous silicon layer disposed between the second intrinsic amorphous silicon layer and the third transparent conductive layer.

[0013] Beneficial effects: Introducing a second doped amorphous silicon layer between the second intrinsic amorphous silicon layer and the third transparent conductive layer on the light-receiving surface of the battery forms a combined intrinsic amorphous silicon / doped amorphous silicon film. Firstly, by introducing a high-low junction, the field passivation effect further reduces the synchronous convergence of carriers of opposite polarities to the light-receiving surface, thereby reducing surface recombination. Secondly, due to the presence of the junction region on the light-receiving surface, it can also fully absorb short-wavelength ultraviolet light, effectively reducing ultraviolet-induced degradation of the battery.

[0014] In one optional embodiment, it further includes: a second passivation antireflection structure disposed on the side of the substrate layer, the side of which connects the light-receiving surface and the backlight surface; the second passivation antireflection structure includes a third intrinsic amorphous silicon layer and a fourth transparent conductive layer stacked together, the third intrinsic amorphous silicon layer being disposed relatively close to the side.

[0015] Beneficial effects: A material layer of the same type as the light-receiving surface can be introduced on one side, such as a third intrinsic amorphous silicon layer and a fourth transparent conductive layer. The third intrinsic amorphous silicon layer can reduce carrier recombination on the side, improve the passivation performance and contact reliability of the side, while the fourth transparent conductive layer can work synergistically with the third intrinsic amorphous silicon layer to improve the passivation performance of the side and prevent damage to the side passivation layer from the external environment, further ensuring the photoelectric conversion efficiency of the battery.

[0016] In one alternative embodiment, the first passivation anti-reflection structure further includes a third doped amorphous silicon layer disposed between the third intrinsic amorphous silicon layer and the fourth transparent conductive layer.

[0017] Beneficial effects: Introducing a third doped amorphous silicon layer between the third intrinsic amorphous silicon layer and the fourth transparent conductive layer on the side of the battery creates a combined intrinsic amorphous silicon / doped amorphous silicon film layer on the side as well. This means that by introducing a high-low junction on the side, the field passivation effect is utilized to further reduce the synchronous convergence of carriers of opposite polarities to the side of the battery, thereby reducing surface recombination on the side. Secondly, it can also fully absorb short-wavelength ultraviolet light reaching the side, further reducing UV-induced degradation of the battery. Moreover, the first passivation antireflection structure on the side has the same material composition as the first passivation antireflection structure on the light-receiving surface, which helps simplify process steps, improve process compatibility, and thus improve mass production efficiency.

[0018] In one alternative embodiment, the thickness of the second intrinsic amorphous silicon layer is less than or equal to the thickness of the first intrinsic amorphous silicon layer, and / or, the thickness of the third intrinsic amorphous silicon layer is greater than or equal to the thickness of the first intrinsic amorphous silicon layer. Beneficial effects: Firstly, the thickness of the second intrinsic amorphous silicon layer on the light-receiving side is less than the thickness of the first intrinsic amorphous silicon layer on the backlight side. This is because there are no gate line contacts on the second intrinsic amorphous silicon layer on the light-receiving side, so there is no need to worry about contact performance; only passivation needs to be ensured. Furthermore, the thinner second intrinsic amorphous silicon layer on the light-receiving side can reduce parasitic absorption in the film layer, improving the optical performance of the battery. Secondly, the thickness of the third intrinsic amorphous silicon layer on the side surface is greater than the thickness of the first intrinsic amorphous silicon layer on the back surface. This is because when forming the first intrinsic amorphous silicon layer on the back surface and the second intrinsic amorphous silicon layer on the light-receiving surface, the intrinsic amorphous silicon material on the side surface can be retained, thus allowing for the deposition of a double layer of intrinsic amorphous silicon material on the side surface. In other words, the thickness of the third intrinsic amorphous silicon layer is the sum of the thicknesses of the first and second intrinsic amorphous silicon layers. This facilitates the effective deposition of the intrinsic amorphous silicon thin film on the side surface of the substrate, resulting in sufficient passivation of the side surface. Of course, the double passivation material layer may also be appropriately thinned during the thickness processing to reduce parasitic absorption.

[0019] Secondly, this disclosure also provides a method for fabricating a hybrid passivated back-contact solar cell, comprising: A base layer is formed, which includes a light-receiving surface and a back-lighting surface that are arranged opposite to each other; A first passivation contact structure and a second passivation contact structure are alternately formed on the back surface of the substrate. The first passivation contact structure includes a tunneling oxide layer and a doped polycrystalline silicon layer stacked together. The second passivation contact structure includes a first intrinsic amorphous silicon layer and a first doped amorphous silicon layer stacked together. The conductivity types of the first passivation contact structure and the second passivation contact structure are opposite. A first electrode and a second electrode are formed. The first electrode is connected to a first passivation contact structure, and the second electrode is connected to a second passivation contact structure. The first electrode uses a high-temperature paste, which is suitable for forming an ohmic contact with the first passivation contact structure after local laser annealing. The second electrode uses a low-temperature paste, which is suitable for forming a connection with the second passivation contact structure after low-temperature annealing.

[0020] Beneficial effects: The method for preparing hybrid passivated back contact solar cells disclosed herein firstly sets pastes with different properties in different polarity regions to form the first electrode and the second electrode respectively. That is, the first electrode is formed by setting a high-temperature paste in the n region and the second electrode is formed by setting a low-temperature paste in the p region, thereby reducing the overall paste cost. Secondly, after printing the high-temperature paste in the n region, laser selective annealing is used to achieve local sintering of the paste contact area, ensuring the overall performance of the cell.

[0021] In one alternative implementation, forming the first electrode and the second electrode includes: High-temperature paste is printed on the first passivated contact structure; The first electrode is formed by laser annealing of a high-temperature slurry. The laser wavelength range during laser annealing is 200–600 nm, the pulse width range is 10–200 ns, the frequency is 10–100 kHz, and the power density range is 0.2–2.0 J / cm². 2 ; Low-temperature paste is printed on the second passivated contact structure; The low-temperature slurry is subjected to low-temperature annealing to form the second electrode, and the low-temperature annealing temperature range is 150~300℃. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the specific embodiments of this disclosure or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0023] Figure 1 This is a schematic diagram of a hybrid passivated back contact battery according to an embodiment of the present disclosure; Figure 2 This is a schematic diagram of another structure of the hybrid passivated back contact battery according to an embodiment of this disclosure; Figure 3 This is a schematic flowchart of a method for preparing a hybrid passivated back contact battery according to an embodiment of the present disclosure; Figure 4 This is a schematic diagram of the structure after an initial tunneling oxide layer, an initial doped polysilicon layer, and a phosphosilicate glass layer are formed on the surface of the substrate layer according to an embodiment of the present disclosure. Figure 5 This is a schematic diagram of the structure after the formation of the first passivated contact structure according to an embodiment of the present disclosure; Figure 6 This is a schematic diagram of the structure after forming an initial first intrinsic amorphous silicon layer and an initial first doped amorphous silicon layer on the backlight surface according to an embodiment of the present disclosure. Figure 7 This is a schematic diagram of the structure after forming a first transparent conductive layer and a second transparent conductive layer on the backlight surface according to an embodiment of the present disclosure.

[0024] Explanation of reference numerals in the attached figures: 1. Base layer; 11. Light-receiving surface; 12. Backlight-receiving surface; 2. First passivation contact structure; 21. Tunneling oxide layer; 22. Doped polysilicon layer; 210. Initial tunneling oxide layer; 220. Initial doped polysilicon layer; 230. Phosphosilicate glass layer; 3. Second passivated contact structure; 31. First intrinsic amorphous silicon layer; 32. First doped amorphous silicon layer; 310. Initial first intrinsic amorphous silicon layer; 320. Initial first doped amorphous silicon layer; c. Window region; 41. First electrode; 42. Second electrode; 51. First transparent conductive layer; 52. Second transparent conductive layer; a. Contact groove; b. Isolation groove; 6. First passivation anti-reflection structure; 61. Second intrinsic amorphous silicon layer; 62. Third transparent conductive layer; 63. Second doped amorphous silicon layer; 7. Second passivation anti-reflection structure; 71. Third intrinsic amorphous silicon layer; 72. Fourth transparent conductive layer; 73. Third doped amorphous silicon layer. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0026] In related technologies, hybrid passivated back contact batteries, due to their back structure films with different characteristics, face challenges such as poor process compatibility and high costs when adding other structural layers. For example, the differences in film characteristics and process requirements in different regions of the battery limit the application of slurry. For instance, the p-region uses passivation contact films made of intrinsic amorphous silicon and p-type doped amorphous silicon, which will significantly deactivate at high temperatures, and the surface can only be covered with low-temperature slurry to draw out current. On the other hand, the n-region uses n-poly formed by high-temperature processes, but due to the use of low-temperature passivation contact films, this region often also uses low-temperature slurry, resulting in higher overall slurry costs and failing to fully leverage the advantages of different regions in terms of process compatibility, thus affecting further improvement of battery performance and effective cost control.

[0027] Based on this, such as Figure 1 and Figure 2 As shown, this disclosure provides a hybrid passivated back contact solar cell, comprising: a substrate layer 1, a first passivated contact structure 2, a second passivated contact structure 3, a first electrode 41, and a second electrode 42. The substrate layer 1 includes a light-receiving surface 11 and a back-lighting surface 12 disposed opposite to each other. The first passivated contact structure 2 and the second passivated contact structure 3 are alternately disposed on the back-lighting surface 12. The first passivated contact structure 2 includes a tunneling oxide layer 21 and a doped polycrystalline silicon layer 22 stacked together. The second passivated contact structure 3 includes a first intrinsic amorphous silicon layer 31 and a first doped amorphous silicon layer 32 stacked together. The first passivated contact structure 2 and the second passivated contact structure 3 have opposite conductivity types. The first electrode 41 is adapted to be connected to the first passivated contact structure 2, and the second electrode 42 is adapted to be connected to the second passivated contact structure 3. The first electrode 41 uses a high-temperature paste, which is adapted to form an ohmic contact with the first passivated contact structure 2 after local laser annealing. The second electrode 42 uses a low-temperature paste, which is adapted to form a connection with the second passivated contact structure 3 after low-temperature annealing.

[0028] Specifically, a first passivation contact structure 2 and a second passivation contact structure 3 are alternately disposed on one side of the backlight surface 12 of the substrate layer 1. The first passivation contact structure 2 and the second contact structure adopt passivation contact film layers of different battery types. For example, the first passivation contact structure 2 adopts a tunneling oxide layer 21 and a doped polycrystalline silicon layer 22 of the TOPCon battery type, and the second passivation contact structure 3 adopts an intrinsic amorphous silicon layer and a doped amorphous silicon layer of the HJT battery type. Of course, it is not limited to passivation contact film layers of other battery types. Passivation contact film layers of different battery types are usually suitable for different process temperatures. For example, compared with the doped polycrystalline silicon layer 22 of the TOPCon battery type which is suitable for high-temperature processes, the intrinsic amorphous silicon layer and the doped amorphous silicon layer of the HJT battery type will be significantly deactivated at high temperatures, and are therefore more suitable for low-temperature processes. In addition, in the first passivation contact structure 2 and the second passivation contact structure 3, one of them has an n-type conductivity and the other has a p-type conductivity. This disclosure takes the first passivation contact structure 2 having an n-type conductivity and the second passivation contact structure 3 having a p-type conductivity as an example for explanation.

[0029] Based on this, this disclosure uses a high-temperature slurry to form the first electrode 41 on the first passivation contact structure 2, which is suitable for high-temperature processes, and a low-temperature slurry to form the second electrode 42 on the second passivation contact structure 3, which is suitable for low-temperature processes. Since high-temperature slurry technology is more mature and has lower requirements for silver powder, its price is generally lower than that of low-temperature slurry. Therefore, for the battery end, the cost of using high-temperature slurry is lower than that of using low-temperature slurry. Thus, the selective application of high-temperature and low-temperature slurries can meet process compatibility requirements and greatly reduce production costs, increasing mass production scale. Furthermore, before achieving reliable connection between the second passivation contact structure 3 and the low-temperature slurry through low-temperature annealing across the entire area, the first passivation contact structure 2 and the high-temperature slurry are pre-connected using a laser process to achieve ohmic contact, thereby improving local sintering performance and ensuring the performance utilization of local areas of the battery suitable for high-temperature processes. That is, this scheme combining local laser annealing and full-area low-temperature annealing avoids, on the one hand, the performance damage to the second passivation contact structure 3 caused by full-area high-temperature annealing, and on the other hand, avoids the impact of simply using full-area low-temperature annealing on the full realization of the performance of the first passivation contact structure 2. In summary, this disclosure first sets different properties of paste in different polarity regions to form the first electrode 41 and the second electrode 42 respectively. That is, the first electrode 41 is formed by setting a high temperature paste in the n region and the second electrode 42 is formed by setting a low temperature paste in the p region, thereby reducing the overall paste cost. Secondly, after printing the high temperature paste in the n region, laser selective annealing is used to achieve local sintering of the paste contact area to ensure the overall performance of the battery.

[0030] In some embodiments, such as Figure 1 and Figure 2As shown, the hybrid passivated back contact solar cell further includes: a first transparent conductive layer 51 and a second transparent conductive layer 52 spaced apart, with an isolation groove b separating the first transparent conductive layer 51 and the second transparent conductive layer 52; the first transparent conductive layer 51 is disposed on the first passivated contact structure 2, and the first transparent conductive layer 51 includes a through contact groove a, and the first electrode 41 is disposed in the contact groove a to connect with the first passivated contact structure 2; the second transparent conductive layer 52 is disposed on the second passivated contact structure 3, and the second electrode 42 is disposed on the second transparent conductive layer 52.

[0031] For example, a transparent conductive film can be first applied to the entire surface of the first passivation contact structure 2 and the second passivation contact structure 3. The transparent conductive film can be one or more of indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), tungsten-doped indium oxide (IWO), cerium-doped indium oxide (ICO), indium zinc oxide (IZO), or other conductive films. In this disclosure, an ITO film is selected, with a thickness ranging from 50 to 200 nm and a refractive index ranging from 1.5 to 2.5. Then, the transparent conductive film is patterned to form an isolation groove b and a contact groove a. The two sides of the isolation groove b are a first transparent conductive layer 51 and a second transparent conductive layer 52, respectively. The first transparent conductive layer 51 is located at least on the first passivation contact structure 2, and the second transparent conductive layer 52 is located at least on the second passivation contact structure 3. The contact groove a is located in the first transparent conductive layer 51 on the first passivation contact structure 2, that is, the exposed portion of the first passivation contact structure 2. The location of the contact groove a is suitable for setting a high-temperature paste to achieve sintering and fixing of the high-temperature paste with the first passivation contact structure 2.

[0032] For example, a transparent conductive film can be patterned by screen printing an etching paste to remove part of the transparent conductive film material at the target location. The etching paste can specifically be a TCO etching paste.

[0033] In some embodiments, such as Figure 1 and Figure 2 As shown, the width of the isolation groove b is less than or equal to the width of the contact groove a; the second passivation contact structure 3 also extends to cover part of the surface of the first passivation contact structure 2 to form an exposed window area c of the first passivation contact structure 2 on the first passivation contact structure 2, the width of the contact groove a is greater than or equal to the width of the first electrode 41, and the width of the contact groove a is less than the width of the window area c.

[0034] Specifically, in this disclosure, the width of the isolation groove b is firstly set to be smaller than the width of the contact groove a. On the one hand, this ensures that the isolation groove b, while isolating the first transparent conductive layer 51 and the second transparent conductive layer 52, retains as much passivation performance as possible at its interface with the passivation contact structure. On the other hand, it ensures that the width of the contact groove a is sufficient to accommodate the first electrode 41. Furthermore, while the width of the contact groove a is greater than or equal to the width of the first electrode 41, it is also set to be smaller than the width of the window area c of the second passivation contact structure 3 used to expose part of the first passivation contact structure 2. That is, a portion of the first transparent conductive layer 51 is also covered on the surface of the window area c. This ensures that the contact groove a can accommodate the first electrode 41 while further enhancing the anti-reflection effect of the first transparent conductive layer 51 on the first passivation contact structure 2.

[0035] Because amorphous silicon thin films have low-temperature processing characteristics, they cannot withstand temperatures exceeding 350°C. The alumina / silicon nitride passivation antireflective film on the light-receiving surface 11 of a conventional back-contact battery, especially silicon nitride, typically requires higher temperatures. To avoid high-temperature damage to the already formed amorphous silicon thin film on the back-contact surface 12, and due to the constraints of the front and back processing sequence of the back-contact battery (i.e., the back-contact surface 12 structure needs to be prepared first), the actual process can only arrange the deposition of the passivation antireflective film on the light-receiving surface 11 after the formation of the amorphous silicon thin film on the back-contact surface 12, and can only adopt a low-temperature process compromise. This significantly limits the flexibility of the battery fabrication process.

[0036] Based on this, such as Figure 1 As shown, in some embodiments of this disclosure, the hybrid passivated back contact solar cell further includes a first passivation antireflection structure 6 disposed on the light-receiving surface 11 of the substrate layer 1. The first passivation antireflection structure 6 includes a second intrinsic amorphous silicon layer 61 and a third transparent conductive layer 62 stacked together. The second intrinsic amorphous silicon layer 61 is disposed relatively close to the light-receiving surface 11.

[0037] Specifically, the passivation antireflection film on the light-receiving surface 11 of the battery is set as a composite film layer of intrinsic amorphous silicon thin film and transparent conductive film, that is, a stacked structure of second intrinsic amorphous silicon layer 61 and third transparent conductive layer 62. On the one hand, intrinsic amorphous silicon thin films help to further improve the passivation performance of the light-receiving surface 11. First, intrinsic amorphous silicon thin films are rich in hydrogen atoms. During the deposition process, these hydrogen atoms can directly combine with the unsaturated dangling bonds on the crystalline silicon surface, thereby eliminating the interface defect states that cause carrier recombination from the root. Second, the hydrogen content of low-temperature deposited amorphous silicon thin films is very high, usually above 10%. These hydrogen atoms are the "ammunition" for performing chemical passivation. Although doped polycrystalline silicon thin films are also made by high-temperature annealing of hydrogenated amorphous silicon, most of the hydrogen will escape during the high-temperature process, and its final hydrogen content is much lower than that of amorphous silicon thin films. Therefore, its ability to passivate the interface through hydrogen atoms is weak. Finally, the preparation process of intrinsic amorphous silicon thin films is low-temperature, usually below 200°C. This protects the fragile crystalline silicon surface and avoids damage to the passivation interface by high temperature. In contrast, doped polycrystalline silicon thin films usually require high-temperature annealing above 800°C to achieve crystallization and doping activation. This high-temperature process may introduce new thermal stress defects or cause the originally sharp interface to diffuse, thereby degrading the passivation quality to some extent. Moreover, the light-receiving surface 11 of the battery is usually textured to enhance light trapping, but the high-temperature deposited tunneling oxide layer 21 / doped polycrystalline silicon film cannot be uniformly deposited on the textured silicon substrate, making it unsuitable for the light-receiving surface 11. Intrinsic amorphous silicon / doped amorphous silicon has been verified in HJT batteries and can be fully applied to the textured silicon substrate. Therefore, choosing to deposit an intrinsic amorphous silicon thin film on the light-receiving surface 11 can ensure contact reliability while maintaining passivation performance. On the other hand, the third transparent conductive layer 62 is disposed on the second intrinsic amorphous silicon layer 61. Firstly, its high light transmittance can ensure that sunlight enters the battery and reduce the light reflection loss on the battery surface. Secondly, the third transparent conductive layer 62 can work together with the second intrinsic amorphous silicon layer 61 to further optimize the passivation effect of the battery surface. The intrinsic amorphous silicon thin film can reduce the defect state density of silicon surface and reduce the carrier surface recombination rate, while the transparent conductive film reduces the damage of the external environment to the passivation layer by covering the surface, thus jointly improving the battery open circuit voltage and conversion efficiency.

[0038] In summary, the first passivation and antireflection structure 6, which includes a second intrinsic amorphous silicon layer 61 and a third transparent conductive layer 62, provided on the light-receiving surface 11 in this disclosure, can match the low-temperature characteristics of the first intrinsic amorphous silicon layer 31 and the first doped amorphous silicon layer 32 on the backlight surface 12. There is no need to worry about excessively high deposition temperatures affecting the characteristics of the amorphous silicon thin film on the backlight surface 12, resulting in high process compatibility. It can also improve the passivation and contact performance of the battery on the light-receiving surface 11 side.

[0039] In some embodiments, such as Figure 2As shown, based on the above scheme, the first passivation anti-reflection structure 6 of the hybrid passivation back contact solar cell further includes: a second doped amorphous silicon layer 63 disposed between the second intrinsic amorphous silicon layer 61 and the third transparent conductive layer 62.

[0040] A second doped amorphous silicon layer 63 is introduced between the second intrinsic amorphous silicon layer 61 and the third transparent conductive layer 62 on the light-receiving surface 11 of the battery, forming a combined film layer of intrinsic amorphous silicon / doped amorphous silicon. That is, firstly, by introducing a high-low junction, the field passivation effect is utilized to further reduce the synchronous convergence of carriers of opposite polarities to the light-receiving surface 11, thereby reducing surface recombination; secondly, due to the presence of a junction region on the light-receiving surface 11, it can also fully absorb short-wavelength ultraviolet light, effectively reducing ultraviolet-induced degradation (UVID) of the battery.

[0041] In some embodiments, such as Figure 1 As shown, the hybrid passivated back contact solar cell further includes: a second passivation anti-reflection structure 7 disposed on the side of the substrate layer 1, which connects the light-receiving surface 11 and the back-lighting surface 12; the second passivation anti-reflection structure 7 includes a third intrinsic amorphous silicon layer 71 and a fourth transparent conductive layer 72 stacked together, with the third intrinsic amorphous silicon layer 71 disposed relatively close to the side.

[0042] That is, a material layer of the same type as that on the light-receiving surface 11 can be introduced on one side, such as the third intrinsic amorphous silicon layer 71 and the fourth transparent conductive layer 72. Similarly, the third intrinsic amorphous silicon layer 71 can reduce carrier recombination on the side, improve the passivation performance and contact reliability of the side, and the fourth transparent conductive layer 72 can work synergistically with the third intrinsic amorphous silicon layer 71 to improve the passivation performance of the side, and avoid damage to the side passivation layer by the external environment, thereby further ensuring the photoelectric conversion efficiency of the battery.

[0043] In some embodiments, such as Figure 2 As shown, the first passivation anti-reflection structure 6 in the hybrid passivated back contact solar cell described above also includes a third doped amorphous silicon layer 73 disposed between the third intrinsic amorphous silicon layer 71 and the fourth transparent conductive layer 72.

[0044] Similarly, a third doped amorphous silicon layer 73 is introduced between the third intrinsic amorphous silicon layer 71 and the fourth transparent conductive layer 72 on the side of the battery, forming a combined intrinsic amorphous silicon / doped amorphous silicon film layer on the side as well. That is, by introducing high and low junctions on the side, the field passivation effect is used to further reduce the synchronous convergence of carriers of opposite polarities to the side of the battery, thereby reducing surface recombination on the side. Secondly, it can also fully absorb the short-wavelength ultraviolet light reaching the side, further reducing the ultraviolet-induced degradation (UVID) of the battery. Moreover, the first passivation antireflection structure 6 on the side has the same material composition as the first passivation antireflection structure 6 on the light-receiving surface 11, which helps to simplify the process steps, improve process compatibility, and thus improve mass production efficiency.

[0045] In some embodiments, the thicknesses of the first intrinsic amorphous silicon layer 31, the second intrinsic amorphous silicon layer 61, and the third intrinsic amorphous silicon layer 71 can be equal, the thicknesses of the first doped amorphous silicon layer 32, the second doped amorphous silicon layer 63, and the third doped amorphous silicon layer 73 can be equal, and the thicknesses of the first transparent conductive layer 51, the second transparent conductive layer 52, the third transparent conductive layer 62, and the fourth transparent conductive layer 72 can be equal, which simplifies the fabrication process.

[0046] In other embodiments, the thickness of the second intrinsic amorphous silicon layer 61 is less than the thickness of the first intrinsic amorphous silicon layer 31, and / or the thickness of the third intrinsic amorphous silicon layer 71 is greater than the thickness of the first intrinsic amorphous silicon layer 31.

[0047] That is, the thickness of the second intrinsic amorphous silicon layer 61 on the light-receiving surface 11 is less than the thickness of the first intrinsic amorphous silicon layer 31 on the backlight surface 12. This is because there are no gate lines on the second intrinsic amorphous silicon layer 61 on the light-receiving surface 11, so there is no need to worry about contact performance. Only passivation needs to be ensured. Moreover, the thinner second intrinsic amorphous silicon layer 61 on the light-receiving surface 11 can also reduce parasitic absorption of the film layer and improve the optical performance of the battery. Secondly, the thickness of the third intrinsic amorphous silicon layer 71 on the side is greater than the thickness of the first intrinsic amorphous silicon layer 31 on the backlight surface 12. This is because when forming the first intrinsic amorphous silicon layer 31 on the backlight surface 12 and the second intrinsic amorphous silicon layer 61 on the light-receiving surface 11, the intrinsic amorphous silicon material on the side can be retained, thus allowing for the deposition of a double layer of intrinsic amorphous silicon material on the side. That is, the thickness of the third intrinsic amorphous silicon layer 71 is the sum of the thicknesses of the first intrinsic amorphous silicon layer 31 and the second intrinsic amorphous silicon layer 61, which helps in the effective deposition of the intrinsic amorphous silicon thin film on the side of the substrate layer 1, resulting in sufficient passivation of the side. Of course, the double passivation material layer may also be appropriately thinned during the thickness process to reduce parasitic absorption.

[0048] On the other hand, this disclosure also provides a method for fabricating a hybrid passivated back-contact solar cell, used to fabricate the aforementioned hybrid passivated solar cell. Figure 3 The diagram below illustrates the process of this preparation method, which specifically includes the following steps: Step S100: Form a substrate layer 1, which includes a light-receiving surface 11 and a backlight surface 12 disposed opposite to each other.

[0049] For example, an n-type single-crystal silicon wafer cut by diamond wire is placed in an alkaline polishing bath for double-sided polishing. The temperature is maintained at 75~85℃ for 6~8 min, the polishing thickness is 3~7 μm, and the thinning amount is 0.35~0.45 g, ultimately forming the substrate layer 1 in this disclosure.

[0050] In step S200, a first passivation contact structure 2 and a second passivation contact structure 3 are alternately formed on the backlit surface 12 of the substrate layer 1. The first passivation contact structure 2 includes a tunneling oxide layer 21 and a doped polycrystalline silicon layer 22 stacked together. The second passivation contact structure 3 includes a first intrinsic amorphous silicon layer 31 and a first doped amorphous silicon layer 32 stacked together. The conductivity types of the first passivation contact structure 2 and the second passivation contact structure 3 are opposite.

[0051] For example, the first passivation contact structure 2 is a tunneling oxide layer 21 and an n-type doped polycrystalline silicon layer 22, and the second passivation contact structure 3 is a first intrinsic amorphous silicon layer 31 and a p-type doped first amorphous silicon layer 32. The steps for forming the first passivation contact structure 2 and the second passivation contact structure 3 specifically include: Step S201: Deposit the initial tunneling oxide layer 210 and the initial intrinsic polycrystalline silicon layer. First, an initial tunneling oxide layer 210 with a thickness between 1 and 10 nm is formed using low-pressure chemical vapor deposition (LPCVD). The oxygen flow rate is set to 10,000–80,000 sccm, the temperature to 400–800 °C, and the time to 200–1,000 s. The thickness of the formed initial tunneling oxide layer 210 ranges from 1 to 10 nm. Then, an initial intrinsic polycrystalline silicon layer is formed using LPCVD. The silane (SiH4) flow rate is set to 300–2,000 sccm, the temperature to 500–700 °C, the time to 2–4 h, and the working pressure to 100–500 mTorr. The thickness of the formed intrinsic polycrystalline silicon layer ranges from 100 to 300 nm. The initial tunneling oxide layer 210 and the initial intrinsic polycrystalline silicon layer completely cover the entire backlight surface 12, the light-receiving surface 11, and the sides of the substrate layer 1.

[0052] Step S202: Phosphorus diffusion is performed on the initial intrinsic amorphous silicon layer to form an initial doped polycrystalline silicon layer 220. The phosphorus diffusion conditions are as follows: first, a mixture of phosphorus oxychloride (POCl3) and oxygen is introduced, with a temperature of 750-850℃, a diffusion time of 5-30 min, a POCl3 flow rate carried by nitrogen of 500-1200 sccm, and an oxygen flow rate of 500-1000 sccm; then, oxygen is introduced for oxidation propagation, with a temperature of 850-950℃, a propagation time of 20-60 min, and an oxygen flow rate of 1000-10000 sccm, so that the initial intrinsic polycrystalline silicon layer becomes the initial doped polycrystalline silicon layer 220, and simultaneously a phosphorus silicate glass layer 230 with a thickness between 30 and 70 nm is formed on the surface of the initial doped polycrystalline silicon layer 220. Figure 4 As shown.

[0053] Step S203: Remove the phosphorus silicate glass layer 230 from the surface of the preset p-region of the backlight surface 12 using a patterned method. The conditions for laser patterned grooving are: laser wavelength 200~600 nm, pulse width 300~900 ps, ​​and power 50~100 W.

[0054] Step S204: Remove the phosphorus silicate glass layer 230 on the light-receiving surface 11 and the side surface. A chain etching machine is used to remove the phosphorus silicate glass layer 230 on the light-receiving surface 11 and the side surface of the substrate 1. The concentration of the hydrofluoric acid solution in the acid bath is set to 45~55 wt%, and the belt speed is 1~10 m / min.

[0055] Step S205, cleaning and texturing. Since the light-receiving surface 11, the side surfaces, and the preset p-regions on the back surface are free of the phosphorus-silicon glass layer 230, the initial first doped polysilicon layer 22 and the initial first tunneling oxide layer 21 exposed in these areas can be removed simultaneously during the cleaning and texturing process, and a pyramid textured surface structure can be formed simultaneously. At the same time, a first passivation contact structure 2 is formed in the preset n-region of the back-lighting surface 12, such as... Figure 5 As shown; the conditions for cleaning and texturing are: KOH solution concentration 1.5~1.8 wt%, temperature 80~85℃, time 6~12 min.

[0056] Step S206: Intrinsic amorphous silicon thin films are sequentially deposited on the light-receiving surface 11, the backlight surface 12, and the side surface. An intrinsic amorphous silicon thin film is sequentially deposited on the light-receiving surface 11 and the backlight surface 12 of the substrate layer 1 using a plate-type CVD equipment. Simultaneously, a double layer of intrinsic amorphous silicon is deposited around the side surface region of the substrate layer 1, forming an initial first intrinsic amorphous silicon layer 310 on the backlight surface 12. This initial first intrinsic amorphous silicon layer 310 covers the surface of the preset p-region of the backlight surface 12 and the surface of the first passivation contact structure 2. A second intrinsic amorphous silicon layer 61 is formed on the light-receiving surface 11, and a third intrinsic amorphous silicon layer 71 is formed on the side surface. The fabrication process parameters for the second intrinsic amorphous silicon layer 61 on the light-receiving surface 11 are: power density 10~500 mW / cm2, gas flow ratio of silane to hydrogen 1:1~1:10, gas pressure 10~500 Pa, and temperature 100~250℃. The thickness of the second intrinsic amorphous silicon layer 61 formed is 2~10 nm. The thickness of the first intrinsic amorphous silicon layer 31 deposited on the backlight surface 12 is 3~20 nm. The other conditions are the same as those for the light-receiving surface 11. The thickness of the third intrinsic amorphous silicon layer 71 on the side is 5~30 nm.

[0057] Step S207: An initial p-type first doped amorphous silicon layer 320 is formed on the backlight surface 12. The fabrication process parameters for the boron doping to form the initial p-type first doped amorphous silicon layer 320 are: power density 20~300 mW / cm². 2The gas flow rates of silane and hydrogen were 1:10 to 1:100, the gas flow rate ratio of diborane to silane was 100:1 to 3:1, the gas pressure was 50 to 500 Pa, and the temperature was 100 to 250 °C. The thickness of the initial first doped amorphous silicon layer 320 was 5 to 30 nm. Figure 6 As shown, the textured surface at the bottom of the p region on the backlight surface 12 is not shown.

[0058] Step S208 involves patterning the removal of a portion of the initial intrinsic amorphous silicon layer 310 and a portion of the initial doped amorphous silicon layer 320 located on the surface of the first passivation contact structure 2. First, a laser patterning oxidation method is used to oxidize the amorphous silicon material. The laser conditions are: laser wavelength 200~600 nm, pulse width 300~900 ps, ​​and power 2~10 W. Then, a chain-type wet hydrofluoric acid cleaning process is performed to remove the oxidant. The concentration of the hydrofluoric acid solution in the acid bath is 45~55 wt%, and the belt speed is 1~10 m / min. This exposes the portion of the first passivation contact structure 2, forming a second passivation contact structure 3 comprising the first intrinsic amorphous silicon layer 31 and the first doped amorphous silicon layer 32.

[0059] In step S300, a first electrode 41 and a second electrode 42 are formed. The first electrode 41 is connected to the first passivation contact structure 2, and the second electrode 42 is connected to the second passivation contact structure 3. The first electrode 41 is made of high-temperature slurry, and the second electrode 42 is made of low-temperature slurry.

[0060] Specifically, forming the first electrode 41 and the second electrode 42 includes the following steps: Step S301: Print high-temperature paste on the first passivated contact structure 2. The high-temperature paste mainly includes a conductive phase, a binder phase, and an organic carrier. The conductive phase of the high-temperature paste uses silver powder as the main conductive material, accounting for 80%~90% of the total paste volume. Aluminum powder can be used to form a silver-aluminum alloy with silver powder to form a good ohmic contact. The key component of the binder phase of the high-temperature paste is glass powder, which etches the passivation film at high temperature, allowing silver to be transported to the silicon interface and form an adhesion. Common systems include leaded glass and lead-free glass. Leaded glass can be a PbO-B2O3-SiO2 system, and lead-free glass can be a Bi2O3-B2O3-SiO2 or V2O5-TeO2-P2O5 system. The organic carrier of the high-temperature paste is mainly composed of organic solvents (such as terpineol, dodecyl alcohol ester), resins (such as ethyl cellulose), and additives (such as dispersants and thixotropic agents). Its function is to disperse the conductive phase and binder phase into a paste, which is convenient for screen printing and completely decomposes and volatilizes during the sintering process.

[0061] Step S302: The high-temperature slurry is laser-annealed to form the first electrode 41. The laser wavelength range during laser annealing is 200–600 nm, the pulse width range is 10–200 ns, the frequency is 10–100 kHz, and the power density range is 0.2–2.0 J / cm². 2 .

[0062] Step S303: Print low-temperature paste on the second passivated contact structure 3. The low-temperature paste mainly includes a conductive phase and a binder phase. The main conductive material in the conductive phase of the low-temperature paste is silver powder. Some specific structures of n-type batteries use silver-aluminum. The binder phase of the low-temperature paste usually uses organic resin instead of glass powder. It is cured at low temperature to bond the silver powder to the substrate. Some low-temperature sintering, such as silver-aluminum paste at about 720~750℃, also add a small amount of glass powder to assist sintering.

[0063] Step S304: The low-temperature slurry is subjected to low-temperature annealing to form the second electrode 42. The temperature range of the low-temperature annealing is 150~300℃.

[0064] In some embodiments, after forming the first passivation contact structure 2 and the second passivation contact structure 3, and before forming the first electrode 41 and the second electrode 42, the method further includes: sequentially depositing a transparent conductive film on the light-receiving surface 11, the backlight surface 12 and the side surface of the substrate layer 1.

[0065] Similar to step S206 above, a transparent conductive film is first deposited on the light-receiving surface 11 and the backlighting surface 12 of the substrate layer 1 using physical methods such as PVD or RPD. This transparent conductive film includes one or more of ITO, AZO, IWO, ICO, IZO, or other conductive films. For example, the transparent conductive film is an ITO film with a thickness of 50~200 nm and a refractive index of 1.5~2.5. Then, the transparent conductive film on the backlighting surface 12 is patterned, forming a pre-reserved contact groove a in the n-region and an insulating isolation groove b between the n-region and the p-region. Figure 7 As shown. Then, high-temperature paste is printed on the contact groove a reserved in the n region, followed by laser annealing to form an ohmic contact; low-temperature paste is printed on the transparent conductive film on the surface of the p region, i.e., the second transparent conductive film, and low-temperature annealing is used to form a contact.

[0066] Further functional descriptions of the above structures are the same as those of the corresponding embodiments described above, and will not be repeated here.

[0067] Although embodiments of the present disclosure have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the present disclosure, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. A hybrid passivated back-contact solar cell, characterized in that, include: The base layer includes a light-receiving surface and a backlighting surface that are positioned opposite to each other; A first passivation contact structure and a second passivation contact structure are alternately disposed on the backlight surface; the first passivation contact structure includes a tunneling oxide layer and a doped polycrystalline silicon layer stacked together, and the second passivation contact structure includes a first intrinsic amorphous silicon layer and a first doped amorphous silicon layer stacked together; the first passivation contact structure and the second passivation contact structure have opposite conductivity types. A first electrode and a second electrode, wherein the first electrode is adapted to be connected to the first passivated contact structure, and the second electrode is adapted to be connected to the second passivated contact structure; The first electrode uses a high-temperature paste, which is suitable for forming an ohmic contact with the first passivated contact structure after local laser annealing. The second electrode uses a low-temperature paste, which is suitable for forming a connection with the second passivated contact structure after low-temperature annealing.

2. The hybrid passivated back-contact solar cell according to claim 1, characterized in that, Also includes: A first transparent conductive layer and a second transparent conductive layer, wherein an isolation groove is provided between the first transparent conductive layer and the second transparent conductive layer to separate the two; The first transparent conductive layer is adapted to be disposed on the first passivated contact structure. The first transparent conductive layer includes a through-hole contact groove, and the first electrode is disposed in the contact groove to connect with the first passivated contact structure. The second transparent conductive layer is disposed on the second passivated contact structure, and the second electrode is disposed on the second transparent conductive layer.

3. The hybrid passivated back-contact solar cell according to claim 2, characterized in that, The width of the isolation groove is less than or equal to the width of the contact groove; The second passivation contact structure further extends to cover a portion of the surface of the first passivation contact structure to form a window area on the first passivation contact structure that exposes a portion of the first passivation contact structure. The width of the contact groove is greater than or equal to the width of the first electrode, and the width of the contact groove is less than the width of the window area.

4. The hybrid passivated back contact solar cell of claim 1, wherein, Also includes: A first passivation antireflection structure is disposed on the light-receiving surface of the substrate layer. The first passivation antireflection structure includes a second intrinsic amorphous silicon layer and a third transparent conductive layer stacked together. The second intrinsic amorphous silicon layer is disposed relatively close to the light-receiving surface.

5. The hybrid passivated back-contact solar cell according to claim 4, characterized in that, The first passivation anti-reflection structure further includes: A second doped amorphous silicon layer is disposed between the second intrinsic amorphous silicon layer and the third transparent conductive layer.

6. The hybrid passivated back-contact solar cell according to claim 5, characterized in that, Also includes: A second passivation anti-reflection structure is disposed on the side surface of the substrate layer, the side surface connecting the light-receiving surface and the backlight surface; the second passivation anti-reflection structure includes a third intrinsic amorphous silicon layer and a fourth transparent conductive layer stacked together, the third intrinsic amorphous silicon layer being disposed relatively close to the side surface.

7. The hybrid passivated back-contact solar cell according to claim 6, characterized in that The first passivation anti-reflection structure further includes: A third doped amorphous silicon layer is disposed between the third intrinsic amorphous silicon layer and the fourth transparent conductive layer.

8. The hybrid passivated back contact solar cell according to claim 6 or 7, characterized in that, The thickness of the second intrinsic amorphous silicon layer is less than or equal to the thickness of the first intrinsic amorphous silicon layer, and / or the thickness of the third intrinsic amorphous silicon layer is greater than or equal to the thickness of the first intrinsic amorphous silicon layer.

9. A method of manufacturing a hybrid passivated back contact solar cell, characterized in that, include: A substrate layer is formed, the substrate layer comprising a light-receiving surface and a backlight surface disposed opposite to each other; A first passivation contact structure and a second passivation contact structure are alternately formed on the backlight surface of the substrate layer. The first passivation contact structure includes a tunneling oxide layer and a doped polycrystalline silicon layer stacked together. The second passivation contact structure includes a first intrinsic amorphous silicon layer and a first doped amorphous silicon layer stacked together. The first passivation contact structure and the second passivation contact structure have opposite conductivity types. A first electrode and a second electrode are formed. The first electrode is connected to the first passivation contact structure, and the second electrode is connected to the second passivation contact structure. The first electrode is made of a high-temperature paste, which is suitable for forming an ohmic contact with the first passivation contact structure after local laser annealing. The second electrode is made of a low-temperature paste, which is suitable for forming a connection with the second passivation contact structure after low-temperature annealing.

10. The method of producing a hybrid passivated back-contact solar cell according to claim 9, characterized in that, Forming the first electrode and the second electrode includes: High-temperature paste is printed on the first passivated contact structure; The high-temperature slurry is subjected to laser annealing to form the first electrode. The laser wavelength range during laser annealing is 200–600 nm, the pulse width range is 10–200 ns, the frequency is 10–100 kHz, and the power density range is 0.2–2.0 J / cm². 2 ; Print a low-temperature paste onto the second passivated contact structure; The low-temperature slurry is subjected to low-temperature annealing to form a second electrode, wherein the temperature range of the low-temperature annealing is 150~300℃.

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