A method for growing a Ge epitaxial layer based on a Si substrate and a Ge / Si heterostructure
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-05-21
- Publication Date
- 2026-08-11
AI Technical Summary
[0003]然而,Si与Ge的固有特性差异导致现有外延生长工艺存在四大核心技术难题:(1)晶格失配引发高错位密度:Si的晶格常数为5.431Å,Ge为5.657Å,晶格失配率高达4.1%,远高于GaAs与Ge的失配率(0.07%);传统直接生长工艺中,晶格失配会在Ge外延层中产生大量穿通位错,位错密度可达108~109cm-2,严重降低器件载流子迁移率和可靠性;(2)热应力导致表面开裂:Si的热膨胀系数(2.6×10-6 K-1)仅为Ge的45%,高温生长(如550℃以上)后冷却过程中,热应力差会导致Ge外延层出现宏观开裂(尤其当厚度超过1μm时),良率低于50%;(3)界面氧化与成核不均:Si衬底表面易形成致密的SiO2层(即使室温下暴露空气也会生成2~3nm氧化层),传统HF清洗难以彻底去除,导致Ge原子在界面成核不均,表面粗糙度(RMS)超过2nm;(4)掺杂均匀性差:p型掺杂(以B为浅受主)过程中,B原子在Ge中的扩散系数易受生长温度波动影响,导致载流子浓度波动超过±10%,难以满足器件性能一致性要求
(1)位错密度大幅降低:SiGe渐变缓冲层实现晶格应力分步释放,Ge外延层位错密度≤106cm-2,较传统工艺降低2~3个数量级,满足高性能器件对晶体质量的要求;
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductors, and particularly relates to a method for growing Ge epitaxial layers on Si substrates and a Ge / Si heterostructure. Background Technology
[0002] Si substrates are the mainstream substrate material in the semiconductor industry due to their low cost, large size (capable of mass production of 12-18 inches), and mature technology (compatible with existing CMOS production lines); while Ge, as a typical group IV semiconductor, has a high hole mobility (approximately 1900 cm⁻¹ at room temperature). 2 With advantages such as high absorption rate (over 3 times that of Si) and high absorption coefficient in the near-infrared band (1.3~1.55μm communication window), Ge has become a key material for overcoming the performance bottleneck of Si-based devices. Integrating Ge epitaxial layers with Si substrates can simultaneously combine the mass production advantages of Si and the performance advantages of Ge, making it irreplaceable in the fields of high-frequency microelectronics and optoelectronics.
[0003] However, the inherent differences in properties between Si and Ge lead to four major technical challenges in existing epitaxial growth processes: (1) High dislocation density caused by lattice mismatch: The lattice constant of Si is 5.431 Å, and that of Ge is 5.657 Å, with a lattice mismatch rate as high as 4.1%, which is much higher than the mismatch rate of GaAs and Ge (0.07%). In traditional direct growth processes, lattice mismatch will generate a large number of through dislocations in the Ge epitaxial layer, with a dislocation density of up to 10. 8 ~10 9 cm -2 (2) Thermal stress leads to surface cracking: the thermal expansion coefficient of Si (2.6×10⁻⁶) is significantly reduced, which seriously reduces the carrier mobility and reliability of the device; -6 K -1 (3) Interface oxidation and uneven nucleation: A dense SiO2 layer is easily formed on the surface of the Si substrate (even when exposed to air at room temperature, a 2~3nm oxide layer will be generated). Traditional HF cleaning is difficult to completely remove it, resulting in uneven nucleation of Ge atoms at the interface and a surface roughness (RMS) exceeding 2nm. (4) Poor doping uniformity: During the p-type doping process (with B as the shallow acceptor), the diffusion coefficient of B atoms in Ge is easily affected by the growth temperature fluctuation, resulting in a carrier concentration fluctuation exceeding ±10%, which is difficult to meet the device performance consistency requirements.
[0004] Therefore, developing a Si-based growth method that can achieve thick (1~5μm), low-defect, and highly uniform Ge epitaxy is key to promoting the industrialization of Ge / Si heterointegration. Summary of the Invention
[0005] In view of this, the purpose of the present invention is to provide a method for growing Ge epitaxial layers based on Si substrates and a Ge / Si heterostructure. The present invention addresses the pain points of growing Si-based Ge epitaxial layers by MOCVD method, and can grow Ge epitaxial layers with high thickness, low defects and high uniformity on Si substrates.
[0006] This invention provides a method for growing a Ge epitaxial layer on a Si substrate, comprising the following steps: The Si substrate was placed in an MOCVD furnace, and a SiGe gradient buffer layer and a Ge epitaxial layer were grown sequentially on the surface of the Si substrate, followed by annealing. The Ge component content in the SiGe graded buffer layer linearly changes from 0 atomic% to 100 atomic% along the growth direction of the SiGe graded buffer layer; the growth thickness of the SiGe graded buffer layer is 200~500nm; The growth process of the Ge epitaxial layer includes: using H2 as the carrier gas and controlling the reactor pressure at 5 × 10⁻⁶. 3 ~8×10 3 Pa, adjust the reactor temperature to 300~350℃, and introduce GeH4 and B2H6 into the reactor. The flow rate of GeH4 is 7×10⁻⁶. -4 ~1×10 -3 The flow rate of B2H6 was 1.7 × 10 mol / min. -7 ~2.3×10 -7 The reaction was carried out at a constant flow rate of mol / min, and a Ge nucleation layer with a thickness of 20-30 nm was formed. Then, the reactor temperature was raised to 500-550℃, and the B2H6 flow rate was adjusted to 2.7 × 10⁻⁶ mol / min. -7 ~3.5×10 -7 The flow rate was increased to mol / min, and the growth was continued at this temperature until the total thickness of the Ge epitaxial layer reached 1~5 μm; afterwards, the B2H6 flow rate was adjusted back to 1.7×10 mol / min. -7 ~2.3×10 - 7 mol / min, continue growth for 10-20 min; The annealing process includes: using H2 as the carrier gas and controlling the reactor pressure at 5 × 10⁻⁶. 3 ~8×10 3 Pa, heat the reactor to 580~620℃, hold for 25~30min, and then cool to ambient temperature at a rate of 2~4℃ / min.
[0007] Preferably, the growth process of the SiGe graded buffer layer includes: using H2 as the carrier gas and controlling the reactor pressure to be 5 × 10⁻⁶. 3 ~8×10 3Pa, the reactor temperature was adjusted to 520℃, and GeH4 and SiH4 were introduced into the reactor for heat preservation and growth to form a SiGe graded buffer layer; during the heat preservation and growth period, the GeH4 flow rate increased linearly from 0 to 7×10 -4 ~1×10 -3 mol / min, SiH4 flow rate from 1×10 -3 ~1.5×10 -3 The flow rate decreased linearly to 0 mol / min.
[0008] Preferably, the growth rate of the SiGe gradient buffer layer is controlled at 2~3 nm / min.
[0009] Preferably, the process further includes the following step: chemically cleaning the Si substrate before placing it in the MOCVD reactor.
[0010] Preferably, the chemical cleaning process includes: immersing the Si substrate in a hydrofluoric acid solution, removing it, and then sequentially subjecting it to ultrasonic treatment in acetone, isopropanol, and water.
[0011] Preferably, the method further includes the following step: before growing the SiGe gradient buffer layer, the Si substrate placed in the MOCVD reactor is first passivated.
[0012] Preferably, the passivation process includes: using H2 as a carrier gas, introducing SiH4 into the reactor, adjusting the temperature of the reactor to 350~450℃, maintaining the temperature for growth, and forming a Si passivation layer.
[0013] Preferably, during the growth of the Ge epitaxial layer, the heating rate of the reactor to 500-550°C is 3-7°C / min.
[0014] Preferably, the growth rate of the Ge epitaxial layer during the continued heat preservation growth is controlled at 8~15 nm / min.
[0015] This invention provides a Ge / Si heterostructure, which is prepared by the Ge epitaxial layer growth method described above.
[0016] Compared with existing technologies, this invention provides a method for growing a Ge epitaxial layer on a Si substrate and a Ge / Si heterostructure. The Ge epitaxial layer growth method provided by this invention includes the following steps: placing a Si substrate in an MOCVD reactor, sequentially growing a SiGe graded buffer layer and a Ge epitaxial layer on the surface of the Si substrate, followed by annealing; the Ge component content in the SiGe graded buffer layer linearly grades from 0 atomic% to 100 atomic% along the growth direction of the SiGe graded buffer layer; the growth thickness of the SiGe graded buffer layer is 200~500 nm; the growth process of the Ge epitaxial layer includes: using H2 as the carrier gas and controlling the reactor pressure at 5×10⁻⁶. 3 ~8×10 3 Pa, adjust the reactor temperature to 300~350℃, and introduce GeH4 and B2H6 into the reactor. The flow rate of GeH4 is 7×10⁻⁶. -4 ~1×10 -3 The flow rate of B2H6 was 1.7 × 10 mol / min. -7 ~2.3×10 -7 The reaction was carried out at a constant flow rate of mol / min, and a Ge nucleation layer with a thickness of 20-30 nm was formed. Then, the reactor temperature was raised to 500-550℃, and the B2H6 flow rate was adjusted to 2.7 × 10⁻⁶ mol / min. -7 ~3.5×10 -7 The flow rate was increased to mol / min, and the growth was continued at this temperature until the total thickness of the Ge epitaxial layer reached 1~5 μm; afterwards, the B2H6 flow rate was adjusted back to 1.7×10 mol / min. -7 ~2.3×10 -7 mol / min, continue growth for 10-20 min; the annealing process includes: using H2 as the carrier gas and controlling the reactor pressure at 5×10 mol / min. 3 ~8×10 3 Pa, the reactor is heated to 580~620℃ and held for 25~30 min, then cooled to ambient temperature at a rate of 2~4℃ / min. This invention is based on low-pressure metal-organic chemical vapor deposition (LP-MOCVD) technology. By growing a SiGe gradient buffer layer on a Si substrate, employing a temperature control strategy of "low-temperature nucleation-medium-temperature bulk growth" and a p-type stepwise doping strategy with diborane (B2H6) during Ge epitaxial layer growth, combined with a slow annealing process, a high-thickness, low-defect, and highly uniform Ge epitaxial layer is grown on a Si substrate. The method provided by this invention can suppress the dislocation density caused by Si-Ge lattice mismatch to ≤10. 6 cm -2It eliminates surface cracking caused by thermal stress, with a Ge epitaxial layer surface roughness (RMS) ≤0.8nm and carrier concentration fluctuation ≤±4%. It is suitable for high-performance devices such as p-type metal-oxide-semiconductor field-effect transistors (p-MOSFETs) and near-infrared detectors, and is compatible with existing Si-based mass production processes, showing significant industrialization prospects. Detailed Implementation
[0017] The technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0018] This invention provides a method for growing a Ge epitaxial layer on a Si substrate, comprising the following steps: The Si substrate was placed in an MOCVD furnace, and a SiGe gradient buffer layer and a Ge epitaxial layer were grown sequentially on the surface of the Si substrate, followed by annealing.
[0019] In the method provided by this invention, the Si substrate is preferably chemically cleaned before being placed in the MOCVD furnace. The specific process of chemical cleaning preferably includes: immersing the Si substrate in a hydrofluoric acid solution, removing it, and then sequentially ultrasonically treating it in acetone, isopropanol (IPA), and water. The concentration of the hydrofluoric acid solution is preferably 3-8 wt%, more preferably 5 wt%; the immersion time is preferably 10-30 s, more preferably 20 s. The preferred hydrofluoric acid solution concentration and immersion time thoroughly remove the SiO2 layer from the Si substrate surface while avoiding excessive corrosion that could lead to a rough substrate surface. The purpose of the ultrasonic treatment is to remove organic impurities and particles from the Si substrate surface, ensuring substrate surface cleanliness. The ultrasonic treatment time in each medium is preferably 5-10 min, more preferably 8 min.
[0020] In the method provided by this invention, the Si substrate placed in the MOCVD reactor is preferably passivated before the growth of the SiGe gradient buffer layer. The passivation process preferably includes: introducing SiH4 into the reactor using H2 as a carrier gas, adjusting the reactor temperature to 350-450°C, and maintaining this temperature to grow the Si passivation layer. Preferably, the reactor temperature is adjusted to 400°C; the thickness of the Si passivation layer is preferably 10-15 nm, specifically 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, or 15 nm. In this invention, the passivation process prevents the substrate from contacting air, avoiding re-oxidation, and simultaneously provides a smooth initial interface for the subsequent growth of the SiGe buffer layer.
[0021] In the method provided by this invention, the Ge component content in the SiGe graded buffer layer linearly increases from 0 atomic% to 100 atomic% along the growth direction of the SiGe graded buffer layer. In this invention, the SiGe graded buffer layer, by adopting a "linear gradient of Ge component" design, can achieve "step-by-step stress release" (for every 25% increase in Ge component, approximately 25% of the stress is released), thereby "intercepting" dislocations caused by lattice mismatch within the buffer layer and preventing them from extending upwards to the Ge epitaxial layer.
[0022] In the method provided by this invention, the growth process of the SiGe graded buffer layer preferably includes: using H2 as the carrier gas and controlling the reactor pressure to be 5 × 10⁻⁶. 3 ~8×10 3 Pa, the reactor temperature was adjusted to 520℃, and GeH4 and SiH4 were introduced into the reactor for heat preservation and growth to form a SiGe graded buffer layer; during the heat preservation and growth period, the GeH4 flow rate increased linearly from 0 to 7×10 -4 ~1×10 -3 mol / min, SiH4 flow rate from 1×10 -3 ~1.5×10 -3 The growth rate of the SiGe gradient buffer layer is linearly reduced to 0 mol / min. In this invention, the growth temperature of the SiGe gradient buffer layer is kept constant at 520℃ to ensure that Si and Ge atoms diffuse sufficiently to form a uniform SiGe solid solution and avoid component segregation.
[0023] In the method provided by this invention, during the growth of the SiGe graded buffer layer, the reactor pressure can be specifically controlled at 5 × 10⁻⁶. 3 Pa, 5.5 × 10 3 Pa, 6×10 3 Pa, 6.5 × 10 3 Pa, 7×10 3 Pa, 7.5 × 10 3 Pa or 8×10 3 Pa; the GeH4 flow rate can be increased to 8.5 × 10 Pa. -4 mol / min; the initial value of the SiH4 flow rate can specifically be 1.2 × 10⁻⁶ mol / min. - 3 mol / min.
[0024] In the method provided by this invention, the growth rate of the SiGe graded buffer layer is preferably controlled to be 2~3 nm / min, specifically 2 nm / min, 2.1 nm / min, 2.2 nm / min, 2.3 nm / min, 2.4 nm / min, 2.5 nm / min, 2.6 nm / min, 2.7 nm / min, 2.8 nm / min, 2.9 nm / min or 3 nm / min; the growth thickness of the SiGe graded buffer layer is preferably 200~500 nm, specifically 200 nm, 230 nm, 250 nm, 270 nm, 300 nm, 320 nm, 350 nm, 370 nm, 400 nm, 420 nm, 450 nm, 470 nm or 500 nm.
[0025] In the method provided by this invention, the growth process of the Ge epitaxial layer includes: using H2 as a carrier gas and controlling the reactor pressure to be 5 × 10⁻⁶. 3 ~8×10 3 Pa, adjust the reactor temperature to 300~350℃, and introduce GeH4 and B2H6 into the reactor. The flow rate of GeH4 is 7×10⁻⁶. -4 ~1×10 -3 The flow rate of B2H6 was 1.7 × 10 mol / min. -7 ~2.3×10 -7 The reaction was carried out at a constant flow rate of mol / min, and a Ge nucleation layer with a thickness of 20-30 nm was formed. Then, the reactor temperature was raised to 500-550℃, and the B2H6 flow rate was adjusted to 2.7 × 10⁻⁶ mol / min. -7 ~3.5×10 -7 The flow rate was increased to mol / min, and the growth was continued at this temperature until the total thickness of the Ge epitaxial layer reached 1~5 μm; afterwards, the B2H6 flow rate was adjusted back to 1.7×10 mol / min. -7 ~2.3×10 -7 mol / min, continue growth for 10-20 min.
[0026] In the method provided by this invention, the growth process of the Ge epitaxial layer adopts a temperature control strategy of "low-temperature nucleation-medium-temperature bulk growth" and a p-type stepwise doping strategy of B2H6. Specifically: Low-temperature nucleation (300~350℃): The low-temperature environment can reduce the surface mobility of Ge atoms, avoid three-dimensional island nucleation (Volmer-Weber mode), promote two-dimensional layered nucleation (Frank-van der Merwe mode), and reduce initial defects; the thickness of the nucleation layer is controlled at 20~30nm, laying a flat foundation for the growth of the main body; Medium-temperature bulk growth (500~550℃): Medium temperature can improve the migration rate of Ge atoms, reduce growth defects, and at the same time avoid the accumulation of thermal stress caused by high temperature (>550℃); Stepwise doping: Using B₂H₆ as the p-type doping source, the flux was adjusted according to the atomic adsorption characteristics at different growth stages of the Ge epitaxial layer: during the nucleation stage, B₂H₆ was kept at a low flux (1.7 × 10⁻⁶). -7 ~2.3×10 -7 To avoid defects caused by excessive initial layer doping, the B2H6 flow rate was increased (2.7 × 10⁻⁶ mol / min) during the main phase. -7 ~3.5×10 -7 mol / min), to ensure uniform doping concentration; at the end, adjust the B2H6 flow rate (1.7×10 mol / min) to ensure uniform doping concentration; -7 ~2.3×10 -7 (mol / min) to avoid the aggregation of surface B atoms and reduce surface resistance.
[0027] In the method provided by this invention, during the growth of the Ge epitaxial layer, the reactor pressure can be specifically controlled at 5 × 10⁻⁶. 3 Pa, 5.5 × 10 3 Pa, 6×10 3 Pa, 6.5 × 10 3 Pa, 7×10 3 Pa, 7.5 × 10 3 Pa or 8×10 3 Pa; the reactor temperature during the low-temperature nucleation stage can be specifically adjusted to 300℃, 310℃, 320℃, 330℃, 340℃, or 350℃; the GeH4 flow rate during the low-temperature nucleation stage can be 8.5×10 Pa. -4 mol / min; the specific flow rate of B2H6 during the low-temperature nucleation stage can be 2×10 mol / min. -7 The specific thickness of the Ge nucleation layer in the low-temperature nucleation stage can be 20 nm, 21 nm, 22 nm, 23 nm, 24 nm, 25 nm, 26 nm, 27 nm, 28 nm, 29 nm, or 30 nm; the specific reactor temperature in the intermediate-temperature main growth stage can be adjusted to 500℃, 510℃, 520℃, 530℃, 540℃, or 550℃; the heating rate of the reactor required to reach the intermediate-temperature main growth stage is preferably 3~7℃ / min, more preferably 5℃ / min; the specific B2H6 flow rate in the intermediate-temperature main growth stage can be adjusted to 3×10 mol / min. -7The growth rate of the Ge epitaxial layer during the intermediate-temperature main growth stage is preferably controlled at 8~15 nm / min to balance efficiency and quality, specifically 8 nm / min, 9 nm / min, 10 nm / min, 11 nm / min, 12 nm / min, 13 nm / min, 14 nm / min or 15 nm / min; the total thickness of the Ge epitaxial layer during the low-temperature nucleation stage and the intermediate-temperature main growth stage can be 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, 3.5 μm, 4 μm, 4.5 μm or 5 μm; the B2H6 flux during the final stage of B2H6 doping can be adjusted back to 2×10 mol / min. -7 mol / min; the growth time at the end of the B2H6 doping stage can be 15 min.
[0028] In the method provided by this invention, the annealing process includes: using H2 as the carrier gas and controlling the reactor pressure to be 5 × 10⁻⁶. 3 ~8×10 3 Pa, the reactor is heated to 580~620℃ and held for 25~30 min, then cooled to ambient temperature at a rate of 2~4℃ / min. In this invention, the annealing temperature is controlled at 580~620℃, which is lower than the melting point of Ge (938℃) and higher than the main growth temperature, which can promote lattice atomic rearrangement and eliminate residual stress generated during growth; the cooling rate is controlled at 2~4℃ / min, which can avoid thermal shock caused by rapid cooling and further reduce the risk of cracking.
[0029] In the method provided by this invention, during the annealing process, the pressure of the reactor can be specifically controlled at 5 × 10⁻⁶. 3 Pa, 5.5 × 10 3 Pa, 6×10 3 Pa, 6.5 × 10 3 Pa, 7×10 3 Pa, 7.5 × 10 3 Pa or 8×10 3 Pa; the temperature of the reactor can be raised to 580℃, 585℃, 590℃, 595℃, 600℃, 605℃, 610℃, 615℃ or 620℃; the holding time can be 25min, 26min, 27min, 28min, 29min or 30min; the cooling rate can be 2℃ / min, 2.5℃ / min, 3℃ / min, 3.5℃ / min or 4℃ / min.
[0030] The present invention also provides a Ge / Si heterostructure, which is prepared by the Ge epitaxial layer growth method described in the above technical solution.
[0031] The technical solution provided by this invention addresses the shortcomings of the MOCVD method for growing Si-based Ge epitaxial layers, enabling the growth of high-thickness, low-defect, and highly uniform Ge epitaxial layers on Si substrates. More specifically, it has at least the following advantages: (1) Significantly reduced dislocation density: The SiGe graded buffer layer achieves stepwise release of lattice stress, and the dislocation density of the Ge epitaxial layer is ≤10. 6 cm -2 This reduces the crystal quality by 2 to 3 orders of magnitude compared to traditional processes, meeting the requirements of high-performance devices for crystal quality. (2) No surface cracking and high flatness: The synergistic effect of low temperature nucleation, medium temperature growth and slow annealing completely eliminates the cracking problem of Ge epitaxial layer (thickness 1~5μm), and the surface roughness (RMS) is ≤0.8nm, which is better than the 2nm level of existing processes; (3) Excellent doping uniformity: The step-by-step doping strategy ensures that the carrier concentration fluctuation is ≤±4%, which ensures the consistency of device performance and is suitable for mass production; (4) Strong process compatibility: All steps are based on LP-MOCVD (low-pressure metal-organic chemical vapor deposition) equipment, without the need for additional special equipment, and can be directly connected to existing 12-inch Si-based CMOS production lines, resulting in low industrialization costs.
[0032] For clarity, the following detailed description is provided through the embodiments. In the embodiments of the present invention, the growth equipment used is a horizontal LP-MOCVD reactor (model: Aixtron G5+), the carrier gas is H2 (purity 99.999%), the Ge source is GeH4 (purity 99.999%), the Si source is SiH4 (purity 99.999%), and the p-type doping source is B2H6 (dilution concentration 100ppm, carrier gas is H2).
[0033] Example 1
[0034] The growth of Ge epitaxial layers based on Si substrates includes the following specific processes: 1) Substrate pretreatment: Take a 12-inch Si(100) substrate (resistivity 1~10Ω·cm), immerse it in 5wt% HF solution for 20s at room temperature, and then sonicate it in acetone, IPA, and deionized water for 8min each; place the substrate in the MOCVD reactor, maintain the H2 atmosphere, and introduce SiH4 (1.2×10⁻⁶) into the reactor. -3 (mol / min), heat to 400℃ and hold for 10 min to grow a 12 nm Si passivation layer.
[0035] 2) SiGe graded buffer layer growth: Maintain H2 atmosphere and adjust reactor pressure to 6×10⁻⁶. 3 Pa, temperature increased to 520℃; GeH4 flow rate linearly increased from 0 to 8.5×10 Pa. -4mol / min, SiH4 flow rate from 1.2 × 10 -3 The mol / min was linearly reduced to 0 to grow a 300 nm thick SiGe graded buffer layer.
[0036] 3) Ge epitaxial layer growth and stepwise doping: maintaining H2 atmosphere and reactor pressure (6×10⁻⁶). 3 The reactor was cooled to 320°C, and GeH4 (8.5 × 10⁻⁶ Pa) was introduced. -4 mol / min) and B2H6 (2×10 -7 The flow rate was increased to 520 °C at 5 °C / min, and the GeH4 flow rate was kept constant for 22 min to grow a 25 nm Ge nucleation layer. Subsequently, the furnace temperature was increased to 520 °C at 5 °C / min, the GeH4 flow rate was kept constant, and the B2H6 flow rate was adjusted to 3 × 10⁻⁶. - 7 The flow rate was increased to mol / min, and the Ge layer was grown to a total thickness of 1 μm (growth time approximately 78 min). Finally, while maintaining the furnace temperature and GeH4 flow rate, the B2H6 flow rate was adjusted back to 2 × 10⁻⁶. -7 mol / min, continue growth for 15 min.
[0037] 4) High-temperature annealing: Maintain H2 atmosphere and reactor pressure (6×10). 3 The reactor was heated to 600℃ and held for 28 min; then cooled to room temperature at a rate of 3℃ / min to obtain a Ge / Si heterostructure sample.
[0038] The performance of the Ge / Si heterostructure sample prepared in this embodiment was tested, and the results are as follows: Crystal quality: HRXRD (004) peak FWHM = 0.015°; Surface morphology: AFM test RMS=0.6nm, no cracking; Dislocation density: 8 × 10⁻⁶ according to SEM corrosion statistics. 5 cm -2 ; Electrical performance: Hall effect carrier concentration = 1.2 × 10⁻⁶ 16 cm -3 Fluctuation ±2.5%; Interface diffusion: SIMS test showed that the interdiffusion length at the Ge / SiGe interface was 25 nm.
[0039] Example 2
[0040] The growth of Ge epitaxial layers based on Si substrates includes the following specific processes: 1) Substrate pretreatment: Same as in Example 1, but adjust the holding time to obtain a 10nm Si passivation layer.
[0041] 2) SiGe graded buffer layer growth: Maintain H2 atmosphere and adjust reactor pressure to 5×10⁻⁶. 3 Pa, temperature increased to 520℃; GeH4 flow rate linearly increased from 0 to 8.5×10 Pa. -4 mol / min, SiH4 flow rate from 1.2 × 10 -3 The mol / min was linearly reduced to 0 to grow a 400 nm thick SiGe graded buffer layer.
[0042] 3) Ge epitaxial layer growth and stepwise doping: Maintaining H2 atmosphere and reactor pressure (5×10⁻⁶) 3 The reactor was cooled to 300°C, and GeH4 (8.5 × 10⁻⁶ Pa) was introduced. -4 mol / min) and B2H6 (2×10 -7 The flow rate was increased to 10 mol / min, and the temperature was maintained for 20 min to grow a 20 nm Ge nucleation layer. Subsequently, the furnace temperature was increased to 500 °C at 5 °C / min, while the GeH4 flow rate was kept constant and the B2H6 flow rate was adjusted to 3 × 10⁻⁶. - 7 The flow rate was increased to mol / min, and the Ge layer was grown to a total thickness of 3 μm (growth time approximately 240 min). Finally, while maintaining the furnace temperature and GeH4 flow rate, the B2H6 flow rate was adjusted back to 2 × 10⁻⁶. -7 mol / min, continue growth for 15 min.
[0043] 4) High-temperature annealing: Maintain H2 atmosphere and reactor pressure (5×10⁻⁶). 3 The reactor was heated to 620℃ and held for 25 min; then cooled to room temperature at a rate of 3℃ / min to obtain Ge / Si heterostructure samples.
[0044] The performance of the Ge / Si heterostructure sample prepared in this embodiment was tested, and the results are as follows: Crystal quality: HRXRD (004) peak FWHM = 0.018°; Surface morphology: AFM test RMS=0.7nm, no cracking; Dislocation density: 9.5 × 10⁻⁶ according to SEM corrosion statistics. 5 cm -2 ; Electrical performance: Hall effect carrier concentration = 5.3 × 10⁻⁶ 16 cm -3 Fluctuation ±1.9%; Interface diffusion: SIMS test showed that the interdiffusion length at the Ge / SiGe interface was 28 nm.
[0045] Example 3
[0046] The growth of Ge epitaxial layers based on Si substrates includes the following specific processes: 1) Substrate pretreatment: Same as in Example 1, but adjust the holding time to obtain a 15nm Si passivation layer.
[0047] 2) SiGe graded buffer layer growth: Maintain H2 atmosphere and adjust reactor pressure to 8×10⁻⁶. 3 Pa, temperature increased to 520℃; GeH4 flow rate linearly increased from 0 to 8.5×10 Pa. -4 mol / min, SiH4 flow rate from 1.2 × 10 -3 The mol / min was linearly reduced to 0 to grow a 500 nm thick SiGe graded buffer layer.
[0048] 3) Ge epitaxial layer growth and stepwise doping: maintaining H2 atmosphere and reactor pressure (8×10⁻⁶) 3 The reactor was cooled to 350°C, and GeH4 (8.5 × 10⁻⁶ Pa) was introduced. -4 mol / min) and B2H6 (2×10 -7 The flow rate was increased to 10 mol / min, and the temperature was maintained for 25 min to grow a 30 nm Ge nucleation layer. Subsequently, the furnace temperature was increased to 550 °C at 5 °C / min, while the GeH4 flow rate was kept constant and the B2H6 flow rate was adjusted to 3 × 10⁻⁶. - 7 The flow rate was increased to mol / min, and the Ge layer was grown to a total thickness of 5 μm (growth time approximately 390 min). Finally, while maintaining the furnace temperature and GeH4 flow rate, the B2H6 flow rate was adjusted back to 2 × 10⁻⁶. -7 mol / min, continue growth for 15 min.
[0049] 4) High-temperature annealing: Maintain H2 atmosphere and reactor pressure (8×10⁻⁶). 3 The reactor was heated to 580℃ and held for 30 min; then cooled to room temperature at a rate of 3℃ / min to obtain a Ge / Si heterostructure sample.
[0050] The performance of the Ge / Si heterostructure sample prepared in this embodiment was tested, and the results are as follows: Crystal quality: HRXRD (004) peak FWHM = 0.020°; Surface morphology: AFM test RMS=0.8nm, no cracking; Dislocation density: 9.8 × 10⁻⁶ according to SEM corrosion statistics. 5 cm -2 ; Electrical performance: Hall effect carrier concentration = 9.5 × 10⁻⁶ 16 cm -3 Fluctuation ±3.8%; Interface diffusion: SIMS test showed that the interdiffusion length at the Ge / SiGe interface was 30 nm.
[0051] The verification results of Examples 1-3 show that the growth method of the present invention can stably prepare Ge epitaxial layers with a thickness of 1-5 μm, and all performance indicators meet the requirements of high-performance devices. Moreover, the process has good repeatability (performance fluctuation ≤ ±5% in 3 repeated experiments), and is ready for industrial application.
[0052] The Ge / Si heterostructure prepared by this invention can be directly applied to the following core devices: p-MOSFET: The high hole mobility of the Ge epitaxial layer can increase the switching speed of the device by 2 to 3 times, which is suitable for 5G / 6G high-frequency communication chips; Near-infrared detector: The 1.6μm cutoff wavelength of Ge can cover the communication window. Combined with the mass production advantages of Si substrate, low-cost near-infrared imaging and sensing can be realized; Integrated optoelectronic devices: The Ge / Si heterostructure can be integrated with Si-based photonic devices (such as Si waveguides and modulators) to realize "optical-electrical-optical" all-Si-based integration, and promote the development of high-speed optical interconnects in data centers.
[0053] The process of this invention does not require modification of existing Si-based production lines, and the cost per wafer is reduced by more than 60% compared to Ge epitaxy on GaAs substrates, which has significant economic value and market prospects.
[0054] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.
Claims
1. A method for growing a Ge epitaxial layer on a Si substrate, characterized in that, Includes the following steps: The Si substrate was placed in an MOCVD furnace, and a SiGe gradient buffer layer and a Ge epitaxial layer were grown sequentially on the surface of the Si substrate, followed by annealing. The Ge component content in the SiGe graded buffer layer linearly changes from 0 atomic% to 100 atomic% along the growth direction of the SiGe graded buffer layer; the growth thickness of the SiGe graded buffer layer is 200~500nm; The growth process of the Ge epitaxial layer includes: using H2 as the carrier gas and controlling the reactor pressure at 5 × 10⁻⁶. 3 ~8×10 3 Pa, adjust the reactor temperature to 300~350℃, and introduce GeH4 and B2H6 into the reactor. The flow rate of GeH4 is 7×10⁻⁶. -4 ~1×10 -3 The flow rate of B2H6 was 1.7 × 10 mol / min. -7 ~2.3×10 -7 The reaction was carried out at a constant flow rate of mol / min, and a Ge nucleation layer with a thickness of 20-30 nm was formed. Then, the reactor temperature was raised to 500-550℃, and the B2H6 flow rate was adjusted to 2.7 × 10⁻⁶ mol / min. -7 ~3.5×10 -7 The flow rate was increased to mol / min, and the growth was continued at this temperature until the total thickness of the Ge epitaxial layer reached 1~5 μm; afterwards, the B2H6 flow rate was adjusted back to 1.7×10 mol / min. -7 ~2.3×10 -7 mol / min, continue growth for 10-20 min; The annealing process includes: using H2 as the carrier gas and controlling the reactor pressure at 5 × 10⁻⁶. 3 ~8×10 3 Pa, heat the reactor to 580~620℃, hold for 25~30min, and then cool to ambient temperature at a rate of 2~4℃ / min.
2. The method for growing a Ge epitaxial layer according to claim 1, characterized in that, The growth process of the SiGe graded buffer layer includes: using H2 as the carrier gas and controlling the reactor pressure at 5 × 10⁻⁶. 3 ~8×10 3 Pa, the reactor temperature was adjusted to 520℃, and GeH4 and SiH4 were introduced into the reactor for heat preservation and growth to form a SiGe graded buffer layer; during the heat preservation and growth period, the GeH4 flow rate increased linearly from 0 to 7×10 -4 ~1×10 -3 mol / min, SiH4 flow rate from 1×10 -3 ~1.5×10 -3 The flow rate decreased linearly to 0 mol / min.
3. The method for growing a Ge epitaxial layer according to claim 2, characterized in that, The growth rate of the SiGe gradient buffer layer is controlled at 2~3 nm / min.
4. The method for growing a Ge epitaxial layer according to claim 1, characterized in that, It also includes the following steps: The Si substrate is chemically cleaned before being placed in the MOCVD reactor.
5. The method for growing a Ge epitaxial layer according to claim 4, characterized in that, The chemical cleaning process includes immersing the Si substrate in a hydrofluoric acid solution, removing it, and then sequentially placing it in acetone, isopropanol, and water for ultrasonic treatment.
6. The method for growing a Ge epitaxial layer according to claim 1, characterized in that, It also includes the following steps: Before growing the SiGe gradient buffer layer, the Si substrate placed in the MOCVD reactor is first passivated.
7. The method for growing a Ge epitaxial layer according to claim 6, characterized in that, The passivation process includes: using H2 as a carrier gas, introducing SiH4 into the reactor, adjusting the temperature of the reactor to 350~450℃, maintaining the temperature for growth, and forming a Si passivation layer.
8. The method for growing a Ge epitaxial layer according to claim 1, characterized in that, During the growth of the Ge epitaxial layer, the heating rate of the reactor to 500~550℃ is 3~7℃ / min.
9. The method for growing a Ge epitaxial layer according to claim 1, characterized in that, The growth rate of the Ge epitaxial layer during the continued heat preservation growth is controlled at 8~15 nm / min.
10. A Ge / Si heterostructure, characterized in that, It was prepared using the Ge epitaxial layer growth method according to any one of claims 1 to 9.